Dirk Hohndel (VMware) | dff9688 | 2018-05-07 01:16:26 +0200 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 OR MIT |
Jakob Bornecrantz | 56d1c78 | 2011-10-04 20:13:22 +0200 | [diff] [blame] | 2 | /************************************************************************** |
| 3 | * |
Dirk Hohndel (VMware) | dff9688 | 2018-05-07 01:16:26 +0200 | [diff] [blame] | 4 | * Copyright 2011-2015 VMware, Inc., Palo Alto, CA., USA |
Jakob Bornecrantz | 56d1c78 | 2011-10-04 20:13:22 +0200 | [diff] [blame] | 5 | * |
| 6 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 7 | * copy of this software and associated documentation files (the |
| 8 | * "Software"), to deal in the Software without restriction, including |
| 9 | * without limitation the rights to use, copy, modify, merge, publish, |
| 10 | * distribute, sub license, and/or sell copies of the Software, and to |
| 11 | * permit persons to whom the Software is furnished to do so, subject to |
| 12 | * the following conditions: |
| 13 | * |
| 14 | * The above copyright notice and this permission notice (including the |
| 15 | * next paragraph) shall be included in all copies or substantial portions |
| 16 | * of the Software. |
| 17 | * |
| 18 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 19 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 20 | * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL |
| 21 | * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, |
| 22 | * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR |
| 23 | * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE |
| 24 | * USE OR OTHER DEALINGS IN THE SOFTWARE. |
| 25 | * |
| 26 | **************************************************************************/ |
| 27 | |
| 28 | #include "vmwgfx_kms.h" |
Daniel Vetter | 3cb9ae4 | 2014-10-29 10:03:57 +0100 | [diff] [blame] | 29 | #include <drm/drm_plane_helper.h> |
Sinclair Yeh | d7721ca | 2017-03-23 11:48:44 -0700 | [diff] [blame] | 30 | #include <drm/drm_atomic.h> |
| 31 | #include <drm/drm_atomic_helper.h> |
Deepak Rawat | 61c2138 | 2018-08-08 15:41:56 -0700 | [diff] [blame] | 32 | #include <drm/drm_damage_helper.h> |
Jakob Bornecrantz | 56d1c78 | 2011-10-04 20:13:22 +0200 | [diff] [blame] | 33 | |
| 34 | |
| 35 | #define vmw_crtc_to_sou(x) \ |
| 36 | container_of(x, struct vmw_screen_object_unit, base.crtc) |
| 37 | #define vmw_encoder_to_sou(x) \ |
| 38 | container_of(x, struct vmw_screen_object_unit, base.encoder) |
| 39 | #define vmw_connector_to_sou(x) \ |
| 40 | container_of(x, struct vmw_screen_object_unit, base.connector) |
| 41 | |
Thomas Hellstrom | 10b1e0c | 2015-06-26 02:14:27 -0700 | [diff] [blame] | 42 | /** |
| 43 | * struct vmw_kms_sou_surface_dirty - Closure structure for |
| 44 | * blit surface to screen command. |
| 45 | * @base: The base type we derive from. Used by vmw_kms_helper_dirty(). |
| 46 | * @left: Left side of bounding box. |
| 47 | * @right: Right side of bounding box. |
| 48 | * @top: Top side of bounding box. |
| 49 | * @bottom: Bottom side of bounding box. |
| 50 | * @dst_x: Difference between source clip rects and framebuffer coordinates. |
| 51 | * @dst_y: Difference between source clip rects and framebuffer coordinates. |
| 52 | * @sid: Surface id of surface to copy from. |
| 53 | */ |
| 54 | struct vmw_kms_sou_surface_dirty { |
| 55 | struct vmw_kms_dirty base; |
| 56 | s32 left, right, top, bottom; |
| 57 | s32 dst_x, dst_y; |
| 58 | u32 sid; |
| 59 | }; |
| 60 | |
| 61 | /* |
| 62 | * SVGA commands that are used by this code. Please see the device headers |
| 63 | * for explanation. |
| 64 | */ |
| 65 | struct vmw_kms_sou_readback_blit { |
| 66 | uint32 header; |
| 67 | SVGAFifoCmdBlitScreenToGMRFB body; |
| 68 | }; |
| 69 | |
Thomas Hellstrom | f1d34bf | 2018-06-19 15:02:16 +0200 | [diff] [blame] | 70 | struct vmw_kms_sou_bo_blit { |
Thomas Hellstrom | 10b1e0c | 2015-06-26 02:14:27 -0700 | [diff] [blame] | 71 | uint32 header; |
| 72 | SVGAFifoCmdBlitGMRFBToScreen body; |
| 73 | }; |
| 74 | |
| 75 | struct vmw_kms_sou_dirty_cmd { |
| 76 | SVGA3dCmdHeader header; |
| 77 | SVGA3dCmdBlitSurfaceToScreen body; |
| 78 | }; |
| 79 | |
Deepak Rawat | 5d35aba | 2018-08-08 15:02:48 -0700 | [diff] [blame] | 80 | struct vmw_kms_sou_define_gmrfb { |
| 81 | uint32_t header; |
| 82 | SVGAFifoCmdDefineGMRFB body; |
| 83 | }; |
| 84 | |
Jakob Bornecrantz | 56d1c78 | 2011-10-04 20:13:22 +0200 | [diff] [blame] | 85 | /** |
| 86 | * Display unit using screen objects. |
| 87 | */ |
| 88 | struct vmw_screen_object_unit { |
| 89 | struct vmw_display_unit base; |
| 90 | |
| 91 | unsigned long buffer_size; /**< Size of allocated buffer */ |
Thomas Hellstrom | f1d34bf | 2018-06-19 15:02:16 +0200 | [diff] [blame] | 92 | struct vmw_buffer_object *buffer; /**< Backing store buffer */ |
Jakob Bornecrantz | 56d1c78 | 2011-10-04 20:13:22 +0200 | [diff] [blame] | 93 | |
| 94 | bool defined; |
Jakob Bornecrantz | 56d1c78 | 2011-10-04 20:13:22 +0200 | [diff] [blame] | 95 | }; |
| 96 | |
| 97 | static void vmw_sou_destroy(struct vmw_screen_object_unit *sou) |
| 98 | { |
Sinclair Yeh | c8261a9 | 2015-06-26 01:23:42 -0700 | [diff] [blame] | 99 | vmw_du_cleanup(&sou->base); |
Jakob Bornecrantz | 56d1c78 | 2011-10-04 20:13:22 +0200 | [diff] [blame] | 100 | kfree(sou); |
| 101 | } |
| 102 | |
| 103 | |
| 104 | /* |
| 105 | * Screen Object Display Unit CRTC functions |
| 106 | */ |
| 107 | |
| 108 | static void vmw_sou_crtc_destroy(struct drm_crtc *crtc) |
| 109 | { |
| 110 | vmw_sou_destroy(vmw_crtc_to_sou(crtc)); |
| 111 | } |
| 112 | |
Jakob Bornecrantz | 56d1c78 | 2011-10-04 20:13:22 +0200 | [diff] [blame] | 113 | /** |
| 114 | * Send the fifo command to create a screen. |
| 115 | */ |
| 116 | static int vmw_sou_fifo_create(struct vmw_private *dev_priv, |
| 117 | struct vmw_screen_object_unit *sou, |
Deepak Rawat | 3e79ecd | 2018-06-20 11:34:26 +0200 | [diff] [blame] | 118 | int x, int y, |
Jakob Bornecrantz | 56d1c78 | 2011-10-04 20:13:22 +0200 | [diff] [blame] | 119 | struct drm_display_mode *mode) |
| 120 | { |
| 121 | size_t fifo_size; |
| 122 | |
| 123 | struct { |
| 124 | struct { |
| 125 | uint32_t cmdType; |
| 126 | } header; |
| 127 | SVGAScreenObject obj; |
| 128 | } *cmd; |
| 129 | |
| 130 | BUG_ON(!sou->buffer); |
| 131 | |
| 132 | fifo_size = sizeof(*cmd); |
| 133 | cmd = vmw_fifo_reserve(dev_priv, fifo_size); |
| 134 | /* The hardware has hung, nothing we can do about it here. */ |
| 135 | if (unlikely(cmd == NULL)) { |
| 136 | DRM_ERROR("Fifo reserve failed.\n"); |
| 137 | return -ENOMEM; |
| 138 | } |
| 139 | |
| 140 | memset(cmd, 0, fifo_size); |
| 141 | cmd->header.cmdType = SVGA_CMD_DEFINE_SCREEN; |
| 142 | cmd->obj.structSize = sizeof(SVGAScreenObject); |
| 143 | cmd->obj.id = sou->base.unit; |
| 144 | cmd->obj.flags = SVGA_SCREEN_HAS_ROOT | |
| 145 | (sou->base.unit == 0 ? SVGA_SCREEN_IS_PRIMARY : 0); |
| 146 | cmd->obj.size.width = mode->hdisplay; |
| 147 | cmd->obj.size.height = mode->vdisplay; |
Deepak Rawat | 3e79ecd | 2018-06-20 11:34:26 +0200 | [diff] [blame] | 148 | cmd->obj.root.x = x; |
| 149 | cmd->obj.root.y = y; |
Thomas Hellstrom | 6dd687b | 2016-02-12 09:57:15 +0100 | [diff] [blame] | 150 | sou->base.set_gui_x = cmd->obj.root.x; |
| 151 | sou->base.set_gui_y = cmd->obj.root.y; |
Jakob Bornecrantz | 56d1c78 | 2011-10-04 20:13:22 +0200 | [diff] [blame] | 152 | |
| 153 | /* Ok to assume that buffer is pinned in vram */ |
Thomas Hellstrom | b37a6b9 | 2011-10-04 20:13:28 +0200 | [diff] [blame] | 154 | vmw_bo_get_guest_ptr(&sou->buffer->base, &cmd->obj.backingStore.ptr); |
Jakob Bornecrantz | 56d1c78 | 2011-10-04 20:13:22 +0200 | [diff] [blame] | 155 | cmd->obj.backingStore.pitch = mode->hdisplay * 4; |
| 156 | |
| 157 | vmw_fifo_commit(dev_priv, fifo_size); |
| 158 | |
| 159 | sou->defined = true; |
| 160 | |
| 161 | return 0; |
| 162 | } |
| 163 | |
| 164 | /** |
| 165 | * Send the fifo command to destroy a screen. |
| 166 | */ |
| 167 | static int vmw_sou_fifo_destroy(struct vmw_private *dev_priv, |
| 168 | struct vmw_screen_object_unit *sou) |
| 169 | { |
| 170 | size_t fifo_size; |
| 171 | int ret; |
| 172 | |
| 173 | struct { |
| 174 | struct { |
| 175 | uint32_t cmdType; |
| 176 | } header; |
| 177 | SVGAFifoCmdDestroyScreen body; |
| 178 | } *cmd; |
| 179 | |
| 180 | /* no need to do anything */ |
| 181 | if (unlikely(!sou->defined)) |
| 182 | return 0; |
| 183 | |
| 184 | fifo_size = sizeof(*cmd); |
| 185 | cmd = vmw_fifo_reserve(dev_priv, fifo_size); |
| 186 | /* the hardware has hung, nothing we can do about it here */ |
| 187 | if (unlikely(cmd == NULL)) { |
| 188 | DRM_ERROR("Fifo reserve failed.\n"); |
| 189 | return -ENOMEM; |
| 190 | } |
| 191 | |
| 192 | memset(cmd, 0, fifo_size); |
| 193 | cmd->header.cmdType = SVGA_CMD_DESTROY_SCREEN; |
| 194 | cmd->body.screenId = sou->base.unit; |
| 195 | |
| 196 | vmw_fifo_commit(dev_priv, fifo_size); |
| 197 | |
| 198 | /* Force sync */ |
| 199 | ret = vmw_fallback_wait(dev_priv, false, true, 0, false, 3*HZ); |
| 200 | if (unlikely(ret != 0)) |
| 201 | DRM_ERROR("Failed to sync with HW"); |
| 202 | else |
| 203 | sou->defined = false; |
| 204 | |
| 205 | return ret; |
| 206 | } |
| 207 | |
| 208 | /** |
Sinclair Yeh | 06ec419 | 2017-03-23 13:14:54 -0700 | [diff] [blame] | 209 | * vmw_sou_crtc_mode_set_nofb - Create new screen |
| 210 | * |
| 211 | * @crtc: CRTC associated with the new screen |
| 212 | * |
| 213 | * This function creates/destroys a screen. This function cannot fail, so if |
| 214 | * somehow we run into a failure, just do the best we can to get out. |
| 215 | */ |
| 216 | static void vmw_sou_crtc_mode_set_nofb(struct drm_crtc *crtc) |
| 217 | { |
| 218 | struct vmw_private *dev_priv; |
| 219 | struct vmw_screen_object_unit *sou; |
| 220 | struct vmw_framebuffer *vfb; |
| 221 | struct drm_framebuffer *fb; |
| 222 | struct drm_plane_state *ps; |
| 223 | struct vmw_plane_state *vps; |
| 224 | int ret; |
| 225 | |
Deepak Rawat | 3e79ecd | 2018-06-20 11:34:26 +0200 | [diff] [blame] | 226 | sou = vmw_crtc_to_sou(crtc); |
Sinclair Yeh | 06ec419 | 2017-03-23 13:14:54 -0700 | [diff] [blame] | 227 | dev_priv = vmw_priv(crtc->dev); |
Deepak Rawat | 3e79ecd | 2018-06-20 11:34:26 +0200 | [diff] [blame] | 228 | ps = crtc->primary->state; |
| 229 | fb = ps->fb; |
| 230 | vps = vmw_plane_state_to_vps(ps); |
Sinclair Yeh | 06ec419 | 2017-03-23 13:14:54 -0700 | [diff] [blame] | 231 | |
| 232 | vfb = (fb) ? vmw_framebuffer_to_vfb(fb) : NULL; |
| 233 | |
| 234 | if (sou->defined) { |
| 235 | ret = vmw_sou_fifo_destroy(dev_priv, sou); |
| 236 | if (ret) { |
| 237 | DRM_ERROR("Failed to destroy Screen Object\n"); |
| 238 | return; |
| 239 | } |
| 240 | } |
| 241 | |
| 242 | if (vfb) { |
Deepak Rawat | 3e79ecd | 2018-06-20 11:34:26 +0200 | [diff] [blame] | 243 | struct drm_connector_state *conn_state; |
| 244 | struct vmw_connector_state *vmw_conn_state; |
| 245 | int x, y; |
Sinclair Yeh | 06ec419 | 2017-03-23 13:14:54 -0700 | [diff] [blame] | 246 | |
Thomas Hellstrom | f1d34bf | 2018-06-19 15:02:16 +0200 | [diff] [blame] | 247 | sou->buffer = vps->bo; |
| 248 | sou->buffer_size = vps->bo_size; |
Sinclair Yeh | 06ec419 | 2017-03-23 13:14:54 -0700 | [diff] [blame] | 249 | |
Deepak Rawat | 3e79ecd | 2018-06-20 11:34:26 +0200 | [diff] [blame] | 250 | if (sou->base.is_implicit) { |
| 251 | x = crtc->x; |
| 252 | y = crtc->y; |
| 253 | } else { |
| 254 | conn_state = sou->base.connector.state; |
| 255 | vmw_conn_state = vmw_connector_state_to_vcs(conn_state); |
| 256 | |
| 257 | x = vmw_conn_state->gui_x; |
| 258 | y = vmw_conn_state->gui_y; |
| 259 | } |
| 260 | |
| 261 | ret = vmw_sou_fifo_create(dev_priv, sou, x, y, &crtc->mode); |
Sinclair Yeh | 06ec419 | 2017-03-23 13:14:54 -0700 | [diff] [blame] | 262 | if (ret) |
| 263 | DRM_ERROR("Failed to define Screen Object %dx%d\n", |
| 264 | crtc->x, crtc->y); |
| 265 | |
| 266 | vmw_kms_add_active(dev_priv, &sou->base, vfb); |
| 267 | } else { |
| 268 | sou->buffer = NULL; |
| 269 | sou->buffer_size = 0; |
| 270 | |
| 271 | vmw_kms_del_active(dev_priv, &sou->base); |
| 272 | } |
| 273 | } |
| 274 | |
| 275 | /** |
| 276 | * vmw_sou_crtc_helper_prepare - Noop |
| 277 | * |
| 278 | * @crtc: CRTC associated with the new screen |
| 279 | * |
| 280 | * Prepares the CRTC for a mode set, but we don't need to do anything here. |
| 281 | */ |
| 282 | static void vmw_sou_crtc_helper_prepare(struct drm_crtc *crtc) |
| 283 | { |
| 284 | } |
| 285 | |
| 286 | /** |
Laurent Pinchart | 0b20a0f | 2017-06-30 12:36:44 +0300 | [diff] [blame] | 287 | * vmw_sou_crtc_atomic_enable - Noop |
Sinclair Yeh | 06ec419 | 2017-03-23 13:14:54 -0700 | [diff] [blame] | 288 | * |
| 289 | * @crtc: CRTC associated with the new screen |
| 290 | * |
| 291 | * This is called after a mode set has been completed. |
| 292 | */ |
Laurent Pinchart | 0b20a0f | 2017-06-30 12:36:44 +0300 | [diff] [blame] | 293 | static void vmw_sou_crtc_atomic_enable(struct drm_crtc *crtc, |
| 294 | struct drm_crtc_state *old_state) |
Sinclair Yeh | 06ec419 | 2017-03-23 13:14:54 -0700 | [diff] [blame] | 295 | { |
| 296 | } |
| 297 | |
| 298 | /** |
Laurent Pinchart | 6458171 | 2017-06-30 12:36:45 +0300 | [diff] [blame] | 299 | * vmw_sou_crtc_atomic_disable - Turns off CRTC |
Sinclair Yeh | 06ec419 | 2017-03-23 13:14:54 -0700 | [diff] [blame] | 300 | * |
| 301 | * @crtc: CRTC to be turned off |
| 302 | */ |
Laurent Pinchart | 6458171 | 2017-06-30 12:36:45 +0300 | [diff] [blame] | 303 | static void vmw_sou_crtc_atomic_disable(struct drm_crtc *crtc, |
| 304 | struct drm_crtc_state *old_state) |
Sinclair Yeh | 06ec419 | 2017-03-23 13:14:54 -0700 | [diff] [blame] | 305 | { |
| 306 | struct vmw_private *dev_priv; |
| 307 | struct vmw_screen_object_unit *sou; |
| 308 | int ret; |
| 309 | |
| 310 | |
| 311 | if (!crtc) { |
| 312 | DRM_ERROR("CRTC is NULL\n"); |
| 313 | return; |
| 314 | } |
| 315 | |
| 316 | sou = vmw_crtc_to_sou(crtc); |
| 317 | dev_priv = vmw_priv(crtc->dev); |
| 318 | |
| 319 | if (sou->defined) { |
| 320 | ret = vmw_sou_fifo_destroy(dev_priv, sou); |
| 321 | if (ret) |
| 322 | DRM_ERROR("Failed to destroy Screen Object\n"); |
| 323 | } |
| 324 | } |
| 325 | |
Sinclair Yeh | c8261a9 | 2015-06-26 01:23:42 -0700 | [diff] [blame] | 326 | static int vmw_sou_crtc_page_flip(struct drm_crtc *crtc, |
Sinclair Yeh | b0119cb | 2017-03-23 14:38:18 -0700 | [diff] [blame] | 327 | struct drm_framebuffer *new_fb, |
Sinclair Yeh | c8261a9 | 2015-06-26 01:23:42 -0700 | [diff] [blame] | 328 | struct drm_pending_vblank_event *event, |
Daniel Vetter | 41292b1f | 2017-03-22 22:50:50 +0100 | [diff] [blame] | 329 | uint32_t flags, |
| 330 | struct drm_modeset_acquire_ctx *ctx) |
Sinclair Yeh | c8261a9 | 2015-06-26 01:23:42 -0700 | [diff] [blame] | 331 | { |
| 332 | struct vmw_private *dev_priv = vmw_priv(crtc->dev); |
Sinclair Yeh | c8261a9 | 2015-06-26 01:23:42 -0700 | [diff] [blame] | 333 | int ret; |
| 334 | |
Thomas Hellstrom | 75c0685 | 2016-02-12 09:00:26 +0100 | [diff] [blame] | 335 | if (!vmw_kms_crtc_flippable(dev_priv, crtc)) |
Sinclair Yeh | c8261a9 | 2015-06-26 01:23:42 -0700 | [diff] [blame] | 336 | return -EINVAL; |
| 337 | |
Deepak Rawat | aa64b3f | 2018-01-16 08:31:04 +0100 | [diff] [blame] | 338 | ret = drm_atomic_helper_page_flip(crtc, new_fb, event, flags, ctx); |
Sinclair Yeh | b0119cb | 2017-03-23 14:38:18 -0700 | [diff] [blame] | 339 | if (ret) { |
| 340 | DRM_ERROR("Page flip error %d.\n", ret); |
| 341 | return ret; |
| 342 | } |
Sinclair Yeh | c8261a9 | 2015-06-26 01:23:42 -0700 | [diff] [blame] | 343 | |
Sinclair Yeh | c8261a9 | 2015-06-26 01:23:42 -0700 | [diff] [blame] | 344 | if (vmw_crtc_to_du(crtc)->is_implicit) |
Thomas Hellstrom | 75c0685 | 2016-02-12 09:00:26 +0100 | [diff] [blame] | 345 | vmw_kms_update_implicit_fb(dev_priv, crtc); |
Sinclair Yeh | c8261a9 | 2015-06-26 01:23:42 -0700 | [diff] [blame] | 346 | |
| 347 | return ret; |
Sinclair Yeh | c8261a9 | 2015-06-26 01:23:42 -0700 | [diff] [blame] | 348 | } |
| 349 | |
Ville Syrjälä | d7955fc | 2015-12-15 12:21:15 +0100 | [diff] [blame] | 350 | static const struct drm_crtc_funcs vmw_screen_object_crtc_funcs = { |
Jakob Bornecrantz | 56d1c78 | 2011-10-04 20:13:22 +0200 | [diff] [blame] | 351 | .gamma_set = vmw_du_crtc_gamma_set, |
| 352 | .destroy = vmw_sou_crtc_destroy, |
Sinclair Yeh | 9c2542a | 2017-03-23 11:33:39 -0700 | [diff] [blame] | 353 | .reset = vmw_du_crtc_reset, |
| 354 | .atomic_duplicate_state = vmw_du_crtc_duplicate_state, |
| 355 | .atomic_destroy_state = vmw_du_crtc_destroy_state, |
Deepak Rawat | b4fa61b | 2018-09-26 17:17:33 -0700 | [diff] [blame^] | 356 | .set_config = drm_atomic_helper_set_config, |
Sinclair Yeh | c8261a9 | 2015-06-26 01:23:42 -0700 | [diff] [blame] | 357 | .page_flip = vmw_sou_crtc_page_flip, |
Jakob Bornecrantz | 56d1c78 | 2011-10-04 20:13:22 +0200 | [diff] [blame] | 358 | }; |
| 359 | |
| 360 | /* |
| 361 | * Screen Object Display Unit encoder functions |
| 362 | */ |
| 363 | |
| 364 | static void vmw_sou_encoder_destroy(struct drm_encoder *encoder) |
| 365 | { |
| 366 | vmw_sou_destroy(vmw_encoder_to_sou(encoder)); |
| 367 | } |
| 368 | |
Ville Syrjälä | d7955fc | 2015-12-15 12:21:15 +0100 | [diff] [blame] | 369 | static const struct drm_encoder_funcs vmw_screen_object_encoder_funcs = { |
Jakob Bornecrantz | 56d1c78 | 2011-10-04 20:13:22 +0200 | [diff] [blame] | 370 | .destroy = vmw_sou_encoder_destroy, |
| 371 | }; |
| 372 | |
| 373 | /* |
| 374 | * Screen Object Display Unit connector functions |
| 375 | */ |
| 376 | |
| 377 | static void vmw_sou_connector_destroy(struct drm_connector *connector) |
| 378 | { |
| 379 | vmw_sou_destroy(vmw_connector_to_sou(connector)); |
| 380 | } |
| 381 | |
Ville Syrjälä | d7955fc | 2015-12-15 12:21:15 +0100 | [diff] [blame] | 382 | static const struct drm_connector_funcs vmw_sou_connector_funcs = { |
Jakob Bornecrantz | 56d1c78 | 2011-10-04 20:13:22 +0200 | [diff] [blame] | 383 | .dpms = vmw_du_connector_dpms, |
Thierry Reding | d17e67d | 2016-03-07 18:06:01 +0100 | [diff] [blame] | 384 | .detect = vmw_du_connector_detect, |
| 385 | .fill_modes = vmw_du_connector_fill_modes, |
Jakob Bornecrantz | 56d1c78 | 2011-10-04 20:13:22 +0200 | [diff] [blame] | 386 | .set_property = vmw_du_connector_set_property, |
| 387 | .destroy = vmw_sou_connector_destroy, |
Sinclair Yeh | d7721ca | 2017-03-23 11:48:44 -0700 | [diff] [blame] | 388 | .reset = vmw_du_connector_reset, |
Rob Clark | 8a510a5 | 2018-01-17 10:16:20 -0500 | [diff] [blame] | 389 | .atomic_duplicate_state = vmw_du_connector_duplicate_state, |
| 390 | .atomic_destroy_state = vmw_du_connector_destroy_state, |
Sinclair Yeh | d7721ca | 2017-03-23 11:48:44 -0700 | [diff] [blame] | 391 | .atomic_set_property = vmw_du_connector_atomic_set_property, |
| 392 | .atomic_get_property = vmw_du_connector_atomic_get_property, |
Jakob Bornecrantz | 56d1c78 | 2011-10-04 20:13:22 +0200 | [diff] [blame] | 393 | }; |
| 394 | |
Sinclair Yeh | d947d1b | 2017-03-23 14:23:20 -0700 | [diff] [blame] | 395 | |
| 396 | static const struct |
| 397 | drm_connector_helper_funcs vmw_sou_connector_helper_funcs = { |
Sinclair Yeh | d947d1b | 2017-03-23 14:23:20 -0700 | [diff] [blame] | 398 | }; |
| 399 | |
| 400 | |
| 401 | |
Sinclair Yeh | 36cc79b | 2017-03-23 11:28:11 -0700 | [diff] [blame] | 402 | /* |
| 403 | * Screen Object Display Plane Functions |
| 404 | */ |
| 405 | |
Sinclair Yeh | 060e2ad | 2017-03-23 14:18:32 -0700 | [diff] [blame] | 406 | /** |
| 407 | * vmw_sou_primary_plane_cleanup_fb - Frees sou backing buffer |
| 408 | * |
| 409 | * @plane: display plane |
| 410 | * @old_state: Contains the FB to clean up |
| 411 | * |
| 412 | * Unpins the display surface |
| 413 | * |
| 414 | * Returns 0 on success |
| 415 | */ |
| 416 | static void |
| 417 | vmw_sou_primary_plane_cleanup_fb(struct drm_plane *plane, |
| 418 | struct drm_plane_state *old_state) |
| 419 | { |
| 420 | struct vmw_plane_state *vps = vmw_plane_state_to_vps(old_state); |
Thomas Hellstrom | 20fb5a6 | 2018-03-22 10:35:18 +0100 | [diff] [blame] | 421 | struct drm_crtc *crtc = plane->state->crtc ? |
| 422 | plane->state->crtc : old_state->crtc; |
Sinclair Yeh | 060e2ad | 2017-03-23 14:18:32 -0700 | [diff] [blame] | 423 | |
Thomas Hellstrom | f1d34bf | 2018-06-19 15:02:16 +0200 | [diff] [blame] | 424 | if (vps->bo) |
| 425 | vmw_bo_unpin(vmw_priv(crtc->dev), vps->bo, false); |
| 426 | vmw_bo_unreference(&vps->bo); |
| 427 | vps->bo_size = 0; |
Sinclair Yeh | 060e2ad | 2017-03-23 14:18:32 -0700 | [diff] [blame] | 428 | |
| 429 | vmw_du_plane_cleanup_fb(plane, old_state); |
| 430 | } |
| 431 | |
| 432 | |
| 433 | /** |
| 434 | * vmw_sou_primary_plane_prepare_fb - allocate backing buffer |
| 435 | * |
| 436 | * @plane: display plane |
| 437 | * @new_state: info on the new plane state, including the FB |
| 438 | * |
| 439 | * The SOU backing buffer is our equivalent of the display plane. |
| 440 | * |
| 441 | * Returns 0 on success |
| 442 | */ |
| 443 | static int |
| 444 | vmw_sou_primary_plane_prepare_fb(struct drm_plane *plane, |
| 445 | struct drm_plane_state *new_state) |
| 446 | { |
| 447 | struct drm_framebuffer *new_fb = new_state->fb; |
| 448 | struct drm_crtc *crtc = plane->state->crtc ?: new_state->crtc; |
| 449 | struct vmw_plane_state *vps = vmw_plane_state_to_vps(new_state); |
| 450 | struct vmw_private *dev_priv; |
| 451 | size_t size; |
| 452 | int ret; |
| 453 | |
| 454 | |
| 455 | if (!new_fb) { |
Thomas Hellstrom | f1d34bf | 2018-06-19 15:02:16 +0200 | [diff] [blame] | 456 | vmw_bo_unreference(&vps->bo); |
| 457 | vps->bo_size = 0; |
Sinclair Yeh | 060e2ad | 2017-03-23 14:18:32 -0700 | [diff] [blame] | 458 | |
| 459 | return 0; |
| 460 | } |
| 461 | |
| 462 | size = new_state->crtc_w * new_state->crtc_h * 4; |
Thomas Hellstrom | 20fb5a6 | 2018-03-22 10:35:18 +0100 | [diff] [blame] | 463 | dev_priv = vmw_priv(crtc->dev); |
Sinclair Yeh | 060e2ad | 2017-03-23 14:18:32 -0700 | [diff] [blame] | 464 | |
Thomas Hellstrom | f1d34bf | 2018-06-19 15:02:16 +0200 | [diff] [blame] | 465 | if (vps->bo) { |
| 466 | if (vps->bo_size == size) { |
Thomas Hellstrom | 20fb5a6 | 2018-03-22 10:35:18 +0100 | [diff] [blame] | 467 | /* |
| 468 | * Note that this might temporarily up the pin-count |
| 469 | * to 2, until cleanup_fb() is called. |
| 470 | */ |
Thomas Hellstrom | f1d34bf | 2018-06-19 15:02:16 +0200 | [diff] [blame] | 471 | return vmw_bo_pin_in_vram(dev_priv, vps->bo, |
Thomas Hellstrom | 20fb5a6 | 2018-03-22 10:35:18 +0100 | [diff] [blame] | 472 | true); |
| 473 | } |
Sinclair Yeh | 060e2ad | 2017-03-23 14:18:32 -0700 | [diff] [blame] | 474 | |
Thomas Hellstrom | f1d34bf | 2018-06-19 15:02:16 +0200 | [diff] [blame] | 475 | vmw_bo_unreference(&vps->bo); |
| 476 | vps->bo_size = 0; |
Sinclair Yeh | 060e2ad | 2017-03-23 14:18:32 -0700 | [diff] [blame] | 477 | } |
| 478 | |
Thomas Hellstrom | f1d34bf | 2018-06-19 15:02:16 +0200 | [diff] [blame] | 479 | vps->bo = kzalloc(sizeof(*vps->bo), GFP_KERNEL); |
| 480 | if (!vps->bo) |
Sinclair Yeh | 060e2ad | 2017-03-23 14:18:32 -0700 | [diff] [blame] | 481 | return -ENOMEM; |
| 482 | |
Sinclair Yeh | 060e2ad | 2017-03-23 14:18:32 -0700 | [diff] [blame] | 483 | vmw_svga_enable(dev_priv); |
| 484 | |
| 485 | /* After we have alloced the backing store might not be able to |
| 486 | * resume the overlays, this is preferred to failing to alloc. |
| 487 | */ |
| 488 | vmw_overlay_pause_all(dev_priv); |
Thomas Hellstrom | f1d34bf | 2018-06-19 15:02:16 +0200 | [diff] [blame] | 489 | ret = vmw_bo_init(dev_priv, vps->bo, size, |
Sinclair Yeh | 060e2ad | 2017-03-23 14:18:32 -0700 | [diff] [blame] | 490 | &vmw_vram_ne_placement, |
Thomas Hellstrom | f1d34bf | 2018-06-19 15:02:16 +0200 | [diff] [blame] | 491 | false, &vmw_bo_bo_free); |
Sinclair Yeh | 060e2ad | 2017-03-23 14:18:32 -0700 | [diff] [blame] | 492 | vmw_overlay_resume_all(dev_priv); |
Thomas Hellstrom | 20fb5a6 | 2018-03-22 10:35:18 +0100 | [diff] [blame] | 493 | if (ret) { |
Thomas Hellstrom | f1d34bf | 2018-06-19 15:02:16 +0200 | [diff] [blame] | 494 | vps->bo = NULL; /* vmw_bo_init frees on error */ |
Thomas Hellstrom | 20fb5a6 | 2018-03-22 10:35:18 +0100 | [diff] [blame] | 495 | return ret; |
| 496 | } |
Sinclair Yeh | 060e2ad | 2017-03-23 14:18:32 -0700 | [diff] [blame] | 497 | |
Thomas Hellstrom | f1d34bf | 2018-06-19 15:02:16 +0200 | [diff] [blame] | 498 | vps->bo_size = size; |
Deepak Rawat | 91ba9f28 | 2018-05-15 15:39:09 +0200 | [diff] [blame] | 499 | |
Thomas Hellstrom | 20fb5a6 | 2018-03-22 10:35:18 +0100 | [diff] [blame] | 500 | /* |
| 501 | * TTM already thinks the buffer is pinned, but make sure the |
| 502 | * pin_count is upped. |
| 503 | */ |
Thomas Hellstrom | f1d34bf | 2018-06-19 15:02:16 +0200 | [diff] [blame] | 504 | return vmw_bo_pin_in_vram(dev_priv, vps->bo, true); |
Sinclair Yeh | 060e2ad | 2017-03-23 14:18:32 -0700 | [diff] [blame] | 505 | } |
| 506 | |
Deepak Rawat | 5d35aba | 2018-08-08 15:02:48 -0700 | [diff] [blame] | 507 | static uint32_t vmw_sou_bo_fifo_size(struct vmw_du_update_plane *update, |
| 508 | uint32_t num_hits) |
| 509 | { |
| 510 | return sizeof(struct vmw_kms_sou_define_gmrfb) + |
| 511 | sizeof(struct vmw_kms_sou_bo_blit) * num_hits; |
| 512 | } |
| 513 | |
| 514 | static uint32_t vmw_sou_bo_define_gmrfb(struct vmw_du_update_plane *update, |
| 515 | void *cmd) |
| 516 | { |
| 517 | struct vmw_framebuffer_bo *vfbbo = |
| 518 | container_of(update->vfb, typeof(*vfbbo), base); |
| 519 | struct vmw_kms_sou_define_gmrfb *gmr = cmd; |
| 520 | int depth = update->vfb->base.format->depth; |
| 521 | |
| 522 | /* Emulate RGBA support, contrary to svga_reg.h this is not |
| 523 | * supported by hosts. This is only a problem if we are reading |
| 524 | * this value later and expecting what we uploaded back. |
| 525 | */ |
| 526 | if (depth == 32) |
| 527 | depth = 24; |
| 528 | |
| 529 | gmr->header = SVGA_CMD_DEFINE_GMRFB; |
| 530 | |
| 531 | gmr->body.format.bitsPerPixel = update->vfb->base.format->cpp[0] * 8; |
| 532 | gmr->body.format.colorDepth = depth; |
| 533 | gmr->body.format.reserved = 0; |
| 534 | gmr->body.bytesPerLine = update->vfb->base.pitches[0]; |
| 535 | vmw_bo_get_guest_ptr(&vfbbo->buffer->base, &gmr->body.ptr); |
| 536 | |
| 537 | return sizeof(*gmr); |
| 538 | } |
| 539 | |
| 540 | static uint32_t vmw_sou_bo_populate_clip(struct vmw_du_update_plane *update, |
| 541 | void *cmd, struct drm_rect *clip, |
| 542 | uint32_t fb_x, uint32_t fb_y) |
| 543 | { |
| 544 | struct vmw_kms_sou_bo_blit *blit = cmd; |
| 545 | |
| 546 | blit->header = SVGA_CMD_BLIT_GMRFB_TO_SCREEN; |
| 547 | blit->body.destScreenId = update->du->unit; |
| 548 | blit->body.srcOrigin.x = fb_x; |
| 549 | blit->body.srcOrigin.y = fb_y; |
| 550 | blit->body.destRect.left = clip->x1; |
| 551 | blit->body.destRect.top = clip->y1; |
| 552 | blit->body.destRect.right = clip->x2; |
| 553 | blit->body.destRect.bottom = clip->y2; |
| 554 | |
| 555 | return sizeof(*blit); |
| 556 | } |
| 557 | |
| 558 | static uint32_t vmw_stud_bo_post_clip(struct vmw_du_update_plane *update, |
| 559 | void *cmd, struct drm_rect *bb) |
| 560 | { |
| 561 | return 0; |
| 562 | } |
| 563 | |
| 564 | /** |
| 565 | * vmw_sou_plane_update_bo - Update display unit for bo backed fb. |
| 566 | * @dev_priv: Device private. |
| 567 | * @plane: Plane state. |
| 568 | * @old_state: Old plane state. |
| 569 | * @vfb: Framebuffer which is blitted to display unit. |
| 570 | * @out_fence: If non-NULL, will return a ref-counted pointer to vmw_fence_obj. |
| 571 | * The returned fence pointer may be NULL in which case the device |
| 572 | * has already synchronized. |
| 573 | * |
| 574 | * Return: 0 on success or a negative error code on failure. |
| 575 | */ |
| 576 | static int vmw_sou_plane_update_bo(struct vmw_private *dev_priv, |
| 577 | struct drm_plane *plane, |
| 578 | struct drm_plane_state *old_state, |
| 579 | struct vmw_framebuffer *vfb, |
| 580 | struct vmw_fence_obj **out_fence) |
| 581 | { |
| 582 | struct vmw_du_update_plane_buffer bo_update; |
| 583 | |
| 584 | memset(&bo_update, 0, sizeof(struct vmw_du_update_plane_buffer)); |
| 585 | bo_update.base.plane = plane; |
| 586 | bo_update.base.old_state = old_state; |
| 587 | bo_update.base.dev_priv = dev_priv; |
| 588 | bo_update.base.du = vmw_crtc_to_du(plane->state->crtc); |
| 589 | bo_update.base.vfb = vfb; |
| 590 | bo_update.base.out_fence = out_fence; |
| 591 | bo_update.base.mutex = NULL; |
| 592 | bo_update.base.cpu_blit = false; |
| 593 | bo_update.base.intr = true; |
| 594 | |
| 595 | bo_update.base.calc_fifo_size = vmw_sou_bo_fifo_size; |
| 596 | bo_update.base.post_prepare = vmw_sou_bo_define_gmrfb; |
| 597 | bo_update.base.clip = vmw_sou_bo_populate_clip; |
| 598 | bo_update.base.post_clip = vmw_stud_bo_post_clip; |
| 599 | |
| 600 | return vmw_du_helper_plane_update(&bo_update.base); |
| 601 | } |
| 602 | |
Deepak Rawat | 43d1e62 | 2018-08-08 12:39:31 -0700 | [diff] [blame] | 603 | static uint32_t vmw_sou_surface_fifo_size(struct vmw_du_update_plane *update, |
| 604 | uint32_t num_hits) |
| 605 | { |
| 606 | return sizeof(struct vmw_kms_sou_dirty_cmd) + sizeof(SVGASignedRect) * |
| 607 | num_hits; |
| 608 | } |
| 609 | |
| 610 | static uint32_t vmw_sou_surface_post_prepare(struct vmw_du_update_plane *update, |
| 611 | void *cmd) |
| 612 | { |
| 613 | struct vmw_du_update_plane_surface *srf_update; |
| 614 | |
| 615 | srf_update = container_of(update, typeof(*srf_update), base); |
| 616 | |
| 617 | /* |
| 618 | * SOU SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN is special in the sense that |
| 619 | * its bounding box is filled before iterating over all the clips. So |
| 620 | * store the FIFO start address and revisit to fill the details. |
| 621 | */ |
| 622 | srf_update->cmd_start = cmd; |
| 623 | |
| 624 | return 0; |
| 625 | } |
| 626 | |
| 627 | static uint32_t vmw_sou_surface_pre_clip(struct vmw_du_update_plane *update, |
| 628 | void *cmd, uint32_t num_hits) |
| 629 | { |
| 630 | struct vmw_kms_sou_dirty_cmd *blit = cmd; |
| 631 | struct vmw_framebuffer_surface *vfbs; |
| 632 | |
| 633 | vfbs = container_of(update->vfb, typeof(*vfbs), base); |
| 634 | |
| 635 | blit->header.id = SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN; |
| 636 | blit->header.size = sizeof(blit->body) + sizeof(SVGASignedRect) * |
| 637 | num_hits; |
| 638 | |
| 639 | blit->body.srcImage.sid = vfbs->surface->res.id; |
| 640 | blit->body.destScreenId = update->du->unit; |
| 641 | |
| 642 | /* Update the source and destination bounding box later in post_clip */ |
| 643 | blit->body.srcRect.left = 0; |
| 644 | blit->body.srcRect.top = 0; |
| 645 | blit->body.srcRect.right = 0; |
| 646 | blit->body.srcRect.bottom = 0; |
| 647 | |
| 648 | blit->body.destRect.left = 0; |
| 649 | blit->body.destRect.top = 0; |
| 650 | blit->body.destRect.right = 0; |
| 651 | blit->body.destRect.bottom = 0; |
| 652 | |
| 653 | return sizeof(*blit); |
| 654 | } |
| 655 | |
| 656 | static uint32_t vmw_sou_surface_clip_rect(struct vmw_du_update_plane *update, |
| 657 | void *cmd, struct drm_rect *clip, |
| 658 | uint32_t src_x, uint32_t src_y) |
| 659 | { |
| 660 | SVGASignedRect *rect = cmd; |
| 661 | |
| 662 | /* |
| 663 | * rects are relative to dest bounding box rect on screen object, so |
| 664 | * translate to it later in post_clip |
| 665 | */ |
| 666 | rect->left = clip->x1; |
| 667 | rect->top = clip->y1; |
| 668 | rect->right = clip->x2; |
| 669 | rect->bottom = clip->y2; |
| 670 | |
| 671 | return sizeof(*rect); |
| 672 | } |
| 673 | |
| 674 | static uint32_t vmw_sou_surface_post_clip(struct vmw_du_update_plane *update, |
| 675 | void *cmd, struct drm_rect *bb) |
| 676 | { |
| 677 | struct vmw_du_update_plane_surface *srf_update; |
| 678 | struct drm_plane_state *state = update->plane->state; |
| 679 | struct drm_rect src_bb; |
| 680 | struct vmw_kms_sou_dirty_cmd *blit; |
| 681 | SVGASignedRect *rect; |
| 682 | uint32_t num_hits; |
| 683 | int translate_src_x; |
| 684 | int translate_src_y; |
| 685 | int i; |
| 686 | |
| 687 | srf_update = container_of(update, typeof(*srf_update), base); |
| 688 | |
| 689 | blit = srf_update->cmd_start; |
| 690 | rect = (SVGASignedRect *)&blit[1]; |
| 691 | |
| 692 | num_hits = (blit->header.size - sizeof(blit->body))/ |
| 693 | sizeof(SVGASignedRect); |
| 694 | |
| 695 | src_bb = *bb; |
| 696 | |
| 697 | /* To translate bb back to fb src coord */ |
| 698 | translate_src_x = (state->src_x >> 16) - state->crtc_x; |
| 699 | translate_src_y = (state->src_y >> 16) - state->crtc_y; |
| 700 | |
| 701 | drm_rect_translate(&src_bb, translate_src_x, translate_src_y); |
| 702 | |
| 703 | blit->body.srcRect.left = src_bb.x1; |
| 704 | blit->body.srcRect.top = src_bb.y1; |
| 705 | blit->body.srcRect.right = src_bb.x2; |
| 706 | blit->body.srcRect.bottom = src_bb.y2; |
| 707 | |
| 708 | blit->body.destRect.left = bb->x1; |
| 709 | blit->body.destRect.top = bb->y1; |
| 710 | blit->body.destRect.right = bb->x2; |
| 711 | blit->body.destRect.bottom = bb->y2; |
| 712 | |
| 713 | /* rects are relative to dest bb rect */ |
| 714 | for (i = 0; i < num_hits; i++) { |
| 715 | rect->left -= bb->x1; |
| 716 | rect->top -= bb->y1; |
| 717 | rect->right -= bb->x1; |
| 718 | rect->bottom -= bb->y1; |
| 719 | rect++; |
| 720 | } |
| 721 | |
| 722 | return 0; |
| 723 | } |
| 724 | |
| 725 | /** |
| 726 | * vmw_sou_plane_update_surface - Update display unit for surface backed fb. |
| 727 | * @dev_priv: Device private. |
| 728 | * @plane: Plane state. |
| 729 | * @old_state: Old plane state. |
| 730 | * @vfb: Framebuffer which is blitted to display unit |
| 731 | * @out_fence: If non-NULL, will return a ref-counted pointer to vmw_fence_obj. |
| 732 | * The returned fence pointer may be NULL in which case the device |
| 733 | * has already synchronized. |
| 734 | * |
| 735 | * Return: 0 on success or a negative error code on failure. |
| 736 | */ |
| 737 | static int vmw_sou_plane_update_surface(struct vmw_private *dev_priv, |
| 738 | struct drm_plane *plane, |
| 739 | struct drm_plane_state *old_state, |
| 740 | struct vmw_framebuffer *vfb, |
| 741 | struct vmw_fence_obj **out_fence) |
| 742 | { |
| 743 | struct vmw_du_update_plane_surface srf_update; |
| 744 | |
| 745 | memset(&srf_update, 0, sizeof(struct vmw_du_update_plane_surface)); |
| 746 | srf_update.base.plane = plane; |
| 747 | srf_update.base.old_state = old_state; |
| 748 | srf_update.base.dev_priv = dev_priv; |
| 749 | srf_update.base.du = vmw_crtc_to_du(plane->state->crtc); |
| 750 | srf_update.base.vfb = vfb; |
| 751 | srf_update.base.out_fence = out_fence; |
| 752 | srf_update.base.mutex = &dev_priv->cmdbuf_mutex; |
| 753 | srf_update.base.cpu_blit = false; |
| 754 | srf_update.base.intr = true; |
| 755 | |
| 756 | srf_update.base.calc_fifo_size = vmw_sou_surface_fifo_size; |
| 757 | srf_update.base.post_prepare = vmw_sou_surface_post_prepare; |
| 758 | srf_update.base.pre_clip = vmw_sou_surface_pre_clip; |
| 759 | srf_update.base.clip = vmw_sou_surface_clip_rect; |
| 760 | srf_update.base.post_clip = vmw_sou_surface_post_clip; |
| 761 | |
| 762 | return vmw_du_helper_plane_update(&srf_update.base); |
| 763 | } |
Sinclair Yeh | 060e2ad | 2017-03-23 14:18:32 -0700 | [diff] [blame] | 764 | |
| 765 | static void |
| 766 | vmw_sou_primary_plane_atomic_update(struct drm_plane *plane, |
| 767 | struct drm_plane_state *old_state) |
| 768 | { |
Sinclair Yeh | b0119cb | 2017-03-23 14:38:18 -0700 | [diff] [blame] | 769 | struct drm_crtc *crtc = plane->state->crtc; |
Deepak Rawat | aa64b3f | 2018-01-16 08:31:04 +0100 | [diff] [blame] | 770 | struct drm_pending_vblank_event *event = NULL; |
| 771 | struct vmw_fence_obj *fence = NULL; |
| 772 | int ret; |
Sinclair Yeh | b0119cb | 2017-03-23 14:38:18 -0700 | [diff] [blame] | 773 | |
Deepak Rawat | 31da2df | 2018-09-21 14:10:35 -0700 | [diff] [blame] | 774 | /* In case of device error, maintain consistent atomic state */ |
Deepak Rawat | aa64b3f | 2018-01-16 08:31:04 +0100 | [diff] [blame] | 775 | if (crtc && plane->state->fb) { |
| 776 | struct vmw_private *dev_priv = vmw_priv(crtc->dev); |
| 777 | struct vmw_framebuffer *vfb = |
| 778 | vmw_framebuffer_to_vfb(plane->state->fb); |
Deepak Rawat | aa64b3f | 2018-01-16 08:31:04 +0100 | [diff] [blame] | 779 | |
Thomas Hellstrom | f1d34bf | 2018-06-19 15:02:16 +0200 | [diff] [blame] | 780 | if (vfb->bo) |
Deepak Rawat | 67a51b3 | 2018-09-21 14:07:33 -0700 | [diff] [blame] | 781 | ret = vmw_sou_plane_update_bo(dev_priv, plane, |
| 782 | old_state, vfb, &fence); |
Deepak Rawat | aa64b3f | 2018-01-16 08:31:04 +0100 | [diff] [blame] | 783 | else |
Deepak Rawat | 67a51b3 | 2018-09-21 14:07:33 -0700 | [diff] [blame] | 784 | ret = vmw_sou_plane_update_surface(dev_priv, plane, |
| 785 | old_state, vfb, |
| 786 | &fence); |
Deepak Rawat | aa64b3f | 2018-01-16 08:31:04 +0100 | [diff] [blame] | 787 | if (ret != 0) |
| 788 | DRM_ERROR("Failed to update screen.\n"); |
Deepak Rawat | aa64b3f | 2018-01-16 08:31:04 +0100 | [diff] [blame] | 789 | } else { |
Deepak Rawat | 31da2df | 2018-09-21 14:10:35 -0700 | [diff] [blame] | 790 | /* Do nothing when fb and crtc is NULL (blank crtc) */ |
Deepak Rawat | aa64b3f | 2018-01-16 08:31:04 +0100 | [diff] [blame] | 791 | return; |
| 792 | } |
| 793 | |
Deepak Rawat | 31da2df | 2018-09-21 14:10:35 -0700 | [diff] [blame] | 794 | /* For error case vblank event is send from vmw_du_crtc_atomic_flush */ |
Deepak Rawat | aa64b3f | 2018-01-16 08:31:04 +0100 | [diff] [blame] | 795 | event = crtc->state->event; |
Deepak Rawat | aa64b3f | 2018-01-16 08:31:04 +0100 | [diff] [blame] | 796 | if (event && fence) { |
| 797 | struct drm_file *file_priv = event->base.file_priv; |
| 798 | |
| 799 | ret = vmw_event_fence_action_queue(file_priv, |
| 800 | fence, |
| 801 | &event->base, |
| 802 | &event->event.vbl.tv_sec, |
| 803 | &event->event.vbl.tv_usec, |
| 804 | true); |
| 805 | |
| 806 | if (unlikely(ret != 0)) |
| 807 | DRM_ERROR("Failed to queue event on fence.\n"); |
| 808 | else |
| 809 | crtc->state->event = NULL; |
| 810 | } |
| 811 | |
| 812 | if (fence) |
| 813 | vmw_fence_obj_unreference(&fence); |
Sinclair Yeh | 060e2ad | 2017-03-23 14:18:32 -0700 | [diff] [blame] | 814 | } |
| 815 | |
| 816 | |
Sinclair Yeh | 36cc79b | 2017-03-23 11:28:11 -0700 | [diff] [blame] | 817 | static const struct drm_plane_funcs vmw_sou_plane_funcs = { |
Sinclair Yeh | b0119cb | 2017-03-23 14:38:18 -0700 | [diff] [blame] | 818 | .update_plane = drm_atomic_helper_update_plane, |
| 819 | .disable_plane = drm_atomic_helper_disable_plane, |
Sinclair Yeh | 36cc79b | 2017-03-23 11:28:11 -0700 | [diff] [blame] | 820 | .destroy = vmw_du_primary_plane_destroy, |
Sinclair Yeh | cc5ec45 | 2017-03-23 11:36:05 -0700 | [diff] [blame] | 821 | .reset = vmw_du_plane_reset, |
| 822 | .atomic_duplicate_state = vmw_du_plane_duplicate_state, |
| 823 | .atomic_destroy_state = vmw_du_plane_destroy_state, |
Sinclair Yeh | 36cc79b | 2017-03-23 11:28:11 -0700 | [diff] [blame] | 824 | }; |
| 825 | |
| 826 | static const struct drm_plane_funcs vmw_sou_cursor_funcs = { |
Sinclair Yeh | b0119cb | 2017-03-23 14:38:18 -0700 | [diff] [blame] | 827 | .update_plane = drm_atomic_helper_update_plane, |
| 828 | .disable_plane = drm_atomic_helper_disable_plane, |
Sinclair Yeh | 36cc79b | 2017-03-23 11:28:11 -0700 | [diff] [blame] | 829 | .destroy = vmw_du_cursor_plane_destroy, |
Sinclair Yeh | cc5ec45 | 2017-03-23 11:36:05 -0700 | [diff] [blame] | 830 | .reset = vmw_du_plane_reset, |
| 831 | .atomic_duplicate_state = vmw_du_plane_duplicate_state, |
| 832 | .atomic_destroy_state = vmw_du_plane_destroy_state, |
Sinclair Yeh | 36cc79b | 2017-03-23 11:28:11 -0700 | [diff] [blame] | 833 | }; |
| 834 | |
Sinclair Yeh | 06ec419 | 2017-03-23 13:14:54 -0700 | [diff] [blame] | 835 | /* |
| 836 | * Atomic Helpers |
| 837 | */ |
Sinclair Yeh | 060e2ad | 2017-03-23 14:18:32 -0700 | [diff] [blame] | 838 | static const struct |
| 839 | drm_plane_helper_funcs vmw_sou_cursor_plane_helper_funcs = { |
| 840 | .atomic_check = vmw_du_cursor_plane_atomic_check, |
| 841 | .atomic_update = vmw_du_cursor_plane_atomic_update, |
| 842 | .prepare_fb = vmw_du_cursor_plane_prepare_fb, |
| 843 | .cleanup_fb = vmw_du_plane_cleanup_fb, |
| 844 | }; |
| 845 | |
| 846 | static const struct |
| 847 | drm_plane_helper_funcs vmw_sou_primary_plane_helper_funcs = { |
| 848 | .atomic_check = vmw_du_primary_plane_atomic_check, |
| 849 | .atomic_update = vmw_sou_primary_plane_atomic_update, |
| 850 | .prepare_fb = vmw_sou_primary_plane_prepare_fb, |
| 851 | .cleanup_fb = vmw_sou_primary_plane_cleanup_fb, |
| 852 | }; |
| 853 | |
Sinclair Yeh | 06ec419 | 2017-03-23 13:14:54 -0700 | [diff] [blame] | 854 | static const struct drm_crtc_helper_funcs vmw_sou_crtc_helper_funcs = { |
| 855 | .prepare = vmw_sou_crtc_helper_prepare, |
Sinclair Yeh | 06ec419 | 2017-03-23 13:14:54 -0700 | [diff] [blame] | 856 | .mode_set_nofb = vmw_sou_crtc_mode_set_nofb, |
| 857 | .atomic_check = vmw_du_crtc_atomic_check, |
| 858 | .atomic_begin = vmw_du_crtc_atomic_begin, |
| 859 | .atomic_flush = vmw_du_crtc_atomic_flush, |
Laurent Pinchart | 0b20a0f | 2017-06-30 12:36:44 +0300 | [diff] [blame] | 860 | .atomic_enable = vmw_sou_crtc_atomic_enable, |
Laurent Pinchart | 6458171 | 2017-06-30 12:36:45 +0300 | [diff] [blame] | 861 | .atomic_disable = vmw_sou_crtc_atomic_disable, |
Sinclair Yeh | 06ec419 | 2017-03-23 13:14:54 -0700 | [diff] [blame] | 862 | }; |
| 863 | |
Sinclair Yeh | 36cc79b | 2017-03-23 11:28:11 -0700 | [diff] [blame] | 864 | |
Jakob Bornecrantz | 56d1c78 | 2011-10-04 20:13:22 +0200 | [diff] [blame] | 865 | static int vmw_sou_init(struct vmw_private *dev_priv, unsigned unit) |
| 866 | { |
| 867 | struct vmw_screen_object_unit *sou; |
| 868 | struct drm_device *dev = dev_priv->dev; |
| 869 | struct drm_connector *connector; |
| 870 | struct drm_encoder *encoder; |
Sinclair Yeh | cc5ec45 | 2017-03-23 11:36:05 -0700 | [diff] [blame] | 871 | struct drm_plane *primary, *cursor; |
Jakob Bornecrantz | 56d1c78 | 2011-10-04 20:13:22 +0200 | [diff] [blame] | 872 | struct drm_crtc *crtc; |
Sinclair Yeh | 36cc79b | 2017-03-23 11:28:11 -0700 | [diff] [blame] | 873 | int ret; |
Jakob Bornecrantz | 56d1c78 | 2011-10-04 20:13:22 +0200 | [diff] [blame] | 874 | |
| 875 | sou = kzalloc(sizeof(*sou), GFP_KERNEL); |
| 876 | if (!sou) |
| 877 | return -ENOMEM; |
| 878 | |
| 879 | sou->base.unit = unit; |
| 880 | crtc = &sou->base.crtc; |
| 881 | encoder = &sou->base.encoder; |
| 882 | connector = &sou->base.connector; |
Sinclair Yeh | cc5ec45 | 2017-03-23 11:36:05 -0700 | [diff] [blame] | 883 | primary = &sou->base.primary; |
| 884 | cursor = &sou->base.cursor; |
Jakob Bornecrantz | 56d1c78 | 2011-10-04 20:13:22 +0200 | [diff] [blame] | 885 | |
Thomas Hellstrom | 75c0685 | 2016-02-12 09:00:26 +0100 | [diff] [blame] | 886 | sou->base.active_implicit = false; |
Jakob Bornecrantz | 56d1c78 | 2011-10-04 20:13:22 +0200 | [diff] [blame] | 887 | sou->base.pref_active = (unit == 0); |
Jakob Bornecrantz | eb4f923 | 2012-02-09 16:56:46 +0100 | [diff] [blame] | 888 | sou->base.pref_width = dev_priv->initial_width; |
| 889 | sou->base.pref_height = dev_priv->initial_height; |
Jakob Bornecrantz | 56d1c78 | 2011-10-04 20:13:22 +0200 | [diff] [blame] | 890 | sou->base.pref_mode = NULL; |
Sinclair Yeh | 9c2542a | 2017-03-23 11:33:39 -0700 | [diff] [blame] | 891 | |
| 892 | /* |
| 893 | * Remove this after enabling atomic because property values can |
| 894 | * only exist in a state object |
| 895 | */ |
Thomas Hellstrom | 2e69b25 | 2016-02-12 09:59:50 +0100 | [diff] [blame] | 896 | sou->base.is_implicit = false; |
Jakob Bornecrantz | 56d1c78 | 2011-10-04 20:13:22 +0200 | [diff] [blame] | 897 | |
Sinclair Yeh | 36cc79b | 2017-03-23 11:28:11 -0700 | [diff] [blame] | 898 | /* Initialize primary plane */ |
Sinclair Yeh | cc5ec45 | 2017-03-23 11:36:05 -0700 | [diff] [blame] | 899 | vmw_du_plane_reset(primary); |
| 900 | |
Sinclair Yeh | 36cc79b | 2017-03-23 11:28:11 -0700 | [diff] [blame] | 901 | ret = drm_universal_plane_init(dev, &sou->base.primary, |
| 902 | 0, &vmw_sou_plane_funcs, |
| 903 | vmw_primary_plane_formats, |
| 904 | ARRAY_SIZE(vmw_primary_plane_formats), |
Ben Widawsky | e6fc3b6 | 2017-07-23 20:46:38 -0700 | [diff] [blame] | 905 | NULL, DRM_PLANE_TYPE_PRIMARY, NULL); |
Sinclair Yeh | 36cc79b | 2017-03-23 11:28:11 -0700 | [diff] [blame] | 906 | if (ret) { |
| 907 | DRM_ERROR("Failed to initialize primary plane"); |
| 908 | goto err_free; |
| 909 | } |
| 910 | |
Sinclair Yeh | 060e2ad | 2017-03-23 14:18:32 -0700 | [diff] [blame] | 911 | drm_plane_helper_add(primary, &vmw_sou_primary_plane_helper_funcs); |
Deepak Rawat | 61c2138 | 2018-08-08 15:41:56 -0700 | [diff] [blame] | 912 | drm_plane_enable_fb_damage_clips(primary); |
Sinclair Yeh | 060e2ad | 2017-03-23 14:18:32 -0700 | [diff] [blame] | 913 | |
Sinclair Yeh | 36cc79b | 2017-03-23 11:28:11 -0700 | [diff] [blame] | 914 | /* Initialize cursor plane */ |
Sinclair Yeh | cc5ec45 | 2017-03-23 11:36:05 -0700 | [diff] [blame] | 915 | vmw_du_plane_reset(cursor); |
| 916 | |
Sinclair Yeh | 36cc79b | 2017-03-23 11:28:11 -0700 | [diff] [blame] | 917 | ret = drm_universal_plane_init(dev, &sou->base.cursor, |
| 918 | 0, &vmw_sou_cursor_funcs, |
| 919 | vmw_cursor_plane_formats, |
| 920 | ARRAY_SIZE(vmw_cursor_plane_formats), |
Ben Widawsky | e6fc3b6 | 2017-07-23 20:46:38 -0700 | [diff] [blame] | 921 | NULL, DRM_PLANE_TYPE_CURSOR, NULL); |
Sinclair Yeh | 36cc79b | 2017-03-23 11:28:11 -0700 | [diff] [blame] | 922 | if (ret) { |
| 923 | DRM_ERROR("Failed to initialize cursor plane"); |
| 924 | drm_plane_cleanup(&sou->base.primary); |
| 925 | goto err_free; |
| 926 | } |
| 927 | |
Sinclair Yeh | 060e2ad | 2017-03-23 14:18:32 -0700 | [diff] [blame] | 928 | drm_plane_helper_add(cursor, &vmw_sou_cursor_plane_helper_funcs); |
| 929 | |
| 930 | vmw_du_connector_reset(connector); |
Sinclair Yeh | 36cc79b | 2017-03-23 11:28:11 -0700 | [diff] [blame] | 931 | ret = drm_connector_init(dev, connector, &vmw_sou_connector_funcs, |
| 932 | DRM_MODE_CONNECTOR_VIRTUAL); |
| 933 | if (ret) { |
| 934 | DRM_ERROR("Failed to initialize connector\n"); |
| 935 | goto err_free; |
| 936 | } |
| 937 | |
Sinclair Yeh | d947d1b | 2017-03-23 14:23:20 -0700 | [diff] [blame] | 938 | drm_connector_helper_add(connector, &vmw_sou_connector_helper_funcs); |
Jakob Bornecrantz | 56d1c78 | 2011-10-04 20:13:22 +0200 | [diff] [blame] | 939 | connector->status = vmw_du_connector_detect(connector, true); |
Sinclair Yeh | d7721ca | 2017-03-23 11:48:44 -0700 | [diff] [blame] | 940 | vmw_connector_state_to_vcs(connector->state)->is_implicit = false; |
| 941 | |
Jakob Bornecrantz | 56d1c78 | 2011-10-04 20:13:22 +0200 | [diff] [blame] | 942 | |
Sinclair Yeh | 36cc79b | 2017-03-23 11:28:11 -0700 | [diff] [blame] | 943 | ret = drm_encoder_init(dev, encoder, &vmw_screen_object_encoder_funcs, |
| 944 | DRM_MODE_ENCODER_VIRTUAL, NULL); |
| 945 | if (ret) { |
| 946 | DRM_ERROR("Failed to initialize encoder\n"); |
| 947 | goto err_free_connector; |
| 948 | } |
| 949 | |
Daniel Vetter | cde4c44 | 2018-07-09 10:40:07 +0200 | [diff] [blame] | 950 | (void) drm_connector_attach_encoder(connector, encoder); |
Jakob Bornecrantz | 56d1c78 | 2011-10-04 20:13:22 +0200 | [diff] [blame] | 951 | encoder->possible_crtcs = (1 << unit); |
| 952 | encoder->possible_clones = 0; |
| 953 | |
Sinclair Yeh | 36cc79b | 2017-03-23 11:28:11 -0700 | [diff] [blame] | 954 | ret = drm_connector_register(connector); |
| 955 | if (ret) { |
| 956 | DRM_ERROR("Failed to register connector\n"); |
| 957 | goto err_free_encoder; |
| 958 | } |
Thomas Hellstrom | 6a0a7a9 | 2013-12-02 06:04:38 -0800 | [diff] [blame] | 959 | |
Sinclair Yeh | d7721ca | 2017-03-23 11:48:44 -0700 | [diff] [blame] | 960 | |
| 961 | vmw_du_crtc_reset(crtc); |
Sinclair Yeh | 36cc79b | 2017-03-23 11:28:11 -0700 | [diff] [blame] | 962 | ret = drm_crtc_init_with_planes(dev, crtc, &sou->base.primary, |
| 963 | &sou->base.cursor, |
| 964 | &vmw_screen_object_crtc_funcs, NULL); |
| 965 | if (ret) { |
| 966 | DRM_ERROR("Failed to initialize CRTC\n"); |
| 967 | goto err_free_unregister; |
| 968 | } |
Jakob Bornecrantz | 56d1c78 | 2011-10-04 20:13:22 +0200 | [diff] [blame] | 969 | |
Sinclair Yeh | 06ec419 | 2017-03-23 13:14:54 -0700 | [diff] [blame] | 970 | drm_crtc_helper_add(crtc, &vmw_sou_crtc_helper_funcs); |
| 971 | |
Jakob Bornecrantz | 56d1c78 | 2011-10-04 20:13:22 +0200 | [diff] [blame] | 972 | drm_mode_crtc_set_gamma_size(crtc, 256); |
| 973 | |
Rob Clark | b8b163b | 2012-10-11 20:47:14 -0500 | [diff] [blame] | 974 | drm_object_attach_property(&connector->base, |
Thomas Hellstrom | 578e609 | 2016-02-12 09:45:42 +0100 | [diff] [blame] | 975 | dev_priv->hotplug_mode_update_property, 1); |
| 976 | drm_object_attach_property(&connector->base, |
| 977 | dev->mode_config.suggested_x_property, 0); |
| 978 | drm_object_attach_property(&connector->base, |
| 979 | dev->mode_config.suggested_y_property, 0); |
Thomas Hellstrom | 76404ac | 2016-02-12 09:55:45 +0100 | [diff] [blame] | 980 | if (dev_priv->implicit_placement_property) |
| 981 | drm_object_attach_property |
| 982 | (&connector->base, |
| 983 | dev_priv->implicit_placement_property, |
| 984 | sou->base.is_implicit); |
Jakob Bornecrantz | 56d1c78 | 2011-10-04 20:13:22 +0200 | [diff] [blame] | 985 | |
| 986 | return 0; |
Sinclair Yeh | 36cc79b | 2017-03-23 11:28:11 -0700 | [diff] [blame] | 987 | |
| 988 | err_free_unregister: |
| 989 | drm_connector_unregister(connector); |
| 990 | err_free_encoder: |
| 991 | drm_encoder_cleanup(encoder); |
| 992 | err_free_connector: |
| 993 | drm_connector_cleanup(connector); |
| 994 | err_free: |
| 995 | kfree(sou); |
| 996 | return ret; |
Jakob Bornecrantz | 56d1c78 | 2011-10-04 20:13:22 +0200 | [diff] [blame] | 997 | } |
| 998 | |
Sinclair Yeh | c8261a9 | 2015-06-26 01:23:42 -0700 | [diff] [blame] | 999 | int vmw_kms_sou_init_display(struct vmw_private *dev_priv) |
Jakob Bornecrantz | 56d1c78 | 2011-10-04 20:13:22 +0200 | [diff] [blame] | 1000 | { |
| 1001 | struct drm_device *dev = dev_priv->dev; |
Jakob Bornecrantz | 74b5ea3 | 2011-10-17 11:59:44 +0200 | [diff] [blame] | 1002 | int i, ret; |
Jakob Bornecrantz | 56d1c78 | 2011-10-04 20:13:22 +0200 | [diff] [blame] | 1003 | |
Thomas Hellstrom | 29a16e9 | 2012-11-09 12:26:13 +0000 | [diff] [blame] | 1004 | if (!(dev_priv->capabilities & SVGA_CAP_SCREEN_OBJECT_2)) { |
Jakob Bornecrantz | 56d1c78 | 2011-10-04 20:13:22 +0200 | [diff] [blame] | 1005 | DRM_INFO("Not using screen objects," |
| 1006 | " missing cap SCREEN_OBJECT_2\n"); |
| 1007 | return -ENOSYS; |
| 1008 | } |
| 1009 | |
| 1010 | ret = -ENOMEM; |
Thomas Hellstrom | 75c0685 | 2016-02-12 09:00:26 +0100 | [diff] [blame] | 1011 | dev_priv->num_implicit = 0; |
| 1012 | dev_priv->implicit_fb = NULL; |
Jakob Bornecrantz | 56d1c78 | 2011-10-04 20:13:22 +0200 | [diff] [blame] | 1013 | |
| 1014 | ret = drm_vblank_init(dev, VMWGFX_NUM_DISPLAY_UNITS); |
| 1015 | if (unlikely(ret != 0)) |
Thomas Hellstrom | 75c0685 | 2016-02-12 09:00:26 +0100 | [diff] [blame] | 1016 | return ret; |
Jakob Bornecrantz | 56d1c78 | 2011-10-04 20:13:22 +0200 | [diff] [blame] | 1017 | |
Thomas Hellstrom | 76404ac | 2016-02-12 09:55:45 +0100 | [diff] [blame] | 1018 | vmw_kms_create_implicit_placement_property(dev_priv, false); |
| 1019 | |
Jakob Bornecrantz | 56d1c78 | 2011-10-04 20:13:22 +0200 | [diff] [blame] | 1020 | for (i = 0; i < VMWGFX_NUM_DISPLAY_UNITS; ++i) |
| 1021 | vmw_sou_init(dev_priv, i); |
| 1022 | |
Sinclair Yeh | c8261a9 | 2015-06-26 01:23:42 -0700 | [diff] [blame] | 1023 | dev_priv->active_display_unit = vmw_du_screen_object; |
| 1024 | |
| 1025 | DRM_INFO("Screen Objects Display Unit initialized\n"); |
Jakob Bornecrantz | 56d1c78 | 2011-10-04 20:13:22 +0200 | [diff] [blame] | 1026 | |
| 1027 | return 0; |
Jakob Bornecrantz | 56d1c78 | 2011-10-04 20:13:22 +0200 | [diff] [blame] | 1028 | } |
| 1029 | |
Thomas Hellstrom | f1d34bf | 2018-06-19 15:02:16 +0200 | [diff] [blame] | 1030 | static int do_bo_define_gmrfb(struct vmw_private *dev_priv, |
Sinclair Yeh | c8261a9 | 2015-06-26 01:23:42 -0700 | [diff] [blame] | 1031 | struct vmw_framebuffer *framebuffer) |
Jakob Bornecrantz | b5ec427 | 2012-02-09 16:56:45 +0100 | [diff] [blame] | 1032 | { |
Thomas Hellstrom | f1d34bf | 2018-06-19 15:02:16 +0200 | [diff] [blame] | 1033 | struct vmw_buffer_object *buf = |
| 1034 | container_of(framebuffer, struct vmw_framebuffer_bo, |
Thomas Hellstrom | 10b1e0c | 2015-06-26 02:14:27 -0700 | [diff] [blame] | 1035 | base)->buffer; |
Ville Syrjälä | b00c600 | 2016-12-14 23:31:35 +0200 | [diff] [blame] | 1036 | int depth = framebuffer->base.format->depth; |
Sinclair Yeh | c8261a9 | 2015-06-26 01:23:42 -0700 | [diff] [blame] | 1037 | struct { |
| 1038 | uint32_t header; |
| 1039 | SVGAFifoCmdDefineGMRFB body; |
| 1040 | } *cmd; |
Jakob Bornecrantz | b5ec427 | 2012-02-09 16:56:45 +0100 | [diff] [blame] | 1041 | |
Sinclair Yeh | c8261a9 | 2015-06-26 01:23:42 -0700 | [diff] [blame] | 1042 | /* Emulate RGBA support, contrary to svga_reg.h this is not |
| 1043 | * supported by hosts. This is only a problem if we are reading |
| 1044 | * this value later and expecting what we uploaded back. |
| 1045 | */ |
| 1046 | if (depth == 32) |
| 1047 | depth = 24; |
Jakob Bornecrantz | b5ec427 | 2012-02-09 16:56:45 +0100 | [diff] [blame] | 1048 | |
Thomas Hellstrom | 10b1e0c | 2015-06-26 02:14:27 -0700 | [diff] [blame] | 1049 | cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd)); |
| 1050 | if (!cmd) { |
| 1051 | DRM_ERROR("Out of fifo space for dirty framebuffer command.\n"); |
Sinclair Yeh | c8261a9 | 2015-06-26 01:23:42 -0700 | [diff] [blame] | 1052 | return -ENOMEM; |
| 1053 | } |
| 1054 | |
Sinclair Yeh | c8261a9 | 2015-06-26 01:23:42 -0700 | [diff] [blame] | 1055 | cmd->header = SVGA_CMD_DEFINE_GMRFB; |
Ville Syrjälä | 272725c | 2016-12-14 23:32:20 +0200 | [diff] [blame] | 1056 | cmd->body.format.bitsPerPixel = framebuffer->base.format->cpp[0] * 8; |
Sinclair Yeh | c8261a9 | 2015-06-26 01:23:42 -0700 | [diff] [blame] | 1057 | cmd->body.format.colorDepth = depth; |
| 1058 | cmd->body.format.reserved = 0; |
| 1059 | cmd->body.bytesPerLine = framebuffer->base.pitches[0]; |
Thomas Hellstrom | 10b1e0c | 2015-06-26 02:14:27 -0700 | [diff] [blame] | 1060 | /* Buffer is reserved in vram or GMR */ |
| 1061 | vmw_bo_get_guest_ptr(&buf->base, &cmd->body.ptr); |
| 1062 | vmw_fifo_commit(dev_priv, sizeof(*cmd)); |
Sinclair Yeh | c8261a9 | 2015-06-26 01:23:42 -0700 | [diff] [blame] | 1063 | |
Thomas Hellstrom | 10b1e0c | 2015-06-26 02:14:27 -0700 | [diff] [blame] | 1064 | return 0; |
| 1065 | } |
Sinclair Yeh | c8261a9 | 2015-06-26 01:23:42 -0700 | [diff] [blame] | 1066 | |
Thomas Hellstrom | 10b1e0c | 2015-06-26 02:14:27 -0700 | [diff] [blame] | 1067 | /** |
| 1068 | * vmw_sou_surface_fifo_commit - Callback to fill in and submit a |
| 1069 | * blit surface to screen command. |
| 1070 | * |
| 1071 | * @dirty: The closure structure. |
| 1072 | * |
| 1073 | * Fills in the missing fields in the command, and translates the cliprects |
| 1074 | * to match the destination bounding box encoded. |
| 1075 | */ |
| 1076 | static void vmw_sou_surface_fifo_commit(struct vmw_kms_dirty *dirty) |
| 1077 | { |
| 1078 | struct vmw_kms_sou_surface_dirty *sdirty = |
| 1079 | container_of(dirty, typeof(*sdirty), base); |
| 1080 | struct vmw_kms_sou_dirty_cmd *cmd = dirty->cmd; |
| 1081 | s32 trans_x = dirty->unit->crtc.x - sdirty->dst_x; |
| 1082 | s32 trans_y = dirty->unit->crtc.y - sdirty->dst_y; |
| 1083 | size_t region_size = dirty->num_hits * sizeof(SVGASignedRect); |
| 1084 | SVGASignedRect *blit = (SVGASignedRect *) &cmd[1]; |
| 1085 | int i; |
| 1086 | |
Thomas Hellstrom | fea7dd54 | 2016-02-12 08:26:37 +0100 | [diff] [blame] | 1087 | if (!dirty->num_hits) { |
| 1088 | vmw_fifo_commit(dirty->dev_priv, 0); |
| 1089 | return; |
| 1090 | } |
| 1091 | |
Thomas Hellstrom | 10b1e0c | 2015-06-26 02:14:27 -0700 | [diff] [blame] | 1092 | cmd->header.id = SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN; |
| 1093 | cmd->header.size = sizeof(cmd->body) + region_size; |
| 1094 | |
| 1095 | /* |
| 1096 | * Use the destination bounding box to specify destination - and |
| 1097 | * source bounding regions. |
| 1098 | */ |
| 1099 | cmd->body.destRect.left = sdirty->left; |
| 1100 | cmd->body.destRect.right = sdirty->right; |
| 1101 | cmd->body.destRect.top = sdirty->top; |
| 1102 | cmd->body.destRect.bottom = sdirty->bottom; |
| 1103 | |
| 1104 | cmd->body.srcRect.left = sdirty->left + trans_x; |
| 1105 | cmd->body.srcRect.right = sdirty->right + trans_x; |
| 1106 | cmd->body.srcRect.top = sdirty->top + trans_y; |
| 1107 | cmd->body.srcRect.bottom = sdirty->bottom + trans_y; |
| 1108 | |
| 1109 | cmd->body.srcImage.sid = sdirty->sid; |
| 1110 | cmd->body.destScreenId = dirty->unit->unit; |
| 1111 | |
| 1112 | /* Blits are relative to the destination rect. Translate. */ |
| 1113 | for (i = 0; i < dirty->num_hits; ++i, ++blit) { |
| 1114 | blit->left -= sdirty->left; |
| 1115 | blit->right -= sdirty->left; |
| 1116 | blit->top -= sdirty->top; |
| 1117 | blit->bottom -= sdirty->top; |
| 1118 | } |
| 1119 | |
| 1120 | vmw_fifo_commit(dirty->dev_priv, region_size + sizeof(*cmd)); |
| 1121 | |
| 1122 | sdirty->left = sdirty->top = S32_MAX; |
| 1123 | sdirty->right = sdirty->bottom = S32_MIN; |
| 1124 | } |
| 1125 | |
| 1126 | /** |
| 1127 | * vmw_sou_surface_clip - Callback to encode a blit surface to screen cliprect. |
| 1128 | * |
| 1129 | * @dirty: The closure structure |
| 1130 | * |
| 1131 | * Encodes a SVGASignedRect cliprect and updates the bounding box of the |
| 1132 | * BLIT_SURFACE_TO_SCREEN command. |
| 1133 | */ |
| 1134 | static void vmw_sou_surface_clip(struct vmw_kms_dirty *dirty) |
| 1135 | { |
| 1136 | struct vmw_kms_sou_surface_dirty *sdirty = |
| 1137 | container_of(dirty, typeof(*sdirty), base); |
| 1138 | struct vmw_kms_sou_dirty_cmd *cmd = dirty->cmd; |
| 1139 | SVGASignedRect *blit = (SVGASignedRect *) &cmd[1]; |
| 1140 | |
| 1141 | /* Destination rect. */ |
| 1142 | blit += dirty->num_hits; |
| 1143 | blit->left = dirty->unit_x1; |
| 1144 | blit->top = dirty->unit_y1; |
| 1145 | blit->right = dirty->unit_x2; |
| 1146 | blit->bottom = dirty->unit_y2; |
| 1147 | |
| 1148 | /* Destination bounding box */ |
| 1149 | sdirty->left = min_t(s32, sdirty->left, dirty->unit_x1); |
| 1150 | sdirty->top = min_t(s32, sdirty->top, dirty->unit_y1); |
| 1151 | sdirty->right = max_t(s32, sdirty->right, dirty->unit_x2); |
| 1152 | sdirty->bottom = max_t(s32, sdirty->bottom, dirty->unit_y2); |
| 1153 | |
| 1154 | dirty->num_hits++; |
| 1155 | } |
| 1156 | |
| 1157 | /** |
| 1158 | * vmw_kms_sou_do_surface_dirty - Dirty part of a surface backed framebuffer |
| 1159 | * |
| 1160 | * @dev_priv: Pointer to the device private structure. |
| 1161 | * @framebuffer: Pointer to the surface-buffer backed framebuffer. |
| 1162 | * @clips: Array of clip rects. Either @clips or @vclips must be NULL. |
| 1163 | * @vclips: Alternate array of clip rects. Either @clips or @vclips must |
| 1164 | * be NULL. |
| 1165 | * @srf: Pointer to surface to blit from. If NULL, the surface attached |
| 1166 | * to @framebuffer will be used. |
| 1167 | * @dest_x: X coordinate offset to align @srf with framebuffer coordinates. |
| 1168 | * @dest_y: Y coordinate offset to align @srf with framebuffer coordinates. |
| 1169 | * @num_clips: Number of clip rects in @clips. |
| 1170 | * @inc: Increment to use when looping over @clips. |
| 1171 | * @out_fence: If non-NULL, will return a ref-counted pointer to a |
| 1172 | * struct vmw_fence_obj. The returned fence pointer may be NULL in which |
| 1173 | * case the device has already synchronized. |
Deepak Rawat | 91e9f35 | 2018-01-16 08:24:17 +0100 | [diff] [blame] | 1174 | * @crtc: If crtc is passed, perform surface dirty on that crtc only. |
Thomas Hellstrom | 10b1e0c | 2015-06-26 02:14:27 -0700 | [diff] [blame] | 1175 | * |
| 1176 | * Returns 0 on success, negative error code on failure. -ERESTARTSYS if |
| 1177 | * interrupted. |
| 1178 | */ |
| 1179 | int vmw_kms_sou_do_surface_dirty(struct vmw_private *dev_priv, |
| 1180 | struct vmw_framebuffer *framebuffer, |
| 1181 | struct drm_clip_rect *clips, |
| 1182 | struct drm_vmw_rect *vclips, |
| 1183 | struct vmw_resource *srf, |
| 1184 | s32 dest_x, |
| 1185 | s32 dest_y, |
| 1186 | unsigned num_clips, int inc, |
Deepak Rawat | 91e9f35 | 2018-01-16 08:24:17 +0100 | [diff] [blame] | 1187 | struct vmw_fence_obj **out_fence, |
| 1188 | struct drm_crtc *crtc) |
Thomas Hellstrom | 10b1e0c | 2015-06-26 02:14:27 -0700 | [diff] [blame] | 1189 | { |
| 1190 | struct vmw_framebuffer_surface *vfbs = |
| 1191 | container_of(framebuffer, typeof(*vfbs), base); |
| 1192 | struct vmw_kms_sou_surface_dirty sdirty; |
Thomas Hellstrom | 2724b2d | 2018-09-26 15:34:50 +0200 | [diff] [blame] | 1193 | DECLARE_VAL_CONTEXT(val_ctx, NULL, 0); |
Thomas Hellstrom | 10b1e0c | 2015-06-26 02:14:27 -0700 | [diff] [blame] | 1194 | int ret; |
| 1195 | |
| 1196 | if (!srf) |
| 1197 | srf = &vfbs->surface->res; |
| 1198 | |
Thomas Hellstrom | 2724b2d | 2018-09-26 15:34:50 +0200 | [diff] [blame] | 1199 | ret = vmw_validation_add_resource(&val_ctx, srf, 0, NULL, NULL); |
Thomas Hellstrom | 10b1e0c | 2015-06-26 02:14:27 -0700 | [diff] [blame] | 1200 | if (ret) |
| 1201 | return ret; |
| 1202 | |
Thomas Hellstrom | 2724b2d | 2018-09-26 15:34:50 +0200 | [diff] [blame] | 1203 | ret = vmw_validation_prepare(&val_ctx, &dev_priv->cmdbuf_mutex, true); |
| 1204 | if (ret) |
| 1205 | goto out_unref; |
| 1206 | |
Thomas Hellstrom | 10b1e0c | 2015-06-26 02:14:27 -0700 | [diff] [blame] | 1207 | sdirty.base.fifo_commit = vmw_sou_surface_fifo_commit; |
| 1208 | sdirty.base.clip = vmw_sou_surface_clip; |
| 1209 | sdirty.base.dev_priv = dev_priv; |
| 1210 | sdirty.base.fifo_reserve_size = sizeof(struct vmw_kms_sou_dirty_cmd) + |
| 1211 | sizeof(SVGASignedRect) * num_clips; |
Deepak Rawat | 91e9f35 | 2018-01-16 08:24:17 +0100 | [diff] [blame] | 1212 | sdirty.base.crtc = crtc; |
Thomas Hellstrom | 10b1e0c | 2015-06-26 02:14:27 -0700 | [diff] [blame] | 1213 | |
| 1214 | sdirty.sid = srf->id; |
| 1215 | sdirty.left = sdirty.top = S32_MAX; |
| 1216 | sdirty.right = sdirty.bottom = S32_MIN; |
| 1217 | sdirty.dst_x = dest_x; |
| 1218 | sdirty.dst_y = dest_y; |
| 1219 | |
| 1220 | ret = vmw_kms_helper_dirty(dev_priv, framebuffer, clips, vclips, |
| 1221 | dest_x, dest_y, num_clips, inc, |
| 1222 | &sdirty.base); |
Thomas Hellstrom | 2724b2d | 2018-09-26 15:34:50 +0200 | [diff] [blame] | 1223 | vmw_kms_helper_validation_finish(dev_priv, NULL, &val_ctx, out_fence, |
| 1224 | NULL); |
Sinclair Yeh | c8261a9 | 2015-06-26 01:23:42 -0700 | [diff] [blame] | 1225 | |
| 1226 | return ret; |
Thomas Hellstrom | 2724b2d | 2018-09-26 15:34:50 +0200 | [diff] [blame] | 1227 | |
| 1228 | out_unref: |
| 1229 | vmw_validation_unref_lists(&val_ctx); |
| 1230 | return ret; |
Jakob Bornecrantz | b5ec427 | 2012-02-09 16:56:45 +0100 | [diff] [blame] | 1231 | } |
| 1232 | |
Thomas Hellstrom | 10b1e0c | 2015-06-26 02:14:27 -0700 | [diff] [blame] | 1233 | /** |
Thomas Hellstrom | f1d34bf | 2018-06-19 15:02:16 +0200 | [diff] [blame] | 1234 | * vmw_sou_bo_fifo_commit - Callback to submit a set of readback clips. |
Thomas Hellstrom | 10b1e0c | 2015-06-26 02:14:27 -0700 | [diff] [blame] | 1235 | * |
| 1236 | * @dirty: The closure structure. |
| 1237 | * |
| 1238 | * Commits a previously built command buffer of readback clips. |
| 1239 | */ |
Thomas Hellstrom | f1d34bf | 2018-06-19 15:02:16 +0200 | [diff] [blame] | 1240 | static void vmw_sou_bo_fifo_commit(struct vmw_kms_dirty *dirty) |
Thomas Hellstrom | 10b1e0c | 2015-06-26 02:14:27 -0700 | [diff] [blame] | 1241 | { |
Thomas Hellstrom | fea7dd54 | 2016-02-12 08:26:37 +0100 | [diff] [blame] | 1242 | if (!dirty->num_hits) { |
| 1243 | vmw_fifo_commit(dirty->dev_priv, 0); |
| 1244 | return; |
| 1245 | } |
| 1246 | |
Thomas Hellstrom | 10b1e0c | 2015-06-26 02:14:27 -0700 | [diff] [blame] | 1247 | vmw_fifo_commit(dirty->dev_priv, |
Thomas Hellstrom | f1d34bf | 2018-06-19 15:02:16 +0200 | [diff] [blame] | 1248 | sizeof(struct vmw_kms_sou_bo_blit) * |
Thomas Hellstrom | 10b1e0c | 2015-06-26 02:14:27 -0700 | [diff] [blame] | 1249 | dirty->num_hits); |
| 1250 | } |
| 1251 | |
| 1252 | /** |
Thomas Hellstrom | f1d34bf | 2018-06-19 15:02:16 +0200 | [diff] [blame] | 1253 | * vmw_sou_bo_clip - Callback to encode a readback cliprect. |
Thomas Hellstrom | 10b1e0c | 2015-06-26 02:14:27 -0700 | [diff] [blame] | 1254 | * |
| 1255 | * @dirty: The closure structure |
| 1256 | * |
| 1257 | * Encodes a BLIT_GMRFB_TO_SCREEN cliprect. |
| 1258 | */ |
Thomas Hellstrom | f1d34bf | 2018-06-19 15:02:16 +0200 | [diff] [blame] | 1259 | static void vmw_sou_bo_clip(struct vmw_kms_dirty *dirty) |
Thomas Hellstrom | 10b1e0c | 2015-06-26 02:14:27 -0700 | [diff] [blame] | 1260 | { |
Thomas Hellstrom | f1d34bf | 2018-06-19 15:02:16 +0200 | [diff] [blame] | 1261 | struct vmw_kms_sou_bo_blit *blit = dirty->cmd; |
Thomas Hellstrom | 10b1e0c | 2015-06-26 02:14:27 -0700 | [diff] [blame] | 1262 | |
| 1263 | blit += dirty->num_hits; |
| 1264 | blit->header = SVGA_CMD_BLIT_GMRFB_TO_SCREEN; |
| 1265 | blit->body.destScreenId = dirty->unit->unit; |
| 1266 | blit->body.srcOrigin.x = dirty->fb_x; |
| 1267 | blit->body.srcOrigin.y = dirty->fb_y; |
| 1268 | blit->body.destRect.left = dirty->unit_x1; |
| 1269 | blit->body.destRect.top = dirty->unit_y1; |
| 1270 | blit->body.destRect.right = dirty->unit_x2; |
| 1271 | blit->body.destRect.bottom = dirty->unit_y2; |
| 1272 | dirty->num_hits++; |
| 1273 | } |
| 1274 | |
| 1275 | /** |
Thomas Hellstrom | f1d34bf | 2018-06-19 15:02:16 +0200 | [diff] [blame] | 1276 | * vmw_kms_do_bo_dirty - Dirty part of a buffer-object backed framebuffer |
Thomas Hellstrom | 10b1e0c | 2015-06-26 02:14:27 -0700 | [diff] [blame] | 1277 | * |
| 1278 | * @dev_priv: Pointer to the device private structure. |
Thomas Hellstrom | f1d34bf | 2018-06-19 15:02:16 +0200 | [diff] [blame] | 1279 | * @framebuffer: Pointer to the buffer-object backed framebuffer. |
Thomas Hellstrom | 10b1e0c | 2015-06-26 02:14:27 -0700 | [diff] [blame] | 1280 | * @clips: Array of clip rects. |
Thomas Hellstrom | 897b818 | 2016-02-12 08:32:08 +0100 | [diff] [blame] | 1281 | * @vclips: Alternate array of clip rects. Either @clips or @vclips must |
| 1282 | * be NULL. |
Thomas Hellstrom | 10b1e0c | 2015-06-26 02:14:27 -0700 | [diff] [blame] | 1283 | * @num_clips: Number of clip rects in @clips. |
| 1284 | * @increment: Increment to use when looping over @clips. |
| 1285 | * @interruptible: Whether to perform waits interruptible if possible. |
| 1286 | * @out_fence: If non-NULL, will return a ref-counted pointer to a |
| 1287 | * struct vmw_fence_obj. The returned fence pointer may be NULL in which |
| 1288 | * case the device has already synchronized. |
Thomas Hellstrom | f1d34bf | 2018-06-19 15:02:16 +0200 | [diff] [blame] | 1289 | * @crtc: If crtc is passed, perform bo dirty on that crtc only. |
Thomas Hellstrom | 10b1e0c | 2015-06-26 02:14:27 -0700 | [diff] [blame] | 1290 | * |
| 1291 | * Returns 0 on success, negative error code on failure. -ERESTARTSYS if |
| 1292 | * interrupted. |
| 1293 | */ |
Thomas Hellstrom | f1d34bf | 2018-06-19 15:02:16 +0200 | [diff] [blame] | 1294 | int vmw_kms_sou_do_bo_dirty(struct vmw_private *dev_priv, |
Sinclair Yeh | c8261a9 | 2015-06-26 01:23:42 -0700 | [diff] [blame] | 1295 | struct vmw_framebuffer *framebuffer, |
Sinclair Yeh | c8261a9 | 2015-06-26 01:23:42 -0700 | [diff] [blame] | 1296 | struct drm_clip_rect *clips, |
Thomas Hellstrom | 897b818 | 2016-02-12 08:32:08 +0100 | [diff] [blame] | 1297 | struct drm_vmw_rect *vclips, |
Sinclair Yeh | c8261a9 | 2015-06-26 01:23:42 -0700 | [diff] [blame] | 1298 | unsigned num_clips, int increment, |
Thomas Hellstrom | 10b1e0c | 2015-06-26 02:14:27 -0700 | [diff] [blame] | 1299 | bool interruptible, |
Deepak Rawat | 91e9f35 | 2018-01-16 08:24:17 +0100 | [diff] [blame] | 1300 | struct vmw_fence_obj **out_fence, |
| 1301 | struct drm_crtc *crtc) |
Jakob Bornecrantz | b5ec427 | 2012-02-09 16:56:45 +0100 | [diff] [blame] | 1302 | { |
Thomas Hellstrom | f1d34bf | 2018-06-19 15:02:16 +0200 | [diff] [blame] | 1303 | struct vmw_buffer_object *buf = |
| 1304 | container_of(framebuffer, struct vmw_framebuffer_bo, |
Thomas Hellstrom | 10b1e0c | 2015-06-26 02:14:27 -0700 | [diff] [blame] | 1305 | base)->buffer; |
| 1306 | struct vmw_kms_dirty dirty; |
Thomas Hellstrom | 2724b2d | 2018-09-26 15:34:50 +0200 | [diff] [blame] | 1307 | DECLARE_VAL_CONTEXT(val_ctx, NULL, 0); |
Thomas Hellstrom | 10b1e0c | 2015-06-26 02:14:27 -0700 | [diff] [blame] | 1308 | int ret; |
Jakob Bornecrantz | b5ec427 | 2012-02-09 16:56:45 +0100 | [diff] [blame] | 1309 | |
Thomas Hellstrom | 2724b2d | 2018-09-26 15:34:50 +0200 | [diff] [blame] | 1310 | ret = vmw_validation_add_bo(&val_ctx, buf, false, false); |
Thomas Hellstrom | 10b1e0c | 2015-06-26 02:14:27 -0700 | [diff] [blame] | 1311 | if (ret) |
| 1312 | return ret; |
Jakob Bornecrantz | b5ec427 | 2012-02-09 16:56:45 +0100 | [diff] [blame] | 1313 | |
Thomas Hellstrom | 2724b2d | 2018-09-26 15:34:50 +0200 | [diff] [blame] | 1314 | ret = vmw_validation_prepare(&val_ctx, NULL, interruptible); |
| 1315 | if (ret) |
| 1316 | goto out_unref; |
| 1317 | |
Thomas Hellstrom | f1d34bf | 2018-06-19 15:02:16 +0200 | [diff] [blame] | 1318 | ret = do_bo_define_gmrfb(dev_priv, framebuffer); |
Sinclair Yeh | c8261a9 | 2015-06-26 01:23:42 -0700 | [diff] [blame] | 1319 | if (unlikely(ret != 0)) |
Thomas Hellstrom | 10b1e0c | 2015-06-26 02:14:27 -0700 | [diff] [blame] | 1320 | goto out_revert; |
Sinclair Yeh | c8261a9 | 2015-06-26 01:23:42 -0700 | [diff] [blame] | 1321 | |
Deepak Rawat | 91e9f35 | 2018-01-16 08:24:17 +0100 | [diff] [blame] | 1322 | dirty.crtc = crtc; |
Thomas Hellstrom | f1d34bf | 2018-06-19 15:02:16 +0200 | [diff] [blame] | 1323 | dirty.fifo_commit = vmw_sou_bo_fifo_commit; |
| 1324 | dirty.clip = vmw_sou_bo_clip; |
| 1325 | dirty.fifo_reserve_size = sizeof(struct vmw_kms_sou_bo_blit) * |
Thomas Hellstrom | 10b1e0c | 2015-06-26 02:14:27 -0700 | [diff] [blame] | 1326 | num_clips; |
Thomas Hellstrom | 897b818 | 2016-02-12 08:32:08 +0100 | [diff] [blame] | 1327 | ret = vmw_kms_helper_dirty(dev_priv, framebuffer, clips, vclips, |
Thomas Hellstrom | 10b1e0c | 2015-06-26 02:14:27 -0700 | [diff] [blame] | 1328 | 0, 0, num_clips, increment, &dirty); |
Thomas Hellstrom | 2724b2d | 2018-09-26 15:34:50 +0200 | [diff] [blame] | 1329 | vmw_kms_helper_validation_finish(dev_priv, NULL, &val_ctx, out_fence, |
| 1330 | NULL); |
Sinclair Yeh | c8261a9 | 2015-06-26 01:23:42 -0700 | [diff] [blame] | 1331 | |
Thomas Hellstrom | 10b1e0c | 2015-06-26 02:14:27 -0700 | [diff] [blame] | 1332 | return ret; |
Sinclair Yeh | c8261a9 | 2015-06-26 01:23:42 -0700 | [diff] [blame] | 1333 | |
Thomas Hellstrom | 10b1e0c | 2015-06-26 02:14:27 -0700 | [diff] [blame] | 1334 | out_revert: |
Thomas Hellstrom | 2724b2d | 2018-09-26 15:34:50 +0200 | [diff] [blame] | 1335 | vmw_validation_revert(&val_ctx); |
| 1336 | out_unref: |
| 1337 | vmw_validation_unref_lists(&val_ctx); |
Sinclair Yeh | c8261a9 | 2015-06-26 01:23:42 -0700 | [diff] [blame] | 1338 | |
| 1339 | return ret; |
Jakob Bornecrantz | b5ec427 | 2012-02-09 16:56:45 +0100 | [diff] [blame] | 1340 | } |
Sinclair Yeh | c8261a9 | 2015-06-26 01:23:42 -0700 | [diff] [blame] | 1341 | |
Thomas Hellstrom | 10b1e0c | 2015-06-26 02:14:27 -0700 | [diff] [blame] | 1342 | |
| 1343 | /** |
| 1344 | * vmw_sou_readback_fifo_commit - Callback to submit a set of readback clips. |
| 1345 | * |
| 1346 | * @dirty: The closure structure. |
| 1347 | * |
| 1348 | * Commits a previously built command buffer of readback clips. |
| 1349 | */ |
| 1350 | static void vmw_sou_readback_fifo_commit(struct vmw_kms_dirty *dirty) |
| 1351 | { |
Thomas Hellstrom | fea7dd54 | 2016-02-12 08:26:37 +0100 | [diff] [blame] | 1352 | if (!dirty->num_hits) { |
| 1353 | vmw_fifo_commit(dirty->dev_priv, 0); |
| 1354 | return; |
| 1355 | } |
| 1356 | |
Thomas Hellstrom | 10b1e0c | 2015-06-26 02:14:27 -0700 | [diff] [blame] | 1357 | vmw_fifo_commit(dirty->dev_priv, |
| 1358 | sizeof(struct vmw_kms_sou_readback_blit) * |
| 1359 | dirty->num_hits); |
| 1360 | } |
| 1361 | |
| 1362 | /** |
| 1363 | * vmw_sou_readback_clip - Callback to encode a readback cliprect. |
| 1364 | * |
| 1365 | * @dirty: The closure structure |
| 1366 | * |
| 1367 | * Encodes a BLIT_SCREEN_TO_GMRFB cliprect. |
| 1368 | */ |
| 1369 | static void vmw_sou_readback_clip(struct vmw_kms_dirty *dirty) |
| 1370 | { |
| 1371 | struct vmw_kms_sou_readback_blit *blit = dirty->cmd; |
| 1372 | |
| 1373 | blit += dirty->num_hits; |
| 1374 | blit->header = SVGA_CMD_BLIT_SCREEN_TO_GMRFB; |
| 1375 | blit->body.srcScreenId = dirty->unit->unit; |
| 1376 | blit->body.destOrigin.x = dirty->fb_x; |
| 1377 | blit->body.destOrigin.y = dirty->fb_y; |
| 1378 | blit->body.srcRect.left = dirty->unit_x1; |
| 1379 | blit->body.srcRect.top = dirty->unit_y1; |
| 1380 | blit->body.srcRect.right = dirty->unit_x2; |
| 1381 | blit->body.srcRect.bottom = dirty->unit_y2; |
| 1382 | dirty->num_hits++; |
| 1383 | } |
| 1384 | |
| 1385 | /** |
| 1386 | * vmw_kms_sou_readback - Perform a readback from the screen object system to |
Thomas Hellstrom | f1d34bf | 2018-06-19 15:02:16 +0200 | [diff] [blame] | 1387 | * a buffer-object backed framebuffer. |
Thomas Hellstrom | 10b1e0c | 2015-06-26 02:14:27 -0700 | [diff] [blame] | 1388 | * |
| 1389 | * @dev_priv: Pointer to the device private structure. |
| 1390 | * @file_priv: Pointer to a struct drm_file identifying the caller. |
| 1391 | * Must be set to NULL if @user_fence_rep is NULL. |
Thomas Hellstrom | f1d34bf | 2018-06-19 15:02:16 +0200 | [diff] [blame] | 1392 | * @vfb: Pointer to the buffer-object backed framebuffer. |
Thomas Hellstrom | 10b1e0c | 2015-06-26 02:14:27 -0700 | [diff] [blame] | 1393 | * @user_fence_rep: User-space provided structure for fence information. |
| 1394 | * Must be set to non-NULL if @file_priv is non-NULL. |
| 1395 | * @vclips: Array of clip rects. |
| 1396 | * @num_clips: Number of clip rects in @vclips. |
Deepak Rawat | 91e9f35 | 2018-01-16 08:24:17 +0100 | [diff] [blame] | 1397 | * @crtc: If crtc is passed, readback on that crtc only. |
Thomas Hellstrom | 10b1e0c | 2015-06-26 02:14:27 -0700 | [diff] [blame] | 1398 | * |
| 1399 | * Returns 0 on success, negative error code on failure. -ERESTARTSYS if |
| 1400 | * interrupted. |
| 1401 | */ |
| 1402 | int vmw_kms_sou_readback(struct vmw_private *dev_priv, |
| 1403 | struct drm_file *file_priv, |
| 1404 | struct vmw_framebuffer *vfb, |
| 1405 | struct drm_vmw_fence_rep __user *user_fence_rep, |
| 1406 | struct drm_vmw_rect *vclips, |
Deepak Rawat | 91e9f35 | 2018-01-16 08:24:17 +0100 | [diff] [blame] | 1407 | uint32_t num_clips, |
| 1408 | struct drm_crtc *crtc) |
Thomas Hellstrom | 10b1e0c | 2015-06-26 02:14:27 -0700 | [diff] [blame] | 1409 | { |
Thomas Hellstrom | f1d34bf | 2018-06-19 15:02:16 +0200 | [diff] [blame] | 1410 | struct vmw_buffer_object *buf = |
| 1411 | container_of(vfb, struct vmw_framebuffer_bo, base)->buffer; |
Thomas Hellstrom | 10b1e0c | 2015-06-26 02:14:27 -0700 | [diff] [blame] | 1412 | struct vmw_kms_dirty dirty; |
Thomas Hellstrom | 2724b2d | 2018-09-26 15:34:50 +0200 | [diff] [blame] | 1413 | DECLARE_VAL_CONTEXT(val_ctx, NULL, 0); |
Thomas Hellstrom | 10b1e0c | 2015-06-26 02:14:27 -0700 | [diff] [blame] | 1414 | int ret; |
| 1415 | |
Thomas Hellstrom | 2724b2d | 2018-09-26 15:34:50 +0200 | [diff] [blame] | 1416 | ret = vmw_validation_add_bo(&val_ctx, buf, false, false); |
Thomas Hellstrom | 10b1e0c | 2015-06-26 02:14:27 -0700 | [diff] [blame] | 1417 | if (ret) |
| 1418 | return ret; |
| 1419 | |
Thomas Hellstrom | 2724b2d | 2018-09-26 15:34:50 +0200 | [diff] [blame] | 1420 | ret = vmw_validation_prepare(&val_ctx, NULL, true); |
| 1421 | if (ret) |
| 1422 | goto out_unref; |
| 1423 | |
Thomas Hellstrom | f1d34bf | 2018-06-19 15:02:16 +0200 | [diff] [blame] | 1424 | ret = do_bo_define_gmrfb(dev_priv, vfb); |
Thomas Hellstrom | 10b1e0c | 2015-06-26 02:14:27 -0700 | [diff] [blame] | 1425 | if (unlikely(ret != 0)) |
| 1426 | goto out_revert; |
| 1427 | |
Deepak Rawat | 91e9f35 | 2018-01-16 08:24:17 +0100 | [diff] [blame] | 1428 | dirty.crtc = crtc; |
Thomas Hellstrom | 10b1e0c | 2015-06-26 02:14:27 -0700 | [diff] [blame] | 1429 | dirty.fifo_commit = vmw_sou_readback_fifo_commit; |
| 1430 | dirty.clip = vmw_sou_readback_clip; |
| 1431 | dirty.fifo_reserve_size = sizeof(struct vmw_kms_sou_readback_blit) * |
| 1432 | num_clips; |
| 1433 | ret = vmw_kms_helper_dirty(dev_priv, vfb, NULL, vclips, |
| 1434 | 0, 0, num_clips, 1, &dirty); |
Thomas Hellstrom | 2724b2d | 2018-09-26 15:34:50 +0200 | [diff] [blame] | 1435 | vmw_kms_helper_validation_finish(dev_priv, file_priv, &val_ctx, NULL, |
| 1436 | user_fence_rep); |
Thomas Hellstrom | 10b1e0c | 2015-06-26 02:14:27 -0700 | [diff] [blame] | 1437 | |
| 1438 | return ret; |
| 1439 | |
| 1440 | out_revert: |
Thomas Hellstrom | 2724b2d | 2018-09-26 15:34:50 +0200 | [diff] [blame] | 1441 | vmw_validation_revert(&val_ctx); |
| 1442 | out_unref: |
| 1443 | vmw_validation_unref_lists(&val_ctx); |
| 1444 | |
Thomas Hellstrom | 10b1e0c | 2015-06-26 02:14:27 -0700 | [diff] [blame] | 1445 | return ret; |
| 1446 | } |