blob: ff7e638221c539089413d792378ec3602f308d2e [file] [log] [blame]
Greg Kroah-Hartmane2be04c2017-11-01 15:09:13 +01001/* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
David Howells674e95c2012-10-09 09:49:13 +01002/*
3 * Advanced Linux Sound Architecture - ALSA - Driver
4 * Copyright (c) 1994-2003 by Jaroslav Kysela <perex@perex.cz>,
5 * Abramo Bagnara <abramo@alsa-project.org>
6 *
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 *
22 */
23
24#ifndef _UAPI__SOUND_ASOUND_H
25#define _UAPI__SOUND_ASOUND_H
26
Thomas Klausner59e42822016-03-03 16:28:22 +010027#if defined(__KERNEL__) || defined(__linux__)
David Howells674e95c2012-10-09 09:49:13 +010028#include <linux/types.h>
Takashi Iwai7fd7d6c2019-12-20 16:34:14 +010029#include <asm/byteorder.h>
Thomas Klausner59e42822016-03-03 16:28:22 +010030#else
Takashi Iwai7fd7d6c2019-12-20 16:34:14 +010031#include <endian.h>
Thomas Klausner59e42822016-03-03 16:28:22 +010032#include <sys/ioctl.h>
33#endif
David Howells674e95c2012-10-09 09:49:13 +010034
Mikko Rapeli4bebf702015-02-17 00:05:38 +010035#ifndef __KERNEL__
36#include <stdlib.h>
Daniel Mentzb5bdbb62019-03-29 15:48:54 -070037#include <time.h>
Mikko Rapeli4bebf702015-02-17 00:05:38 +010038#endif
David Howells674e95c2012-10-09 09:49:13 +010039
40/*
41 * protocol version
42 */
43
44#define SNDRV_PROTOCOL_VERSION(major, minor, subminor) (((major)<<16)|((minor)<<8)|(subminor))
45#define SNDRV_PROTOCOL_MAJOR(version) (((version)>>16)&0xffff)
46#define SNDRV_PROTOCOL_MINOR(version) (((version)>>8)&0xff)
47#define SNDRV_PROTOCOL_MICRO(version) ((version)&0xff)
48#define SNDRV_PROTOCOL_INCOMPATIBLE(kversion, uversion) \
49 (SNDRV_PROTOCOL_MAJOR(kversion) != SNDRV_PROTOCOL_MAJOR(uversion) || \
50 (SNDRV_PROTOCOL_MAJOR(kversion) == SNDRV_PROTOCOL_MAJOR(uversion) && \
51 SNDRV_PROTOCOL_MINOR(kversion) != SNDRV_PROTOCOL_MINOR(uversion)))
52
53/****************************************************************************
54 * *
55 * Digital audio interface *
56 * *
57 ****************************************************************************/
58
59struct snd_aes_iec958 {
60 unsigned char status[24]; /* AES/IEC958 channel status bits */
61 unsigned char subcode[147]; /* AES/IEC958 subcode bits */
62 unsigned char pad; /* nothing */
63 unsigned char dig_subframe[4]; /* AES/IEC958 subframe bits */
64};
65
66/****************************************************************************
67 * *
68 * CEA-861 Audio InfoFrame. Used in HDMI and DisplayPort *
69 * *
70 ****************************************************************************/
71
72struct snd_cea_861_aud_if {
73 unsigned char db1_ct_cc; /* coding type and channel count */
74 unsigned char db2_sf_ss; /* sample frequency and size */
75 unsigned char db3; /* not used, all zeros */
76 unsigned char db4_ca; /* channel allocation code */
77 unsigned char db5_dminh_lsv; /* downmix inhibit & level-shit values */
78};
79
80/****************************************************************************
81 * *
82 * Section for driver hardware dependent interface - /dev/snd/hw? *
83 * *
84 ****************************************************************************/
85
86#define SNDRV_HWDEP_VERSION SNDRV_PROTOCOL_VERSION(1, 0, 1)
87
88enum {
89 SNDRV_HWDEP_IFACE_OPL2 = 0,
90 SNDRV_HWDEP_IFACE_OPL3,
91 SNDRV_HWDEP_IFACE_OPL4,
92 SNDRV_HWDEP_IFACE_SB16CSP, /* Creative Signal Processor */
93 SNDRV_HWDEP_IFACE_EMU10K1, /* FX8010 processor in EMU10K1 chip */
94 SNDRV_HWDEP_IFACE_YSS225, /* Yamaha FX processor */
95 SNDRV_HWDEP_IFACE_ICS2115, /* Wavetable synth */
96 SNDRV_HWDEP_IFACE_SSCAPE, /* Ensoniq SoundScape ISA card (MC68EC000) */
97 SNDRV_HWDEP_IFACE_VX, /* Digigram VX cards */
98 SNDRV_HWDEP_IFACE_MIXART, /* Digigram miXart cards */
99 SNDRV_HWDEP_IFACE_USX2Y, /* Tascam US122, US224 & US428 usb */
Ingo Molnarfb7df122017-11-03 12:18:37 +0100100 SNDRV_HWDEP_IFACE_EMUX_WAVETABLE, /* EmuX wavetable */
David Howells674e95c2012-10-09 09:49:13 +0100101 SNDRV_HWDEP_IFACE_BLUETOOTH, /* Bluetooth audio */
102 SNDRV_HWDEP_IFACE_USX2Y_PCM, /* Tascam US122, US224 & US428 rawusb pcm */
103 SNDRV_HWDEP_IFACE_PCXHR, /* Digigram PCXHR */
104 SNDRV_HWDEP_IFACE_SB_RC, /* SB Extigy/Audigy2NX remote control */
105 SNDRV_HWDEP_IFACE_HDA, /* HD-audio */
106 SNDRV_HWDEP_IFACE_USB_STREAM, /* direct access to usb stream */
Clemens Ladisch82fbb4f2011-09-04 22:04:49 +0200107 SNDRV_HWDEP_IFACE_FW_DICE, /* TC DICE FireWire device */
Takashi Sakamoto594ddce2014-04-25 22:45:12 +0900108 SNDRV_HWDEP_IFACE_FW_FIREWORKS, /* Echo Audio Fireworks based device */
Takashi Sakamoto618eabe2014-04-25 22:45:20 +0900109 SNDRV_HWDEP_IFACE_FW_BEBOB, /* BridgeCo BeBoB based device */
Takashi Sakamoto8985f4a2014-12-09 00:10:49 +0900110 SNDRV_HWDEP_IFACE_FW_OXFW, /* Oxford OXFW970/971 based device */
Takashi Sakamoto660dd3d2015-09-30 09:39:21 +0900111 SNDRV_HWDEP_IFACE_FW_DIGI00X, /* Digidesign Digi 002/003 family */
Takashi Sakamotoe5e0c3d2015-10-01 22:02:17 +0900112 SNDRV_HWDEP_IFACE_FW_TASCAM, /* TASCAM FireWire series */
Andrej Krutaka16039cb2016-09-18 20:59:32 +0200113 SNDRV_HWDEP_IFACE_LINE6, /* Line6 USB processors */
Takashi Sakamoto71c37972017-03-22 21:30:24 +0900114 SNDRV_HWDEP_IFACE_FW_MOTU, /* MOTU FireWire series */
Takashi Sakamotof656edd2017-03-31 22:06:11 +0900115 SNDRV_HWDEP_IFACE_FW_FIREFACE, /* RME Fireface series */
David Howells674e95c2012-10-09 09:49:13 +0100116
117 /* Don't forget to change the following: */
Takashi Sakamotof656edd2017-03-31 22:06:11 +0900118 SNDRV_HWDEP_IFACE_LAST = SNDRV_HWDEP_IFACE_FW_FIREFACE
David Howells674e95c2012-10-09 09:49:13 +0100119};
120
121struct snd_hwdep_info {
122 unsigned int device; /* WR: device number */
123 int card; /* R: card number */
124 unsigned char id[64]; /* ID (user selectable) */
125 unsigned char name[80]; /* hwdep name */
126 int iface; /* hwdep interface */
127 unsigned char reserved[64]; /* reserved for future */
128};
129
130/* generic DSP loader */
131struct snd_hwdep_dsp_status {
132 unsigned int version; /* R: driver-specific version */
133 unsigned char id[32]; /* R: driver-specific ID string */
134 unsigned int num_dsps; /* R: number of DSP images to transfer */
135 unsigned int dsp_loaded; /* R: bit flags indicating the loaded DSPs */
136 unsigned int chip_ready; /* R: 1 = initialization finished */
137 unsigned char reserved[16]; /* reserved for future use */
138};
139
140struct snd_hwdep_dsp_image {
141 unsigned int index; /* W: DSP index */
142 unsigned char name[64]; /* W: ID (e.g. file name) */
143 unsigned char __user *image; /* W: binary image */
144 size_t length; /* W: size of image in bytes */
145 unsigned long driver_data; /* W: driver-specific data */
146};
147
148#define SNDRV_HWDEP_IOCTL_PVERSION _IOR ('H', 0x00, int)
149#define SNDRV_HWDEP_IOCTL_INFO _IOR ('H', 0x01, struct snd_hwdep_info)
150#define SNDRV_HWDEP_IOCTL_DSP_STATUS _IOR('H', 0x02, struct snd_hwdep_dsp_status)
151#define SNDRV_HWDEP_IOCTL_DSP_LOAD _IOW('H', 0x03, struct snd_hwdep_dsp_image)
152
153/*****************************************************************************
154 * *
155 * Digital Audio (PCM) interface - /dev/snd/pcm?? *
156 * *
157 *****************************************************************************/
158
Arnd Bergmann1cfaef92019-11-13 17:49:14 +0100159#define SNDRV_PCM_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 15)
David Howells674e95c2012-10-09 09:49:13 +0100160
161typedef unsigned long snd_pcm_uframes_t;
162typedef signed long snd_pcm_sframes_t;
163
164enum {
165 SNDRV_PCM_CLASS_GENERIC = 0, /* standard mono or stereo device */
166 SNDRV_PCM_CLASS_MULTI, /* multichannel device */
167 SNDRV_PCM_CLASS_MODEM, /* software modem class */
168 SNDRV_PCM_CLASS_DIGITIZER, /* digitizer class */
169 /* Don't forget to change the following: */
170 SNDRV_PCM_CLASS_LAST = SNDRV_PCM_CLASS_DIGITIZER,
171};
172
173enum {
174 SNDRV_PCM_SUBCLASS_GENERIC_MIX = 0, /* mono or stereo subdevices are mixed together */
175 SNDRV_PCM_SUBCLASS_MULTI_MIX, /* multichannel subdevices are mixed together */
176 /* Don't forget to change the following: */
177 SNDRV_PCM_SUBCLASS_LAST = SNDRV_PCM_SUBCLASS_MULTI_MIX,
178};
179
180enum {
181 SNDRV_PCM_STREAM_PLAYBACK = 0,
182 SNDRV_PCM_STREAM_CAPTURE,
183 SNDRV_PCM_STREAM_LAST = SNDRV_PCM_STREAM_CAPTURE,
184};
185
186typedef int __bitwise snd_pcm_access_t;
187#define SNDRV_PCM_ACCESS_MMAP_INTERLEAVED ((__force snd_pcm_access_t) 0) /* interleaved mmap */
188#define SNDRV_PCM_ACCESS_MMAP_NONINTERLEAVED ((__force snd_pcm_access_t) 1) /* noninterleaved mmap */
189#define SNDRV_PCM_ACCESS_MMAP_COMPLEX ((__force snd_pcm_access_t) 2) /* complex mmap */
190#define SNDRV_PCM_ACCESS_RW_INTERLEAVED ((__force snd_pcm_access_t) 3) /* readi/writei */
191#define SNDRV_PCM_ACCESS_RW_NONINTERLEAVED ((__force snd_pcm_access_t) 4) /* readn/writen */
192#define SNDRV_PCM_ACCESS_LAST SNDRV_PCM_ACCESS_RW_NONINTERLEAVED
193
194typedef int __bitwise snd_pcm_format_t;
195#define SNDRV_PCM_FORMAT_S8 ((__force snd_pcm_format_t) 0)
196#define SNDRV_PCM_FORMAT_U8 ((__force snd_pcm_format_t) 1)
197#define SNDRV_PCM_FORMAT_S16_LE ((__force snd_pcm_format_t) 2)
198#define SNDRV_PCM_FORMAT_S16_BE ((__force snd_pcm_format_t) 3)
199#define SNDRV_PCM_FORMAT_U16_LE ((__force snd_pcm_format_t) 4)
200#define SNDRV_PCM_FORMAT_U16_BE ((__force snd_pcm_format_t) 5)
201#define SNDRV_PCM_FORMAT_S24_LE ((__force snd_pcm_format_t) 6) /* low three bytes */
202#define SNDRV_PCM_FORMAT_S24_BE ((__force snd_pcm_format_t) 7) /* low three bytes */
203#define SNDRV_PCM_FORMAT_U24_LE ((__force snd_pcm_format_t) 8) /* low three bytes */
204#define SNDRV_PCM_FORMAT_U24_BE ((__force snd_pcm_format_t) 9) /* low three bytes */
205#define SNDRV_PCM_FORMAT_S32_LE ((__force snd_pcm_format_t) 10)
206#define SNDRV_PCM_FORMAT_S32_BE ((__force snd_pcm_format_t) 11)
207#define SNDRV_PCM_FORMAT_U32_LE ((__force snd_pcm_format_t) 12)
208#define SNDRV_PCM_FORMAT_U32_BE ((__force snd_pcm_format_t) 13)
209#define SNDRV_PCM_FORMAT_FLOAT_LE ((__force snd_pcm_format_t) 14) /* 4-byte float, IEEE-754 32-bit, range -1.0 to 1.0 */
210#define SNDRV_PCM_FORMAT_FLOAT_BE ((__force snd_pcm_format_t) 15) /* 4-byte float, IEEE-754 32-bit, range -1.0 to 1.0 */
211#define SNDRV_PCM_FORMAT_FLOAT64_LE ((__force snd_pcm_format_t) 16) /* 8-byte float, IEEE-754 64-bit, range -1.0 to 1.0 */
212#define SNDRV_PCM_FORMAT_FLOAT64_BE ((__force snd_pcm_format_t) 17) /* 8-byte float, IEEE-754 64-bit, range -1.0 to 1.0 */
213#define SNDRV_PCM_FORMAT_IEC958_SUBFRAME_LE ((__force snd_pcm_format_t) 18) /* IEC-958 subframe, Little Endian */
214#define SNDRV_PCM_FORMAT_IEC958_SUBFRAME_BE ((__force snd_pcm_format_t) 19) /* IEC-958 subframe, Big Endian */
215#define SNDRV_PCM_FORMAT_MU_LAW ((__force snd_pcm_format_t) 20)
216#define SNDRV_PCM_FORMAT_A_LAW ((__force snd_pcm_format_t) 21)
217#define SNDRV_PCM_FORMAT_IMA_ADPCM ((__force snd_pcm_format_t) 22)
218#define SNDRV_PCM_FORMAT_MPEG ((__force snd_pcm_format_t) 23)
219#define SNDRV_PCM_FORMAT_GSM ((__force snd_pcm_format_t) 24)
Maciej S. Szmigiero823dbb62017-11-27 23:33:29 +0100220#define SNDRV_PCM_FORMAT_S20_LE ((__force snd_pcm_format_t) 25) /* in four bytes, LSB justified */
221#define SNDRV_PCM_FORMAT_S20_BE ((__force snd_pcm_format_t) 26) /* in four bytes, LSB justified */
222#define SNDRV_PCM_FORMAT_U20_LE ((__force snd_pcm_format_t) 27) /* in four bytes, LSB justified */
223#define SNDRV_PCM_FORMAT_U20_BE ((__force snd_pcm_format_t) 28) /* in four bytes, LSB justified */
224/* gap in the numbering for a future standard linear format */
David Howells674e95c2012-10-09 09:49:13 +0100225#define SNDRV_PCM_FORMAT_SPECIAL ((__force snd_pcm_format_t) 31)
226#define SNDRV_PCM_FORMAT_S24_3LE ((__force snd_pcm_format_t) 32) /* in three bytes */
227#define SNDRV_PCM_FORMAT_S24_3BE ((__force snd_pcm_format_t) 33) /* in three bytes */
228#define SNDRV_PCM_FORMAT_U24_3LE ((__force snd_pcm_format_t) 34) /* in three bytes */
229#define SNDRV_PCM_FORMAT_U24_3BE ((__force snd_pcm_format_t) 35) /* in three bytes */
230#define SNDRV_PCM_FORMAT_S20_3LE ((__force snd_pcm_format_t) 36) /* in three bytes */
231#define SNDRV_PCM_FORMAT_S20_3BE ((__force snd_pcm_format_t) 37) /* in three bytes */
232#define SNDRV_PCM_FORMAT_U20_3LE ((__force snd_pcm_format_t) 38) /* in three bytes */
233#define SNDRV_PCM_FORMAT_U20_3BE ((__force snd_pcm_format_t) 39) /* in three bytes */
234#define SNDRV_PCM_FORMAT_S18_3LE ((__force snd_pcm_format_t) 40) /* in three bytes */
235#define SNDRV_PCM_FORMAT_S18_3BE ((__force snd_pcm_format_t) 41) /* in three bytes */
236#define SNDRV_PCM_FORMAT_U18_3LE ((__force snd_pcm_format_t) 42) /* in three bytes */
237#define SNDRV_PCM_FORMAT_U18_3BE ((__force snd_pcm_format_t) 43) /* in three bytes */
238#define SNDRV_PCM_FORMAT_G723_24 ((__force snd_pcm_format_t) 44) /* 8 samples in 3 bytes */
239#define SNDRV_PCM_FORMAT_G723_24_1B ((__force snd_pcm_format_t) 45) /* 1 sample in 1 byte */
240#define SNDRV_PCM_FORMAT_G723_40 ((__force snd_pcm_format_t) 46) /* 8 Samples in 5 bytes */
241#define SNDRV_PCM_FORMAT_G723_40_1B ((__force snd_pcm_format_t) 47) /* 1 sample in 1 byte */
Daniel Mackef7a4f92013-04-17 00:01:36 +0800242#define SNDRV_PCM_FORMAT_DSD_U8 ((__force snd_pcm_format_t) 48) /* DSD, 1-byte samples DSD (x8) */
243#define SNDRV_PCM_FORMAT_DSD_U16_LE ((__force snd_pcm_format_t) 49) /* DSD, 2-byte samples DSD (x16), little endian */
Jurgen Kramerd4288d32014-09-05 10:47:56 +0200244#define SNDRV_PCM_FORMAT_DSD_U32_LE ((__force snd_pcm_format_t) 50) /* DSD, 4-byte samples DSD (x32), little endian */
Jussi Laakod42472e2014-11-21 16:04:46 +0200245#define SNDRV_PCM_FORMAT_DSD_U16_BE ((__force snd_pcm_format_t) 51) /* DSD, 2-byte samples DSD (x16), big endian */
246#define SNDRV_PCM_FORMAT_DSD_U32_BE ((__force snd_pcm_format_t) 52) /* DSD, 4-byte samples DSD (x32), big endian */
247#define SNDRV_PCM_FORMAT_LAST SNDRV_PCM_FORMAT_DSD_U32_BE
Fabio Estevam7ed310b2018-02-22 16:02:22 -0300248#define SNDRV_PCM_FORMAT_FIRST SNDRV_PCM_FORMAT_S8
David Howells674e95c2012-10-09 09:49:13 +0100249
250#ifdef SNDRV_LITTLE_ENDIAN
251#define SNDRV_PCM_FORMAT_S16 SNDRV_PCM_FORMAT_S16_LE
252#define SNDRV_PCM_FORMAT_U16 SNDRV_PCM_FORMAT_U16_LE
253#define SNDRV_PCM_FORMAT_S24 SNDRV_PCM_FORMAT_S24_LE
254#define SNDRV_PCM_FORMAT_U24 SNDRV_PCM_FORMAT_U24_LE
255#define SNDRV_PCM_FORMAT_S32 SNDRV_PCM_FORMAT_S32_LE
256#define SNDRV_PCM_FORMAT_U32 SNDRV_PCM_FORMAT_U32_LE
257#define SNDRV_PCM_FORMAT_FLOAT SNDRV_PCM_FORMAT_FLOAT_LE
258#define SNDRV_PCM_FORMAT_FLOAT64 SNDRV_PCM_FORMAT_FLOAT64_LE
259#define SNDRV_PCM_FORMAT_IEC958_SUBFRAME SNDRV_PCM_FORMAT_IEC958_SUBFRAME_LE
Maciej S. Szmigiero823dbb62017-11-27 23:33:29 +0100260#define SNDRV_PCM_FORMAT_S20 SNDRV_PCM_FORMAT_S20_LE
261#define SNDRV_PCM_FORMAT_U20 SNDRV_PCM_FORMAT_U20_LE
David Howells674e95c2012-10-09 09:49:13 +0100262#endif
263#ifdef SNDRV_BIG_ENDIAN
264#define SNDRV_PCM_FORMAT_S16 SNDRV_PCM_FORMAT_S16_BE
265#define SNDRV_PCM_FORMAT_U16 SNDRV_PCM_FORMAT_U16_BE
266#define SNDRV_PCM_FORMAT_S24 SNDRV_PCM_FORMAT_S24_BE
267#define SNDRV_PCM_FORMAT_U24 SNDRV_PCM_FORMAT_U24_BE
268#define SNDRV_PCM_FORMAT_S32 SNDRV_PCM_FORMAT_S32_BE
269#define SNDRV_PCM_FORMAT_U32 SNDRV_PCM_FORMAT_U32_BE
270#define SNDRV_PCM_FORMAT_FLOAT SNDRV_PCM_FORMAT_FLOAT_BE
271#define SNDRV_PCM_FORMAT_FLOAT64 SNDRV_PCM_FORMAT_FLOAT64_BE
272#define SNDRV_PCM_FORMAT_IEC958_SUBFRAME SNDRV_PCM_FORMAT_IEC958_SUBFRAME_BE
Maciej S. Szmigiero823dbb62017-11-27 23:33:29 +0100273#define SNDRV_PCM_FORMAT_S20 SNDRV_PCM_FORMAT_S20_BE
274#define SNDRV_PCM_FORMAT_U20 SNDRV_PCM_FORMAT_U20_BE
David Howells674e95c2012-10-09 09:49:13 +0100275#endif
276
277typedef int __bitwise snd_pcm_subformat_t;
278#define SNDRV_PCM_SUBFORMAT_STD ((__force snd_pcm_subformat_t) 0)
279#define SNDRV_PCM_SUBFORMAT_LAST SNDRV_PCM_SUBFORMAT_STD
280
281#define SNDRV_PCM_INFO_MMAP 0x00000001 /* hardware supports mmap */
282#define SNDRV_PCM_INFO_MMAP_VALID 0x00000002 /* period data are valid during transfer */
283#define SNDRV_PCM_INFO_DOUBLE 0x00000004 /* Double buffering needed for PCM start/stop */
284#define SNDRV_PCM_INFO_BATCH 0x00000010 /* double buffering */
Takashi Iwai42f94592017-06-19 22:39:18 +0200285#define SNDRV_PCM_INFO_SYNC_APPLPTR 0x00000020 /* need the explicit sync of appl_ptr update */
David Howells674e95c2012-10-09 09:49:13 +0100286#define SNDRV_PCM_INFO_INTERLEAVED 0x00000100 /* channels are interleaved */
287#define SNDRV_PCM_INFO_NONINTERLEAVED 0x00000200 /* channels are not interleaved */
288#define SNDRV_PCM_INFO_COMPLEX 0x00000400 /* complex frame organization (mmap only) */
289#define SNDRV_PCM_INFO_BLOCK_TRANSFER 0x00010000 /* hardware transfer block of samples */
290#define SNDRV_PCM_INFO_OVERRANGE 0x00020000 /* hardware supports ADC (capture) overrange detection */
291#define SNDRV_PCM_INFO_RESUME 0x00040000 /* hardware supports stream resume after suspend */
292#define SNDRV_PCM_INFO_PAUSE 0x00080000 /* pause ioctl is supported */
293#define SNDRV_PCM_INFO_HALF_DUPLEX 0x00100000 /* only half duplex */
294#define SNDRV_PCM_INFO_JOINT_DUPLEX 0x00200000 /* playback and capture stream are somewhat correlated */
295#define SNDRV_PCM_INFO_SYNC_START 0x00400000 /* pcm support some kind of sync go */
296#define SNDRV_PCM_INFO_NO_PERIOD_WAKEUP 0x00800000 /* period wakeup can be disabled */
Pierre-Louis Bossart229d0432015-02-13 15:14:03 -0600297#define SNDRV_PCM_INFO_HAS_WALL_CLOCK 0x01000000 /* (Deprecated)has audio wall clock for audio/system time sync */
298#define SNDRV_PCM_INFO_HAS_LINK_ATIME 0x01000000 /* report hardware link audio time, reset on startup */
299#define SNDRV_PCM_INFO_HAS_LINK_ABSOLUTE_ATIME 0x02000000 /* report absolute hardware link audio time, not reset on startup */
300#define SNDRV_PCM_INFO_HAS_LINK_ESTIMATED_ATIME 0x04000000 /* report estimated link audio time */
301#define SNDRV_PCM_INFO_HAS_LINK_SYNCHRONIZED_ATIME 0x08000000 /* report synchronized audio/system time */
Takashi Iwai81be1092021-08-13 10:21:42 +0200302#define SNDRV_PCM_INFO_EXPLICIT_SYNC 0x10000000 /* needs explicit sync of pointers and data */
Pierre-Louis Bossartb456abe2021-11-19 17:08:50 -0600303#define SNDRV_PCM_INFO_NO_REWINDS 0x20000000 /* hardware can only support monotonic changes of appl_ptr */
Libin Yang48d88292014-12-31 22:09:54 +0800304#define SNDRV_PCM_INFO_DRAIN_TRIGGER 0x40000000 /* internal kernel flag - trigger in drain */
David Howells674e95c2012-10-09 09:49:13 +0100305#define SNDRV_PCM_INFO_FIFO_IN_FRAMES 0x80000000 /* internal kernel flag - FIFO size is in frames */
306
Arnd Bergmann80fe7432018-04-24 20:06:15 +0800307#if (__BITS_PER_LONG == 32 && defined(__USE_TIME_BITS64)) || defined __KERNEL__
308#define __SND_STRUCT_TIME64
309#endif
Pierre-Louis Bossart229d0432015-02-13 15:14:03 -0600310
David Howells674e95c2012-10-09 09:49:13 +0100311typedef int __bitwise snd_pcm_state_t;
312#define SNDRV_PCM_STATE_OPEN ((__force snd_pcm_state_t) 0) /* stream is open */
313#define SNDRV_PCM_STATE_SETUP ((__force snd_pcm_state_t) 1) /* stream has a setup */
314#define SNDRV_PCM_STATE_PREPARED ((__force snd_pcm_state_t) 2) /* stream is ready to start */
315#define SNDRV_PCM_STATE_RUNNING ((__force snd_pcm_state_t) 3) /* stream is running */
316#define SNDRV_PCM_STATE_XRUN ((__force snd_pcm_state_t) 4) /* stream reached an xrun */
317#define SNDRV_PCM_STATE_DRAINING ((__force snd_pcm_state_t) 5) /* stream is draining */
318#define SNDRV_PCM_STATE_PAUSED ((__force snd_pcm_state_t) 6) /* stream is paused */
319#define SNDRV_PCM_STATE_SUSPENDED ((__force snd_pcm_state_t) 7) /* hardware is suspended */
320#define SNDRV_PCM_STATE_DISCONNECTED ((__force snd_pcm_state_t) 8) /* hardware is disconnected */
321#define SNDRV_PCM_STATE_LAST SNDRV_PCM_STATE_DISCONNECTED
322
323enum {
324 SNDRV_PCM_MMAP_OFFSET_DATA = 0x00000000,
Arnd Bergmann80fe7432018-04-24 20:06:15 +0800325 SNDRV_PCM_MMAP_OFFSET_STATUS_OLD = 0x80000000,
326 SNDRV_PCM_MMAP_OFFSET_CONTROL_OLD = 0x81000000,
327 SNDRV_PCM_MMAP_OFFSET_STATUS_NEW = 0x82000000,
328 SNDRV_PCM_MMAP_OFFSET_CONTROL_NEW = 0x83000000,
329#ifdef __SND_STRUCT_TIME64
330 SNDRV_PCM_MMAP_OFFSET_STATUS = SNDRV_PCM_MMAP_OFFSET_STATUS_NEW,
331 SNDRV_PCM_MMAP_OFFSET_CONTROL = SNDRV_PCM_MMAP_OFFSET_CONTROL_NEW,
332#else
333 SNDRV_PCM_MMAP_OFFSET_STATUS = SNDRV_PCM_MMAP_OFFSET_STATUS_OLD,
334 SNDRV_PCM_MMAP_OFFSET_CONTROL = SNDRV_PCM_MMAP_OFFSET_CONTROL_OLD,
335#endif
David Howells674e95c2012-10-09 09:49:13 +0100336};
337
338union snd_pcm_sync_id {
339 unsigned char id[16];
340 unsigned short id16[8];
341 unsigned int id32[4];
342};
343
344struct snd_pcm_info {
345 unsigned int device; /* RO/WR (control): device number */
346 unsigned int subdevice; /* RO/WR (control): subdevice number */
347 int stream; /* RO/WR (control): stream direction */
348 int card; /* R: card number */
349 unsigned char id[64]; /* ID (user selectable) */
350 unsigned char name[80]; /* name of this device */
351 unsigned char subname[32]; /* subdevice name */
352 int dev_class; /* SNDRV_PCM_CLASS_* */
353 int dev_subclass; /* SNDRV_PCM_SUBCLASS_* */
354 unsigned int subdevices_count;
355 unsigned int subdevices_avail;
356 union snd_pcm_sync_id sync; /* hardware synchronization ID */
357 unsigned char reserved[64]; /* reserved for future... */
358};
359
360typedef int snd_pcm_hw_param_t;
361#define SNDRV_PCM_HW_PARAM_ACCESS 0 /* Access type */
362#define SNDRV_PCM_HW_PARAM_FORMAT 1 /* Format */
363#define SNDRV_PCM_HW_PARAM_SUBFORMAT 2 /* Subformat */
364#define SNDRV_PCM_HW_PARAM_FIRST_MASK SNDRV_PCM_HW_PARAM_ACCESS
365#define SNDRV_PCM_HW_PARAM_LAST_MASK SNDRV_PCM_HW_PARAM_SUBFORMAT
366
367#define SNDRV_PCM_HW_PARAM_SAMPLE_BITS 8 /* Bits per sample */
368#define SNDRV_PCM_HW_PARAM_FRAME_BITS 9 /* Bits per frame */
369#define SNDRV_PCM_HW_PARAM_CHANNELS 10 /* Channels */
370#define SNDRV_PCM_HW_PARAM_RATE 11 /* Approx rate */
371#define SNDRV_PCM_HW_PARAM_PERIOD_TIME 12 /* Approx distance between
372 * interrupts in us
373 */
374#define SNDRV_PCM_HW_PARAM_PERIOD_SIZE 13 /* Approx frames between
375 * interrupts
376 */
377#define SNDRV_PCM_HW_PARAM_PERIOD_BYTES 14 /* Approx bytes between
378 * interrupts
379 */
380#define SNDRV_PCM_HW_PARAM_PERIODS 15 /* Approx interrupts per
381 * buffer
382 */
383#define SNDRV_PCM_HW_PARAM_BUFFER_TIME 16 /* Approx duration of buffer
384 * in us
385 */
386#define SNDRV_PCM_HW_PARAM_BUFFER_SIZE 17 /* Size of buffer in frames */
387#define SNDRV_PCM_HW_PARAM_BUFFER_BYTES 18 /* Size of buffer in bytes */
388#define SNDRV_PCM_HW_PARAM_TICK_TIME 19 /* Approx tick duration in us */
389#define SNDRV_PCM_HW_PARAM_FIRST_INTERVAL SNDRV_PCM_HW_PARAM_SAMPLE_BITS
390#define SNDRV_PCM_HW_PARAM_LAST_INTERVAL SNDRV_PCM_HW_PARAM_TICK_TIME
391
392#define SNDRV_PCM_HW_PARAMS_NORESAMPLE (1<<0) /* avoid rate resampling */
393#define SNDRV_PCM_HW_PARAMS_EXPORT_BUFFER (1<<1) /* export buffer */
394#define SNDRV_PCM_HW_PARAMS_NO_PERIOD_WAKEUP (1<<2) /* disable period wakeups */
395
396struct snd_interval {
397 unsigned int min, max;
398 unsigned int openmin:1,
399 openmax:1,
400 integer:1,
401 empty:1;
402};
403
404#define SNDRV_MASK_MAX 256
405
406struct snd_mask {
407 __u32 bits[(SNDRV_MASK_MAX+31)/32];
408};
409
410struct snd_pcm_hw_params {
411 unsigned int flags;
Ingo Molnarfb7df122017-11-03 12:18:37 +0100412 struct snd_mask masks[SNDRV_PCM_HW_PARAM_LAST_MASK -
David Howells674e95c2012-10-09 09:49:13 +0100413 SNDRV_PCM_HW_PARAM_FIRST_MASK + 1];
414 struct snd_mask mres[5]; /* reserved masks */
415 struct snd_interval intervals[SNDRV_PCM_HW_PARAM_LAST_INTERVAL -
416 SNDRV_PCM_HW_PARAM_FIRST_INTERVAL + 1];
417 struct snd_interval ires[9]; /* reserved intervals */
418 unsigned int rmask; /* W: requested masks */
419 unsigned int cmask; /* R: changed masks */
420 unsigned int info; /* R: Info flags for returned setup */
421 unsigned int msbits; /* R: used most significant bits */
422 unsigned int rate_num; /* R: rate numerator */
423 unsigned int rate_den; /* R: rate denominator */
424 snd_pcm_uframes_t fifo_size; /* R: chip FIFO size in frames */
425 unsigned char reserved[64]; /* reserved for future */
426};
427
428enum {
429 SNDRV_PCM_TSTAMP_NONE = 0,
430 SNDRV_PCM_TSTAMP_ENABLE,
431 SNDRV_PCM_TSTAMP_LAST = SNDRV_PCM_TSTAMP_ENABLE,
432};
433
434struct snd_pcm_sw_params {
435 int tstamp_mode; /* timestamp mode */
436 unsigned int period_step;
437 unsigned int sleep_min; /* min ticks to sleep */
438 snd_pcm_uframes_t avail_min; /* min avail frames for wakeup */
439 snd_pcm_uframes_t xfer_align; /* obsolete: xfer size need to be a multiple */
440 snd_pcm_uframes_t start_threshold; /* min hw_avail frames for automatic start */
441 snd_pcm_uframes_t stop_threshold; /* min avail frames for automatic stop */
442 snd_pcm_uframes_t silence_threshold; /* min distance from noise for silence filling */
443 snd_pcm_uframes_t silence_size; /* silence block size */
444 snd_pcm_uframes_t boundary; /* pointers wrap point */
Takashi Iwai589008102014-07-16 17:45:27 +0200445 unsigned int proto; /* protocol version */
446 unsigned int tstamp_type; /* timestamp type (req. proto >= 2.0.12) */
Takashi Iwai5646eda2014-07-10 09:50:19 +0200447 unsigned char reserved[56]; /* reserved for future */
David Howells674e95c2012-10-09 09:49:13 +0100448};
449
450struct snd_pcm_channel_info {
451 unsigned int channel;
452 __kernel_off_t offset; /* mmap offset */
453 unsigned int first; /* offset to first sample in bits */
454 unsigned int step; /* samples distance in bits */
455};
456
Pierre-Louis Bossart229d0432015-02-13 15:14:03 -0600457enum {
458 /*
459 * first definition for backwards compatibility only,
460 * maps to wallclock/link time for HDAudio playback and DEFAULT/DMA time for everything else
461 */
462 SNDRV_PCM_AUDIO_TSTAMP_TYPE_COMPAT = 0,
463
464 /* timestamp definitions */
465 SNDRV_PCM_AUDIO_TSTAMP_TYPE_DEFAULT = 1, /* DMA time, reported as per hw_ptr */
466 SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK = 2, /* link time reported by sample or wallclock counter, reset on startup */
467 SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK_ABSOLUTE = 3, /* link time reported by sample or wallclock counter, not reset on startup */
468 SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK_ESTIMATED = 4, /* link time estimated indirectly */
469 SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK_SYNCHRONIZED = 5, /* link time synchronized with system time */
470 SNDRV_PCM_AUDIO_TSTAMP_TYPE_LAST = SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK_SYNCHRONIZED
471};
472
Baolin Wang3ddee7f2018-04-24 20:06:11 +0800473#ifndef __KERNEL__
474/* explicit padding avoids incompatibility between i386 and x86-64 */
Takashi Iwai7fd7d6c2019-12-20 16:34:14 +0100475typedef struct { unsigned char pad[sizeof(time_t) - sizeof(int)]; } __time_pad;
Baolin Wang3ddee7f2018-04-24 20:06:11 +0800476
David Howells674e95c2012-10-09 09:49:13 +0100477struct snd_pcm_status {
478 snd_pcm_state_t state; /* stream state */
Baolin Wang3ddee7f2018-04-24 20:06:11 +0800479 __time_pad pad1; /* align to timespec */
David Howells674e95c2012-10-09 09:49:13 +0100480 struct timespec trigger_tstamp; /* time when stream was started/stopped/paused */
481 struct timespec tstamp; /* reference timestamp */
482 snd_pcm_uframes_t appl_ptr; /* appl ptr */
483 snd_pcm_uframes_t hw_ptr; /* hw ptr */
484 snd_pcm_sframes_t delay; /* current delay in frames */
485 snd_pcm_uframes_t avail; /* number of frames available */
486 snd_pcm_uframes_t avail_max; /* max frames available on hw since last status */
487 snd_pcm_uframes_t overrange; /* count of ADC (capture) overrange detections from last status */
488 snd_pcm_state_t suspended_state; /* suspended stream state */
Pierre-Louis Bossart229d0432015-02-13 15:14:03 -0600489 __u32 audio_tstamp_data; /* needed for 64-bit alignment, used for configs/report to/from userspace */
490 struct timespec audio_tstamp; /* sample counter, wall clock, PHC or on-demand sync'ed */
491 struct timespec driver_tstamp; /* useful in case reference system tstamp is reported with delay */
492 __u32 audio_tstamp_accuracy; /* in ns units, only valid if indicated in audio_tstamp_data */
493 unsigned char reserved[52-2*sizeof(struct timespec)]; /* must be filled with zero */
David Howells674e95c2012-10-09 09:49:13 +0100494};
Baolin Wang3ddee7f2018-04-24 20:06:11 +0800495#endif
David Howells674e95c2012-10-09 09:49:13 +0100496
Arnd Bergmann80fe7432018-04-24 20:06:15 +0800497/*
498 * For mmap operations, we need the 64-bit layout, both for compat mode,
499 * and for y2038 compatibility. For 64-bit applications, the two definitions
500 * are identical, so we keep the traditional version.
501 */
502#ifdef __SND_STRUCT_TIME64
503#define __snd_pcm_mmap_status64 snd_pcm_mmap_status
504#define __snd_pcm_mmap_control64 snd_pcm_mmap_control
505#define __snd_pcm_sync_ptr64 snd_pcm_sync_ptr
506#ifdef __KERNEL__
507#define __snd_timespec64 __kernel_timespec
508#else
509#define __snd_timespec64 timespec
510#endif
511struct __snd_timespec {
512 __s32 tv_sec;
513 __s32 tv_nsec;
514};
515#else
516#define __snd_pcm_mmap_status snd_pcm_mmap_status
517#define __snd_pcm_mmap_control snd_pcm_mmap_control
518#define __snd_pcm_sync_ptr snd_pcm_sync_ptr
519#define __snd_timespec timespec
520struct __snd_timespec64 {
521 __s64 tv_sec;
522 __s64 tv_nsec;
523};
524
525#endif
526
527struct __snd_pcm_mmap_status {
David Howells674e95c2012-10-09 09:49:13 +0100528 snd_pcm_state_t state; /* RO: state - SNDRV_PCM_STATE_XXXX */
529 int pad1; /* Needed for 64 bit alignment */
530 snd_pcm_uframes_t hw_ptr; /* RO: hw ptr (0...boundary-1) */
Arnd Bergmann80fe7432018-04-24 20:06:15 +0800531 struct __snd_timespec tstamp; /* Timestamp */
David Howells674e95c2012-10-09 09:49:13 +0100532 snd_pcm_state_t suspended_state; /* RO: suspended stream state */
Arnd Bergmann80fe7432018-04-24 20:06:15 +0800533 struct __snd_timespec audio_tstamp; /* from sample counter or wall clock */
David Howells674e95c2012-10-09 09:49:13 +0100534};
535
Arnd Bergmann80fe7432018-04-24 20:06:15 +0800536struct __snd_pcm_mmap_control {
David Howells674e95c2012-10-09 09:49:13 +0100537 snd_pcm_uframes_t appl_ptr; /* RW: appl ptr (0...boundary-1) */
538 snd_pcm_uframes_t avail_min; /* RW: min available frames for wakeup */
539};
540
541#define SNDRV_PCM_SYNC_PTR_HWSYNC (1<<0) /* execute hwsync */
542#define SNDRV_PCM_SYNC_PTR_APPL (1<<1) /* get appl_ptr from driver (r/w op) */
543#define SNDRV_PCM_SYNC_PTR_AVAIL_MIN (1<<2) /* get avail_min from driver */
544
Arnd Bergmann80fe7432018-04-24 20:06:15 +0800545struct __snd_pcm_sync_ptr {
David Howells674e95c2012-10-09 09:49:13 +0100546 unsigned int flags;
547 union {
Arnd Bergmann80fe7432018-04-24 20:06:15 +0800548 struct __snd_pcm_mmap_status status;
David Howells674e95c2012-10-09 09:49:13 +0100549 unsigned char reserved[64];
550 } s;
551 union {
Arnd Bergmann80fe7432018-04-24 20:06:15 +0800552 struct __snd_pcm_mmap_control control;
553 unsigned char reserved[64];
554 } c;
555};
556
557#if defined(__BYTE_ORDER) ? __BYTE_ORDER == __BIG_ENDIAN : defined(__BIG_ENDIAN)
558typedef char __pad_before_uframe[sizeof(__u64) - sizeof(snd_pcm_uframes_t)];
559typedef char __pad_after_uframe[0];
560#endif
561
562#if defined(__BYTE_ORDER) ? __BYTE_ORDER == __LITTLE_ENDIAN : defined(__LITTLE_ENDIAN)
563typedef char __pad_before_uframe[0];
564typedef char __pad_after_uframe[sizeof(__u64) - sizeof(snd_pcm_uframes_t)];
565#endif
566
567struct __snd_pcm_mmap_status64 {
Ranjani Sridharan46b770f2020-01-29 10:44:48 -0800568 snd_pcm_state_t state; /* RO: state - SNDRV_PCM_STATE_XXXX */
Arnd Bergmann80fe7432018-04-24 20:06:15 +0800569 __u32 pad1; /* Needed for 64 bit alignment */
570 __pad_before_uframe __pad1;
571 snd_pcm_uframes_t hw_ptr; /* RO: hw ptr (0...boundary-1) */
572 __pad_after_uframe __pad2;
573 struct __snd_timespec64 tstamp; /* Timestamp */
Ranjani Sridharan46b770f2020-01-29 10:44:48 -0800574 snd_pcm_state_t suspended_state;/* RO: suspended stream state */
Arnd Bergmann80fe7432018-04-24 20:06:15 +0800575 __u32 pad3; /* Needed for 64 bit alignment */
576 struct __snd_timespec64 audio_tstamp; /* sample counter or wall clock */
577};
578
579struct __snd_pcm_mmap_control64 {
580 __pad_before_uframe __pad1;
581 snd_pcm_uframes_t appl_ptr; /* RW: appl ptr (0...boundary-1) */
582 __pad_before_uframe __pad2;
583
584 __pad_before_uframe __pad3;
585 snd_pcm_uframes_t avail_min; /* RW: min available frames for wakeup */
586 __pad_after_uframe __pad4;
587};
588
589struct __snd_pcm_sync_ptr64 {
590 __u32 flags;
591 __u32 pad1;
592 union {
593 struct __snd_pcm_mmap_status64 status;
594 unsigned char reserved[64];
595 } s;
596 union {
597 struct __snd_pcm_mmap_control64 control;
David Howells674e95c2012-10-09 09:49:13 +0100598 unsigned char reserved[64];
599 } c;
600};
601
602struct snd_xferi {
603 snd_pcm_sframes_t result;
604 void __user *buf;
605 snd_pcm_uframes_t frames;
606};
607
608struct snd_xfern {
609 snd_pcm_sframes_t result;
610 void __user * __user *bufs;
611 snd_pcm_uframes_t frames;
612};
613
614enum {
615 SNDRV_PCM_TSTAMP_TYPE_GETTIMEOFDAY = 0, /* gettimeofday equivalent */
616 SNDRV_PCM_TSTAMP_TYPE_MONOTONIC, /* posix_clock_monotonic equivalent */
Mark Brown0ac8a522014-07-08 16:51:49 +0200617 SNDRV_PCM_TSTAMP_TYPE_MONOTONIC_RAW, /* monotonic_raw (no NTP) */
618 SNDRV_PCM_TSTAMP_TYPE_LAST = SNDRV_PCM_TSTAMP_TYPE_MONOTONIC_RAW,
David Howells674e95c2012-10-09 09:49:13 +0100619};
620
621/* channel positions */
622enum {
623 SNDRV_CHMAP_UNKNOWN = 0,
624 SNDRV_CHMAP_NA, /* N/A, silent */
625 SNDRV_CHMAP_MONO, /* mono stream */
626 /* this follows the alsa-lib mixer channel value + 3 */
627 SNDRV_CHMAP_FL, /* front left */
628 SNDRV_CHMAP_FR, /* front right */
629 SNDRV_CHMAP_RL, /* rear left */
630 SNDRV_CHMAP_RR, /* rear right */
631 SNDRV_CHMAP_FC, /* front center */
632 SNDRV_CHMAP_LFE, /* LFE */
633 SNDRV_CHMAP_SL, /* side left */
634 SNDRV_CHMAP_SR, /* side right */
635 SNDRV_CHMAP_RC, /* rear center */
636 /* new definitions */
637 SNDRV_CHMAP_FLC, /* front left center */
638 SNDRV_CHMAP_FRC, /* front right center */
639 SNDRV_CHMAP_RLC, /* rear left center */
640 SNDRV_CHMAP_RRC, /* rear right center */
641 SNDRV_CHMAP_FLW, /* front left wide */
642 SNDRV_CHMAP_FRW, /* front right wide */
643 SNDRV_CHMAP_FLH, /* front left high */
644 SNDRV_CHMAP_FCH, /* front center high */
645 SNDRV_CHMAP_FRH, /* front right high */
646 SNDRV_CHMAP_TC, /* top center */
647 SNDRV_CHMAP_TFL, /* top front left */
648 SNDRV_CHMAP_TFR, /* top front right */
649 SNDRV_CHMAP_TFC, /* top front center */
650 SNDRV_CHMAP_TRL, /* top rear left */
651 SNDRV_CHMAP_TRR, /* top rear right */
652 SNDRV_CHMAP_TRC, /* top rear center */
Takashi Iwai7cc17a32012-11-26 16:18:59 +0100653 /* new definitions for UAC2 */
654 SNDRV_CHMAP_TFLC, /* top front left center */
655 SNDRV_CHMAP_TFRC, /* top front right center */
656 SNDRV_CHMAP_TSL, /* top side left */
657 SNDRV_CHMAP_TSR, /* top side right */
658 SNDRV_CHMAP_LLFE, /* left LFE */
659 SNDRV_CHMAP_RLFE, /* right LFE */
660 SNDRV_CHMAP_BC, /* bottom center */
661 SNDRV_CHMAP_BLC, /* bottom left center */
662 SNDRV_CHMAP_BRC, /* bottom right center */
663 SNDRV_CHMAP_LAST = SNDRV_CHMAP_BRC,
David Howells674e95c2012-10-09 09:49:13 +0100664};
665
666#define SNDRV_CHMAP_POSITION_MASK 0xffff
667#define SNDRV_CHMAP_PHASE_INVERSE (0x01 << 16)
668#define SNDRV_CHMAP_DRIVER_SPEC (0x02 << 16)
669
670#define SNDRV_PCM_IOCTL_PVERSION _IOR('A', 0x00, int)
671#define SNDRV_PCM_IOCTL_INFO _IOR('A', 0x01, struct snd_pcm_info)
672#define SNDRV_PCM_IOCTL_TSTAMP _IOW('A', 0x02, int)
673#define SNDRV_PCM_IOCTL_TTSTAMP _IOW('A', 0x03, int)
Takashi Iwai4b671f52017-06-19 23:11:54 +0200674#define SNDRV_PCM_IOCTL_USER_PVERSION _IOW('A', 0x04, int)
David Howells674e95c2012-10-09 09:49:13 +0100675#define SNDRV_PCM_IOCTL_HW_REFINE _IOWR('A', 0x10, struct snd_pcm_hw_params)
676#define SNDRV_PCM_IOCTL_HW_PARAMS _IOWR('A', 0x11, struct snd_pcm_hw_params)
677#define SNDRV_PCM_IOCTL_HW_FREE _IO('A', 0x12)
678#define SNDRV_PCM_IOCTL_SW_PARAMS _IOWR('A', 0x13, struct snd_pcm_sw_params)
679#define SNDRV_PCM_IOCTL_STATUS _IOR('A', 0x20, struct snd_pcm_status)
680#define SNDRV_PCM_IOCTL_DELAY _IOR('A', 0x21, snd_pcm_sframes_t)
681#define SNDRV_PCM_IOCTL_HWSYNC _IO('A', 0x22)
Arnd Bergmann80fe7432018-04-24 20:06:15 +0800682#define __SNDRV_PCM_IOCTL_SYNC_PTR _IOWR('A', 0x23, struct __snd_pcm_sync_ptr)
683#define __SNDRV_PCM_IOCTL_SYNC_PTR64 _IOWR('A', 0x23, struct __snd_pcm_sync_ptr64)
David Howells674e95c2012-10-09 09:49:13 +0100684#define SNDRV_PCM_IOCTL_SYNC_PTR _IOWR('A', 0x23, struct snd_pcm_sync_ptr)
Pierre-Louis Bossart229d0432015-02-13 15:14:03 -0600685#define SNDRV_PCM_IOCTL_STATUS_EXT _IOWR('A', 0x24, struct snd_pcm_status)
David Howells674e95c2012-10-09 09:49:13 +0100686#define SNDRV_PCM_IOCTL_CHANNEL_INFO _IOR('A', 0x32, struct snd_pcm_channel_info)
687#define SNDRV_PCM_IOCTL_PREPARE _IO('A', 0x40)
688#define SNDRV_PCM_IOCTL_RESET _IO('A', 0x41)
689#define SNDRV_PCM_IOCTL_START _IO('A', 0x42)
690#define SNDRV_PCM_IOCTL_DROP _IO('A', 0x43)
691#define SNDRV_PCM_IOCTL_DRAIN _IO('A', 0x44)
692#define SNDRV_PCM_IOCTL_PAUSE _IOW('A', 0x45, int)
693#define SNDRV_PCM_IOCTL_REWIND _IOW('A', 0x46, snd_pcm_uframes_t)
694#define SNDRV_PCM_IOCTL_RESUME _IO('A', 0x47)
695#define SNDRV_PCM_IOCTL_XRUN _IO('A', 0x48)
696#define SNDRV_PCM_IOCTL_FORWARD _IOW('A', 0x49, snd_pcm_uframes_t)
697#define SNDRV_PCM_IOCTL_WRITEI_FRAMES _IOW('A', 0x50, struct snd_xferi)
698#define SNDRV_PCM_IOCTL_READI_FRAMES _IOR('A', 0x51, struct snd_xferi)
699#define SNDRV_PCM_IOCTL_WRITEN_FRAMES _IOW('A', 0x52, struct snd_xfern)
700#define SNDRV_PCM_IOCTL_READN_FRAMES _IOR('A', 0x53, struct snd_xfern)
701#define SNDRV_PCM_IOCTL_LINK _IOW('A', 0x60, int)
702#define SNDRV_PCM_IOCTL_UNLINK _IO('A', 0x61)
703
704/*****************************************************************************
705 * *
706 * MIDI v1.0 interface *
707 * *
708 *****************************************************************************/
709
710/*
711 * Raw MIDI section - /dev/snd/midi??
712 */
713
David Henningsson08fdced2021-05-15 09:15:33 +0200714#define SNDRV_RAWMIDI_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 2)
David Howells674e95c2012-10-09 09:49:13 +0100715
716enum {
717 SNDRV_RAWMIDI_STREAM_OUTPUT = 0,
718 SNDRV_RAWMIDI_STREAM_INPUT,
719 SNDRV_RAWMIDI_STREAM_LAST = SNDRV_RAWMIDI_STREAM_INPUT,
720};
721
722#define SNDRV_RAWMIDI_INFO_OUTPUT 0x00000001
723#define SNDRV_RAWMIDI_INFO_INPUT 0x00000002
724#define SNDRV_RAWMIDI_INFO_DUPLEX 0x00000004
725
726struct snd_rawmidi_info {
727 unsigned int device; /* RO/WR (control): device number */
728 unsigned int subdevice; /* RO/WR (control): subdevice number */
729 int stream; /* WR: stream */
730 int card; /* R: card number */
731 unsigned int flags; /* SNDRV_RAWMIDI_INFO_XXXX */
732 unsigned char id[64]; /* ID (user selectable) */
733 unsigned char name[80]; /* name of device */
734 unsigned char subname[32]; /* name of active or selected subdevice */
735 unsigned int subdevices_count;
736 unsigned int subdevices_avail;
737 unsigned char reserved[64]; /* reserved for future use */
738};
739
David Henningsson08fdced2021-05-15 09:15:33 +0200740#define SNDRV_RAWMIDI_MODE_FRAMING_MASK (7<<0)
741#define SNDRV_RAWMIDI_MODE_FRAMING_SHIFT 0
742#define SNDRV_RAWMIDI_MODE_FRAMING_NONE (0<<0)
743#define SNDRV_RAWMIDI_MODE_FRAMING_TSTAMP (1<<0)
744#define SNDRV_RAWMIDI_MODE_CLOCK_MASK (7<<3)
745#define SNDRV_RAWMIDI_MODE_CLOCK_SHIFT 3
746#define SNDRV_RAWMIDI_MODE_CLOCK_NONE (0<<3)
747#define SNDRV_RAWMIDI_MODE_CLOCK_REALTIME (1<<3)
748#define SNDRV_RAWMIDI_MODE_CLOCK_MONOTONIC (2<<3)
749#define SNDRV_RAWMIDI_MODE_CLOCK_MONOTONIC_RAW (3<<3)
750
751#define SNDRV_RAWMIDI_FRAMING_DATA_LENGTH 16
752
753struct snd_rawmidi_framing_tstamp {
754 /* For now, frame_type is always 0. Midi 2.0 is expected to add new
755 * types here. Applications are expected to skip unknown frame types.
756 */
757 __u8 frame_type;
758 __u8 length; /* number of valid bytes in data field */
759 __u8 reserved[2];
760 __u32 tv_nsec; /* nanoseconds */
761 __u64 tv_sec; /* seconds */
762 __u8 data[SNDRV_RAWMIDI_FRAMING_DATA_LENGTH];
763} __packed;
764
David Howells674e95c2012-10-09 09:49:13 +0100765struct snd_rawmidi_params {
766 int stream;
767 size_t buffer_size; /* queue size in bytes */
768 size_t avail_min; /* minimum avail bytes for wakeup */
769 unsigned int no_active_sensing: 1; /* do not send active sensing byte in close() */
David Henningsson08fdced2021-05-15 09:15:33 +0200770 unsigned int mode; /* For input data only, frame incoming data */
771 unsigned char reserved[12]; /* reserved for future use */
David Howells674e95c2012-10-09 09:49:13 +0100772};
773
Baolin Wangd9e55822018-04-24 20:06:12 +0800774#ifndef __KERNEL__
David Howells674e95c2012-10-09 09:49:13 +0100775struct snd_rawmidi_status {
776 int stream;
Baolin Wangd9e55822018-04-24 20:06:12 +0800777 __time_pad pad1;
David Howells674e95c2012-10-09 09:49:13 +0100778 struct timespec tstamp; /* Timestamp */
779 size_t avail; /* available bytes */
780 size_t xruns; /* count of overruns since last status (in bytes) */
781 unsigned char reserved[16]; /* reserved for future use */
782};
Baolin Wangd9e55822018-04-24 20:06:12 +0800783#endif
David Howells674e95c2012-10-09 09:49:13 +0100784
785#define SNDRV_RAWMIDI_IOCTL_PVERSION _IOR('W', 0x00, int)
786#define SNDRV_RAWMIDI_IOCTL_INFO _IOR('W', 0x01, struct snd_rawmidi_info)
Jaroslav Kysela09d23172021-09-20 19:18:50 +0200787#define SNDRV_RAWMIDI_IOCTL_USER_PVERSION _IOW('W', 0x02, int)
David Howells674e95c2012-10-09 09:49:13 +0100788#define SNDRV_RAWMIDI_IOCTL_PARAMS _IOWR('W', 0x10, struct snd_rawmidi_params)
789#define SNDRV_RAWMIDI_IOCTL_STATUS _IOWR('W', 0x20, struct snd_rawmidi_status)
790#define SNDRV_RAWMIDI_IOCTL_DROP _IOW('W', 0x30, int)
791#define SNDRV_RAWMIDI_IOCTL_DRAIN _IOW('W', 0x31, int)
792
793/*
794 * Timer section - /dev/snd/timer
795 */
796
Arnd Bergmann1cfaef92019-11-13 17:49:14 +0100797#define SNDRV_TIMER_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 7)
David Howells674e95c2012-10-09 09:49:13 +0100798
799enum {
800 SNDRV_TIMER_CLASS_NONE = -1,
801 SNDRV_TIMER_CLASS_SLAVE = 0,
802 SNDRV_TIMER_CLASS_GLOBAL,
803 SNDRV_TIMER_CLASS_CARD,
804 SNDRV_TIMER_CLASS_PCM,
805 SNDRV_TIMER_CLASS_LAST = SNDRV_TIMER_CLASS_PCM,
806};
807
808/* slave timer classes */
809enum {
810 SNDRV_TIMER_SCLASS_NONE = 0,
811 SNDRV_TIMER_SCLASS_APPLICATION,
812 SNDRV_TIMER_SCLASS_SEQUENCER, /* alias */
813 SNDRV_TIMER_SCLASS_OSS_SEQUENCER, /* alias */
814 SNDRV_TIMER_SCLASS_LAST = SNDRV_TIMER_SCLASS_OSS_SEQUENCER,
815};
816
817/* global timers (device member) */
818#define SNDRV_TIMER_GLOBAL_SYSTEM 0
Alexandre Belloni34ce71a2016-04-23 02:58:05 +0200819#define SNDRV_TIMER_GLOBAL_RTC 1 /* unused */
David Howells674e95c2012-10-09 09:49:13 +0100820#define SNDRV_TIMER_GLOBAL_HPET 2
821#define SNDRV_TIMER_GLOBAL_HRTIMER 3
822
823/* info flags */
824#define SNDRV_TIMER_FLG_SLAVE (1<<0) /* cannot be controlled */
825
826struct snd_timer_id {
827 int dev_class;
828 int dev_sclass;
829 int card;
830 int device;
831 int subdevice;
832};
833
834struct snd_timer_ginfo {
835 struct snd_timer_id tid; /* requested timer ID */
836 unsigned int flags; /* timer flags - SNDRV_TIMER_FLG_* */
837 int card; /* card number */
838 unsigned char id[64]; /* timer identification */
839 unsigned char name[80]; /* timer name */
840 unsigned long reserved0; /* reserved for future use */
841 unsigned long resolution; /* average period resolution in ns */
842 unsigned long resolution_min; /* minimal period resolution in ns */
843 unsigned long resolution_max; /* maximal period resolution in ns */
844 unsigned int clients; /* active timer clients */
845 unsigned char reserved[32];
846};
847
848struct snd_timer_gparams {
849 struct snd_timer_id tid; /* requested timer ID */
850 unsigned long period_num; /* requested precise period duration (in seconds) - numerator */
851 unsigned long period_den; /* requested precise period duration (in seconds) - denominator */
852 unsigned char reserved[32];
853};
854
855struct snd_timer_gstatus {
856 struct snd_timer_id tid; /* requested timer ID */
857 unsigned long resolution; /* current period resolution in ns */
858 unsigned long resolution_num; /* precise current period resolution (in seconds) - numerator */
859 unsigned long resolution_den; /* precise current period resolution (in seconds) - denominator */
860 unsigned char reserved[32];
861};
862
863struct snd_timer_select {
864 struct snd_timer_id id; /* bind to timer ID */
865 unsigned char reserved[32]; /* reserved */
866};
867
868struct snd_timer_info {
869 unsigned int flags; /* timer flags - SNDRV_TIMER_FLG_* */
870 int card; /* card number */
871 unsigned char id[64]; /* timer identificator */
872 unsigned char name[80]; /* timer name */
873 unsigned long reserved0; /* reserved for future use */
874 unsigned long resolution; /* average period resolution in ns */
875 unsigned char reserved[64]; /* reserved */
876};
877
878#define SNDRV_TIMER_PSFLG_AUTO (1<<0) /* auto start, otherwise one-shot */
879#define SNDRV_TIMER_PSFLG_EXCLUSIVE (1<<1) /* exclusive use, precise start/stop/pause/continue */
880#define SNDRV_TIMER_PSFLG_EARLY_EVENT (1<<2) /* write early event to the poll queue */
881
882struct snd_timer_params {
Takashi Sakamotoa9840152018-09-29 23:20:51 +0900883 unsigned int flags; /* flags - SNDRV_TIMER_PSFLG_* */
David Howells674e95c2012-10-09 09:49:13 +0100884 unsigned int ticks; /* requested resolution in ticks */
885 unsigned int queue_size; /* total size of queue (32-1024) */
886 unsigned int reserved0; /* reserved, was: failure locations */
887 unsigned int filter; /* event filter (bitmask of SNDRV_TIMER_EVENT_*) */
888 unsigned char reserved[60]; /* reserved */
889};
890
Baolin Wanga07804c2018-04-24 20:06:09 +0800891#ifndef __KERNEL__
David Howells674e95c2012-10-09 09:49:13 +0100892struct snd_timer_status {
893 struct timespec tstamp; /* Timestamp - last update */
894 unsigned int resolution; /* current period resolution in ns */
895 unsigned int lost; /* counter of master tick lost */
896 unsigned int overrun; /* count of read queue overruns */
897 unsigned int queue; /* used queue size */
898 unsigned char reserved[64]; /* reserved */
899};
Baolin Wanga07804c2018-04-24 20:06:09 +0800900#endif
David Howells674e95c2012-10-09 09:49:13 +0100901
902#define SNDRV_TIMER_IOCTL_PVERSION _IOR('T', 0x00, int)
903#define SNDRV_TIMER_IOCTL_NEXT_DEVICE _IOWR('T', 0x01, struct snd_timer_id)
Baolin Wang07094ae2018-04-24 20:06:13 +0800904#define SNDRV_TIMER_IOCTL_TREAD_OLD _IOW('T', 0x02, int)
David Howells674e95c2012-10-09 09:49:13 +0100905#define SNDRV_TIMER_IOCTL_GINFO _IOWR('T', 0x03, struct snd_timer_ginfo)
906#define SNDRV_TIMER_IOCTL_GPARAMS _IOW('T', 0x04, struct snd_timer_gparams)
907#define SNDRV_TIMER_IOCTL_GSTATUS _IOWR('T', 0x05, struct snd_timer_gstatus)
908#define SNDRV_TIMER_IOCTL_SELECT _IOW('T', 0x10, struct snd_timer_select)
909#define SNDRV_TIMER_IOCTL_INFO _IOR('T', 0x11, struct snd_timer_info)
910#define SNDRV_TIMER_IOCTL_PARAMS _IOW('T', 0x12, struct snd_timer_params)
911#define SNDRV_TIMER_IOCTL_STATUS _IOR('T', 0x14, struct snd_timer_status)
912/* The following four ioctls are changed since 1.0.9 due to confliction */
913#define SNDRV_TIMER_IOCTL_START _IO('T', 0xa0)
914#define SNDRV_TIMER_IOCTL_STOP _IO('T', 0xa1)
915#define SNDRV_TIMER_IOCTL_CONTINUE _IO('T', 0xa2)
916#define SNDRV_TIMER_IOCTL_PAUSE _IO('T', 0xa3)
Baolin Wang07094ae2018-04-24 20:06:13 +0800917#define SNDRV_TIMER_IOCTL_TREAD64 _IOW('T', 0xa4, int)
918
919#if __BITS_PER_LONG == 64
920#define SNDRV_TIMER_IOCTL_TREAD SNDRV_TIMER_IOCTL_TREAD_OLD
921#else
922#define SNDRV_TIMER_IOCTL_TREAD ((sizeof(__kernel_long_t) >= sizeof(time_t)) ? \
923 SNDRV_TIMER_IOCTL_TREAD_OLD : \
924 SNDRV_TIMER_IOCTL_TREAD64)
925#endif
David Howells674e95c2012-10-09 09:49:13 +0100926
927struct snd_timer_read {
928 unsigned int resolution;
929 unsigned int ticks;
930};
931
932enum {
933 SNDRV_TIMER_EVENT_RESOLUTION = 0, /* val = resolution in ns */
934 SNDRV_TIMER_EVENT_TICK, /* val = ticks */
935 SNDRV_TIMER_EVENT_START, /* val = resolution in ns */
936 SNDRV_TIMER_EVENT_STOP, /* val = 0 */
937 SNDRV_TIMER_EVENT_CONTINUE, /* val = resolution in ns */
938 SNDRV_TIMER_EVENT_PAUSE, /* val = 0 */
939 SNDRV_TIMER_EVENT_EARLY, /* val = 0, early event */
940 SNDRV_TIMER_EVENT_SUSPEND, /* val = 0 */
941 SNDRV_TIMER_EVENT_RESUME, /* val = resolution in ns */
942 /* master timer events for slave timer instances */
943 SNDRV_TIMER_EVENT_MSTART = SNDRV_TIMER_EVENT_START + 10,
944 SNDRV_TIMER_EVENT_MSTOP = SNDRV_TIMER_EVENT_STOP + 10,
945 SNDRV_TIMER_EVENT_MCONTINUE = SNDRV_TIMER_EVENT_CONTINUE + 10,
946 SNDRV_TIMER_EVENT_MPAUSE = SNDRV_TIMER_EVENT_PAUSE + 10,
947 SNDRV_TIMER_EVENT_MSUSPEND = SNDRV_TIMER_EVENT_SUSPEND + 10,
948 SNDRV_TIMER_EVENT_MRESUME = SNDRV_TIMER_EVENT_RESUME + 10,
949};
950
Baolin Wang07094ae2018-04-24 20:06:13 +0800951#ifndef __KERNEL__
David Howells674e95c2012-10-09 09:49:13 +0100952struct snd_timer_tread {
953 int event;
Baolin Wang07094ae2018-04-24 20:06:13 +0800954 __time_pad pad1;
David Howells674e95c2012-10-09 09:49:13 +0100955 struct timespec tstamp;
956 unsigned int val;
Baolin Wang07094ae2018-04-24 20:06:13 +0800957 __time_pad pad2;
David Howells674e95c2012-10-09 09:49:13 +0100958};
Baolin Wang07094ae2018-04-24 20:06:13 +0800959#endif
David Howells674e95c2012-10-09 09:49:13 +0100960
961/****************************************************************************
962 * *
963 * Section for driver control interface - /dev/snd/control? *
964 * *
965 ****************************************************************************/
966
Takashi Iwaia103a392019-12-26 11:03:53 +0100967#define SNDRV_CTL_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 8)
David Howells674e95c2012-10-09 09:49:13 +0100968
969struct snd_ctl_card_info {
970 int card; /* card number */
971 int pad; /* reserved for future (was type) */
972 unsigned char id[16]; /* ID of card (user selectable) */
973 unsigned char driver[16]; /* Driver name */
974 unsigned char name[32]; /* Short name of soundcard */
975 unsigned char longname[80]; /* name + info text about soundcard */
976 unsigned char reserved_[16]; /* reserved for future (was ID of mixer) */
977 unsigned char mixername[80]; /* visual mixer identification */
978 unsigned char components[128]; /* card components / fine identification, delimited with one space (AC97 etc..) */
979};
980
981typedef int __bitwise snd_ctl_elem_type_t;
982#define SNDRV_CTL_ELEM_TYPE_NONE ((__force snd_ctl_elem_type_t) 0) /* invalid */
983#define SNDRV_CTL_ELEM_TYPE_BOOLEAN ((__force snd_ctl_elem_type_t) 1) /* boolean type */
984#define SNDRV_CTL_ELEM_TYPE_INTEGER ((__force snd_ctl_elem_type_t) 2) /* integer type */
985#define SNDRV_CTL_ELEM_TYPE_ENUMERATED ((__force snd_ctl_elem_type_t) 3) /* enumerated type */
986#define SNDRV_CTL_ELEM_TYPE_BYTES ((__force snd_ctl_elem_type_t) 4) /* byte array */
987#define SNDRV_CTL_ELEM_TYPE_IEC958 ((__force snd_ctl_elem_type_t) 5) /* IEC958 (S/PDIF) setup */
988#define SNDRV_CTL_ELEM_TYPE_INTEGER64 ((__force snd_ctl_elem_type_t) 6) /* 64-bit integer type */
989#define SNDRV_CTL_ELEM_TYPE_LAST SNDRV_CTL_ELEM_TYPE_INTEGER64
990
991typedef int __bitwise snd_ctl_elem_iface_t;
992#define SNDRV_CTL_ELEM_IFACE_CARD ((__force snd_ctl_elem_iface_t) 0) /* global control */
993#define SNDRV_CTL_ELEM_IFACE_HWDEP ((__force snd_ctl_elem_iface_t) 1) /* hardware dependent device */
994#define SNDRV_CTL_ELEM_IFACE_MIXER ((__force snd_ctl_elem_iface_t) 2) /* virtual mixer device */
995#define SNDRV_CTL_ELEM_IFACE_PCM ((__force snd_ctl_elem_iface_t) 3) /* PCM device */
996#define SNDRV_CTL_ELEM_IFACE_RAWMIDI ((__force snd_ctl_elem_iface_t) 4) /* RawMidi device */
997#define SNDRV_CTL_ELEM_IFACE_TIMER ((__force snd_ctl_elem_iface_t) 5) /* timer device */
998#define SNDRV_CTL_ELEM_IFACE_SEQUENCER ((__force snd_ctl_elem_iface_t) 6) /* sequencer client */
999#define SNDRV_CTL_ELEM_IFACE_LAST SNDRV_CTL_ELEM_IFACE_SEQUENCER
1000
1001#define SNDRV_CTL_ELEM_ACCESS_READ (1<<0)
1002#define SNDRV_CTL_ELEM_ACCESS_WRITE (1<<1)
1003#define SNDRV_CTL_ELEM_ACCESS_READWRITE (SNDRV_CTL_ELEM_ACCESS_READ|SNDRV_CTL_ELEM_ACCESS_WRITE)
1004#define SNDRV_CTL_ELEM_ACCESS_VOLATILE (1<<2) /* control value may be changed without a notification */
Takashi Iwai5aec5792021-10-18 13:40:35 +02001005/* (1 << 3) is unused. */
David Howells674e95c2012-10-09 09:49:13 +01001006#define SNDRV_CTL_ELEM_ACCESS_TLV_READ (1<<4) /* TLV read is possible */
1007#define SNDRV_CTL_ELEM_ACCESS_TLV_WRITE (1<<5) /* TLV write is possible */
1008#define SNDRV_CTL_ELEM_ACCESS_TLV_READWRITE (SNDRV_CTL_ELEM_ACCESS_TLV_READ|SNDRV_CTL_ELEM_ACCESS_TLV_WRITE)
1009#define SNDRV_CTL_ELEM_ACCESS_TLV_COMMAND (1<<6) /* TLV command is possible */
1010#define SNDRV_CTL_ELEM_ACCESS_INACTIVE (1<<8) /* control does actually nothing, but may be updated */
1011#define SNDRV_CTL_ELEM_ACCESS_LOCK (1<<9) /* write lock */
1012#define SNDRV_CTL_ELEM_ACCESS_OWNER (1<<10) /* write lock owner */
Ingo Molnarfb7df122017-11-03 12:18:37 +01001013#define SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK (1<<28) /* kernel use a TLV callback */
David Howells674e95c2012-10-09 09:49:13 +01001014#define SNDRV_CTL_ELEM_ACCESS_USER (1<<29) /* user space element */
1015/* bits 30 and 31 are obsoleted (for indirect access) */
1016
1017/* for further details see the ACPI and PCI power management specification */
1018#define SNDRV_CTL_POWER_D0 0x0000 /* full On */
1019#define SNDRV_CTL_POWER_D1 0x0100 /* partial On */
1020#define SNDRV_CTL_POWER_D2 0x0200 /* partial On */
1021#define SNDRV_CTL_POWER_D3 0x0300 /* Off */
1022#define SNDRV_CTL_POWER_D3hot (SNDRV_CTL_POWER_D3|0x0000) /* Off, with power */
1023#define SNDRV_CTL_POWER_D3cold (SNDRV_CTL_POWER_D3|0x0001) /* Off, without power */
1024
Takashi Iwai975cc022013-06-28 11:56:49 +02001025#define SNDRV_CTL_ELEM_ID_NAME_MAXLEN 44
1026
David Howells674e95c2012-10-09 09:49:13 +01001027struct snd_ctl_elem_id {
1028 unsigned int numid; /* numeric identifier, zero = invalid */
1029 snd_ctl_elem_iface_t iface; /* interface identifier */
1030 unsigned int device; /* device/client number */
1031 unsigned int subdevice; /* subdevice (substream) number */
Vinod Koul43c499d2015-04-17 22:53:32 +05301032 unsigned char name[SNDRV_CTL_ELEM_ID_NAME_MAXLEN]; /* ASCII name of item */
David Howells674e95c2012-10-09 09:49:13 +01001033 unsigned int index; /* index of item */
1034};
1035
1036struct snd_ctl_elem_list {
1037 unsigned int offset; /* W: first element ID to get */
1038 unsigned int space; /* W: count of element IDs to get */
1039 unsigned int used; /* R: count of element IDs set */
1040 unsigned int count; /* R: count of all elements */
1041 struct snd_ctl_elem_id __user *pids; /* R: IDs */
1042 unsigned char reserved[50];
1043};
1044
1045struct snd_ctl_elem_info {
1046 struct snd_ctl_elem_id id; /* W: element ID */
1047 snd_ctl_elem_type_t type; /* R: value type - SNDRV_CTL_ELEM_TYPE_* */
1048 unsigned int access; /* R: value access (bitmask) - SNDRV_CTL_ELEM_ACCESS_* */
1049 unsigned int count; /* count of values */
1050 __kernel_pid_t owner; /* owner's PID of this control */
1051 union {
1052 struct {
1053 long min; /* R: minimum value */
1054 long max; /* R: maximum value */
1055 long step; /* R: step (0 variable) */
1056 } integer;
1057 struct {
1058 long long min; /* R: minimum value */
1059 long long max; /* R: maximum value */
1060 long long step; /* R: step (0 variable) */
1061 } integer64;
1062 struct {
1063 unsigned int items; /* R: number of items */
1064 unsigned int item; /* W: item number */
1065 char name[64]; /* R: value name */
1066 __u64 names_ptr; /* W: names list (ELEM_ADD only) */
1067 unsigned int names_length;
1068 } enumerated;
1069 unsigned char reserved[128];
1070 } value;
Takashi Sakamotoff163512019-12-23 11:39:20 +09001071 unsigned char reserved[64];
David Howells674e95c2012-10-09 09:49:13 +01001072};
1073
1074struct snd_ctl_elem_value {
1075 struct snd_ctl_elem_id id; /* W: element ID */
1076 unsigned int indirect: 1; /* W: indirect access - obsoleted */
1077 union {
1078 union {
1079 long value[128];
1080 long *value_ptr; /* obsoleted */
1081 } integer;
1082 union {
1083 long long value[64];
1084 long long *value_ptr; /* obsoleted */
1085 } integer64;
1086 union {
1087 unsigned int item[128];
1088 unsigned int *item_ptr; /* obsoleted */
1089 } enumerated;
1090 union {
1091 unsigned char data[512];
1092 unsigned char *data_ptr; /* obsoleted */
1093 } bytes;
1094 struct snd_aes_iec958 iec958;
1095 } value; /* RO */
Baolin Wanga4e7dd32018-04-24 20:06:10 +08001096 unsigned char reserved[128];
David Howells674e95c2012-10-09 09:49:13 +01001097};
1098
1099struct snd_ctl_tlv {
1100 unsigned int numid; /* control element numeric identification */
1101 unsigned int length; /* in bytes aligned to 4 */
1102 unsigned int tlv[0]; /* first TLV */
1103};
1104
1105#define SNDRV_CTL_IOCTL_PVERSION _IOR('U', 0x00, int)
1106#define SNDRV_CTL_IOCTL_CARD_INFO _IOR('U', 0x01, struct snd_ctl_card_info)
1107#define SNDRV_CTL_IOCTL_ELEM_LIST _IOWR('U', 0x10, struct snd_ctl_elem_list)
1108#define SNDRV_CTL_IOCTL_ELEM_INFO _IOWR('U', 0x11, struct snd_ctl_elem_info)
1109#define SNDRV_CTL_IOCTL_ELEM_READ _IOWR('U', 0x12, struct snd_ctl_elem_value)
1110#define SNDRV_CTL_IOCTL_ELEM_WRITE _IOWR('U', 0x13, struct snd_ctl_elem_value)
1111#define SNDRV_CTL_IOCTL_ELEM_LOCK _IOW('U', 0x14, struct snd_ctl_elem_id)
1112#define SNDRV_CTL_IOCTL_ELEM_UNLOCK _IOW('U', 0x15, struct snd_ctl_elem_id)
1113#define SNDRV_CTL_IOCTL_SUBSCRIBE_EVENTS _IOWR('U', 0x16, int)
1114#define SNDRV_CTL_IOCTL_ELEM_ADD _IOWR('U', 0x17, struct snd_ctl_elem_info)
1115#define SNDRV_CTL_IOCTL_ELEM_REPLACE _IOWR('U', 0x18, struct snd_ctl_elem_info)
1116#define SNDRV_CTL_IOCTL_ELEM_REMOVE _IOWR('U', 0x19, struct snd_ctl_elem_id)
1117#define SNDRV_CTL_IOCTL_TLV_READ _IOWR('U', 0x1a, struct snd_ctl_tlv)
1118#define SNDRV_CTL_IOCTL_TLV_WRITE _IOWR('U', 0x1b, struct snd_ctl_tlv)
1119#define SNDRV_CTL_IOCTL_TLV_COMMAND _IOWR('U', 0x1c, struct snd_ctl_tlv)
1120#define SNDRV_CTL_IOCTL_HWDEP_NEXT_DEVICE _IOWR('U', 0x20, int)
1121#define SNDRV_CTL_IOCTL_HWDEP_INFO _IOR('U', 0x21, struct snd_hwdep_info)
1122#define SNDRV_CTL_IOCTL_PCM_NEXT_DEVICE _IOR('U', 0x30, int)
1123#define SNDRV_CTL_IOCTL_PCM_INFO _IOWR('U', 0x31, struct snd_pcm_info)
1124#define SNDRV_CTL_IOCTL_PCM_PREFER_SUBDEVICE _IOW('U', 0x32, int)
1125#define SNDRV_CTL_IOCTL_RAWMIDI_NEXT_DEVICE _IOWR('U', 0x40, int)
1126#define SNDRV_CTL_IOCTL_RAWMIDI_INFO _IOWR('U', 0x41, struct snd_rawmidi_info)
1127#define SNDRV_CTL_IOCTL_RAWMIDI_PREFER_SUBDEVICE _IOW('U', 0x42, int)
1128#define SNDRV_CTL_IOCTL_POWER _IOWR('U', 0xd0, int)
1129#define SNDRV_CTL_IOCTL_POWER_STATE _IOR('U', 0xd1, int)
1130
1131/*
1132 * Read interface.
1133 */
1134
1135enum sndrv_ctl_event_type {
1136 SNDRV_CTL_EVENT_ELEM = 0,
1137 SNDRV_CTL_EVENT_LAST = SNDRV_CTL_EVENT_ELEM,
1138};
1139
1140#define SNDRV_CTL_EVENT_MASK_VALUE (1<<0) /* element value was changed */
1141#define SNDRV_CTL_EVENT_MASK_INFO (1<<1) /* element info was changed */
1142#define SNDRV_CTL_EVENT_MASK_ADD (1<<2) /* element was added */
1143#define SNDRV_CTL_EVENT_MASK_TLV (1<<3) /* element TLV tree was changed */
1144#define SNDRV_CTL_EVENT_MASK_REMOVE (~0U) /* element was removed */
1145
1146struct snd_ctl_event {
1147 int type; /* event type - SNDRV_CTL_EVENT_* */
1148 union {
1149 struct {
1150 unsigned int mask;
1151 struct snd_ctl_elem_id id;
1152 } elem;
1153 unsigned char data8[60];
1154 } data;
1155};
1156
1157/*
1158 * Control names
1159 */
1160
1161#define SNDRV_CTL_NAME_NONE ""
1162#define SNDRV_CTL_NAME_PLAYBACK "Playback "
1163#define SNDRV_CTL_NAME_CAPTURE "Capture "
1164
1165#define SNDRV_CTL_NAME_IEC958_NONE ""
1166#define SNDRV_CTL_NAME_IEC958_SWITCH "Switch"
1167#define SNDRV_CTL_NAME_IEC958_VOLUME "Volume"
1168#define SNDRV_CTL_NAME_IEC958_DEFAULT "Default"
1169#define SNDRV_CTL_NAME_IEC958_MASK "Mask"
1170#define SNDRV_CTL_NAME_IEC958_CON_MASK "Con Mask"
1171#define SNDRV_CTL_NAME_IEC958_PRO_MASK "Pro Mask"
1172#define SNDRV_CTL_NAME_IEC958_PCM_STREAM "PCM Stream"
1173#define SNDRV_CTL_NAME_IEC958(expl,direction,what) "IEC958 " expl SNDRV_CTL_NAME_##direction SNDRV_CTL_NAME_IEC958_##what
1174
1175#endif /* _UAPI__SOUND_ASOUND_H */