Greg Kroah-Hartman | b244131 | 2017-11-01 15:07:57 +0100 | [diff] [blame^] | 1 | // SPDX-License-Identifier: GPL-2.0 |
Thierry Reding | 7793426 | 2015-11-23 16:20:35 +0100 | [diff] [blame] | 2 | #include <dt-bindings/mfd/max77620.h> |
| 3 | |
Thierry Reding | 9e71045 | 2015-09-09 16:25:05 +0200 | [diff] [blame] | 4 | #include "tegra210.dtsi" |
| 5 | |
| 6 | / { |
| 7 | model = "NVIDIA Jetson TX1"; |
| 8 | compatible = "nvidia,p2180", "nvidia,tegra210"; |
| 9 | |
| 10 | aliases { |
Thierry Reding | 7793426 | 2015-11-23 16:20:35 +0100 | [diff] [blame] | 11 | rtc0 = "/i2c@7000d000/pmic@3c"; |
Thierry Reding | be70771 | 2016-04-11 15:35:06 +0200 | [diff] [blame] | 12 | rtc1 = "/rtc@7000e000"; |
Thierry Reding | 9e71045 | 2015-09-09 16:25:05 +0200 | [diff] [blame] | 13 | serial0 = &uarta; |
| 14 | }; |
| 15 | |
Thierry Reding | 5593eb7 | 2016-06-02 14:07:47 +0200 | [diff] [blame] | 16 | chosen { |
| 17 | stdout-path = "serial0:115200n8"; |
| 18 | }; |
| 19 | |
Thierry Reding | 9e71045 | 2015-09-09 16:25:05 +0200 | [diff] [blame] | 20 | memory { |
| 21 | device_type = "memory"; |
| 22 | reg = <0x0 0x80000000 0x1 0x0>; |
| 23 | }; |
| 24 | |
Alexandre Courbot | 5e6b9a8 | 2016-12-02 20:57:55 +0100 | [diff] [blame] | 25 | gpu@57000000 { |
| 26 | vdd-supply = <&vdd_gpu>; |
| 27 | }; |
| 28 | |
Thierry Reding | 9e71045 | 2015-09-09 16:25:05 +0200 | [diff] [blame] | 29 | /* debug port */ |
Thierry Reding | be70771 | 2016-04-11 15:35:06 +0200 | [diff] [blame] | 30 | serial@70006000 { |
Thierry Reding | 9e71045 | 2015-09-09 16:25:05 +0200 | [diff] [blame] | 31 | status = "okay"; |
| 32 | }; |
| 33 | |
Thierry Reding | 7793426 | 2015-11-23 16:20:35 +0100 | [diff] [blame] | 34 | i2c@7000d000 { |
| 35 | status = "okay"; |
| 36 | clock-frequency = <400000>; |
| 37 | |
| 38 | pmic: pmic@3c { |
| 39 | compatible = "maxim,max77620"; |
| 40 | reg = <0x3c>; |
| 41 | interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; |
| 42 | |
| 43 | #interrupt-cells = <2>; |
| 44 | interrupt-controller; |
| 45 | |
| 46 | #gpio-cells = <2>; |
| 47 | gpio-controller; |
| 48 | |
| 49 | pinctrl-names = "default"; |
| 50 | pinctrl-0 = <&max77620_default>; |
| 51 | |
| 52 | max77620_default: pinmux { |
| 53 | gpio0 { |
| 54 | pins = "gpio0"; |
| 55 | function = "gpio"; |
| 56 | }; |
| 57 | |
| 58 | gpio1 { |
| 59 | pins = "gpio1"; |
| 60 | function = "fps-out"; |
| 61 | drive-push-pull = <1>; |
| 62 | maxim,active-fps-source = <MAX77620_FPS_SRC_0>; |
| 63 | maxim,active-fps-power-up-slot = <7>; |
| 64 | maxim,active-fps-power-down-slot = <0>; |
| 65 | }; |
| 66 | |
| 67 | gpio2_3 { |
| 68 | pins = "gpio2", "gpio3"; |
| 69 | function = "fps-out"; |
| 70 | drive-open-drain = <1>; |
| 71 | maxim,active-fps-source = <MAX77620_FPS_SRC_0>; |
| 72 | }; |
| 73 | |
| 74 | gpio4 { |
| 75 | pins = "gpio4"; |
| 76 | function = "32k-out1"; |
| 77 | }; |
| 78 | |
| 79 | gpio5_6_7 { |
| 80 | pins = "gpio5", "gpio6", "gpio7"; |
| 81 | function = "gpio"; |
| 82 | drive-push-pull = <1>; |
| 83 | }; |
| 84 | }; |
| 85 | |
| 86 | fps { |
| 87 | fps0 { |
| 88 | maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>; |
| 89 | maxim,suspend-fps-time-period-us = <1280>; |
| 90 | }; |
| 91 | |
| 92 | fps1 { |
| 93 | maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>; |
| 94 | maxim,suspend-fps-time-period-us = <1280>; |
| 95 | }; |
| 96 | |
| 97 | fps2 { |
| 98 | maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>; |
| 99 | }; |
| 100 | }; |
| 101 | |
| 102 | regulators { |
| 103 | in-ldo0-1-supply = <&vdd_pre>; |
| 104 | in-ldo7-8-supply = <&vdd_pre>; |
| 105 | in-sd3-supply = <&vdd_5v0_sys>; |
| 106 | |
| 107 | vdd_soc: sd0 { |
| 108 | regulator-name = "VDD_SOC"; |
| 109 | regulator-min-microvolt = <600000>; |
| 110 | regulator-max-microvolt = <1400000>; |
| 111 | regulator-always-on; |
| 112 | regulator-boot-on; |
| 113 | |
| 114 | regulator-enable-ramp-delay = <146>; |
| 115 | regulator-ramp-delay = <27500>; |
| 116 | |
| 117 | maxim,active-fps-source = <MAX77620_FPS_SRC_1>; |
| 118 | }; |
| 119 | |
| 120 | vdd_ddr: sd1 { |
| 121 | regulator-name = "VDD_DDR_1V1_PMIC"; |
| 122 | regulator-always-on; |
| 123 | regulator-boot-on; |
| 124 | |
| 125 | regulator-enable-ramp-delay = <130>; |
| 126 | regulator-ramp-delay = <27500>; |
| 127 | |
| 128 | maxim,active-fps-source = <MAX77620_FPS_SRC_0>; |
| 129 | }; |
| 130 | |
| 131 | vdd_pre: sd2 { |
| 132 | regulator-name = "VDD_PRE_REG_1V35"; |
| 133 | regulator-min-microvolt = <1350000>; |
| 134 | regulator-max-microvolt = <1350000>; |
| 135 | |
| 136 | regulator-enable-ramp-delay = <176>; |
| 137 | regulator-ramp-delay = <27500>; |
| 138 | |
| 139 | maxim,active-fps-source = <MAX77620_FPS_SRC_1>; |
| 140 | }; |
| 141 | |
| 142 | vdd_1v8: sd3 { |
| 143 | regulator-name = "VDD_1V8"; |
| 144 | regulator-min-microvolt = <1800000>; |
| 145 | regulator-max-microvolt = <1800000>; |
| 146 | regulator-always-on; |
| 147 | regulator-boot-on; |
| 148 | |
| 149 | regulator-enable-ramp-delay = <242>; |
| 150 | regulator-ramp-delay = <27500>; |
| 151 | |
| 152 | maxim,active-fps-source = <MAX77620_FPS_SRC_0>; |
| 153 | }; |
| 154 | |
| 155 | vdd_sys_1v2: ldo0 { |
| 156 | regulator-name = "AVDD_SYS_1V2"; |
| 157 | regulator-min-microvolt = <1200000>; |
| 158 | regulator-max-microvolt = <1200000>; |
| 159 | regulator-always-on; |
| 160 | regulator-boot-on; |
| 161 | |
| 162 | regulator-enable-ramp-delay = <26>; |
| 163 | regulator-ramp-delay = <100000>; |
| 164 | |
| 165 | maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; |
| 166 | }; |
| 167 | |
| 168 | vdd_pex_1v05: ldo1 { |
| 169 | regulator-name = "VDD_PEX_1V05"; |
| 170 | regulator-min-microvolt = <1050000>; |
| 171 | regulator-max-microvolt = <1050000>; |
| 172 | |
| 173 | regulator-enable-ramp-delay = <22>; |
| 174 | regulator-ramp-delay = <100000>; |
| 175 | |
| 176 | maxim,active-fps-source = <MAX77620_FPS_SRC_1>; |
| 177 | }; |
| 178 | |
| 179 | vddio_sdmmc: ldo2 { |
| 180 | regulator-name = "VDDIO_SDMMC"; |
| 181 | /* |
| 182 | * Technically this supply should have |
| 183 | * a supported range from 1.8 - 3.3 V. |
| 184 | * However, that would cause the SDHCI |
| 185 | * driver to request 2.7 V upon access |
| 186 | * and that in turn will cause traffic |
| 187 | * to be broken. Leave it at 3.3 V for |
| 188 | * now. |
| 189 | */ |
| 190 | regulator-min-microvolt = <3300000>; |
| 191 | regulator-max-microvolt = <3300000>; |
| 192 | regulator-always-on; |
| 193 | regulator-boot-on; |
| 194 | |
| 195 | regulator-enable-ramp-delay = <62>; |
| 196 | regulator-ramp-delay = <100000>; |
| 197 | |
| 198 | maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; |
| 199 | }; |
| 200 | |
| 201 | vdd_cam_hv: ldo3 { |
| 202 | regulator-name = "VDD_CAM_HV"; |
| 203 | regulator-min-microvolt = <2800000>; |
| 204 | regulator-max-microvolt = <2800000>; |
| 205 | |
| 206 | regulator-enable-ramp-delay = <50>; |
| 207 | regulator-ramp-delay = <100000>; |
| 208 | |
| 209 | maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; |
| 210 | }; |
| 211 | |
| 212 | vdd_rtc: ldo4 { |
| 213 | regulator-name = "VDD_RTC"; |
| 214 | regulator-min-microvolt = <850000>; |
| 215 | regulator-max-microvolt = <850000>; |
| 216 | regulator-always-on; |
| 217 | regulator-boot-on; |
| 218 | |
| 219 | regulator-enable-ramp-delay = <22>; |
| 220 | regulator-ramp-delay = <100000>; |
| 221 | |
| 222 | maxim,active-fps-source = <MAX77620_FPS_SRC_0>; |
| 223 | }; |
| 224 | |
| 225 | vdd_ts_hv: ldo5 { |
| 226 | regulator-name = "VDD_TS_HV"; |
| 227 | regulator-min-microvolt = <3300000>; |
| 228 | regulator-max-microvolt = <3300000>; |
| 229 | |
| 230 | regulator-enable-ramp-delay = <62>; |
| 231 | regulator-ramp-delay = <100000>; |
| 232 | |
| 233 | maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; |
| 234 | }; |
| 235 | |
| 236 | vdd_ts: ldo6 { |
| 237 | regulator-name = "VDD_TS_1V8"; |
| 238 | regulator-min-microvolt = <1800000>; |
| 239 | regulator-max-microvolt = <1800000>; |
| 240 | |
| 241 | regulator-enable-ramp-delay = <36>; |
| 242 | regulator-ramp-delay = <100000>; |
| 243 | |
| 244 | maxim,active-fps-source = <MAX77620_FPS_SRC_0>; |
| 245 | maxim,active-fps-power-up-slot = <7>; |
| 246 | maxim,active-fps-power-down-slot = <0>; |
| 247 | }; |
| 248 | |
| 249 | avdd_1v05_pll: ldo7 { |
| 250 | regulator-name = "AVDD_1V05_PLL"; |
| 251 | regulator-min-microvolt = <1050000>; |
| 252 | regulator-max-microvolt = <1050000>; |
| 253 | regulator-always-on; |
| 254 | regulator-boot-on; |
| 255 | |
| 256 | regulator-enable-ramp-delay = <24>; |
| 257 | regulator-ramp-delay = <100000>; |
| 258 | |
| 259 | maxim,active-fps-source = <MAX77620_FPS_SRC_1>; |
| 260 | }; |
| 261 | |
| 262 | avdd_1v05: ldo8 { |
| 263 | regulator-name = "AVDD_SATA_HDMI_DP_1V05"; |
| 264 | regulator-min-microvolt = <1050000>; |
| 265 | regulator-max-microvolt = <1050000>; |
| 266 | |
| 267 | regulator-enable-ramp-delay = <22>; |
| 268 | regulator-ramp-delay = <100000>; |
| 269 | |
| 270 | maxim,active-fps-source = <MAX77620_FPS_SRC_1>; |
| 271 | }; |
| 272 | }; |
| 273 | }; |
| 274 | }; |
| 275 | |
Thierry Reding | be70771 | 2016-04-11 15:35:06 +0200 | [diff] [blame] | 276 | pmc@7000e400 { |
Thierry Reding | 9e71045 | 2015-09-09 16:25:05 +0200 | [diff] [blame] | 277 | nvidia,invert-interrupt; |
| 278 | }; |
| 279 | |
| 280 | /* eMMC */ |
Thierry Reding | be70771 | 2016-04-11 15:35:06 +0200 | [diff] [blame] | 281 | sdhci@700b0600 { |
Thierry Reding | 9e71045 | 2015-09-09 16:25:05 +0200 | [diff] [blame] | 282 | status = "okay"; |
| 283 | bus-width = <8>; |
| 284 | non-removable; |
| 285 | }; |
| 286 | |
| 287 | clocks { |
| 288 | compatible = "simple-bus"; |
| 289 | #address-cells = <1>; |
| 290 | #size-cells = <0>; |
| 291 | |
| 292 | clk32k_in: clock@0 { |
| 293 | compatible = "fixed-clock"; |
| 294 | reg = <0>; |
| 295 | #clock-cells = <0>; |
| 296 | clock-frequency = <32768>; |
| 297 | }; |
| 298 | }; |
Alexandre Courbot | 5e6b9a8 | 2016-12-02 20:57:55 +0100 | [diff] [blame] | 299 | |
| 300 | regulators { |
| 301 | vdd_gpu: regulator@100 { |
| 302 | compatible = "pwm-regulator"; |
| 303 | reg = <100>; |
| 304 | pwms = <&pwm 1 4880>; |
| 305 | regulator-name = "VDD_GPU"; |
| 306 | regulator-min-microvolt = <710000>; |
| 307 | regulator-max-microvolt = <1320000>; |
| 308 | enable-gpios = <&pmic 6 GPIO_ACTIVE_HIGH>; |
| 309 | regulator-ramp-delay = <80>; |
| 310 | regulator-enable-ramp-delay = <1000>; |
| 311 | }; |
| 312 | }; |
Thierry Reding | 9e71045 | 2015-09-09 16:25:05 +0200 | [diff] [blame] | 313 | }; |