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Valentin Raevsky682d0552013-10-29 14:11:43 +02001/*
2 * Copyright 2013 CompuLab Ltd.
3 *
4 * Author: Valentin Raevsky <valentin@compulab.co.il>
5 *
Christopher Spinratha98704b2016-06-07 19:14:18 +02006 * This file is dual-licensed: you can use it either under the terms
7 * of the GPL or the X11 license, at your option. Note that this dual
8 * licensing only applies to this file, and not this project as a
9 * whole.
Valentin Raevsky682d0552013-10-29 14:11:43 +020010 *
Christopher Spinratha98704b2016-06-07 19:14:18 +020011 * a) This file is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * version 2 as published by the Free Software Foundation.
14 *
Alexandre Belloni13283622017-01-03 11:27:13 +010015 * This file is distributed in the hope that it will be useful,
Christopher Spinratha98704b2016-06-07 19:14:18 +020016 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
Alexandre Belloni13283622017-01-03 11:27:13 +010020 * Or, alternatively,
Christopher Spinratha98704b2016-06-07 19:14:18 +020021 *
22 * b) Permission is hereby granted, free of charge, to any person
23 * obtaining a copy of this software and associated documentation
24 * files (the "Software"), to deal in the Software without
Alexandre Belloni13283622017-01-03 11:27:13 +010025 * restriction, including without limitation the rights to use,
Christopher Spinratha98704b2016-06-07 19:14:18 +020026 * copy, modify, merge, publish, distribute, sublicense, and/or
27 * sell copies of the Software, and to permit persons to whom the
28 * Software is furnished to do so, subject to the following
29 * conditions:
30 *
31 * The above copyright notice and this permission notice shall be
32 * included in all copies or substantial portions of the Software.
33 *
Alexandre Belloni13283622017-01-03 11:27:13 +010034 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
Christopher Spinratha98704b2016-06-07 19:14:18 +020035 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
36 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
37 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
Alexandre Belloni13283622017-01-03 11:27:13 +010038 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
Christopher Spinratha98704b2016-06-07 19:14:18 +020039 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
40 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
41 * OTHER DEALINGS IN THE SOFTWARE.
Valentin Raevsky682d0552013-10-29 14:11:43 +020042 */
43
44/dts-v1/;
Christopher Spinrath669c9402016-06-07 19:14:16 +020045#include <dt-bindings/gpio/gpio.h>
Valentin Raevsky937d9a02017-02-08 21:44:04 +010046#include <dt-bindings/sound/fsl-imx-audmux.h>
Valentin Raevsky682d0552013-10-29 14:11:43 +020047#include "imx6q.dtsi"
48
49/ {
50 model = "CompuLab CM-FX6";
51 compatible = "compulab,cm-fx6", "fsl,imx6q";
52
53 memory {
54 reg = <0x10000000 0x80000000>;
55 };
56
57 leds {
58 compatible = "gpio-leds";
59
60 heartbeat-led {
61 label = "Heartbeat";
62 gpios = <&gpio2 31 0>;
63 linux,default-trigger = "heartbeat";
64 };
65 };
Christopher Spinrath669c9402016-06-07 19:14:16 +020066
Christopher Spinrathd8710c32017-05-30 22:16:01 +020067 awnh387_pwrseq: pwrseq {
68 pinctrl-names = "default";
69 pinctrl-0 = <&pinctrl_pwrseq>;
70 compatible = "mmc-pwrseq-sd8787";
71 powerdown-gpios = <&gpio7 12 GPIO_ACTIVE_HIGH>;
72 reset-gpios = <&gpio6 16 GPIO_ACTIVE_HIGH>;
73 };
74
Christopher Spinrath669c9402016-06-07 19:14:16 +020075 reg_pcie_power_on_gpio: regulator-pcie-power-on-gpio {
76 compatible = "regulator-fixed";
77 regulator-name = "regulator-pcie-power-on-gpio";
78 regulator-min-microvolt = <3300000>;
79 regulator-max-microvolt = <3300000>;
80 gpio = <&gpio2 24 GPIO_ACTIVE_HIGH>;
81 enable-active-high;
82 };
83
84 reg_usb_h1_vbus: usb_h1_vbus {
85 compatible = "regulator-fixed";
86 regulator-name = "usb_h1_vbus";
87 regulator-min-microvolt = <5000000>;
88 regulator-max-microvolt = <5000000>;
89 gpio = <&gpio7 8 GPIO_ACTIVE_HIGH>;
90 enable-active-high;
91 };
92
93 reg_usb_otg_vbus: usb_otg_vbus {
94 compatible = "regulator-fixed";
95 regulator-name = "usb_otg_vbus";
96 regulator-min-microvolt = <5000000>;
97 regulator-max-microvolt = <5000000>;
98 gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
99 enable-active-high;
100 };
Christopher Spinrath1eac1e32016-11-23 01:07:57 +0100101
Valentin Raevsky937d9a02017-02-08 21:44:04 +0100102 sound-analog {
103 compatible = "simple-audio-card";
104 simple-audio-card,name = "On-board analog audio";
105 simple-audio-card,widgets =
106 "Headphone", "Headphone Jack",
107 "Line", "Line Out",
108 "Microphone", "Mic Jack",
109 "Line", "Line In";
110 simple-audio-card,routing =
111 "Headphone Jack", "RHPOUT",
112 "Headphone Jack", "LHPOUT",
113 "MICIN", "Mic Bias",
114 "Mic Bias", "Mic Jack";
115 simple-audio-card,format = "i2s";
116 simple-audio-card,bitclock-master = <&sound_master>;
117 simple-audio-card,frame-master = <&sound_master>;
118 simple-audio-card,bitclock-inversion;
119
120 sound_master: simple-audio-card,cpu {
121 sound-dai = <&ssi2>;
122 system-clock-frequency = <2822400>;
123 };
124
125 simple-audio-card,codec {
126 sound-dai = <&wm8731>;
127 };
128 };
129
Christopher Spinrath1eac1e32016-11-23 01:07:57 +0100130 sound-spdif {
131 compatible = "fsl,imx-audio-spdif";
132 model = "imx-spdif";
133 spdif-controller = <&spdif>;
134 spdif-out;
135 spdif-in;
136 };
Christopher Spinrath669c9402016-06-07 19:14:16 +0200137};
138
Valentin Raevsky937d9a02017-02-08 21:44:04 +0100139&audmux {
140 pinctrl-names = "default";
141 pinctrl-0 = <&pinctrl_audmux>;
142 status = "okay";
143
144 ssi2 {
145 fsl,audmux-port = <1>;
146 fsl,port-config = <
147 (IMX_AUDMUX_V2_PTCR_RCLKDIR |
148 IMX_AUDMUX_V2_PTCR_RCSEL(3 | 0x8) |
149 IMX_AUDMUX_V2_PTCR_TCLKDIR |
150 IMX_AUDMUX_V2_PTCR_TCSEL(3))
151 IMX_AUDMUX_V2_PDCR_RXDSEL(3)
152 >;
153 };
154
155 audmux4 {
156 fsl,audmux-port = <3>;
157 fsl,port-config = <
158 (IMX_AUDMUX_V2_PTCR_TFSDIR |
159 IMX_AUDMUX_V2_PTCR_TFSEL(1) |
160 IMX_AUDMUX_V2_PTCR_RCLKDIR |
161 IMX_AUDMUX_V2_PTCR_RCSEL(1 | 0x8) |
162 IMX_AUDMUX_V2_PTCR_TCLKDIR |
163 IMX_AUDMUX_V2_PTCR_TCSEL(1))
164 IMX_AUDMUX_V2_PDCR_RXDSEL(1)
165 >;
166 };
167};
168
Valentin Raevsky5bca20f2016-06-13 01:24:55 +0200169&cpu0 {
170 /*
171 * Although the imx6q fuse indicates that 1.2GHz operation is possible,
172 * the module behaves unstable at this frequency. Hence, remove the
173 * 1.2GHz operation point here.
174 */
175 operating-points = <
176 /* kHz uV */
177 996000 1250000
178 852000 1250000
179 792000 1175000
180 396000 975000
181 >;
182 fsl,soc-operating-points = <
183 /* ARM kHz SOC-PU uV */
184 996000 1250000
185 852000 1250000
186 792000 1175000
187 396000 1175000
188 >;
189};
190
Christopher Spinrath669c9402016-06-07 19:14:16 +0200191&ecspi1 {
Christopher Spinrath669c9402016-06-07 19:14:16 +0200192 cs-gpios = <&gpio2 30 GPIO_ACTIVE_HIGH>, <&gpio3 19 GPIO_ACTIVE_HIGH>;
193 pinctrl-names = "default";
194 pinctrl-0 = <&pinctrl_ecspi1>;
195 status = "okay";
196
197 m25p80@0 {
198 #address-cells = <1>;
199 #size-cells = <1>;
200 compatible = "st,m25p", "jedec,spi-nor";
201 spi-max-frequency = <20000000>;
202 reg = <0>;
203 };
Valentin Raevsky682d0552013-10-29 14:11:43 +0200204};
205
206&fec {
207 pinctrl-names = "default";
208 pinctrl-0 = <&pinctrl_enet>;
209 phy-mode = "rgmii";
210 status = "okay";
211};
212
213&gpmi {
214 pinctrl-names = "default";
215 pinctrl-0 = <&pinctrl_gpmi_nand>;
216 status = "okay";
217};
218
Christopher Spinrath669c9402016-06-07 19:14:16 +0200219&i2c3 {
220 pinctrl-names = "default";
221 pinctrl-0 = <&pinctrl_i2c3>;
222 status = "okay";
223 clock-frequency = <100000>;
224
225 eeprom@50 {
Javier Martinez Canillas30dd9fb2017-05-23 15:34:34 +0200226 compatible = "atmel,24c02";
Christopher Spinrath669c9402016-06-07 19:14:16 +0200227 reg = <0x50>;
228 pagesize = <16>;
229 };
Valentin Raevsky937d9a02017-02-08 21:44:04 +0100230
231 wm8731: codec@1a {
232 #sound-dai-cells = <0>;
233 compatible = "wlf,wm8731";
234 reg = <0x1a>;
235 };
Christopher Spinrath669c9402016-06-07 19:14:16 +0200236};
237
Valentin Raevsky682d0552013-10-29 14:11:43 +0200238&iomuxc {
Valentin Raevsky937d9a02017-02-08 21:44:04 +0100239 pinctrl_audmux: audmuxgrp {
240 fsl,pins = <
241 MX6QDL_PAD_SD2_CMD__AUD4_RXC 0x17059
242 MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x17059
243 MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x17059
244 MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x17059
245 MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x17059
246 >;
247 };
248
Christopher Spinrath669c9402016-06-07 19:14:16 +0200249 pinctrl_ecspi1: ecspi1grp {
250 fsl,pins = <
251 MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
252 MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
253 MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
254 MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x100b1
255 MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x100b1
256 >;
257 };
258
Christopher Spinrath0c3bc8c2016-06-07 19:14:15 +0200259 pinctrl_enet: enetgrp {
260 fsl,pins = <
Uwe Kleine-Königc007b3a2016-07-08 23:22:54 +0200261 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
262 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
263 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
264 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
265 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
266 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
267 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
268 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
269 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
270 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
271 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
272 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
Christopher Spinrath0c3bc8c2016-06-07 19:14:15 +0200273 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
274 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
275 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
Christopher Spinrath0c3bc8c2016-06-07 19:14:15 +0200276 >;
277 };
Valentin Raevsky682d0552013-10-29 14:11:43 +0200278
Christopher Spinrath0c3bc8c2016-06-07 19:14:15 +0200279 pinctrl_gpmi_nand: gpminandgrp {
280 fsl,pins = <
281 MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
282 MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
283 MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
284 MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
285 MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
286 MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1
287 MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
288 MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
289 MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
290 MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
291 MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
292 MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
293 MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
294 MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
295 MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
296 MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
297 MX6QDL_PAD_SD4_DAT0__NAND_DQS 0x00b1
298 >;
299 };
Valentin Raevsky682d0552013-10-29 14:11:43 +0200300
Christopher Spinrath669c9402016-06-07 19:14:16 +0200301 pinctrl_i2c3: i2c3grp {
302 fsl,pins = <
303 MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
304 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
305 >;
306 };
307
308 pinctrl_pcie: pciegrp {
309 fsl,pins = <
310 MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b0b1
311 MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x1b0b1
312 >;
313 };
314
Christopher Spinrathd8710c32017-05-30 22:16:01 +0200315 pinctrl_pwrseq: pwrseqgrp {
316 fsl,pins = <
317 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b0
318 MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x1b0b0
319 >;
320 };
321
Christopher Spinrath1eac1e32016-11-23 01:07:57 +0100322 pinctrl_spdif: spdifgrp {
323 fsl,pins = <
324 MX6QDL_PAD_GPIO_16__SPDIF_IN 0x1b0b0
325 MX6QDL_PAD_GPIO_19__SPDIF_OUT 0x1b0b0
326 >;
327 };
328
Christopher Spinrath0c3bc8c2016-06-07 19:14:15 +0200329 pinctrl_uart4: uart4grp {
330 fsl,pins = <
331 MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
332 MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
333 >;
Valentin Raevsky682d0552013-10-29 14:11:43 +0200334 };
Christopher Spinrath669c9402016-06-07 19:14:16 +0200335
336 pinctrl_usbh1: usbh1grp {
337 fsl,pins = <
338 MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x1b0b1
339 >;
340 };
341
342 pinctrl_usbotg: usbotggrp {
343 fsl,pins = <
344 MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
345 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x130b0
346 >;
347 };
Christopher Spinrathd8710c32017-05-30 22:16:01 +0200348
349 pinctrl_usdhc1: usdhc1grp {
350 fsl,pins = <
351 MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071
352 MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071
353 MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071
354 MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071
355 MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071
356 MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071
357 >;
358 };
Christopher Spinrath669c9402016-06-07 19:14:16 +0200359};
360
361&pcie {
362 pinctrl-names = "default";
363 pinctrl-0 = <&pinctrl_pcie>;
364 reset-gpio = <&gpio1 26 GPIO_ACTIVE_LOW>;
365 vdd-supply = <&reg_pcie_power_on_gpio>;
366 status = "okay";
367};
368
369&sata {
370 status = "okay";
371};
372
373&snvs_poweroff {
374 status = "okay";
Valentin Raevsky682d0552013-10-29 14:11:43 +0200375};
376
Christopher Spinrath1eac1e32016-11-23 01:07:57 +0100377&spdif {
378 pinctrl-names = "default";
379 pinctrl-0 = <&pinctrl_spdif>;
380 status = "okay";
381};
382
Valentin Raevsky937d9a02017-02-08 21:44:04 +0100383&ssi2 {
384 assigned-clocks = <&clks IMX6QDL_CLK_SSI2_SEL>,
385 <&clks IMX6QDL_CLK_PLL4_AUDIO_DIV>;
386 assigned-clock-parents = <&clks IMX6QDL_CLK_PLL4_AUDIO_DIV>;
387 assigned-clock-rates = <0>, <786432000>;
388 status = "okay";
389};
390
Valentin Raevsky682d0552013-10-29 14:11:43 +0200391&uart4 {
392 pinctrl-names = "default";
393 pinctrl-0 = <&pinctrl_uart4>;
394 status = "okay";
395};
Christopher Spinrath669c9402016-06-07 19:14:16 +0200396
397&usbh1 {
398 vbus-supply = <&reg_usb_h1_vbus>;
399 pinctrl-names = "default";
400 pinctrl-0 = <&pinctrl_usbh1>;
401 status = "okay";
402};
403
404&usbotg {
405 vbus-supply = <&reg_usb_otg_vbus>;
406 pinctrl-names = "default";
407 pinctrl-0 = <&pinctrl_usbotg>;
408 dr_mode = "otg";
409 status = "okay";
410};
Christopher Spinrathd8710c32017-05-30 22:16:01 +0200411
412&usdhc1 {
413 pinctrl-names = "default";
414 pinctrl-0 = <&pinctrl_usdhc1>;
415 mmc-pwrseq = <&awnh387_pwrseq>;
416 non-removable;
417 /*
418 * If the OS probes the Bluetooth AMP function advertised on this bus
419 * but the firmware in place does not support it, the WiFi/BT module
420 * gets unresponsive.
421 * Users who configured their OS properly can enable this node to gain
422 * WiFi and/or plain Bluetooth support.
423 */
424 status = "disabled";
425};