Don Zickus | 1d48922 | 2011-09-30 15:06:19 -0400 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 1991, 1992 Linus Torvalds |
| 3 | * Copyright (C) 2000, 2001, 2002 Andi Kleen, SuSE Labs |
Don Zickus | 9c48f1c | 2011-09-30 15:06:21 -0400 | [diff] [blame] | 4 | * Copyright (C) 2011 Don Zickus Red Hat, Inc. |
Don Zickus | 1d48922 | 2011-09-30 15:06:19 -0400 | [diff] [blame] | 5 | * |
| 6 | * Pentium III FXSR, SSE support |
| 7 | * Gareth Hughes <gareth@valinux.com>, May 2000 |
| 8 | */ |
| 9 | |
| 10 | /* |
| 11 | * Handle hardware traps and faults. |
| 12 | */ |
| 13 | #include <linux/spinlock.h> |
| 14 | #include <linux/kprobes.h> |
| 15 | #include <linux/kdebug.h> |
| 16 | #include <linux/nmi.h> |
Don Zickus | c9126b2 | 2011-09-30 15:06:20 -0400 | [diff] [blame] | 17 | #include <linux/delay.h> |
| 18 | #include <linux/hardirq.h> |
| 19 | #include <linux/slab.h> |
Don Zickus | 1d48922 | 2011-09-30 15:06:19 -0400 | [diff] [blame] | 20 | |
| 21 | #if defined(CONFIG_EDAC) |
| 22 | #include <linux/edac.h> |
| 23 | #endif |
| 24 | |
| 25 | #include <linux/atomic.h> |
| 26 | #include <asm/traps.h> |
| 27 | #include <asm/mach_traps.h> |
Don Zickus | c9126b2 | 2011-09-30 15:06:20 -0400 | [diff] [blame] | 28 | #include <asm/nmi.h> |
| 29 | |
| 30 | #define NMI_MAX_NAMELEN 16 |
| 31 | struct nmiaction { |
| 32 | struct list_head list; |
| 33 | nmi_handler_t handler; |
| 34 | unsigned int flags; |
| 35 | char *name; |
| 36 | }; |
| 37 | |
| 38 | struct nmi_desc { |
| 39 | spinlock_t lock; |
| 40 | struct list_head head; |
| 41 | }; |
| 42 | |
| 43 | static struct nmi_desc nmi_desc[NMI_MAX] = |
| 44 | { |
| 45 | { |
| 46 | .lock = __SPIN_LOCK_UNLOCKED(&nmi_desc[0].lock), |
| 47 | .head = LIST_HEAD_INIT(nmi_desc[0].head), |
| 48 | }, |
| 49 | { |
| 50 | .lock = __SPIN_LOCK_UNLOCKED(&nmi_desc[1].lock), |
| 51 | .head = LIST_HEAD_INIT(nmi_desc[1].head), |
| 52 | }, |
| 53 | |
| 54 | }; |
Don Zickus | 1d48922 | 2011-09-30 15:06:19 -0400 | [diff] [blame] | 55 | |
| 56 | static int ignore_nmis; |
| 57 | |
| 58 | int unknown_nmi_panic; |
| 59 | /* |
| 60 | * Prevent NMI reason port (0x61) being accessed simultaneously, can |
| 61 | * only be used in NMI handler. |
| 62 | */ |
| 63 | static DEFINE_RAW_SPINLOCK(nmi_reason_lock); |
| 64 | |
| 65 | static int __init setup_unknown_nmi_panic(char *str) |
| 66 | { |
| 67 | unknown_nmi_panic = 1; |
| 68 | return 1; |
| 69 | } |
| 70 | __setup("unknown_nmi_panic", setup_unknown_nmi_panic); |
| 71 | |
Don Zickus | c9126b2 | 2011-09-30 15:06:20 -0400 | [diff] [blame] | 72 | #define nmi_to_desc(type) (&nmi_desc[type]) |
| 73 | |
Don Zickus | b227e23 | 2011-09-30 15:06:22 -0400 | [diff] [blame^] | 74 | static int notrace __kprobes nmi_handle(unsigned int type, struct pt_regs *regs, bool b2b) |
Don Zickus | c9126b2 | 2011-09-30 15:06:20 -0400 | [diff] [blame] | 75 | { |
| 76 | struct nmi_desc *desc = nmi_to_desc(type); |
| 77 | struct nmiaction *a; |
| 78 | int handled=0; |
| 79 | |
| 80 | rcu_read_lock(); |
| 81 | |
| 82 | /* |
| 83 | * NMIs are edge-triggered, which means if you have enough |
| 84 | * of them concurrently, you can lose some because only one |
| 85 | * can be latched at any given time. Walk the whole list |
| 86 | * to handle those situations. |
| 87 | */ |
Don Zickus | b227e23 | 2011-09-30 15:06:22 -0400 | [diff] [blame^] | 88 | list_for_each_entry_rcu(a, &desc->head, list) |
Don Zickus | c9126b2 | 2011-09-30 15:06:20 -0400 | [diff] [blame] | 89 | handled += a->handler(type, regs); |
| 90 | |
Don Zickus | c9126b2 | 2011-09-30 15:06:20 -0400 | [diff] [blame] | 91 | rcu_read_unlock(); |
| 92 | |
| 93 | /* return total number of NMI events handled */ |
| 94 | return handled; |
| 95 | } |
| 96 | |
| 97 | static int __setup_nmi(unsigned int type, struct nmiaction *action) |
| 98 | { |
| 99 | struct nmi_desc *desc = nmi_to_desc(type); |
| 100 | unsigned long flags; |
| 101 | |
| 102 | spin_lock_irqsave(&desc->lock, flags); |
| 103 | |
| 104 | /* |
Don Zickus | b227e23 | 2011-09-30 15:06:22 -0400 | [diff] [blame^] | 105 | * most handlers of type NMI_UNKNOWN never return because |
| 106 | * they just assume the NMI is theirs. Just a sanity check |
| 107 | * to manage expectations |
| 108 | */ |
| 109 | WARN_ON_ONCE(type == NMI_UNKNOWN && !list_empty(&desc->head)); |
| 110 | |
| 111 | /* |
Don Zickus | c9126b2 | 2011-09-30 15:06:20 -0400 | [diff] [blame] | 112 | * some handlers need to be executed first otherwise a fake |
| 113 | * event confuses some handlers (kdump uses this flag) |
| 114 | */ |
| 115 | if (action->flags & NMI_FLAG_FIRST) |
| 116 | list_add_rcu(&action->list, &desc->head); |
| 117 | else |
| 118 | list_add_tail_rcu(&action->list, &desc->head); |
| 119 | |
| 120 | spin_unlock_irqrestore(&desc->lock, flags); |
| 121 | return 0; |
| 122 | } |
| 123 | |
| 124 | static struct nmiaction *__free_nmi(unsigned int type, const char *name) |
| 125 | { |
| 126 | struct nmi_desc *desc = nmi_to_desc(type); |
| 127 | struct nmiaction *n; |
| 128 | unsigned long flags; |
| 129 | |
| 130 | spin_lock_irqsave(&desc->lock, flags); |
| 131 | |
| 132 | list_for_each_entry_rcu(n, &desc->head, list) { |
| 133 | /* |
| 134 | * the name passed in to describe the nmi handler |
| 135 | * is used as the lookup key |
| 136 | */ |
| 137 | if (!strcmp(n->name, name)) { |
| 138 | WARN(in_nmi(), |
| 139 | "Trying to free NMI (%s) from NMI context!\n", n->name); |
| 140 | list_del_rcu(&n->list); |
| 141 | break; |
| 142 | } |
| 143 | } |
| 144 | |
| 145 | spin_unlock_irqrestore(&desc->lock, flags); |
| 146 | synchronize_rcu(); |
| 147 | return (n); |
| 148 | } |
| 149 | |
| 150 | int register_nmi_handler(unsigned int type, nmi_handler_t handler, |
| 151 | unsigned long nmiflags, const char *devname) |
| 152 | { |
| 153 | struct nmiaction *action; |
| 154 | int retval = -ENOMEM; |
| 155 | |
| 156 | if (!handler) |
| 157 | return -EINVAL; |
| 158 | |
| 159 | action = kzalloc(sizeof(struct nmiaction), GFP_KERNEL); |
| 160 | if (!action) |
| 161 | goto fail_action; |
| 162 | |
| 163 | action->handler = handler; |
| 164 | action->flags = nmiflags; |
| 165 | action->name = kstrndup(devname, NMI_MAX_NAMELEN, GFP_KERNEL); |
| 166 | if (!action->name) |
| 167 | goto fail_action_name; |
| 168 | |
| 169 | retval = __setup_nmi(type, action); |
| 170 | |
| 171 | if (retval) |
| 172 | goto fail_setup_nmi; |
| 173 | |
| 174 | return retval; |
| 175 | |
| 176 | fail_setup_nmi: |
| 177 | kfree(action->name); |
| 178 | fail_action_name: |
| 179 | kfree(action); |
| 180 | fail_action: |
| 181 | |
| 182 | return retval; |
| 183 | } |
| 184 | EXPORT_SYMBOL_GPL(register_nmi_handler); |
| 185 | |
| 186 | void unregister_nmi_handler(unsigned int type, const char *name) |
| 187 | { |
| 188 | struct nmiaction *a; |
| 189 | |
| 190 | a = __free_nmi(type, name); |
| 191 | if (a) { |
| 192 | kfree(a->name); |
| 193 | kfree(a); |
| 194 | } |
| 195 | } |
| 196 | |
| 197 | EXPORT_SYMBOL_GPL(unregister_nmi_handler); |
| 198 | |
Don Zickus | 1d48922 | 2011-09-30 15:06:19 -0400 | [diff] [blame] | 199 | static notrace __kprobes void |
| 200 | pci_serr_error(unsigned char reason, struct pt_regs *regs) |
| 201 | { |
| 202 | pr_emerg("NMI: PCI system error (SERR) for reason %02x on CPU %d.\n", |
| 203 | reason, smp_processor_id()); |
| 204 | |
| 205 | /* |
| 206 | * On some machines, PCI SERR line is used to report memory |
| 207 | * errors. EDAC makes use of it. |
| 208 | */ |
| 209 | #if defined(CONFIG_EDAC) |
| 210 | if (edac_handler_set()) { |
| 211 | edac_atomic_assert_error(); |
| 212 | return; |
| 213 | } |
| 214 | #endif |
| 215 | |
| 216 | if (panic_on_unrecovered_nmi) |
| 217 | panic("NMI: Not continuing"); |
| 218 | |
| 219 | pr_emerg("Dazed and confused, but trying to continue\n"); |
| 220 | |
| 221 | /* Clear and disable the PCI SERR error line. */ |
| 222 | reason = (reason & NMI_REASON_CLEAR_MASK) | NMI_REASON_CLEAR_SERR; |
| 223 | outb(reason, NMI_REASON_PORT); |
| 224 | } |
| 225 | |
| 226 | static notrace __kprobes void |
| 227 | io_check_error(unsigned char reason, struct pt_regs *regs) |
| 228 | { |
| 229 | unsigned long i; |
| 230 | |
| 231 | pr_emerg( |
| 232 | "NMI: IOCK error (debug interrupt?) for reason %02x on CPU %d.\n", |
| 233 | reason, smp_processor_id()); |
| 234 | show_registers(regs); |
| 235 | |
| 236 | if (panic_on_io_nmi) |
| 237 | panic("NMI IOCK error: Not continuing"); |
| 238 | |
| 239 | /* Re-enable the IOCK line, wait for a few seconds */ |
| 240 | reason = (reason & NMI_REASON_CLEAR_MASK) | NMI_REASON_CLEAR_IOCHK; |
| 241 | outb(reason, NMI_REASON_PORT); |
| 242 | |
| 243 | i = 20000; |
| 244 | while (--i) { |
| 245 | touch_nmi_watchdog(); |
| 246 | udelay(100); |
| 247 | } |
| 248 | |
| 249 | reason &= ~NMI_REASON_CLEAR_IOCHK; |
| 250 | outb(reason, NMI_REASON_PORT); |
| 251 | } |
| 252 | |
| 253 | static notrace __kprobes void |
| 254 | unknown_nmi_error(unsigned char reason, struct pt_regs *regs) |
| 255 | { |
Don Zickus | 9c48f1c | 2011-09-30 15:06:21 -0400 | [diff] [blame] | 256 | int handled; |
| 257 | |
Don Zickus | b227e23 | 2011-09-30 15:06:22 -0400 | [diff] [blame^] | 258 | /* |
| 259 | * Use 'false' as back-to-back NMIs are dealt with one level up. |
| 260 | * Of course this makes having multiple 'unknown' handlers useless |
| 261 | * as only the first one is ever run (unless it can actually determine |
| 262 | * if it caused the NMI) |
| 263 | */ |
| 264 | handled = nmi_handle(NMI_UNKNOWN, regs, false); |
Don Zickus | 9c48f1c | 2011-09-30 15:06:21 -0400 | [diff] [blame] | 265 | if (handled) |
Don Zickus | 1d48922 | 2011-09-30 15:06:19 -0400 | [diff] [blame] | 266 | return; |
| 267 | #ifdef CONFIG_MCA |
| 268 | /* |
| 269 | * Might actually be able to figure out what the guilty party |
| 270 | * is: |
| 271 | */ |
| 272 | if (MCA_bus) { |
| 273 | mca_handle_nmi(); |
| 274 | return; |
| 275 | } |
| 276 | #endif |
| 277 | pr_emerg("Uhhuh. NMI received for unknown reason %02x on CPU %d.\n", |
| 278 | reason, smp_processor_id()); |
| 279 | |
| 280 | pr_emerg("Do you have a strange power saving mode enabled?\n"); |
| 281 | if (unknown_nmi_panic || panic_on_unrecovered_nmi) |
| 282 | panic("NMI: Not continuing"); |
| 283 | |
| 284 | pr_emerg("Dazed and confused, but trying to continue\n"); |
| 285 | } |
| 286 | |
Don Zickus | b227e23 | 2011-09-30 15:06:22 -0400 | [diff] [blame^] | 287 | static DEFINE_PER_CPU(bool, swallow_nmi); |
| 288 | static DEFINE_PER_CPU(unsigned long, last_nmi_rip); |
| 289 | |
Don Zickus | 1d48922 | 2011-09-30 15:06:19 -0400 | [diff] [blame] | 290 | static notrace __kprobes void default_do_nmi(struct pt_regs *regs) |
| 291 | { |
| 292 | unsigned char reason = 0; |
Don Zickus | 9c48f1c | 2011-09-30 15:06:21 -0400 | [diff] [blame] | 293 | int handled; |
Don Zickus | b227e23 | 2011-09-30 15:06:22 -0400 | [diff] [blame^] | 294 | bool b2b = false; |
Don Zickus | 1d48922 | 2011-09-30 15:06:19 -0400 | [diff] [blame] | 295 | |
| 296 | /* |
| 297 | * CPU-specific NMI must be processed before non-CPU-specific |
| 298 | * NMI, otherwise we may lose it, because the CPU-specific |
| 299 | * NMI can not be detected/processed on other CPUs. |
| 300 | */ |
Don Zickus | b227e23 | 2011-09-30 15:06:22 -0400 | [diff] [blame^] | 301 | |
| 302 | /* |
| 303 | * Back-to-back NMIs are interesting because they can either |
| 304 | * be two NMI or more than two NMIs (any thing over two is dropped |
| 305 | * due to NMI being edge-triggered). If this is the second half |
| 306 | * of the back-to-back NMI, assume we dropped things and process |
| 307 | * more handlers. Otherwise reset the 'swallow' NMI behaviour |
| 308 | */ |
| 309 | if (regs->ip == __this_cpu_read(last_nmi_rip)) |
| 310 | b2b = true; |
| 311 | else |
| 312 | __this_cpu_write(swallow_nmi, false); |
| 313 | |
| 314 | __this_cpu_write(last_nmi_rip, regs->ip); |
| 315 | |
| 316 | handled = nmi_handle(NMI_LOCAL, regs, b2b); |
| 317 | if (handled) { |
| 318 | /* |
| 319 | * There are cases when a NMI handler handles multiple |
| 320 | * events in the current NMI. One of these events may |
| 321 | * be queued for in the next NMI. Because the event is |
| 322 | * already handled, the next NMI will result in an unknown |
| 323 | * NMI. Instead lets flag this for a potential NMI to |
| 324 | * swallow. |
| 325 | */ |
| 326 | if (handled > 1) |
| 327 | __this_cpu_write(swallow_nmi, true); |
Don Zickus | 1d48922 | 2011-09-30 15:06:19 -0400 | [diff] [blame] | 328 | return; |
Don Zickus | b227e23 | 2011-09-30 15:06:22 -0400 | [diff] [blame^] | 329 | } |
Don Zickus | 1d48922 | 2011-09-30 15:06:19 -0400 | [diff] [blame] | 330 | |
| 331 | /* Non-CPU-specific NMI: NMI sources can be processed on any CPU */ |
| 332 | raw_spin_lock(&nmi_reason_lock); |
| 333 | reason = get_nmi_reason(); |
| 334 | |
| 335 | if (reason & NMI_REASON_MASK) { |
| 336 | if (reason & NMI_REASON_SERR) |
| 337 | pci_serr_error(reason, regs); |
| 338 | else if (reason & NMI_REASON_IOCHK) |
| 339 | io_check_error(reason, regs); |
| 340 | #ifdef CONFIG_X86_32 |
| 341 | /* |
| 342 | * Reassert NMI in case it became active |
| 343 | * meanwhile as it's edge-triggered: |
| 344 | */ |
| 345 | reassert_nmi(); |
| 346 | #endif |
| 347 | raw_spin_unlock(&nmi_reason_lock); |
| 348 | return; |
| 349 | } |
| 350 | raw_spin_unlock(&nmi_reason_lock); |
| 351 | |
Don Zickus | b227e23 | 2011-09-30 15:06:22 -0400 | [diff] [blame^] | 352 | /* |
| 353 | * Only one NMI can be latched at a time. To handle |
| 354 | * this we may process multiple nmi handlers at once to |
| 355 | * cover the case where an NMI is dropped. The downside |
| 356 | * to this approach is we may process an NMI prematurely, |
| 357 | * while its real NMI is sitting latched. This will cause |
| 358 | * an unknown NMI on the next run of the NMI processing. |
| 359 | * |
| 360 | * We tried to flag that condition above, by setting the |
| 361 | * swallow_nmi flag when we process more than one event. |
| 362 | * This condition is also only present on the second half |
| 363 | * of a back-to-back NMI, so we flag that condition too. |
| 364 | * |
| 365 | * If both are true, we assume we already processed this |
| 366 | * NMI previously and we swallow it. Otherwise we reset |
| 367 | * the logic. |
| 368 | * |
| 369 | * There are scenarios where we may accidentally swallow |
| 370 | * a 'real' unknown NMI. For example, while processing |
| 371 | * a perf NMI another perf NMI comes in along with a |
| 372 | * 'real' unknown NMI. These two NMIs get combined into |
| 373 | * one (as descibed above). When the next NMI gets |
| 374 | * processed, it will be flagged by perf as handled, but |
| 375 | * noone will know that there was a 'real' unknown NMI sent |
| 376 | * also. As a result it gets swallowed. Or if the first |
| 377 | * perf NMI returns two events handled then the second |
| 378 | * NMI will get eaten by the logic below, again losing a |
| 379 | * 'real' unknown NMI. But this is the best we can do |
| 380 | * for now. |
| 381 | */ |
| 382 | if (b2b && __this_cpu_read(swallow_nmi)) |
| 383 | ; |
| 384 | else |
| 385 | unknown_nmi_error(reason, regs); |
Don Zickus | 1d48922 | 2011-09-30 15:06:19 -0400 | [diff] [blame] | 386 | } |
| 387 | |
| 388 | dotraplinkage notrace __kprobes void |
| 389 | do_nmi(struct pt_regs *regs, long error_code) |
| 390 | { |
| 391 | nmi_enter(); |
| 392 | |
| 393 | inc_irq_stat(__nmi_count); |
| 394 | |
| 395 | if (!ignore_nmis) |
| 396 | default_do_nmi(regs); |
| 397 | |
| 398 | nmi_exit(); |
| 399 | } |
| 400 | |
| 401 | void stop_nmi(void) |
| 402 | { |
| 403 | ignore_nmis++; |
| 404 | } |
| 405 | |
| 406 | void restart_nmi(void) |
| 407 | { |
| 408 | ignore_nmis--; |
| 409 | } |
Don Zickus | b227e23 | 2011-09-30 15:06:22 -0400 | [diff] [blame^] | 410 | |
| 411 | /* reset the back-to-back NMI logic */ |
| 412 | void local_touch_nmi(void) |
| 413 | { |
| 414 | __this_cpu_write(last_nmi_rip, 0); |
| 415 | } |