Blame - kernel/Kconfig.locks - SHIFTPHONES/mainline/linux

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Thomas Gleixner	ec8f24b	2019-05-19 13:07:45 +0100	[diff] [blame]	1	# SPDX-License-Identifier: GPL-2.0-only
Thomas Gleixner	6beb000	2009-11-09 15:21:34 +0000	[diff] [blame]	2	#
				3	# The ARCH_INLINE foo is necessary because select ignores "depends on"
				4	#
				5	config ARCH_INLINE_SPIN_TRYLOCK
				6	bool
				7
				8	config ARCH_INLINE_SPIN_TRYLOCK_BH
				9	bool
				10
				11	config ARCH_INLINE_SPIN_LOCK
				12	bool
				13
				14	config ARCH_INLINE_SPIN_LOCK_BH
				15	bool
				16
				17	config ARCH_INLINE_SPIN_LOCK_IRQ
				18	bool
				19
				20	config ARCH_INLINE_SPIN_LOCK_IRQSAVE
				21	bool
				22
				23	config ARCH_INLINE_SPIN_UNLOCK
				24	bool
				25
				26	config ARCH_INLINE_SPIN_UNLOCK_BH
				27	bool
				28
				29	config ARCH_INLINE_SPIN_UNLOCK_IRQ
				30	bool
				31
				32	config ARCH_INLINE_SPIN_UNLOCK_IRQRESTORE
				33	bool
				34
				35
				36	config ARCH_INLINE_READ_TRYLOCK
				37	bool
				38
				39	config ARCH_INLINE_READ_LOCK
				40	bool
				41
				42	config ARCH_INLINE_READ_LOCK_BH
				43	bool
				44
				45	config ARCH_INLINE_READ_LOCK_IRQ
				46	bool
				47
				48	config ARCH_INLINE_READ_LOCK_IRQSAVE
				49	bool
				50
				51	config ARCH_INLINE_READ_UNLOCK
				52	bool
				53
				54	config ARCH_INLINE_READ_UNLOCK_BH
				55	bool
				56
				57	config ARCH_INLINE_READ_UNLOCK_IRQ
				58	bool
				59
				60	config ARCH_INLINE_READ_UNLOCK_IRQRESTORE
				61	bool
				62
				63
				64	config ARCH_INLINE_WRITE_TRYLOCK
				65	bool
				66
				67	config ARCH_INLINE_WRITE_LOCK
				68	bool
				69
				70	config ARCH_INLINE_WRITE_LOCK_BH
				71	bool
				72
				73	config ARCH_INLINE_WRITE_LOCK_IRQ
				74	bool
				75
				76	config ARCH_INLINE_WRITE_LOCK_IRQSAVE
				77	bool
				78
				79	config ARCH_INLINE_WRITE_UNLOCK
				80	bool
				81
				82	config ARCH_INLINE_WRITE_UNLOCK_BH
				83	bool
				84
				85	config ARCH_INLINE_WRITE_UNLOCK_IRQ
				86	bool
				87
				88	config ARCH_INLINE_WRITE_UNLOCK_IRQRESTORE
				89	bool
				90
Jan Beulich	4fe84fb	2012-09-10 13:01:16 +0100	[diff] [blame]	91	config UNINLINE_SPIN_UNLOCK
				92	bool
				93
Thomas Gleixner	6beb000	2009-11-09 15:21:34 +0000	[diff] [blame]	94	#
				95	# lock_* functions are inlined when:
				96	# - DEBUG_SPINLOCK=n and GENERIC_LOCKBREAK=n and ARCH_INLINE_*LOCK=y
				97	#
				98	# trylock_* functions are inlined when:
				99	# - DEBUG_SPINLOCK=n and ARCH_INLINE_*LOCK=y
				100	#
				101	# unlock and unlock_irq functions are inlined when:
				102	# - DEBUG_SPINLOCK=n and ARCH_INLINE_*LOCK=y
				103	# or
Sebastian Andrzej Siewior	1b40cd5	2019-10-15 21:18:18 +0200	[diff] [blame]	104	# - DEBUG_SPINLOCK=n and PREEMPTION=n
Thomas Gleixner	6beb000	2009-11-09 15:21:34 +0000	[diff] [blame]	105	#
				106	# unlock_bh and unlock_irqrestore functions are inlined when:
				107	# - DEBUG_SPINLOCK=n and ARCH_INLINE_*LOCK=y
				108	#
				109
Jan Beulich	4fe84fb	2012-09-10 13:01:16 +0100	[diff] [blame]	110	if !DEBUG_SPINLOCK
				111
Thomas Gleixner	6beb000	2009-11-09 15:21:34 +0000	[diff] [blame]	112	config INLINE_SPIN_TRYLOCK
Jan Beulich	4fe84fb	2012-09-10 13:01:16 +0100	[diff] [blame]	113	def_bool y
				114	depends on ARCH_INLINE_SPIN_TRYLOCK
Thomas Gleixner	6beb000	2009-11-09 15:21:34 +0000	[diff] [blame]	115
				116	config INLINE_SPIN_TRYLOCK_BH
Jan Beulich	4fe84fb	2012-09-10 13:01:16 +0100	[diff] [blame]	117	def_bool y
				118	depends on ARCH_INLINE_SPIN_TRYLOCK_BH
Thomas Gleixner	6beb000	2009-11-09 15:21:34 +0000	[diff] [blame]	119
				120	config INLINE_SPIN_LOCK
Jan Beulich	4fe84fb	2012-09-10 13:01:16 +0100	[diff] [blame]	121	def_bool y
				122	depends on !GENERIC_LOCKBREAK && ARCH_INLINE_SPIN_LOCK
Thomas Gleixner	6beb000	2009-11-09 15:21:34 +0000	[diff] [blame]	123
				124	config INLINE_SPIN_LOCK_BH
Jan Beulich	4fe84fb	2012-09-10 13:01:16 +0100	[diff] [blame]	125	def_bool y
				126	depends on !GENERIC_LOCKBREAK && ARCH_INLINE_SPIN_LOCK_BH
Thomas Gleixner	6beb000	2009-11-09 15:21:34 +0000	[diff] [blame]	127
				128	config INLINE_SPIN_LOCK_IRQ
Jan Beulich	4fe84fb	2012-09-10 13:01:16 +0100	[diff] [blame]	129	def_bool y
				130	depends on !GENERIC_LOCKBREAK && ARCH_INLINE_SPIN_LOCK_IRQ
Thomas Gleixner	6beb000	2009-11-09 15:21:34 +0000	[diff] [blame]	131
				132	config INLINE_SPIN_LOCK_IRQSAVE
Jan Beulich	4fe84fb	2012-09-10 13:01:16 +0100	[diff] [blame]	133	def_bool y
				134	depends on !GENERIC_LOCKBREAK && ARCH_INLINE_SPIN_LOCK_IRQSAVE
Thomas Gleixner	6beb000	2009-11-09 15:21:34 +0000	[diff] [blame]	135
				136	config INLINE_SPIN_UNLOCK_BH
Jan Beulich	4fe84fb	2012-09-10 13:01:16 +0100	[diff] [blame]	137	def_bool y
				138	depends on ARCH_INLINE_SPIN_UNLOCK_BH
Thomas Gleixner	6beb000	2009-11-09 15:21:34 +0000	[diff] [blame]	139
				140	config INLINE_SPIN_UNLOCK_IRQ
Jan Beulich	4fe84fb	2012-09-10 13:01:16 +0100	[diff] [blame]	141	def_bool y
Sebastian Andrzej Siewior	1b40cd5	2019-10-15 21:18:18 +0200	[diff] [blame]	142	depends on !PREEMPTION \|\| ARCH_INLINE_SPIN_UNLOCK_IRQ
Thomas Gleixner	6beb000	2009-11-09 15:21:34 +0000	[diff] [blame]	143
				144	config INLINE_SPIN_UNLOCK_IRQRESTORE
Jan Beulich	4fe84fb	2012-09-10 13:01:16 +0100	[diff] [blame]	145	def_bool y
				146	depends on ARCH_INLINE_SPIN_UNLOCK_IRQRESTORE
Thomas Gleixner	6beb000	2009-11-09 15:21:34 +0000	[diff] [blame]	147
				148
				149	config INLINE_READ_TRYLOCK
Jan Beulich	4fe84fb	2012-09-10 13:01:16 +0100	[diff] [blame]	150	def_bool y
				151	depends on ARCH_INLINE_READ_TRYLOCK
Thomas Gleixner	6beb000	2009-11-09 15:21:34 +0000	[diff] [blame]	152
				153	config INLINE_READ_LOCK
Jan Beulich	4fe84fb	2012-09-10 13:01:16 +0100	[diff] [blame]	154	def_bool y
				155	depends on !GENERIC_LOCKBREAK && ARCH_INLINE_READ_LOCK
Thomas Gleixner	6beb000	2009-11-09 15:21:34 +0000	[diff] [blame]	156
				157	config INLINE_READ_LOCK_BH
Jan Beulich	4fe84fb	2012-09-10 13:01:16 +0100	[diff] [blame]	158	def_bool y
				159	depends on !GENERIC_LOCKBREAK && ARCH_INLINE_READ_LOCK_BH
Thomas Gleixner	6beb000	2009-11-09 15:21:34 +0000	[diff] [blame]	160
				161	config INLINE_READ_LOCK_IRQ
Jan Beulich	4fe84fb	2012-09-10 13:01:16 +0100	[diff] [blame]	162	def_bool y
				163	depends on !GENERIC_LOCKBREAK && ARCH_INLINE_READ_LOCK_IRQ
Thomas Gleixner	6beb000	2009-11-09 15:21:34 +0000	[diff] [blame]	164
				165	config INLINE_READ_LOCK_IRQSAVE
Jan Beulich	4fe84fb	2012-09-10 13:01:16 +0100	[diff] [blame]	166	def_bool y
				167	depends on !GENERIC_LOCKBREAK && ARCH_INLINE_READ_LOCK_IRQSAVE
Thomas Gleixner	6beb000	2009-11-09 15:21:34 +0000	[diff] [blame]	168
				169	config INLINE_READ_UNLOCK
Jan Beulich	4fe84fb	2012-09-10 13:01:16 +0100	[diff] [blame]	170	def_bool y
Sebastian Andrzej Siewior	1b40cd5	2019-10-15 21:18:18 +0200	[diff] [blame]	171	depends on !PREEMPTION \|\| ARCH_INLINE_READ_UNLOCK
Thomas Gleixner	6beb000	2009-11-09 15:21:34 +0000	[diff] [blame]	172
				173	config INLINE_READ_UNLOCK_BH
Jan Beulich	4fe84fb	2012-09-10 13:01:16 +0100	[diff] [blame]	174	def_bool y
				175	depends on ARCH_INLINE_READ_UNLOCK_BH
Thomas Gleixner	6beb000	2009-11-09 15:21:34 +0000	[diff] [blame]	176
				177	config INLINE_READ_UNLOCK_IRQ
Jan Beulich	4fe84fb	2012-09-10 13:01:16 +0100	[diff] [blame]	178	def_bool y
Sebastian Andrzej Siewior	1b40cd5	2019-10-15 21:18:18 +0200	[diff] [blame]	179	depends on !PREEMPTION \|\| ARCH_INLINE_READ_UNLOCK_IRQ
Thomas Gleixner	6beb000	2009-11-09 15:21:34 +0000	[diff] [blame]	180
				181	config INLINE_READ_UNLOCK_IRQRESTORE
Jan Beulich	4fe84fb	2012-09-10 13:01:16 +0100	[diff] [blame]	182	def_bool y
				183	depends on ARCH_INLINE_READ_UNLOCK_IRQRESTORE
Thomas Gleixner	6beb000	2009-11-09 15:21:34 +0000	[diff] [blame]	184
				185
				186	config INLINE_WRITE_TRYLOCK
Jan Beulich	4fe84fb	2012-09-10 13:01:16 +0100	[diff] [blame]	187	def_bool y
				188	depends on ARCH_INLINE_WRITE_TRYLOCK
Thomas Gleixner	6beb000	2009-11-09 15:21:34 +0000	[diff] [blame]	189
				190	config INLINE_WRITE_LOCK
Jan Beulich	4fe84fb	2012-09-10 13:01:16 +0100	[diff] [blame]	191	def_bool y
				192	depends on !GENERIC_LOCKBREAK && ARCH_INLINE_WRITE_LOCK
Thomas Gleixner	6beb000	2009-11-09 15:21:34 +0000	[diff] [blame]	193
				194	config INLINE_WRITE_LOCK_BH
Jan Beulich	4fe84fb	2012-09-10 13:01:16 +0100	[diff] [blame]	195	def_bool y
				196	depends on !GENERIC_LOCKBREAK && ARCH_INLINE_WRITE_LOCK_BH
Thomas Gleixner	6beb000	2009-11-09 15:21:34 +0000	[diff] [blame]	197
				198	config INLINE_WRITE_LOCK_IRQ
Jan Beulich	4fe84fb	2012-09-10 13:01:16 +0100	[diff] [blame]	199	def_bool y
				200	depends on !GENERIC_LOCKBREAK && ARCH_INLINE_WRITE_LOCK_IRQ
Thomas Gleixner	6beb000	2009-11-09 15:21:34 +0000	[diff] [blame]	201
				202	config INLINE_WRITE_LOCK_IRQSAVE
Jan Beulich	4fe84fb	2012-09-10 13:01:16 +0100	[diff] [blame]	203	def_bool y
				204	depends on !GENERIC_LOCKBREAK && ARCH_INLINE_WRITE_LOCK_IRQSAVE
Thomas Gleixner	6beb000	2009-11-09 15:21:34 +0000	[diff] [blame]	205
				206	config INLINE_WRITE_UNLOCK
Jan Beulich	4fe84fb	2012-09-10 13:01:16 +0100	[diff] [blame]	207	def_bool y
Sebastian Andrzej Siewior	1b40cd5	2019-10-15 21:18:18 +0200	[diff] [blame]	208	depends on !PREEMPTION \|\| ARCH_INLINE_WRITE_UNLOCK
Thomas Gleixner	6beb000	2009-11-09 15:21:34 +0000	[diff] [blame]	209
				210	config INLINE_WRITE_UNLOCK_BH
Jan Beulich	4fe84fb	2012-09-10 13:01:16 +0100	[diff] [blame]	211	def_bool y
				212	depends on ARCH_INLINE_WRITE_UNLOCK_BH
Thomas Gleixner	6beb000	2009-11-09 15:21:34 +0000	[diff] [blame]	213
				214	config INLINE_WRITE_UNLOCK_IRQ
Jan Beulich	4fe84fb	2012-09-10 13:01:16 +0100	[diff] [blame]	215	def_bool y
Sebastian Andrzej Siewior	1b40cd5	2019-10-15 21:18:18 +0200	[diff] [blame]	216	depends on !PREEMPTION \|\| ARCH_INLINE_WRITE_UNLOCK_IRQ
Thomas Gleixner	6beb000	2009-11-09 15:21:34 +0000	[diff] [blame]	217
				218	config INLINE_WRITE_UNLOCK_IRQRESTORE
Jan Beulich	4fe84fb	2012-09-10 13:01:16 +0100	[diff] [blame]	219	def_bool y
				220	depends on ARCH_INLINE_WRITE_UNLOCK_IRQRESTORE
				221
				222	endif
Frederic Weisbecker	c022602	2009-12-02 20:49:16 +0100	[diff] [blame]	223
Peter Zijlstra	4badad3	2014-06-06 19:53:16 +0200	[diff] [blame]	224	config ARCH_SUPPORTS_ATOMIC_RMW
				225	bool
				226
Frederic Weisbecker	c022602	2009-12-02 20:49:16 +0100	[diff] [blame]	227	config MUTEX_SPIN_ON_OWNER
Jan Beulich	4fe84fb	2012-09-10 13:01:16 +0100	[diff] [blame]	228	def_bool y
Peter Zijlstra	a3ea3d9	2016-08-23 13:45:15 +0200	[diff] [blame]	229	depends on SMP && ARCH_SUPPORTS_ATOMIC_RMW
Waiman Long	70af2f8	2014-02-03 13:18:49 +0100	[diff] [blame]	230
Davidlohr Bueso	5db6c6f	2014-07-11 14:00:06 -0700	[diff] [blame]	231	config RWSEM_SPIN_ON_OWNER
				232	def_bool y
Waiman Long	390a0c6	2019-03-22 10:30:07 -0400	[diff] [blame]	233	depends on SMP && ARCH_SUPPORTS_ATOMIC_RMW
Davidlohr Bueso	5db6c6f	2014-07-11 14:00:06 -0700	[diff] [blame]	234
Davidlohr Bueso	d84b672	2015-01-06 11:45:07 -0800	[diff] [blame]	235	config LOCK_SPIN_ON_OWNER
				236	def_bool y
				237	depends on MUTEX_SPIN_ON_OWNER \|\| RWSEM_SPIN_ON_OWNER
				238
Ingo Molnar	62c7a1e	2015-05-11 09:47:23 +0200	[diff] [blame]	239	config ARCH_USE_QUEUED_SPINLOCKS
Waiman Long	a33fda3	2015-04-24 14:56:30 -0400	[diff] [blame]	240	bool
				241
Ingo Molnar	62c7a1e	2015-05-11 09:47:23 +0200	[diff] [blame]	242	config QUEUED_SPINLOCKS
				243	def_bool y if ARCH_USE_QUEUED_SPINLOCKS
David Vrabel	e95e6f1	2015-04-24 14:56:40 -0400	[diff] [blame]	244	depends on SMP
Waiman Long	a33fda3	2015-04-24 14:56:30 -0400	[diff] [blame]	245
Alexei Starovoitov	d83525c	2019-01-31 15:40:04 -0800	[diff] [blame]	246	config BPF_ARCH_SPINLOCK
				247	bool
				248
Waiman Long	c7114b4	2015-05-11 13:57:11 -0400	[diff] [blame]	249	config ARCH_USE_QUEUED_RWLOCKS
Waiman Long	70af2f8	2014-02-03 13:18:49 +0100	[diff] [blame]	250	bool
				251
Waiman Long	c7114b4	2015-05-11 13:57:11 -0400	[diff] [blame]	252	config QUEUED_RWLOCKS
				253	def_bool y if ARCH_USE_QUEUED_RWLOCKS
Thomas Gleixner	8282947	2021-08-15 23:28:28 +0200	[diff] [blame]	254	depends on SMP && !PREEMPT_RT
Will Deacon	d1be6a2	2019-02-22 12:48:44 +0000	[diff] [blame]	255
				256	config ARCH_HAS_MMIOWB
				257	bool
				258
				259	config MMIOWB
				260	def_bool y if ARCH_HAS_MMIOWB
				261	depends on SMP