Yangbo Lu | ceefc71d | 2018-05-25 12:40:34 +0800 | [diff] [blame] | 1 | /* |
| 2 | * PTP 1588 clock for Freescale QorIQ 1588 timer |
| 3 | * |
| 4 | * Copyright (C) 2010 OMICRON electronics GmbH |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; either version 2 of the License, or |
| 9 | * (at your option) any later version. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU General Public License |
| 17 | * along with this program; if not, write to the Free Software |
| 18 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
| 19 | */ |
| 20 | |
| 21 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
| 22 | |
| 23 | #include <linux/device.h> |
| 24 | #include <linux/hrtimer.h> |
| 25 | #include <linux/interrupt.h> |
| 26 | #include <linux/kernel.h> |
| 27 | #include <linux/module.h> |
| 28 | #include <linux/of.h> |
| 29 | #include <linux/of_platform.h> |
| 30 | #include <linux/timex.h> |
Yangbo Lu | ceefc71d | 2018-05-25 12:40:34 +0800 | [diff] [blame] | 31 | #include <linux/slab.h> |
Yangbo Lu | 91305f2 | 2018-08-01 18:05:54 +0800 | [diff] [blame] | 32 | #include <linux/clk.h> |
Yangbo Lu | ceefc71d | 2018-05-25 12:40:34 +0800 | [diff] [blame] | 33 | |
Yangbo Lu | 6c50c1e | 2018-05-25 12:40:35 +0800 | [diff] [blame] | 34 | #include <linux/fsl/ptp_qoriq.h> |
Yangbo Lu | ceefc71d | 2018-05-25 12:40:34 +0800 | [diff] [blame] | 35 | |
| 36 | /* |
| 37 | * Register access functions |
| 38 | */ |
| 39 | |
| 40 | /* Caller must hold qoriq_ptp->lock. */ |
| 41 | static u64 tmr_cnt_read(struct qoriq_ptp *qoriq_ptp) |
| 42 | { |
Yangbo Lu | a8f62d0 | 2018-06-25 20:37:08 +0800 | [diff] [blame] | 43 | struct qoriq_ptp_registers *regs = &qoriq_ptp->regs; |
Yangbo Lu | ceefc71d | 2018-05-25 12:40:34 +0800 | [diff] [blame] | 44 | u64 ns; |
| 45 | u32 lo, hi; |
| 46 | |
Yangbo Lu | a8f62d0 | 2018-06-25 20:37:08 +0800 | [diff] [blame] | 47 | lo = qoriq_read(®s->ctrl_regs->tmr_cnt_l); |
| 48 | hi = qoriq_read(®s->ctrl_regs->tmr_cnt_h); |
Yangbo Lu | ceefc71d | 2018-05-25 12:40:34 +0800 | [diff] [blame] | 49 | ns = ((u64) hi) << 32; |
| 50 | ns |= lo; |
| 51 | return ns; |
| 52 | } |
| 53 | |
| 54 | /* Caller must hold qoriq_ptp->lock. */ |
| 55 | static void tmr_cnt_write(struct qoriq_ptp *qoriq_ptp, u64 ns) |
| 56 | { |
Yangbo Lu | a8f62d0 | 2018-06-25 20:37:08 +0800 | [diff] [blame] | 57 | struct qoriq_ptp_registers *regs = &qoriq_ptp->regs; |
Yangbo Lu | ceefc71d | 2018-05-25 12:40:34 +0800 | [diff] [blame] | 58 | u32 hi = ns >> 32; |
| 59 | u32 lo = ns & 0xffffffff; |
| 60 | |
Yangbo Lu | a8f62d0 | 2018-06-25 20:37:08 +0800 | [diff] [blame] | 61 | qoriq_write(®s->ctrl_regs->tmr_cnt_l, lo); |
| 62 | qoriq_write(®s->ctrl_regs->tmr_cnt_h, hi); |
Yangbo Lu | ceefc71d | 2018-05-25 12:40:34 +0800 | [diff] [blame] | 63 | } |
| 64 | |
| 65 | /* Caller must hold qoriq_ptp->lock. */ |
| 66 | static void set_alarm(struct qoriq_ptp *qoriq_ptp) |
| 67 | { |
Yangbo Lu | a8f62d0 | 2018-06-25 20:37:08 +0800 | [diff] [blame] | 68 | struct qoriq_ptp_registers *regs = &qoriq_ptp->regs; |
Yangbo Lu | ceefc71d | 2018-05-25 12:40:34 +0800 | [diff] [blame] | 69 | u64 ns; |
| 70 | u32 lo, hi; |
| 71 | |
| 72 | ns = tmr_cnt_read(qoriq_ptp) + 1500000000ULL; |
| 73 | ns = div_u64(ns, 1000000000UL) * 1000000000ULL; |
| 74 | ns -= qoriq_ptp->tclk_period; |
| 75 | hi = ns >> 32; |
| 76 | lo = ns & 0xffffffff; |
Yangbo Lu | a8f62d0 | 2018-06-25 20:37:08 +0800 | [diff] [blame] | 77 | qoriq_write(®s->alarm_regs->tmr_alarm1_l, lo); |
| 78 | qoriq_write(®s->alarm_regs->tmr_alarm1_h, hi); |
Yangbo Lu | ceefc71d | 2018-05-25 12:40:34 +0800 | [diff] [blame] | 79 | } |
| 80 | |
| 81 | /* Caller must hold qoriq_ptp->lock. */ |
| 82 | static void set_fipers(struct qoriq_ptp *qoriq_ptp) |
| 83 | { |
Yangbo Lu | a8f62d0 | 2018-06-25 20:37:08 +0800 | [diff] [blame] | 84 | struct qoriq_ptp_registers *regs = &qoriq_ptp->regs; |
| 85 | |
Yangbo Lu | ceefc71d | 2018-05-25 12:40:34 +0800 | [diff] [blame] | 86 | set_alarm(qoriq_ptp); |
Yangbo Lu | a8f62d0 | 2018-06-25 20:37:08 +0800 | [diff] [blame] | 87 | qoriq_write(®s->fiper_regs->tmr_fiper1, qoriq_ptp->tmr_fiper1); |
| 88 | qoriq_write(®s->fiper_regs->tmr_fiper2, qoriq_ptp->tmr_fiper2); |
Yangbo Lu | ceefc71d | 2018-05-25 12:40:34 +0800 | [diff] [blame] | 89 | } |
| 90 | |
| 91 | /* |
| 92 | * Interrupt service routine |
| 93 | */ |
| 94 | |
| 95 | static irqreturn_t isr(int irq, void *priv) |
| 96 | { |
| 97 | struct qoriq_ptp *qoriq_ptp = priv; |
Yangbo Lu | a8f62d0 | 2018-06-25 20:37:08 +0800 | [diff] [blame] | 98 | struct qoriq_ptp_registers *regs = &qoriq_ptp->regs; |
Yangbo Lu | ceefc71d | 2018-05-25 12:40:34 +0800 | [diff] [blame] | 99 | struct ptp_clock_event event; |
| 100 | u64 ns; |
Yangbo Lu | b0bc10c | 2019-01-21 18:41:38 +0800 | [diff] [blame^] | 101 | u32 ack = 0, lo, hi, mask, val, irqs; |
| 102 | |
| 103 | spin_lock(&qoriq_ptp->lock); |
Yangbo Lu | ceefc71d | 2018-05-25 12:40:34 +0800 | [diff] [blame] | 104 | |
Yangbo Lu | a8f62d0 | 2018-06-25 20:37:08 +0800 | [diff] [blame] | 105 | val = qoriq_read(®s->ctrl_regs->tmr_tevent); |
Yangbo Lu | b0bc10c | 2019-01-21 18:41:38 +0800 | [diff] [blame^] | 106 | mask = qoriq_read(®s->ctrl_regs->tmr_temask); |
Yangbo Lu | ceefc71d | 2018-05-25 12:40:34 +0800 | [diff] [blame] | 107 | |
Yangbo Lu | b0bc10c | 2019-01-21 18:41:38 +0800 | [diff] [blame^] | 108 | spin_unlock(&qoriq_ptp->lock); |
| 109 | |
| 110 | irqs = val & mask; |
| 111 | |
| 112 | if (irqs & ETS1) { |
Yangbo Lu | ceefc71d | 2018-05-25 12:40:34 +0800 | [diff] [blame] | 113 | ack |= ETS1; |
Yangbo Lu | a8f62d0 | 2018-06-25 20:37:08 +0800 | [diff] [blame] | 114 | hi = qoriq_read(®s->etts_regs->tmr_etts1_h); |
| 115 | lo = qoriq_read(®s->etts_regs->tmr_etts1_l); |
Yangbo Lu | ceefc71d | 2018-05-25 12:40:34 +0800 | [diff] [blame] | 116 | event.type = PTP_CLOCK_EXTTS; |
| 117 | event.index = 0; |
| 118 | event.timestamp = ((u64) hi) << 32; |
| 119 | event.timestamp |= lo; |
| 120 | ptp_clock_event(qoriq_ptp->clock, &event); |
| 121 | } |
| 122 | |
Yangbo Lu | b0bc10c | 2019-01-21 18:41:38 +0800 | [diff] [blame^] | 123 | if (irqs & ETS2) { |
Yangbo Lu | ceefc71d | 2018-05-25 12:40:34 +0800 | [diff] [blame] | 124 | ack |= ETS2; |
Yangbo Lu | a8f62d0 | 2018-06-25 20:37:08 +0800 | [diff] [blame] | 125 | hi = qoriq_read(®s->etts_regs->tmr_etts2_h); |
| 126 | lo = qoriq_read(®s->etts_regs->tmr_etts2_l); |
Yangbo Lu | ceefc71d | 2018-05-25 12:40:34 +0800 | [diff] [blame] | 127 | event.type = PTP_CLOCK_EXTTS; |
| 128 | event.index = 1; |
| 129 | event.timestamp = ((u64) hi) << 32; |
| 130 | event.timestamp |= lo; |
| 131 | ptp_clock_event(qoriq_ptp->clock, &event); |
| 132 | } |
| 133 | |
Yangbo Lu | b0bc10c | 2019-01-21 18:41:38 +0800 | [diff] [blame^] | 134 | if (irqs & ALM2) { |
Yangbo Lu | ceefc71d | 2018-05-25 12:40:34 +0800 | [diff] [blame] | 135 | ack |= ALM2; |
| 136 | if (qoriq_ptp->alarm_value) { |
| 137 | event.type = PTP_CLOCK_ALARM; |
| 138 | event.index = 0; |
| 139 | event.timestamp = qoriq_ptp->alarm_value; |
| 140 | ptp_clock_event(qoriq_ptp->clock, &event); |
| 141 | } |
| 142 | if (qoriq_ptp->alarm_interval) { |
| 143 | ns = qoriq_ptp->alarm_value + qoriq_ptp->alarm_interval; |
| 144 | hi = ns >> 32; |
| 145 | lo = ns & 0xffffffff; |
Yangbo Lu | a8f62d0 | 2018-06-25 20:37:08 +0800 | [diff] [blame] | 146 | qoriq_write(®s->alarm_regs->tmr_alarm2_l, lo); |
| 147 | qoriq_write(®s->alarm_regs->tmr_alarm2_h, hi); |
Yangbo Lu | ceefc71d | 2018-05-25 12:40:34 +0800 | [diff] [blame] | 148 | qoriq_ptp->alarm_value = ns; |
| 149 | } else { |
Yangbo Lu | ceefc71d | 2018-05-25 12:40:34 +0800 | [diff] [blame] | 150 | spin_lock(&qoriq_ptp->lock); |
Yangbo Lu | a8f62d0 | 2018-06-25 20:37:08 +0800 | [diff] [blame] | 151 | mask = qoriq_read(®s->ctrl_regs->tmr_temask); |
Yangbo Lu | ceefc71d | 2018-05-25 12:40:34 +0800 | [diff] [blame] | 152 | mask &= ~ALM2EN; |
Yangbo Lu | a8f62d0 | 2018-06-25 20:37:08 +0800 | [diff] [blame] | 153 | qoriq_write(®s->ctrl_regs->tmr_temask, mask); |
Yangbo Lu | ceefc71d | 2018-05-25 12:40:34 +0800 | [diff] [blame] | 154 | spin_unlock(&qoriq_ptp->lock); |
| 155 | qoriq_ptp->alarm_value = 0; |
| 156 | qoriq_ptp->alarm_interval = 0; |
| 157 | } |
| 158 | } |
| 159 | |
Yangbo Lu | b0bc10c | 2019-01-21 18:41:38 +0800 | [diff] [blame^] | 160 | if (irqs & PP1) { |
Yangbo Lu | ceefc71d | 2018-05-25 12:40:34 +0800 | [diff] [blame] | 161 | ack |= PP1; |
| 162 | event.type = PTP_CLOCK_PPS; |
| 163 | ptp_clock_event(qoriq_ptp->clock, &event); |
| 164 | } |
| 165 | |
| 166 | if (ack) { |
Yangbo Lu | a8f62d0 | 2018-06-25 20:37:08 +0800 | [diff] [blame] | 167 | qoriq_write(®s->ctrl_regs->tmr_tevent, ack); |
Yangbo Lu | ceefc71d | 2018-05-25 12:40:34 +0800 | [diff] [blame] | 168 | return IRQ_HANDLED; |
| 169 | } else |
| 170 | return IRQ_NONE; |
| 171 | } |
| 172 | |
| 173 | /* |
| 174 | * PTP clock operations |
| 175 | */ |
| 176 | |
| 177 | static int ptp_qoriq_adjfine(struct ptp_clock_info *ptp, long scaled_ppm) |
| 178 | { |
| 179 | u64 adj, diff; |
| 180 | u32 tmr_add; |
| 181 | int neg_adj = 0; |
| 182 | struct qoriq_ptp *qoriq_ptp = container_of(ptp, struct qoriq_ptp, caps); |
Yangbo Lu | a8f62d0 | 2018-06-25 20:37:08 +0800 | [diff] [blame] | 183 | struct qoriq_ptp_registers *regs = &qoriq_ptp->regs; |
Yangbo Lu | ceefc71d | 2018-05-25 12:40:34 +0800 | [diff] [blame] | 184 | |
| 185 | if (scaled_ppm < 0) { |
| 186 | neg_adj = 1; |
| 187 | scaled_ppm = -scaled_ppm; |
| 188 | } |
| 189 | tmr_add = qoriq_ptp->tmr_add; |
| 190 | adj = tmr_add; |
| 191 | |
| 192 | /* calculate diff as adj*(scaled_ppm/65536)/1000000 |
| 193 | * and round() to the nearest integer |
| 194 | */ |
| 195 | adj *= scaled_ppm; |
| 196 | diff = div_u64(adj, 8000000); |
| 197 | diff = (diff >> 13) + ((diff >> 12) & 1); |
| 198 | |
| 199 | tmr_add = neg_adj ? tmr_add - diff : tmr_add + diff; |
| 200 | |
Yangbo Lu | a8f62d0 | 2018-06-25 20:37:08 +0800 | [diff] [blame] | 201 | qoriq_write(®s->ctrl_regs->tmr_add, tmr_add); |
Yangbo Lu | ceefc71d | 2018-05-25 12:40:34 +0800 | [diff] [blame] | 202 | |
| 203 | return 0; |
| 204 | } |
| 205 | |
| 206 | static int ptp_qoriq_adjtime(struct ptp_clock_info *ptp, s64 delta) |
| 207 | { |
| 208 | s64 now; |
| 209 | unsigned long flags; |
| 210 | struct qoriq_ptp *qoriq_ptp = container_of(ptp, struct qoriq_ptp, caps); |
| 211 | |
| 212 | spin_lock_irqsave(&qoriq_ptp->lock, flags); |
| 213 | |
| 214 | now = tmr_cnt_read(qoriq_ptp); |
| 215 | now += delta; |
| 216 | tmr_cnt_write(qoriq_ptp, now); |
| 217 | set_fipers(qoriq_ptp); |
| 218 | |
| 219 | spin_unlock_irqrestore(&qoriq_ptp->lock, flags); |
| 220 | |
| 221 | return 0; |
| 222 | } |
| 223 | |
| 224 | static int ptp_qoriq_gettime(struct ptp_clock_info *ptp, |
| 225 | struct timespec64 *ts) |
| 226 | { |
| 227 | u64 ns; |
| 228 | unsigned long flags; |
| 229 | struct qoriq_ptp *qoriq_ptp = container_of(ptp, struct qoriq_ptp, caps); |
| 230 | |
| 231 | spin_lock_irqsave(&qoriq_ptp->lock, flags); |
| 232 | |
| 233 | ns = tmr_cnt_read(qoriq_ptp); |
| 234 | |
| 235 | spin_unlock_irqrestore(&qoriq_ptp->lock, flags); |
| 236 | |
| 237 | *ts = ns_to_timespec64(ns); |
| 238 | |
| 239 | return 0; |
| 240 | } |
| 241 | |
| 242 | static int ptp_qoriq_settime(struct ptp_clock_info *ptp, |
| 243 | const struct timespec64 *ts) |
| 244 | { |
| 245 | u64 ns; |
| 246 | unsigned long flags; |
| 247 | struct qoriq_ptp *qoriq_ptp = container_of(ptp, struct qoriq_ptp, caps); |
| 248 | |
| 249 | ns = timespec64_to_ns(ts); |
| 250 | |
| 251 | spin_lock_irqsave(&qoriq_ptp->lock, flags); |
| 252 | |
| 253 | tmr_cnt_write(qoriq_ptp, ns); |
| 254 | set_fipers(qoriq_ptp); |
| 255 | |
| 256 | spin_unlock_irqrestore(&qoriq_ptp->lock, flags); |
| 257 | |
| 258 | return 0; |
| 259 | } |
| 260 | |
| 261 | static int ptp_qoriq_enable(struct ptp_clock_info *ptp, |
| 262 | struct ptp_clock_request *rq, int on) |
| 263 | { |
| 264 | struct qoriq_ptp *qoriq_ptp = container_of(ptp, struct qoriq_ptp, caps); |
Yangbo Lu | a8f62d0 | 2018-06-25 20:37:08 +0800 | [diff] [blame] | 265 | struct qoriq_ptp_registers *regs = &qoriq_ptp->regs; |
Yangbo Lu | ceefc71d | 2018-05-25 12:40:34 +0800 | [diff] [blame] | 266 | unsigned long flags; |
Yangbo Lu | b0bc10c | 2019-01-21 18:41:38 +0800 | [diff] [blame^] | 267 | u32 bit, mask = 0; |
Yangbo Lu | ceefc71d | 2018-05-25 12:40:34 +0800 | [diff] [blame] | 268 | |
| 269 | switch (rq->type) { |
| 270 | case PTP_CLK_REQ_EXTTS: |
| 271 | switch (rq->extts.index) { |
| 272 | case 0: |
| 273 | bit = ETS1EN; |
| 274 | break; |
| 275 | case 1: |
| 276 | bit = ETS2EN; |
| 277 | break; |
| 278 | default: |
| 279 | return -EINVAL; |
| 280 | } |
Yangbo Lu | ceefc71d | 2018-05-25 12:40:34 +0800 | [diff] [blame] | 281 | break; |
Yangbo Lu | b0bc10c | 2019-01-21 18:41:38 +0800 | [diff] [blame^] | 282 | case PTP_CLK_REQ_PPS: |
| 283 | bit = PP1EN; |
| 284 | break; |
| 285 | default: |
| 286 | return -EOPNOTSUPP; |
Yangbo Lu | ceefc71d | 2018-05-25 12:40:34 +0800 | [diff] [blame] | 287 | } |
| 288 | |
Yangbo Lu | b0bc10c | 2019-01-21 18:41:38 +0800 | [diff] [blame^] | 289 | spin_lock_irqsave(&qoriq_ptp->lock, flags); |
| 290 | |
| 291 | mask = qoriq_read(®s->ctrl_regs->tmr_temask); |
| 292 | if (on) { |
| 293 | mask |= bit; |
| 294 | qoriq_write(®s->ctrl_regs->tmr_tevent, bit); |
| 295 | } else { |
| 296 | mask &= ~bit; |
| 297 | } |
| 298 | |
| 299 | qoriq_write(®s->ctrl_regs->tmr_temask, mask); |
| 300 | |
| 301 | spin_unlock_irqrestore(&qoriq_ptp->lock, flags); |
| 302 | return 0; |
Yangbo Lu | ceefc71d | 2018-05-25 12:40:34 +0800 | [diff] [blame] | 303 | } |
| 304 | |
| 305 | static const struct ptp_clock_info ptp_qoriq_caps = { |
| 306 | .owner = THIS_MODULE, |
| 307 | .name = "qoriq ptp clock", |
| 308 | .max_adj = 512000, |
| 309 | .n_alarm = 0, |
| 310 | .n_ext_ts = N_EXT_TS, |
| 311 | .n_per_out = 0, |
| 312 | .n_pins = 0, |
| 313 | .pps = 1, |
| 314 | .adjfine = ptp_qoriq_adjfine, |
| 315 | .adjtime = ptp_qoriq_adjtime, |
| 316 | .gettime64 = ptp_qoriq_gettime, |
| 317 | .settime64 = ptp_qoriq_settime, |
| 318 | .enable = ptp_qoriq_enable, |
| 319 | }; |
| 320 | |
Yangbo Lu | 91305f2 | 2018-08-01 18:05:54 +0800 | [diff] [blame] | 321 | /** |
| 322 | * qoriq_ptp_nominal_freq - calculate nominal frequency according to |
| 323 | * reference clock frequency |
| 324 | * |
| 325 | * @clk_src: reference clock frequency |
| 326 | * |
| 327 | * The nominal frequency is the desired clock frequency. |
| 328 | * It should be less than the reference clock frequency. |
| 329 | * It should be a factor of 1000MHz. |
| 330 | * |
| 331 | * Return the nominal frequency |
| 332 | */ |
| 333 | static u32 qoriq_ptp_nominal_freq(u32 clk_src) |
| 334 | { |
| 335 | u32 remainder = 0; |
| 336 | |
| 337 | clk_src /= 1000000; |
| 338 | remainder = clk_src % 100; |
| 339 | if (remainder) { |
| 340 | clk_src -= remainder; |
| 341 | clk_src += 100; |
| 342 | } |
| 343 | |
| 344 | do { |
| 345 | clk_src -= 100; |
| 346 | |
| 347 | } while (1000 % clk_src); |
| 348 | |
| 349 | return clk_src * 1000000; |
| 350 | } |
| 351 | |
| 352 | /** |
| 353 | * qoriq_ptp_auto_config - calculate a set of default configurations |
| 354 | * |
| 355 | * @qoriq_ptp: pointer to qoriq_ptp |
| 356 | * @node: pointer to device_node |
| 357 | * |
| 358 | * If below dts properties are not provided, this function will be |
| 359 | * called to calculate a set of default configurations for them. |
| 360 | * "fsl,tclk-period" |
| 361 | * "fsl,tmr-prsc" |
| 362 | * "fsl,tmr-add" |
| 363 | * "fsl,tmr-fiper1" |
| 364 | * "fsl,tmr-fiper2" |
| 365 | * "fsl,max-adj" |
| 366 | * |
| 367 | * Return 0 if success |
| 368 | */ |
| 369 | static int qoriq_ptp_auto_config(struct qoriq_ptp *qoriq_ptp, |
| 370 | struct device_node *node) |
| 371 | { |
| 372 | struct clk *clk; |
| 373 | u64 freq_comp; |
| 374 | u64 max_adj; |
| 375 | u32 nominal_freq; |
Yangbo Lu | 74c05a3 | 2018-08-06 12:39:11 +0800 | [diff] [blame] | 376 | u32 remainder = 0; |
Yangbo Lu | 91305f2 | 2018-08-01 18:05:54 +0800 | [diff] [blame] | 377 | u32 clk_src = 0; |
| 378 | |
| 379 | qoriq_ptp->cksel = DEFAULT_CKSEL; |
| 380 | |
| 381 | clk = of_clk_get(node, 0); |
| 382 | if (!IS_ERR(clk)) { |
| 383 | clk_src = clk_get_rate(clk); |
| 384 | clk_put(clk); |
| 385 | } |
| 386 | |
| 387 | if (clk_src <= 100000000UL) { |
| 388 | pr_err("error reference clock value, or lower than 100MHz\n"); |
| 389 | return -EINVAL; |
| 390 | } |
| 391 | |
| 392 | nominal_freq = qoriq_ptp_nominal_freq(clk_src); |
| 393 | if (!nominal_freq) |
| 394 | return -EINVAL; |
| 395 | |
| 396 | qoriq_ptp->tclk_period = 1000000000UL / nominal_freq; |
| 397 | qoriq_ptp->tmr_prsc = DEFAULT_TMR_PRSC; |
| 398 | |
| 399 | /* Calculate initial frequency compensation value for TMR_ADD register. |
| 400 | * freq_comp = ceil(2^32 / freq_ratio) |
| 401 | * freq_ratio = reference_clock_freq / nominal_freq |
| 402 | */ |
| 403 | freq_comp = ((u64)1 << 32) * nominal_freq; |
Yangbo Lu | 74c05a3 | 2018-08-06 12:39:11 +0800 | [diff] [blame] | 404 | freq_comp = div_u64_rem(freq_comp, clk_src, &remainder); |
| 405 | if (remainder) |
Yangbo Lu | 91305f2 | 2018-08-01 18:05:54 +0800 | [diff] [blame] | 406 | freq_comp++; |
| 407 | |
| 408 | qoriq_ptp->tmr_add = freq_comp; |
| 409 | qoriq_ptp->tmr_fiper1 = DEFAULT_FIPER1_PERIOD - qoriq_ptp->tclk_period; |
| 410 | qoriq_ptp->tmr_fiper2 = DEFAULT_FIPER2_PERIOD - qoriq_ptp->tclk_period; |
| 411 | |
| 412 | /* max_adj = 1000000000 * (freq_ratio - 1.0) - 1 |
| 413 | * freq_ratio = reference_clock_freq / nominal_freq |
| 414 | */ |
| 415 | max_adj = 1000000000ULL * (clk_src - nominal_freq); |
Yangbo Lu | 74c05a3 | 2018-08-06 12:39:11 +0800 | [diff] [blame] | 416 | max_adj = div_u64(max_adj, nominal_freq) - 1; |
Yangbo Lu | 91305f2 | 2018-08-01 18:05:54 +0800 | [diff] [blame] | 417 | qoriq_ptp->caps.max_adj = max_adj; |
| 418 | |
| 419 | return 0; |
| 420 | } |
| 421 | |
Yangbo Lu | ceefc71d | 2018-05-25 12:40:34 +0800 | [diff] [blame] | 422 | static int qoriq_ptp_probe(struct platform_device *dev) |
| 423 | { |
| 424 | struct device_node *node = dev->dev.of_node; |
| 425 | struct qoriq_ptp *qoriq_ptp; |
Yangbo Lu | a8f62d0 | 2018-06-25 20:37:08 +0800 | [diff] [blame] | 426 | struct qoriq_ptp_registers *regs; |
Yangbo Lu | ceefc71d | 2018-05-25 12:40:34 +0800 | [diff] [blame] | 427 | struct timespec64 now; |
| 428 | int err = -ENOMEM; |
| 429 | u32 tmr_ctrl; |
| 430 | unsigned long flags; |
Yangbo Lu | a8f62d0 | 2018-06-25 20:37:08 +0800 | [diff] [blame] | 431 | void __iomem *base; |
Yangbo Lu | ceefc71d | 2018-05-25 12:40:34 +0800 | [diff] [blame] | 432 | |
| 433 | qoriq_ptp = kzalloc(sizeof(*qoriq_ptp), GFP_KERNEL); |
| 434 | if (!qoriq_ptp) |
| 435 | goto no_memory; |
| 436 | |
Yangbo Lu | 91305f2 | 2018-08-01 18:05:54 +0800 | [diff] [blame] | 437 | err = -EINVAL; |
Yangbo Lu | ceefc71d | 2018-05-25 12:40:34 +0800 | [diff] [blame] | 438 | |
| 439 | qoriq_ptp->caps = ptp_qoriq_caps; |
| 440 | |
| 441 | if (of_property_read_u32(node, "fsl,cksel", &qoriq_ptp->cksel)) |
| 442 | qoriq_ptp->cksel = DEFAULT_CKSEL; |
| 443 | |
| 444 | if (of_property_read_u32(node, |
| 445 | "fsl,tclk-period", &qoriq_ptp->tclk_period) || |
| 446 | of_property_read_u32(node, |
| 447 | "fsl,tmr-prsc", &qoriq_ptp->tmr_prsc) || |
| 448 | of_property_read_u32(node, |
| 449 | "fsl,tmr-add", &qoriq_ptp->tmr_add) || |
| 450 | of_property_read_u32(node, |
| 451 | "fsl,tmr-fiper1", &qoriq_ptp->tmr_fiper1) || |
| 452 | of_property_read_u32(node, |
| 453 | "fsl,tmr-fiper2", &qoriq_ptp->tmr_fiper2) || |
| 454 | of_property_read_u32(node, |
| 455 | "fsl,max-adj", &qoriq_ptp->caps.max_adj)) { |
Yangbo Lu | 91305f2 | 2018-08-01 18:05:54 +0800 | [diff] [blame] | 456 | pr_warn("device tree node missing required elements, try automatic configuration\n"); |
| 457 | |
| 458 | if (qoriq_ptp_auto_config(qoriq_ptp, node)) |
| 459 | goto no_config; |
Yangbo Lu | ceefc71d | 2018-05-25 12:40:34 +0800 | [diff] [blame] | 460 | } |
| 461 | |
Yangbo Lu | 91305f2 | 2018-08-01 18:05:54 +0800 | [diff] [blame] | 462 | err = -ENODEV; |
| 463 | |
Yangbo Lu | ceefc71d | 2018-05-25 12:40:34 +0800 | [diff] [blame] | 464 | qoriq_ptp->irq = platform_get_irq(dev, 0); |
| 465 | |
| 466 | if (qoriq_ptp->irq < 0) { |
| 467 | pr_err("irq not in device tree\n"); |
| 468 | goto no_node; |
| 469 | } |
Yangbo Lu | a8f62d0 | 2018-06-25 20:37:08 +0800 | [diff] [blame] | 470 | if (request_irq(qoriq_ptp->irq, isr, IRQF_SHARED, DRIVER, qoriq_ptp)) { |
Yangbo Lu | ceefc71d | 2018-05-25 12:40:34 +0800 | [diff] [blame] | 471 | pr_err("request_irq failed\n"); |
| 472 | goto no_node; |
| 473 | } |
| 474 | |
| 475 | qoriq_ptp->rsrc = platform_get_resource(dev, IORESOURCE_MEM, 0); |
| 476 | if (!qoriq_ptp->rsrc) { |
| 477 | pr_err("no resource\n"); |
| 478 | goto no_resource; |
| 479 | } |
| 480 | if (request_resource(&iomem_resource, qoriq_ptp->rsrc)) { |
| 481 | pr_err("resource busy\n"); |
| 482 | goto no_resource; |
| 483 | } |
| 484 | |
| 485 | spin_lock_init(&qoriq_ptp->lock); |
| 486 | |
Yangbo Lu | a8f62d0 | 2018-06-25 20:37:08 +0800 | [diff] [blame] | 487 | base = ioremap(qoriq_ptp->rsrc->start, |
| 488 | resource_size(qoriq_ptp->rsrc)); |
| 489 | if (!base) { |
Yangbo Lu | ceefc71d | 2018-05-25 12:40:34 +0800 | [diff] [blame] | 490 | pr_err("ioremap ptp registers failed\n"); |
| 491 | goto no_ioremap; |
| 492 | } |
Yangbo Lu | a8f62d0 | 2018-06-25 20:37:08 +0800 | [diff] [blame] | 493 | |
| 494 | qoriq_ptp->base = base; |
| 495 | |
| 496 | if (of_device_is_compatible(node, "fsl,fman-ptp-timer")) { |
| 497 | qoriq_ptp->regs.ctrl_regs = base + FMAN_CTRL_REGS_OFFSET; |
| 498 | qoriq_ptp->regs.alarm_regs = base + FMAN_ALARM_REGS_OFFSET; |
| 499 | qoriq_ptp->regs.fiper_regs = base + FMAN_FIPER_REGS_OFFSET; |
| 500 | qoriq_ptp->regs.etts_regs = base + FMAN_ETTS_REGS_OFFSET; |
| 501 | } else { |
| 502 | qoriq_ptp->regs.ctrl_regs = base + CTRL_REGS_OFFSET; |
| 503 | qoriq_ptp->regs.alarm_regs = base + ALARM_REGS_OFFSET; |
| 504 | qoriq_ptp->regs.fiper_regs = base + FIPER_REGS_OFFSET; |
| 505 | qoriq_ptp->regs.etts_regs = base + ETTS_REGS_OFFSET; |
| 506 | } |
| 507 | |
Arnd Bergmann | f696a21 | 2018-06-18 16:20:39 +0200 | [diff] [blame] | 508 | ktime_get_real_ts64(&now); |
Yangbo Lu | ceefc71d | 2018-05-25 12:40:34 +0800 | [diff] [blame] | 509 | ptp_qoriq_settime(&qoriq_ptp->caps, &now); |
| 510 | |
| 511 | tmr_ctrl = |
| 512 | (qoriq_ptp->tclk_period & TCLK_PERIOD_MASK) << TCLK_PERIOD_SHIFT | |
| 513 | (qoriq_ptp->cksel & CKSEL_MASK) << CKSEL_SHIFT; |
| 514 | |
| 515 | spin_lock_irqsave(&qoriq_ptp->lock, flags); |
| 516 | |
Yangbo Lu | a8f62d0 | 2018-06-25 20:37:08 +0800 | [diff] [blame] | 517 | regs = &qoriq_ptp->regs; |
| 518 | qoriq_write(®s->ctrl_regs->tmr_ctrl, tmr_ctrl); |
| 519 | qoriq_write(®s->ctrl_regs->tmr_add, qoriq_ptp->tmr_add); |
| 520 | qoriq_write(®s->ctrl_regs->tmr_prsc, qoriq_ptp->tmr_prsc); |
| 521 | qoriq_write(®s->fiper_regs->tmr_fiper1, qoriq_ptp->tmr_fiper1); |
| 522 | qoriq_write(®s->fiper_regs->tmr_fiper2, qoriq_ptp->tmr_fiper2); |
Yangbo Lu | ceefc71d | 2018-05-25 12:40:34 +0800 | [diff] [blame] | 523 | set_alarm(qoriq_ptp); |
Yangbo Lu | a8f62d0 | 2018-06-25 20:37:08 +0800 | [diff] [blame] | 524 | qoriq_write(®s->ctrl_regs->tmr_ctrl, tmr_ctrl|FIPERST|RTPE|TE|FRD); |
Yangbo Lu | ceefc71d | 2018-05-25 12:40:34 +0800 | [diff] [blame] | 525 | |
| 526 | spin_unlock_irqrestore(&qoriq_ptp->lock, flags); |
| 527 | |
| 528 | qoriq_ptp->clock = ptp_clock_register(&qoriq_ptp->caps, &dev->dev); |
| 529 | if (IS_ERR(qoriq_ptp->clock)) { |
| 530 | err = PTR_ERR(qoriq_ptp->clock); |
| 531 | goto no_clock; |
| 532 | } |
| 533 | qoriq_ptp->phc_index = ptp_clock_index(qoriq_ptp->clock); |
| 534 | |
| 535 | platform_set_drvdata(dev, qoriq_ptp); |
| 536 | |
| 537 | return 0; |
| 538 | |
| 539 | no_clock: |
Yangbo Lu | a8f62d0 | 2018-06-25 20:37:08 +0800 | [diff] [blame] | 540 | iounmap(qoriq_ptp->base); |
Yangbo Lu | ceefc71d | 2018-05-25 12:40:34 +0800 | [diff] [blame] | 541 | no_ioremap: |
| 542 | release_resource(qoriq_ptp->rsrc); |
| 543 | no_resource: |
| 544 | free_irq(qoriq_ptp->irq, qoriq_ptp); |
Yangbo Lu | 91305f2 | 2018-08-01 18:05:54 +0800 | [diff] [blame] | 545 | no_config: |
Yangbo Lu | ceefc71d | 2018-05-25 12:40:34 +0800 | [diff] [blame] | 546 | no_node: |
| 547 | kfree(qoriq_ptp); |
| 548 | no_memory: |
| 549 | return err; |
| 550 | } |
| 551 | |
| 552 | static int qoriq_ptp_remove(struct platform_device *dev) |
| 553 | { |
| 554 | struct qoriq_ptp *qoriq_ptp = platform_get_drvdata(dev); |
Yangbo Lu | a8f62d0 | 2018-06-25 20:37:08 +0800 | [diff] [blame] | 555 | struct qoriq_ptp_registers *regs = &qoriq_ptp->regs; |
Yangbo Lu | ceefc71d | 2018-05-25 12:40:34 +0800 | [diff] [blame] | 556 | |
Yangbo Lu | a8f62d0 | 2018-06-25 20:37:08 +0800 | [diff] [blame] | 557 | qoriq_write(®s->ctrl_regs->tmr_temask, 0); |
| 558 | qoriq_write(®s->ctrl_regs->tmr_ctrl, 0); |
Yangbo Lu | ceefc71d | 2018-05-25 12:40:34 +0800 | [diff] [blame] | 559 | |
| 560 | ptp_clock_unregister(qoriq_ptp->clock); |
Yangbo Lu | a8f62d0 | 2018-06-25 20:37:08 +0800 | [diff] [blame] | 561 | iounmap(qoriq_ptp->base); |
Yangbo Lu | ceefc71d | 2018-05-25 12:40:34 +0800 | [diff] [blame] | 562 | release_resource(qoriq_ptp->rsrc); |
| 563 | free_irq(qoriq_ptp->irq, qoriq_ptp); |
| 564 | kfree(qoriq_ptp); |
| 565 | |
| 566 | return 0; |
| 567 | } |
| 568 | |
| 569 | static const struct of_device_id match_table[] = { |
| 570 | { .compatible = "fsl,etsec-ptp" }, |
Yangbo Lu | a8f62d0 | 2018-06-25 20:37:08 +0800 | [diff] [blame] | 571 | { .compatible = "fsl,fman-ptp-timer" }, |
Yangbo Lu | ceefc71d | 2018-05-25 12:40:34 +0800 | [diff] [blame] | 572 | {}, |
| 573 | }; |
| 574 | MODULE_DEVICE_TABLE(of, match_table); |
| 575 | |
| 576 | static struct platform_driver qoriq_ptp_driver = { |
| 577 | .driver = { |
| 578 | .name = "ptp_qoriq", |
| 579 | .of_match_table = match_table, |
| 580 | }, |
| 581 | .probe = qoriq_ptp_probe, |
| 582 | .remove = qoriq_ptp_remove, |
| 583 | }; |
| 584 | |
| 585 | module_platform_driver(qoriq_ptp_driver); |
| 586 | |
| 587 | MODULE_AUTHOR("Richard Cochran <richardcochran@gmail.com>"); |
| 588 | MODULE_DESCRIPTION("PTP clock for Freescale QorIQ 1588 timer"); |
| 589 | MODULE_LICENSE("GPL"); |