blob: e82ed7216ecaaa6bba3e1444058b598939ee8f78 [file] [log] [blame]
Greg Kroah-Hartmanb2441312017-11-01 15:07:57 +01001# SPDX-License-Identifier: GPL-2.0
Christoph Lameter66701b12007-02-10 01:43:09 -08002config ZONE_DMA
Johannes Weiner35f9cd02009-03-04 16:21:28 +01003 def_bool y
Christoph Lameter66701b12007-02-10 01:43:09 -08004
Chris Zankel8e1a6dd2005-06-23 22:01:10 -07005config XTENSA
Johannes Weiner35f9cd02009-03-04 16:21:28 +01006 def_bool y
Vladimir Murzin07c75d72017-06-28 10:16:57 +01007 select ARCH_NO_COHERENT_DMA_MMAP if !MMU
Max Filippov8f371c72013-04-15 09:21:35 +04008 select ARCH_WANT_FRAME_POINTERS
Max Filippove9691612013-01-06 16:17:21 +04009 select ARCH_WANT_IPC_PARSE_VERSION
Max Filippov25df8192014-02-18 15:29:11 +040010 select BUILDTIME_EXTABLE_SORT
Al Viro3e41f9b2012-10-26 23:41:40 -040011 select CLONE_BACKWARDS
Max Filippovbda89322014-01-29 06:20:46 +040012 select COMMON_CLK
Max Filippov920f8a392014-06-16 08:20:17 +040013 select GENERIC_ATOMIC64
14 select GENERIC_CLOCKEVENTS
15 select GENERIC_IRQ_SHOW
16 select GENERIC_PCI_IOMAP
17 select GENERIC_SCHED_CLOCK
Max Filippov57358ba2017-12-17 14:43:15 -080018 select GENERIC_STRNCPY_FROM_USER if KASAN
Max Filippovc6335442017-12-03 13:28:52 -080019 select HAVE_ARCH_KASAN if MMU
Max Filippov0e46c112016-04-25 22:08:20 +030020 select HAVE_DEBUG_KMEMLEAK
Max Filippov9d2ffe52016-04-25 22:08:52 +030021 select HAVE_DMA_CONTIGUOUS
Jiri Slaby5f56a5d2016-05-20 17:00:16 -070022 select HAVE_EXIT_THREAD
Max Filippov920f8a392014-06-16 08:20:17 +040023 select HAVE_FUNCTION_TRACER
Max Filippovd951ba22015-09-30 15:17:35 +030024 select HAVE_FUTEX_CMPXCHG if !MMU
Max Filippovc91e02b2016-01-24 10:32:10 +030025 select HAVE_HW_BREAKPOINT if PERF_EVENTS
Max Filippov920f8a392014-06-16 08:20:17 +040026 select HAVE_IRQ_TIME_ACCOUNTING
Max Filippov0e46c112016-04-25 22:08:20 +030027 select HAVE_MEMBLOCK
Max Filippov920f8a392014-06-16 08:20:17 +040028 select HAVE_OPROFILE
29 select HAVE_PERF_EVENTS
Masahiro Yamadad148eac2018-06-14 19:36:45 +090030 select HAVE_STACKPROTECTOR
Max Filippov920f8a392014-06-16 08:20:17 +040031 select IRQ_DOMAIN
32 select MODULES_USE_ELF_RELA
Max Filippov0e46c112016-04-25 22:08:20 +030033 select NO_BOOTMEM
Max Filippovdb8165f2015-06-04 13:41:27 +030034 select PERF_USE_VMALLOC
Max Filippov920f8a392014-06-16 08:20:17 +040035 select VIRT_TO_BUS
Chris Zankel8e1a6dd2005-06-23 22:01:10 -070036 help
37 Xtensa processors are 32-bit RISC machines designed by Tensilica
38 primarily for embedded systems. These processors are both
39 configurable and extensible. The Linux port to the Xtensa
40 architecture supports all processor configurations and extensions,
41 with reasonable minimum requirements. The Xtensa Linux project has
Masanari Iida0ada4492013-01-04 17:29:18 +090042 a home page at <http://www.linux-xtensa.org/>.
Chris Zankel8e1a6dd2005-06-23 22:01:10 -070043
Chris Zankel8e1a6dd2005-06-23 22:01:10 -070044config RWSEM_XCHGADD_ALGORITHM
Johannes Weiner35f9cd02009-03-04 16:21:28 +010045 def_bool y
Chris Zankel8e1a6dd2005-06-23 22:01:10 -070046
Akinobu Mitad4337aa2006-03-26 01:39:43 -080047config GENERIC_HWEIGHT
Johannes Weiner35f9cd02009-03-04 16:21:28 +010048 def_bool y
Akinobu Mitad4337aa2006-03-26 01:39:43 -080049
David Howellsf0d1b0b2006-12-08 02:37:49 -080050config ARCH_HAS_ILOG2_U32
Johannes Weiner35f9cd02009-03-04 16:21:28 +010051 def_bool n
David Howellsf0d1b0b2006-12-08 02:37:49 -080052
53config ARCH_HAS_ILOG2_U64
Johannes Weiner35f9cd02009-03-04 16:21:28 +010054 def_bool n
David Howellsf0d1b0b2006-12-08 02:37:49 -080055
Uwe Kleine-Königce816fa2014-04-07 15:39:19 -070056config NO_IOPORT_MAP
Max Filippovd046f772012-09-17 05:44:41 +040057 def_bool n
Al Viro5ea81762007-02-11 15:41:31 +000058
H. Peter Anvinbdc80782008-02-08 04:21:26 -080059config HZ
60 int
61 default 100
62
Chris Zankel8e1a6dd2005-06-23 22:01:10 -070063source "init/Kconfig"
Matt Helsleydc52ddc2008-10-18 20:27:21 -070064source "kernel/Kconfig.freezer"
Chris Zankel8e1a6dd2005-06-23 22:01:10 -070065
Max Filippov8f371c72013-04-15 09:21:35 +040066config LOCKDEP_SUPPORT
67 def_bool y
68
Max Filippov3e4196a2013-04-15 09:20:48 +040069config STACKTRACE_SUPPORT
70 def_bool y
71
Max Filippovc92931b2013-03-31 06:32:42 +040072config TRACE_IRQFLAGS_SUPPORT
73 def_bool y
74
Johannes Weiner35f9cd02009-03-04 16:21:28 +010075config MMU
Max Filippovde7c1c72015-06-27 07:31:12 +030076 def_bool n
Johannes Weiner35f9cd02009-03-04 16:21:28 +010077
Johannes Weiner4c0d21412009-03-04 16:21:31 +010078config VARIANT_IRQ_SWITCH
79 def_bool n
80
Baruch Siacha1a2bde2013-12-18 09:10:29 +020081config HAVE_XTENSA_GPIO32
82 def_bool n
83
Max Filippovc6335442017-12-03 13:28:52 -080084config KASAN_SHADOW_OFFSET
85 hex
86 default 0x6e400000
87
Chris Zankel8e1a6dd2005-06-23 22:01:10 -070088menu "Processor type and features"
89
90choice
91 prompt "Xtensa Processor Configuration"
Chris Zankel173d6682006-12-10 02:18:48 -080092 default XTENSA_VARIANT_FSF
Chris Zankel8e1a6dd2005-06-23 22:01:10 -070093
Chris Zankel173d6682006-12-10 02:18:48 -080094config XTENSA_VARIANT_FSF
Chris Zankel00254272008-10-21 09:11:43 -070095 bool "fsf - default (not generic) configuration"
Johannes Weiner35f9cd02009-03-04 16:21:28 +010096 select MMU
Chris Zankel00254272008-10-21 09:11:43 -070097
98config XTENSA_VARIANT_DC232B
99 bool "dc232b - Diamond 232L Standard Core Rev.B (LE)"
Johannes Weiner35f9cd02009-03-04 16:21:28 +0100100 select MMU
Baruch Siacha1a2bde2013-12-18 09:10:29 +0200101 select HAVE_XTENSA_GPIO32
Chris Zankel00254272008-10-21 09:11:43 -0700102 help
Johannes Weiner35f9cd02009-03-04 16:21:28 +0100103 This variant refers to Tensilica's Diamond 232L Standard core Rev.B (LE).
Johannes Weiner000af2c2009-03-04 16:21:32 +0100104
Pete Delaneyd0b73b42013-01-05 04:57:16 +0400105config XTENSA_VARIANT_DC233C
106 bool "dc233c - Diamond 233L Standard Core Rev.C (LE)"
107 select MMU
Baruch Siacha1a2bde2013-12-18 09:10:29 +0200108 select HAVE_XTENSA_GPIO32
Pete Delaneyd0b73b42013-01-05 04:57:16 +0400109 help
110 This variant refers to Tensilica's Diamond 233L Standard core Rev.C (LE).
111
Max Filippov420ae952014-06-16 07:25:06 +0400112config XTENSA_VARIANT_CUSTOM
113 bool "Custom Xtensa processor configuration"
Max Filippov420ae952014-06-16 07:25:06 +0400114 select HAVE_XTENSA_GPIO32
115 help
116 Select this variant to use a custom Xtensa processor configuration.
117 You will be prompted for a processor variant CORENAME.
Chris Zankel8e1a6dd2005-06-23 22:01:10 -0700118endchoice
119
Max Filippov420ae952014-06-16 07:25:06 +0400120config XTENSA_VARIANT_CUSTOM_NAME
121 string "Xtensa Processor Custom Core Variant Name"
122 depends on XTENSA_VARIANT_CUSTOM
123 help
124 Provide the name of a custom Xtensa processor variant.
125 This CORENAME selects arch/xtensa/variant/CORENAME.
126 Dont forget you have to select MMU if you have one.
127
128config XTENSA_VARIANT_NAME
129 string
130 default "dc232b" if XTENSA_VARIANT_DC232B
131 default "dc233c" if XTENSA_VARIANT_DC233C
132 default "fsf" if XTENSA_VARIANT_FSF
Max Filippov420ae952014-06-16 07:25:06 +0400133 default XTENSA_VARIANT_CUSTOM_NAME if XTENSA_VARIANT_CUSTOM
134
135config XTENSA_VARIANT_MMU
136 bool "Core variant has a Full MMU (TLB, Pages, Protection, etc)"
137 depends on XTENSA_VARIANT_CUSTOM
138 default y
Max Filippovde7c1c72015-06-27 07:31:12 +0300139 select MMU
Max Filippov420ae952014-06-16 07:25:06 +0400140 help
141 Build a Conventional Kernel with full MMU support,
142 ie: it supports a TLB with auto-loading, page protection.
143
Max Filippov9bd46da2015-06-14 01:41:25 +0300144config XTENSA_VARIANT_HAVE_PERF_EVENTS
145 bool "Core variant has Performance Monitor Module"
146 depends on XTENSA_VARIANT_CUSTOM
147 default n
148 help
149 Enable if core variant has Performance Monitor Module with
150 External Registers Interface.
151
152 If unsure, say N.
153
Max Filippove4629192015-11-27 16:26:41 +0300154config XTENSA_FAKE_NMI
155 bool "Treat PMM IRQ as NMI"
156 depends on XTENSA_VARIANT_HAVE_PERF_EVENTS
157 default n
158 help
159 If PMM IRQ is the only IRQ at EXCM level it is safe to
160 treat it as NMI, which improves accuracy of profiling.
161
162 If there are other interrupts at or above PMM IRQ priority level
163 but not above the EXCM level, PMM IRQ still may be treated as NMI,
164 but only if these IRQs are not used. There will be a build warning
165 saying that this is not safe, and a bugcheck if one of these IRQs
166 actually fire.
167
168 If unsure, say N.
169
Chris Zankel8e1a6dd2005-06-23 22:01:10 -0700170config XTENSA_UNALIGNED_USER
171 bool "Unaligned memory access in use space"
Johannes Weiner35f9cd02009-03-04 16:21:28 +0100172 help
173 The Xtensa architecture currently does not handle unaligned
174 memory accesses in hardware but through an exception handler.
175 Per default, unaligned memory accesses are disabled in user space.
Chris Zankel8e1a6dd2005-06-23 22:01:10 -0700176
Johannes Weiner35f9cd02009-03-04 16:21:28 +0100177 Say Y here to enable unaligned memory access in user space.
Chris Zankel8e1a6dd2005-06-23 22:01:10 -0700178
Frederic Weisbeckerbd96efe2011-07-05 17:45:34 +0200179source "kernel/Kconfig.preempt"
Chris Zankel8e1a6dd2005-06-23 22:01:10 -0700180
Max Filippovf6151362013-10-17 02:42:26 +0400181config HAVE_SMP
182 bool "System Supports SMP (MX)"
Max Filippovde7c1c72015-06-27 07:31:12 +0300183 depends on XTENSA_VARIANT_CUSTOM
Max Filippovf6151362013-10-17 02:42:26 +0400184 select XTENSA_MX
185 help
186 This option is use to indicate that the system-on-a-chip (SOC)
187 supports Multiprocessing. Multiprocessor support implemented above
188 the CPU core definition and currently needs to be selected manually.
189
190 Multiprocessor support in implemented with external cache and
Masanari Iida769a12a2015-04-27 22:52:07 +0900191 interrupt controllers.
Max Filippovf6151362013-10-17 02:42:26 +0400192
193 The MX interrupt distributer adds Interprocessor Interrupts
194 and causes the IRQ numbers to be increased by 4 for devices
195 like the open cores ethernet driver and the serial interface.
196
197 You still have to select "Enable SMP" to enable SMP on this SOC.
198
199config SMP
200 bool "Enable Symmetric multi-processing support"
201 depends on HAVE_SMP
Max Filippovf6151362013-10-17 02:42:26 +0400202 select GENERIC_SMP_IDLE_THREAD
203 help
204 Enabled SMP Software; allows more than one CPU/CORE
205 to be activated during startup.
206
207config NR_CPUS
208 depends on SMP
209 int "Maximum number of CPUs (2-32)"
210 range 2 32
211 default "4"
212
Max Filippov49b424f2013-10-17 02:42:28 +0400213config HOTPLUG_CPU
214 bool "Enable CPU hotplug support"
215 depends on SMP
216 help
217 Say Y here to allow turning CPUs off and on. CPUs can be
218 controlled through /sys/devices/system/cpu.
219
220 Say N if you want to disable CPU hotplug.
221
Max Filippove85e3352012-12-03 15:01:43 +0400222config INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
223 bool "Initialize Xtensa MMU inside the Linux kernel code"
Max Filippova4c6be52016-09-29 10:51:05 -0700224 depends on !XTENSA_VARIANT_FSF && !XTENSA_VARIANT_DC232B
Max Filippov73a3eed2016-08-04 15:45:32 +0300225 default y if XTENSA_VARIANT_DC233C || XTENSA_VARIANT_CUSTOM
Max Filippove85e3352012-12-03 15:01:43 +0400226 help
227 Earlier version initialized the MMU in the exception vector
228 before jumping to _startup in head.S and had an advantage that
229 it was possible to place a software breakpoint at 'reset' and
230 then enter your normal kernel breakpoints once the MMU was mapped
231 to the kernel mappings (0XC0000000).
232
Masanari Iida83fc61a2017-09-26 12:47:59 +0900233 This unfortunately won't work for U-Boot and likely also wont
Max Filippove85e3352012-12-03 15:01:43 +0400234 work for using KEXEC to have a hot kernel ready for doing a
235 KDUMP.
236
237 So now the MMU is initialized in head.S but it's necessary to
238 use hardware breakpoints (gdb 'hbreak' cmd) to break at _startup.
239 xt-gdb can't place a Software Breakpoint in the 0XD region prior
240 to mapping the MMU and after mapping even if the area of low memory
241 was mapped gdb wouldn't remove the breakpoint on hitting it as the
242 PC wouldn't match. Since Hardware Breakpoints are recommended for
243 Linux configurations it seems reasonable to just assume they exist
244 and leave this older mechanism for unfortunate souls that choose
245 not to follow Tensilica's recommendation.
246
247 Selecting this will cause U-Boot to set the KERNEL Load and Entry
248 address at 0x00003000 instead of the mapped std of 0xD0003000.
249
250 If in doubt, say Y.
251
Max Filippov7bb516ca2018-08-12 06:01:40 -0700252config MEMMAP_CACHEATTR
253 hex "Cache attributes for the memory address space"
254 depends on !MMU
255 default 0x22222222
256 help
257 These cache attributes are set up for noMMU systems. Each hex digit
258 specifies cache attributes for the corresponding 512MB memory
259 region: bits 0..3 -- for addresses 0x00000000..0x1fffffff,
260 bits 4..7 -- for addresses 0x20000000..0x3fffffff, and so on.
261
262 Cache attribute values are specific for the MMU type, so e.g.
263 for region protection MMUs: 2 is cache bypass, 4 is WB cached,
264 1 is WT cached, f is illegal. For ful MMU: bit 0 makes it executable,
265 bit 1 makes it writable, bits 2..3 meaning is 0: cache bypass,
266 1: WB cache, 2: WT cache, 3: special (c and e are illegal, f is
267 reserved).
268
Max Filippovd39af902016-04-11 21:14:17 +0300269config KSEG_PADDR
270 hex "Physical address of the KSEG mapping"
271 depends on INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX && MMU
272 default 0x00000000
273 help
274 This is the physical address where KSEG is mapped. Please refer to
275 the chosen KSEG layout help for the required address alignment.
276 Unpacked kernel image (including vectors) must be located completely
277 within KSEG.
278 Physical memory below this address is not available to linux.
279
280 If unsure, leave the default value here.
281
Max Filippova9f2fc62016-04-13 05:20:02 +0300282config KERNEL_LOAD_ADDRESS
283 hex "Kernel load address"
Max Filippov73a3eed2016-08-04 15:45:32 +0300284 default 0x60003000 if !MMU
285 default 0x00003000 if MMU && INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
286 default 0xd0003000 if MMU && !INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
Max Filippova9f2fc62016-04-13 05:20:02 +0300287 help
288 This is the address where the kernel is loaded.
289 It is virtual address for MMUv2 configurations and physical address
290 for all other configurations.
291
292 If unsure, leave the default value here.
293
294config VECTORS_OFFSET
295 hex "Kernel vectors offset"
296 default 0x00003000
297 help
298 This is the offset of the kernel image from the relocatable vectors
299 base.
300
301 If unsure, leave the default value here.
302
Max Filippovd39af902016-04-11 21:14:17 +0300303choice
304 prompt "KSEG layout"
305 depends on MMU
306 default XTENSA_KSEG_MMU_V2
307
308config XTENSA_KSEG_MMU_V2
309 bool "MMUv2: 128MB cached + 128MB uncached"
310 help
311 MMUv2 compatible kernel memory map: TLB way 5 maps 128MB starting
312 at KSEG_PADDR to 0xd0000000 with cache and to 0xd8000000
313 without cache.
314 KSEG_PADDR must be aligned to 128MB.
315
316config XTENSA_KSEG_256M
317 bool "256MB cached + 256MB uncached"
318 depends on INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
319 help
320 TLB way 6 maps 256MB starting at KSEG_PADDR to 0xb0000000
321 with cache and to 0xc0000000 without cache.
322 KSEG_PADDR must be aligned to 256MB.
323
324config XTENSA_KSEG_512M
325 bool "512MB cached + 512MB uncached"
326 depends on INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
327 help
328 TLB way 6 maps 512MB starting at KSEG_PADDR to 0xa0000000
329 with cache and to 0xc0000000 without cache.
330 KSEG_PADDR must be aligned to 256MB.
331
332endchoice
333
Max Filippov655591002014-02-04 02:17:09 +0400334config HIGHMEM
335 bool "High Memory Support"
Max Filippov8a9de052014-06-16 08:15:43 +0400336 depends on MMU
Max Filippov655591002014-02-04 02:17:09 +0400337 help
338 Linux can use the full amount of RAM in the system by
339 default. However, the default MMUv2 setup only maps the
340 lowermost 128 MB of memory linearly to the areas starting
341 at 0xd0000000 (cached) and 0xd8000000 (uncached).
342 When there are more than 128 MB memory in the system not
343 all of it can be "permanently mapped" by the kernel.
344 The physical memory that's not permanently mapped is called
345 "high memory".
346
347 If you are compiling a kernel which will never run on a
348 machine with more than 128 MB total physical RAM, answer
349 N here.
350
351 If unsure, say Y.
352
Max Filippov91842892014-08-07 03:32:30 +0400353config FAST_SYSCALL_XTENSA
354 bool "Enable fast atomic syscalls"
355 default n
356 help
357 fast_syscall_xtensa is a syscall that can make atomic operations
358 on UP kernel when processor has no s32c1i support.
359
360 This syscall is deprecated. It may have issues when called with
361 invalid arguments. It is provided only for backwards compatibility.
362 Only enable it if your userspace software requires it.
363
364 If unsure, say N.
365
366config FAST_SYSCALL_SPILL_REGISTERS
367 bool "Enable spill registers syscall"
368 default n
369 help
370 fast_syscall_spill_registers is a syscall that spills all active
371 register windows of a calling userspace task onto its stack.
372
373 This syscall is deprecated. It may have issues when called with
374 invalid arguments. It is provided only for backwards compatibility.
375 Only enable it if your userspace software requires it.
376
377 If unsure, say N.
378
Chris Zankel8e1a6dd2005-06-23 22:01:10 -0700379endmenu
380
Johannes Weiner35f9cd02009-03-04 16:21:28 +0100381config XTENSA_CALIBRATE_CCOUNT
382 def_bool n
383 help
384 On some platforms (XT2000, for example), the CPU clock rate can
385 vary. The frequency can be determined, however, by measuring
386 against a well known, fixed frequency, such as an UART oscillator.
387
388config SERIAL_CONSOLE
389 def_bool n
390
Johannes Weiner35f9cd02009-03-04 16:21:28 +0100391menu "Bus options"
392
393config PCI
394 bool "PCI support"
395 default y
396 help
397 Find out whether you have a PCI motherboard. PCI is the name of a
398 bus system, i.e. the way the CPU talks to the other stuff inside
399 your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
400 VESA. If you have PCI, say Y, otherwise N.
401
402source "drivers/pci/Kconfig"
403
Chris Zankel35e71f92009-04-16 00:25:39 -0700404endmenu
405
Chris Zankel8e1a6dd2005-06-23 22:01:10 -0700406menu "Platform options"
407
408choice
409 prompt "Xtensa System Type"
410 default XTENSA_PLATFORM_ISS
411
412config XTENSA_PLATFORM_ISS
413 bool "ISS"
Johannes Weiner35f9cd02009-03-04 16:21:28 +0100414 select XTENSA_CALIBRATE_CCOUNT
415 select SERIAL_CONSOLE
Chris Zankel8e1a6dd2005-06-23 22:01:10 -0700416 help
417 ISS is an acronym for Tensilica's Instruction Set Simulator.
418
419config XTENSA_PLATFORM_XT2000
420 bool "XT2000"
Max Filippov49645272014-06-16 08:25:43 +0400421 select HAVE_IDE
Chris Zankel8e1a6dd2005-06-23 22:01:10 -0700422 help
423 XT2000 is the name of Tensilica's feature-rich emulation platform.
424 This hardware is capable of running a full Linux distribution.
425
Max Filippov0d456ba2012-11-05 07:37:14 +0400426config XTENSA_PLATFORM_XTFPGA
427 bool "XTFPGA"
Max Filippov61e47e92014-10-04 04:44:04 +0400428 select ETHOC if ETHERNET
Max Filippov3de00482016-07-23 02:47:58 +0300429 select PLATFORM_WANT_DEFAULT_MEM if !MMU
Max Filippov0d456ba2012-11-05 07:37:14 +0400430 select SERIAL_CONSOLE
Max Filippov0d456ba2012-11-05 07:37:14 +0400431 select XTENSA_CALIBRATE_CCOUNT
432 help
433 XTFPGA is the name of Tensilica board family (LX60, LX110, LX200, ML605).
434 This hardware is capable of running a full Linux distribution.
435
Chris Zankel8e1a6dd2005-06-23 22:01:10 -0700436endchoice
437
438
Chris Zankel8e1a6dd2005-06-23 22:01:10 -0700439config XTENSA_CPU_CLOCK
440 int "CPU clock rate [MHz]"
441 depends on !XTENSA_CALIBRATE_CCOUNT
Johannes Weiner35f9cd02009-03-04 16:21:28 +0100442 default 16
Chris Zankel8e1a6dd2005-06-23 22:01:10 -0700443
444config GENERIC_CALIBRATE_DELAY
445 bool "Auto calibration of the BogoMIPS value"
Johannes Weiner35f9cd02009-03-04 16:21:28 +0100446 help
Chris Zankel82300bf2005-06-30 02:58:58 -0700447 The BogoMIPS value can easily be derived from the CPU frequency.
Chris Zankel8e1a6dd2005-06-23 22:01:10 -0700448
449config CMDLINE_BOOL
450 bool "Default bootloader kernel arguments"
451
452config CMDLINE
453 string "Initial kernel command string"
454 depends on CMDLINE_BOOL
455 default "console=ttyS0,38400 root=/dev/ram"
456 help
457 On some architectures (EBSA110 and CATS), there is currently no way
458 for the boot loader to pass arguments to the kernel. For these
459 architectures, you should supply some command-line options at build
460 time by entering them here. As a minimum, you should specify the
461 memory size and the root device (e.g., mem=64M root=/dev/nfs).
462
Max Filippovda844a82012-11-04 00:30:13 +0400463config USE_OF
464 bool "Flattened Device Tree support"
465 select OF
466 select OF_EARLY_FLATTREE
Max Filippov4e7c84e2016-07-19 00:37:05 +0300467 select OF_RESERVED_MEM
Max Filippovda844a82012-11-04 00:30:13 +0400468 help
469 Include support for flattened device tree machine descriptions.
470
471config BUILTIN_DTB
472 string "DTB to build into the kernel image"
473 depends on OF
474
Victor Prupisb6c7e872008-05-19 14:50:38 -0700475config BLK_DEV_SIMDISK
476 tristate "Host file-based simulated block device support"
477 default n
Max Filippov7a0684c2014-08-27 14:54:48 +0400478 depends on XTENSA_PLATFORM_ISS && BLOCK
Victor Prupisb6c7e872008-05-19 14:50:38 -0700479 help
480 Create block devices that map to files in the host file system.
481 Device binding to host file may be changed at runtime via proc
482 interface provided the device is not in use.
483
484config BLK_DEV_SIMDISK_COUNT
485 int "Number of host file-based simulated block devices"
486 range 1 10
487 depends on BLK_DEV_SIMDISK
488 default 2
489 help
490 This is the default minimal number of created block devices.
491 Kernel/module parameter 'simdisk_count' may be used to change this
492 value at runtime. More file names (but no more than 10) may be
493 specified as parameters, simdisk_count grows accordingly.
494
495config SIMDISK0_FILENAME
496 string "Host filename for the first simulated device"
497 depends on BLK_DEV_SIMDISK = y
498 default ""
499 help
500 Attach a first simdisk to a host file. Conventionally, this file
501 contains a root file system.
502
503config SIMDISK1_FILENAME
504 string "Host filename for the second simulated device"
505 depends on BLK_DEV_SIMDISK = y && BLK_DEV_SIMDISK_COUNT != 1
506 default ""
507 help
508 Another simulated disk in a host file for a buildroot-independent
509 storage.
510
Chris Zankel82300bf2005-06-30 02:58:58 -0700511source "mm/Kconfig"
512
Max Filippova9df9332015-11-02 17:51:02 +0300513config FORCE_MAX_ZONEORDER
514 int "Maximum zone order"
515 default "11"
516 help
517 The kernel memory allocator divides physically contiguous memory
518 blocks into "zones", where each zone is a power of two number of
519 pages. This option selects the largest power of two that the kernel
520 keeps in the memory allocator. If you need to allocate very large
521 blocks of physically contiguous memory, then you may need to
522 increase this value.
523
524 This config option is actually maximum order plus one. For example,
525 a value of 11 means that the largest free memory block is 2^10 pages.
526
Chris Zankel8e1a6dd2005-06-23 22:01:10 -0700527source "drivers/pcmcia/Kconfig"
528
Max Filippov3932b9c2014-10-04 04:45:39 +0400529config PLATFORM_WANT_DEFAULT_MEM
530 def_bool n
531
532config DEFAULT_MEM_START
Max Filippovaea731c2018-08-13 16:45:54 -0700533 hex
534 prompt "PAGE_OFFSET/PHYS_OFFSET" if !MMU && PLATFORM_WANT_DEFAULT_MEM
535 default 0x60000000 if PLATFORM_WANT_DEFAULT_MEM
536 default 0x00000000
Max Filippov3932b9c2014-10-04 04:45:39 +0400537 help
Max Filippovaea731c2018-08-13 16:45:54 -0700538 This is the base address used for both PAGE_OFFSET and PHYS_OFFSET
539 in noMMU configurations.
Max Filippov3932b9c2014-10-04 04:45:39 +0400540
541 If unsure, leave the default value here.
542
Max Filippov49490092015-02-27 06:28:00 +0300543config XTFPGA_LCD
544 bool "Enable XTFPGA LCD driver"
545 depends on XTENSA_PLATFORM_XTFPGA
546 default n
547 help
548 There's a 2x16 LCD on most of XTFPGA boards, kernel may output
549 progress messages there during bootup/shutdown. It may be useful
550 during board bringup.
551
552 If unsure, say N.
553
554config XTFPGA_LCD_BASE_ADDR
555 hex "XTFPGA LCD base address"
556 depends on XTFPGA_LCD
557 default "0x0d0c0000"
558 help
559 Base address of the LCD controller inside KIO region.
560 Different boards from XTFPGA family have LCD controller at different
561 addresses. Please consult prototyping user guide for your board for
562 the correct address. Wrong address here may lead to hardware lockup.
563
564config XTFPGA_LCD_8BIT_ACCESS
565 bool "Use 8-bit access to XTFPGA LCD"
566 depends on XTFPGA_LCD
567 default n
568 help
569 LCD may be connected with 4- or 8-bit interface, 8-bit access may
570 only be used with 8-bit interface. Please consult prototyping user
571 guide for your board for the correct interface width.
572
Chris Zankel8e1a6dd2005-06-23 22:01:10 -0700573endmenu
574
Matt LaPlantecab00892006-10-03 22:36:44 +0200575menu "Executable file formats"
Chris Zankel8e1a6dd2005-06-23 22:01:10 -0700576
Chris Zankel8e1a6dd2005-06-23 22:01:10 -0700577source "fs/Kconfig.binfmt"
578
579endmenu
580
Max Filippove00d8b22014-10-29 01:42:01 +0300581menu "Power management options"
582
583source "kernel/power/Kconfig"
584
585endmenu
586
Sam Ravnborgd5950b42005-07-11 21:03:49 -0700587source "net/Kconfig"
588
Chris Zankel8e1a6dd2005-06-23 22:01:10 -0700589source "drivers/Kconfig"
590
591source "fs/Kconfig"
592
Chris Zankel8e1a6dd2005-06-23 22:01:10 -0700593source "arch/xtensa/Kconfig.debug"
594
595source "security/Kconfig"
596
597source "crypto/Kconfig"
598
599source "lib/Kconfig"
600
601