Dinh Nguyen | 6631422 | 2012-07-18 16:07:18 -0600 | [diff] [blame] | 1 | /* |
Dinh Nguyen | 56c5c13 | 2013-04-11 10:55:26 -0500 | [diff] [blame] | 2 | * Copyright 2011-2012 Calxeda, Inc. |
| 3 | * Copyright (C) 2012-2013 Altera Corporation <www.altera.com> |
Dinh Nguyen | 6631422 | 2012-07-18 16:07:18 -0600 | [diff] [blame] | 4 | * |
| 5 | * This program is free software; you can redistribute it and/or modify |
| 6 | * it under the terms of the GNU General Public License as published by |
| 7 | * the Free Software Foundation; either version 2 of the License, or |
| 8 | * (at your option) any later version. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | * |
Dinh Nguyen | 56c5c13 | 2013-04-11 10:55:26 -0500 | [diff] [blame] | 15 | * Based from clk-highbank.c |
| 16 | * |
Dinh Nguyen | 6631422 | 2012-07-18 16:07:18 -0600 | [diff] [blame] | 17 | * You should have received a copy of the GNU General Public License |
| 18 | * along with this program. If not, see <http://www.gnu.org/licenses/>. |
| 19 | */ |
Dinh Nguyen | 56c5c13 | 2013-04-11 10:55:26 -0500 | [diff] [blame] | 20 | #include <linux/of.h> |
Dinh Nguyen | 6631422 | 2012-07-18 16:07:18 -0600 | [diff] [blame] | 21 | |
Steffen Trumtrar | 97259e9 | 2014-01-06 10:27:37 -0600 | [diff] [blame] | 22 | #include "clk.h" |
Dinh Nguyen | 56c5c13 | 2013-04-11 10:55:26 -0500 | [diff] [blame] | 23 | |
Dinh Nguyen | a30d27e | 2014-04-14 07:59:32 -0500 | [diff] [blame] | 24 | CLK_OF_DECLARE(socfpga_pll_clk, "altr,socfpga-pll-clock", socfpga_pll_init); |
| 25 | CLK_OF_DECLARE(socfpga_perip_clk, "altr,socfpga-perip-clk", socfpga_periph_init); |
| 26 | CLK_OF_DECLARE(socfpga_gate_clk, "altr,socfpga-gate-clk", socfpga_gate_init); |
Dinh Nguyen | 5343325 | 2015-05-19 22:22:42 -0500 | [diff] [blame] | 27 | CLK_OF_DECLARE(socfpga_a10_pll_clk, "altr,socfpga-a10-pll-clock", |
| 28 | socfpga_a10_pll_init); |
| 29 | CLK_OF_DECLARE(socfpga_a10_perip_clk, "altr,socfpga-a10-perip-clk", |
| 30 | socfpga_a10_periph_init); |
| 31 | CLK_OF_DECLARE(socfpga_a10_gate_clk, "altr,socfpga-a10-gate-clk", |
| 32 | socfpga_a10_gate_init); |