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review.shift-gmbh.com / SHIFTPHONES / mainline / linux / acc3329e04029f41f69d07a22d5c450094230213 / . / arch / arm / boot / dts / tegra114-roth.dts
blob: c7c6825f11fbb1b902b6f230eb62d8d8f88077a6 [file] [log] [blame]
Alexandre Courbote9d68f92014-05-12 17:26:49 +0900[diff] [blame]1/dts-v1/;
2
3#include <dt-bindings/input/input.h>
4#include "tegra114.dtsi"
5
6/ {
7 model = "NVIDIA SHIELD";
8 compatible = "nvidia,roth", "nvidia,tegra114";
9
10 chosen {
11 /* SHIELD's bootloader's arguments need to be overridden */
12 bootargs = "console=ttyS0,115200n8 console=tty1 gpt fbcon=rotate:1";
13 /* SHIELD's bootloader will place initrd at this address */
14 linux,initrd-start = <0x82000000>;
15 linux,initrd-end = <0x82800000>;
16 };
17
18 firmware {
19 trusted-foundations {
20 compatible = "tlm,trusted-foundations";
21 tlm,version-major = <2>;
22 tlm,version-minor = <8>;
23 };
24 };
25
26 memory {
27 /* memory >= 0x79600000 is reserved for firmware usage */
28 reg = <0x80000000 0x79600000>;
29 };
30
Alexandre Courbot2236927d2014-07-08 21:32:14 +0900[diff] [blame]31 host1x@50000000 {
32 dsi@54300000 {
33 status = "okay";
34
35 vdd-supply = <&vdd_1v2_ap>;
36
37 panel@0 {
38 compatible = "lg,lh500wx1-sd03";
39 reg = <0>;
40
41 power-supply = <&vdd_lcd>;
42 backlight = <&backlight>;
43 };
44 };
45 };
46
Alexandre Courbote9d68f92014-05-12 17:26:49 +0900[diff] [blame]47 pinmux@70000868 {
48 pinctrl-names = "default";
49 pinctrl-0 = <&state_default>;
50
51 state_default: pinmux {
52 clk1_out_pw4 {
53 nvidia,pins = "clk1_out_pw4";
54 nvidia,function = "extperiph1";
55 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
56 nvidia,tristate = <TEGRA_PIN_DISABLE>;
57 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
58 };
59 dap1_din_pn1 {
60 nvidia,pins = "dap1_din_pn1";
61 nvidia,function = "i2s0";
62 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
63 nvidia,tristate = <TEGRA_PIN_ENABLE>;
64 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
65 };
66 dap1_dout_pn2 {
67 nvidia,pins = "dap1_dout_pn2",
68 "dap1_fs_pn0",
69 "dap1_sclk_pn3";
70 nvidia,function = "i2s0";
71 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
72 nvidia,tristate = <TEGRA_PIN_DISABLE>;
73 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
74 };
75 dap2_din_pa4 {
76 nvidia,pins = "dap2_din_pa4";
77 nvidia,function = "i2s1";
78 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
79 nvidia,tristate = <TEGRA_PIN_ENABLE>;
80 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
81 };
82 dap2_dout_pa5 {
83 nvidia,pins = "dap2_dout_pa5",
84 "dap2_fs_pa2",
85 "dap2_sclk_pa3";
86 nvidia,function = "i2s1";
87 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
88 nvidia,tristate = <TEGRA_PIN_DISABLE>;
89 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
90 };
91 dap4_din_pp5 {
92 nvidia,pins = "dap4_din_pp5",
93 "dap4_dout_pp6",
94 "dap4_fs_pp4",
95 "dap4_sclk_pp7";
96 nvidia,function = "i2s3";
97 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
98 nvidia,tristate = <TEGRA_PIN_DISABLE>;
99 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
100 };
101 dvfs_pwm_px0 {
102 nvidia,pins = "dvfs_pwm_px0",
103 "dvfs_clk_px2";
104 nvidia,function = "cldvfs";
105 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
106 nvidia,tristate = <TEGRA_PIN_DISABLE>;
107 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
108 };
109 ulpi_clk_py0 {
110 nvidia,pins = "ulpi_clk_py0",
111 "ulpi_data0_po1",
112 "ulpi_data1_po2",
113 "ulpi_data2_po3",
114 "ulpi_data3_po4",
115 "ulpi_data4_po5",
116 "ulpi_data5_po6",
117 "ulpi_data6_po7",
118 "ulpi_data7_po0";
119 nvidia,function = "ulpi";
120 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
121 nvidia,tristate = <TEGRA_PIN_DISABLE>;
122 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
123 };
124 ulpi_dir_py1 {
125 nvidia,pins = "ulpi_dir_py1",
126 "ulpi_nxt_py2";
127 nvidia,function = "ulpi";
128 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
129 nvidia,tristate = <TEGRA_PIN_ENABLE>;
130 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
131 };
132 ulpi_stp_py3 {
133 nvidia,pins = "ulpi_stp_py3";
134 nvidia,function = "ulpi";
135 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
136 nvidia,tristate = <TEGRA_PIN_DISABLE>;
137 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
138 };
139 cam_i2c_scl_pbb1 {
140 nvidia,pins = "cam_i2c_scl_pbb1",
141 "cam_i2c_sda_pbb2";
142 nvidia,function = "i2c3";
143 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
144 nvidia,tristate = <TEGRA_PIN_DISABLE>;
145 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
146 nvidia,lock = <TEGRA_PIN_DISABLE>;
147 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
148 };
149 cam_mclk_pcc0 {
150 nvidia,pins = "cam_mclk_pcc0",
151 "pbb0";
152 nvidia,function = "vi_alt3";
153 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
154 nvidia,tristate = <TEGRA_PIN_DISABLE>;
155 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
156 nvidia,lock = <TEGRA_PIN_DISABLE>;
157 };
158 pbb4 {
159 nvidia,pins = "pbb4";
160 nvidia,function = "vgp4";
161 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
162 nvidia,tristate = <TEGRA_PIN_DISABLE>;
163 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
164 nvidia,lock = <TEGRA_PIN_DISABLE>;
165 };
166 gen2_i2c_scl_pt5 {
167 nvidia,pins = "gen2_i2c_scl_pt5",
168 "gen2_i2c_sda_pt6";
169 nvidia,function = "i2c2";
170 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
171 nvidia,tristate = <TEGRA_PIN_DISABLE>;
172 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
173 nvidia,lock = <TEGRA_PIN_DISABLE>;
174 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
175 };
176 gmi_a16_pj7 {
177 nvidia,pins = "gmi_a16_pj7",
178 "gmi_a19_pk7";
179 nvidia,function = "uartd";
180 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
181 nvidia,tristate = <TEGRA_PIN_DISABLE>;
182 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
183 };
184 gmi_a17_pb0 {
185 nvidia,pins = "gmi_a17_pb0",
186 "gmi_a18_pb1";
187 nvidia,function = "uartd";
188 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
189 nvidia,tristate = <TEGRA_PIN_ENABLE>;
190 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
191 };
192 gmi_ad5_pg5 {
193 nvidia,pins = "gmi_ad5_pg5",
194 "gmi_wr_n_pi0";
195 nvidia,function = "spi4";
196 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
197 nvidia,tristate = <TEGRA_PIN_DISABLE>;
198 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
199 };
200 gmi_ad6_pg6 {
201 nvidia,pins = "gmi_ad6_pg6",
202 "gmi_ad7_pg7";
203 nvidia,function = "spi4";
204 nvidia,pull = <TEGRA_PIN_PULL_UP>;
205 nvidia,tristate = <TEGRA_PIN_DISABLE>;
206 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
207 };
208 gmi_ad12_ph4 {
209 nvidia,pins = "gmi_ad12_ph4";
210 nvidia,function = "rsvd4";
211 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
212 nvidia,tristate = <TEGRA_PIN_DISABLE>;
213 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
214 };
215 gmi_cs6_n_pi13 {
216 nvidia,pins = "gmi_cs6_n_pi3";
217 nvidia,function = "nand";
218 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
219 nvidia,tristate = <TEGRA_PIN_ENABLE>;
220 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
221 };
222 gmi_ad9_ph1 {
223 nvidia,pins = "gmi_ad9_ph1";
224 nvidia,function = "pwm1";
225 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
226 nvidia,tristate = <TEGRA_PIN_DISABLE>;
227 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
228 };
229 gmi_cs1_n_pj2 {
230 nvidia,pins = "gmi_cs1_n_pj2",
231 "gmi_oe_n_pi1";
232 nvidia,function = "soc";
233 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
234 nvidia,tristate = <TEGRA_PIN_ENABLE>;
235 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
236 };
237 gmi_rst_n_pi4 {
238 nvidia,pins = "gmi_rst_n_pi4";
239 nvidia,function = "gmi";
240 nvidia,pull = <TEGRA_PIN_PULL_UP>;
241 nvidia,tristate = <TEGRA_PIN_DISABLE>;
242 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
243 };
244 gmi_iordy_pi5 {
245 nvidia,pins = "gmi_iordy_pi5";
246 nvidia,function = "gmi";
247 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
248 nvidia,tristate = <TEGRA_PIN_ENABLE>;
249 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
250 };
251 clk2_out_pw5 {
252 nvidia,pins = "clk2_out_pw5";
253 nvidia,function = "extperiph2";
254 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
255 nvidia,tristate = <TEGRA_PIN_DISABLE>;
256 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
257 };
258 sdmmc1_clk_pz0 {
259 nvidia,pins = "sdmmc1_clk_pz0";
260 nvidia,function = "sdmmc1";
261 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
262 nvidia,tristate = <TEGRA_PIN_DISABLE>;
Alexandre Courbot49f27472014-06-23 16:32:59 +0900[diff] [blame]263 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
Alexandre Courbote9d68f92014-05-12 17:26:49 +0900[diff] [blame]264 };
265 sdmmc1_cmd_pz1 {
266 nvidia,pins = "sdmmc1_cmd_pz1",
267 "sdmmc1_dat0_py7",
268 "sdmmc1_dat1_py6",
269 "sdmmc1_dat2_py5",
270 "sdmmc1_dat3_py4";
271 nvidia,function = "sdmmc1";
272 nvidia,pull = <TEGRA_PIN_PULL_UP>;
273 nvidia,tristate = <TEGRA_PIN_DISABLE>;
274 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
275 };
276 sdmmc3_clk_pa6 {
277 nvidia,pins = "sdmmc3_clk_pa6";
278 nvidia,function = "sdmmc3";
279 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
280 nvidia,tristate = <TEGRA_PIN_DISABLE>;
Alexandre Courbot49f27472014-06-23 16:32:59 +0900[diff] [blame]281 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
Alexandre Courbote9d68f92014-05-12 17:26:49 +0900[diff] [blame]282 };
283 sdmmc3_cmd_pa7 {
284 nvidia,pins = "sdmmc3_cmd_pa7",
285 "sdmmc3_dat0_pb7",
286 "sdmmc3_dat1_pb6",
287 "sdmmc3_dat2_pb5",
288 "sdmmc3_dat3_pb4",
289 "sdmmc3_cd_n_pv2",
290 "sdmmc3_clk_lb_out_pee4",
291 "sdmmc3_clk_lb_in_pee5";
292 nvidia,function = "sdmmc3";
293 nvidia,pull = <TEGRA_PIN_PULL_UP>;
294 nvidia,tristate = <TEGRA_PIN_DISABLE>;
295 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
296 };
297 kb_col4_pq4 {
298 nvidia,pins = "kb_col4_pq4";
299 nvidia,function = "sdmmc3";
300 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
301 nvidia,tristate = <TEGRA_PIN_ENABLE>;
302 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
303 };
304 sdmmc4_clk_pcc4 {
305 nvidia,pins = "sdmmc4_clk_pcc4";
306 nvidia,function = "sdmmc4";
307 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
308 nvidia,tristate = <TEGRA_PIN_DISABLE>;
Alexandre Courbot49f27472014-06-23 16:32:59 +0900[diff] [blame]309 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
Alexandre Courbote9d68f92014-05-12 17:26:49 +0900[diff] [blame]310 };
311 sdmmc4_cmd_pt7 {
312 nvidia,pins = "sdmmc4_cmd_pt7",
313 "sdmmc4_dat0_paa0",
314 "sdmmc4_dat1_paa1",
315 "sdmmc4_dat2_paa2",
316 "sdmmc4_dat3_paa3",
317 "sdmmc4_dat4_paa4",
318 "sdmmc4_dat5_paa5",
319 "sdmmc4_dat6_paa6",
320 "sdmmc4_dat7_paa7";
321 nvidia,function = "sdmmc4";
322 nvidia,pull = <TEGRA_PIN_PULL_UP>;
323 nvidia,tristate = <TEGRA_PIN_DISABLE>;
324 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
325 };
326 clk_32k_out_pa0 {
327 nvidia,pins = "clk_32k_out_pa0";
328 nvidia,function = "blink";
329 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
330 nvidia,tristate = <TEGRA_PIN_DISABLE>;
331 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
332 };
333 kb_col0_pq0 {
334 nvidia,pins = "kb_col0_pq0",
335 "kb_col1_pq1",
336 "kb_col2_pq2",
337 "kb_row0_pr0",
338 "kb_row1_pr1",
339 "kb_row2_pr2",
340 "kb_row8_ps0";
341 nvidia,function = "kbc";
342 nvidia,pull = <TEGRA_PIN_PULL_UP>;
343 nvidia,tristate = <TEGRA_PIN_DISABLE>;
344 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
345 };
346 kb_row7_pr7 {
347 nvidia,pins = "kb_row7_pr7";
348 nvidia,function = "rsvd2";
349 nvidia,pull = <TEGRA_PIN_PULL_UP>;
350 nvidia,tristate = <TEGRA_PIN_DISABLE>;
351 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
352 };
353 kb_row10_ps2 {
354 nvidia,pins = "kb_row10_ps2";
355 nvidia,function = "uarta";
356 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
357 nvidia,tristate = <TEGRA_PIN_ENABLE>;
358 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
359 };
360 kb_row9_ps1 {
361 nvidia,pins = "kb_row9_ps1";
362 nvidia,function = "uarta";
363 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
364 nvidia,tristate = <TEGRA_PIN_DISABLE>;
365 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
366 };
367 pwr_i2c_scl_pz6 {
368 nvidia,pins = "pwr_i2c_scl_pz6",
369 "pwr_i2c_sda_pz7";
370 nvidia,function = "i2cpwr";
371 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
372 nvidia,tristate = <TEGRA_PIN_DISABLE>;
373 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
374 nvidia,lock = <TEGRA_PIN_DISABLE>;
375 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
376 };
377 sys_clk_req_pz5 {
378 nvidia,pins = "sys_clk_req_pz5";
379 nvidia,function = "sysclk";
380 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
381 nvidia,tristate = <TEGRA_PIN_DISABLE>;
382 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
383 };
384 core_pwr_req {
385 nvidia,pins = "core_pwr_req";
386 nvidia,function = "pwron";
387 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
388 nvidia,tristate = <TEGRA_PIN_DISABLE>;
389 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
390 };
391 cpu_pwr_req {
392 nvidia,pins = "cpu_pwr_req";
393 nvidia,function = "cpu";
394 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
395 nvidia,tristate = <TEGRA_PIN_DISABLE>;
396 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
397 };
398 pwr_int_n {
399 nvidia,pins = "pwr_int_n";
400 nvidia,function = "pmi";
401 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
402 nvidia,tristate = <TEGRA_PIN_ENABLE>;
403 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
404 };
405 reset_out_n {
406 nvidia,pins = "reset_out_n";
407 nvidia,function = "reset_out_n";
408 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
409 nvidia,tristate = <TEGRA_PIN_DISABLE>;
410 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
411 };
412 clk3_out_pee0 {
413 nvidia,pins = "clk3_out_pee0";
414 nvidia,function = "extperiph3";
415 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
416 nvidia,tristate = <TEGRA_PIN_DISABLE>;
417 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
418 };
419 gen1_i2c_scl_pc4 {
420 nvidia,pins = "gen1_i2c_scl_pc4",
421 "gen1_i2c_sda_pc5";
422 nvidia,function = "i2c1";
423 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
424 nvidia,tristate = <TEGRA_PIN_DISABLE>;
425 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
426 nvidia,lock = <TEGRA_PIN_DISABLE>;
427 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
428 };
429 uart2_cts_n_pj5 {
430 nvidia,pins = "uart2_cts_n_pj5";
431 nvidia,function = "uartb";
432 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
433 nvidia,tristate = <TEGRA_PIN_ENABLE>;
434 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
435 };
436 uart2_rts_n_pj6 {
437 nvidia,pins = "uart2_rts_n_pj6";
438 nvidia,function = "uartb";
439 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
440 nvidia,tristate = <TEGRA_PIN_DISABLE>;
441 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
442 };
443 uart2_rxd_pc3 {
444 nvidia,pins = "uart2_rxd_pc3";
445 nvidia,function = "irda";
446 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
447 nvidia,tristate = <TEGRA_PIN_ENABLE>;
448 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
449 };
450 uart2_txd_pc2 {
451 nvidia,pins = "uart2_txd_pc2";
452 nvidia,function = "irda";
453 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
454 nvidia,tristate = <TEGRA_PIN_DISABLE>;
455 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
456 };
457 uart3_cts_n_pa1 {
458 nvidia,pins = "uart3_cts_n_pa1",
459 "uart3_rxd_pw7";
460 nvidia,function = "uartc";
461 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
462 nvidia,tristate = <TEGRA_PIN_ENABLE>;
463 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
464 };
465 uart3_rts_n_pc0 {
466 nvidia,pins = "uart3_rts_n_pc0",
467 "uart3_txd_pw6";
468 nvidia,function = "uartc";
469 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
470 nvidia,tristate = <TEGRA_PIN_DISABLE>;
471 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
472 };
473 owr {
474 nvidia,pins = "owr";
475 nvidia,function = "owr";
476 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
477 nvidia,tristate = <TEGRA_PIN_DISABLE>;
478 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
479 };
480 hdmi_cec_pee3 {
481 nvidia,pins = "hdmi_cec_pee3";
482 nvidia,function = "cec";
483 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
484 nvidia,tristate = <TEGRA_PIN_DISABLE>;
485 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
486 nvidia,lock = <TEGRA_PIN_DISABLE>;
487 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
488 };
489 ddc_scl_pv4 {
490 nvidia,pins = "ddc_scl_pv4",
491 "ddc_sda_pv5";
492 nvidia,function = "i2c4";
493 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
494 nvidia,tristate = <TEGRA_PIN_DISABLE>;
495 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
496 nvidia,lock = <TEGRA_PIN_DISABLE>;
497 nvidia,rcv-sel = <TEGRA_PIN_ENABLE>;
498 };
499 spdif_in_pk6 {
500 nvidia,pins = "spdif_in_pk6";
501 nvidia,function = "usb";
502 nvidia,pull = <TEGRA_PIN_PULL_UP>;
503 nvidia,tristate = <TEGRA_PIN_DISABLE>;
504 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
505 nvidia,lock = <TEGRA_PIN_DISABLE>;
506 };
507 usb_vbus_en0_pn4 {
508 nvidia,pins = "usb_vbus_en0_pn4";
509 nvidia,function = "usb";
510 nvidia,pull = <TEGRA_PIN_PULL_UP>;
511 nvidia,tristate = <TEGRA_PIN_DISABLE>;
512 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
513 nvidia,lock = <TEGRA_PIN_DISABLE>;
514 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
515 };
516 gpio_x6_aud_px6 {
517 nvidia,pins = "gpio_x6_aud_px6";
518 nvidia,function = "spi6";
519 nvidia,pull = <TEGRA_PIN_PULL_UP>;
520 nvidia,tristate = <TEGRA_PIN_ENABLE>;
521 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
522 };
523 gpio_x1_aud_px1 {
524 nvidia,pins = "gpio_x1_aud_px1";
525 nvidia,function = "rsvd2";
526 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
527 nvidia,tristate = <TEGRA_PIN_DISABLE>;
528 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
529 };
530 gpio_x7_aud_px7 {
531 nvidia,pins = "gpio_x7_aud_px7";
532 nvidia,function = "rsvd1";
533 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
534 nvidia,tristate = <TEGRA_PIN_DISABLE>;
535 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
536 };
537 gmi_adv_n_pk0 {
538 nvidia,pins = "gmi_adv_n_pk0";
539 nvidia,function = "gmi";
540 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
541 nvidia,tristate = <TEGRA_PIN_ENABLE>;
542 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
543 };
544 gmi_cs0_n_pj0 {
545 nvidia,pins = "gmi_cs0_n_pj0";
546 nvidia,function = "gmi";
547 nvidia,pull = <TEGRA_PIN_PULL_UP>;
548 nvidia,tristate = <TEGRA_PIN_DISABLE>;
549 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
550 };
551 pu3 {
552 nvidia,pins = "pu3";
553 nvidia,function = "pwm0";
554 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
555 nvidia,tristate = <TEGRA_PIN_DISABLE>;
556 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
557 };
558 gpio_x4_aud_px4 {
559 nvidia,pins = "gpio_x4_aud_px4",
560 "gpio_x5_aud_px5";
561 nvidia,function = "rsvd1";
562 nvidia,pull = <TEGRA_PIN_PULL_UP>;
563 nvidia,tristate = <TEGRA_PIN_DISABLE>;
564 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
565 };
566 gpio_x3_aud_px3 {
567 nvidia,pins = "gpio_x3_aud_px3";
568 nvidia,function = "rsvd4";
569 nvidia,pull = <TEGRA_PIN_PULL_UP>;
570 nvidia,tristate = <TEGRA_PIN_DISABLE>;
571 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
572 };
573 gpio_w2_aud_pw2 {
574 nvidia,pins = "gpio_w2_aud_pw2";
575 nvidia,function = "rsvd2";
576 nvidia,pull = <TEGRA_PIN_PULL_UP>;
577 nvidia,tristate = <TEGRA_PIN_DISABLE>;
578 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
579 };
580 gpio_w3_aud_pw3 {
581 nvidia,pins = "gpio_w3_aud_pw3";
582 nvidia,function = "spi6";
583 nvidia,pull = <TEGRA_PIN_PULL_UP>;
584 nvidia,tristate = <TEGRA_PIN_DISABLE>;
585 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
586 };
587 dap3_fs_pp0 {
588 nvidia,pins = "dap3_fs_pp0",
589 "dap3_din_pp1",
590 "dap3_dout_pp2",
591 "dap3_sclk_pp3";
592 nvidia,function = "i2s2";
593 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
594 nvidia,tristate = <TEGRA_PIN_DISABLE>;
595 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
596 };
597 pv0 {
598 nvidia,pins = "pv0";
599 nvidia,function = "rsvd4";
600 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
601 nvidia,tristate = <TEGRA_PIN_DISABLE>;
602 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
603 };
604 pv1 {
605 nvidia,pins = "pv1";
606 nvidia,function = "rsvd1";
607 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
608 nvidia,tristate = <TEGRA_PIN_DISABLE>;
609 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
610 };
611 pbb3 {
612 nvidia,pins = "pbb3",
613 "pbb5",
614 "pbb6",
615 "pbb7";
616 nvidia,function = "rsvd4";
617 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
618 nvidia,tristate = <TEGRA_PIN_DISABLE>;
619 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
620 };
621 pcc1 {
622 nvidia,pins = "pcc1",
623 "pcc2";
624 nvidia,function = "rsvd4";
625 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
626 nvidia,tristate = <TEGRA_PIN_DISABLE>;
627 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
628 };
629 gmi_ad0_pg0 {
630 nvidia,pins = "gmi_ad0_pg0",
631 "gmi_ad1_pg1";
632 nvidia,function = "gmi";
633 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
634 nvidia,tristate = <TEGRA_PIN_DISABLE>;
635 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
636 };
637 gmi_ad10_ph2 {
638 nvidia,pins = "gmi_ad10_ph2",
639 "gmi_ad12_ph4",
640 "gmi_ad15_ph7",
641 "gmi_cs3_n_pk4";
642 nvidia,function = "gmi";
643 nvidia,pull = <TEGRA_PIN_PULL_UP>;
644 nvidia,tristate = <TEGRA_PIN_DISABLE>;
645 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
646 };
647 gmi_ad11_ph3 {
648 nvidia,pins = "gmi_ad11_ph3",
649 "gmi_ad13_ph5",
650 "gmi_ad8_ph0",
651 "gmi_clk_pk1",
652 "gmi_cs2_n_pk3";
653 nvidia,function = "gmi";
654 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
655 nvidia,tristate = <TEGRA_PIN_DISABLE>;
656 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
657 };
658 gmi_ad14_ph6 {
659 nvidia,pins = "gmi_ad14_ph6",
660 "gmi_cs0_n_pj0",
661 "gmi_cs4_n_pk2",
662 "gmi_cs7_n_pi6",
663 "gmi_dqs_p_pj3",
664 "gmi_wp_n_pc7";
665 nvidia,function = "gmi";
666 nvidia,pull = <TEGRA_PIN_PULL_UP>;
667 nvidia,tristate = <TEGRA_PIN_DISABLE>;
668 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
669 };
670 gmi_ad2_pg2 {
671 nvidia,pins = "gmi_ad2_pg2",
672 "gmi_ad3_pg3";
673 nvidia,function = "gmi";
674 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
675 nvidia,tristate = <TEGRA_PIN_DISABLE>;
676 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
677 };
678 sdmmc1_wp_n_pv3 {
679 nvidia,pins = "sdmmc1_wp_n_pv3";
680 nvidia,function = "spi4";
681 nvidia,pull = <TEGRA_PIN_PULL_UP>;
682 nvidia,tristate = <TEGRA_PIN_DISABLE>;
683 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
684 };
685 clk2_req_pcc5 {
686 nvidia,pins = "clk2_req_pcc5";
687 nvidia,function = "rsvd4";
688 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
689 nvidia,tristate = <TEGRA_PIN_DISABLE>;
690 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
691 };
692 kb_col3_pq3 {
693 nvidia,pins = "kb_col3_pq3";
694 nvidia,function = "pwm2";
695 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
696 nvidia,tristate = <TEGRA_PIN_DISABLE>;
697 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
698 };
699 kb_col5_pq5 {
700 nvidia,pins = "kb_col5_pq5";
701 nvidia,function = "kbc";
702 nvidia,pull = <TEGRA_PIN_PULL_UP>;
703 nvidia,tristate = <TEGRA_PIN_DISABLE>;
704 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
705 };
706 kb_col6_pq6 {
707 nvidia,pins = "kb_col6_pq6",
708 "kb_col7_pq7";
709 nvidia,function = "kbc";
710 nvidia,pull = <TEGRA_PIN_PULL_UP>;
711 nvidia,tristate = <TEGRA_PIN_DISABLE>;
712 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
713 };
714 kb_row3_pr3 {
715 nvidia,pins = "kb_row3_pr3",
716 "kb_row4_pr4",
717 "kb_row6_pr6";
718 nvidia,function = "kbc";
719 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
720 nvidia,tristate = <TEGRA_PIN_DISABLE>;
721 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
722 };
723 clk3_req_pee1 {
724 nvidia,pins = "clk3_req_pee1";
725 nvidia,function = "rsvd4";
726 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
727 nvidia,tristate = <TEGRA_PIN_DISABLE>;
728 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
729 };
730 pu2 {
731 nvidia,pins = "pu2";
732 nvidia,function = "rsvd1";
733 nvidia,pull = <TEGRA_PIN_PULL_UP>;
734 nvidia,tristate = <TEGRA_PIN_DISABLE>;
735 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
736 };
737 hdmi_int_pn7 {
738 nvidia,pins = "hdmi_int_pn7";
739 nvidia,function = "rsvd1";
740 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
741 nvidia,tristate = <TEGRA_PIN_DISABLE>;
742 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
743 };
744
745 drive_sdio1 {
746 nvidia,pins = "drive_sdio1";
747 nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
748 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
Alexandre Courbote9d68f92014-05-12 17:26:49 +0900[diff] [blame]749 nvidia,pull-down-strength = <36>;
750 nvidia,pull-up-strength = <20>;
751 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOW>;
752 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOW>;
753 };
754 drive_sdio3 {
755 nvidia,pins = "drive_sdio3";
756 nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
757 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
Alexandre Courbote9d68f92014-05-12 17:26:49 +0900[diff] [blame]758 nvidia,pull-down-strength = <36>;
759 nvidia,pull-up-strength = <20>;
760 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
761 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
762 };
763 drive_gma {
764 nvidia,pins = "drive_gma";
765 nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
766 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
Alexandre Courbote9d68f92014-05-12 17:26:49 +0900[diff] [blame]767 nvidia,pull-down-strength = <2>;
768 nvidia,pull-up-strength = <2>;
769 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
770 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
Alexandre Courbote9d68f92014-05-12 17:26:49 +0900[diff] [blame]771 };
772 };
773 };
774
775 /* Usable on reworked devices only */
776 serial@70006300 {
777 status = "okay";
778 };
779
780 pwm@7000a000 {
781 status = "okay";
782 };
783
784 i2c@7000d000 {
785 status = "okay";
786 clock-frequency = <400000>;
787
788 regulator@43 {
789 compatible = "ti,tps51632";
790 reg = <0x43>;
791 regulator-name = "vdd-cpu";
792 regulator-min-microvolt = <500000>;
793 regulator-max-microvolt = <1520000>;
794 regulator-always-on;
795 regulator-boot-on;
796 };
797
798 palmas: pmic@58 {
799 compatible = "ti,palmas";
800 reg = <0x58>;
801 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_LOW>;
802
803 #interrupt-cells = <2>;
804 interrupt-controller;
805
806 ti,system-power-controller;
807
808 palmas_gpio: gpio {
809 compatible = "ti,palmas-gpio";
810 gpio-controller;
811 #gpio-cells = <2>;
812 };
813
814 pmic {
815 compatible = "ti,tps65913-pmic", "ti,palmas-pmic";
816
817 regulators {
818 smps12 {
819 regulator-name = "vdd-ddr";
820 regulator-min-microvolt = <1200000>;
821 regulator-max-microvolt = <1500000>;
822 regulator-always-on;
823 regulator-boot-on;
824 };
825
826 vdd_1v8: smps3 {
827 regulator-name = "vdd-1v8";
828 regulator-min-microvolt = <1800000>;
829 regulator-max-microvolt = <1800000>;
Alexandre Courbote9d68f92014-05-12 17:26:49 +0900[diff] [blame]830 regulator-boot-on;
831 };
832
833 smps457 {
834 regulator-name = "vdd-soc";
835 regulator-min-microvolt = <900000>;
836 regulator-max-microvolt = <1400000>;
837 regulator-always-on;
838 regulator-boot-on;
839 };
840
841 smps8 {
842 regulator-name = "avdd-pll-1v05";
843 regulator-min-microvolt = <1050000>;
844 regulator-max-microvolt = <1050000>;
845 regulator-always-on;
846 regulator-boot-on;
847 };
848
849 smps9 {
850 regulator-name = "vdd-2v85-emmc";
851 regulator-min-microvolt = <2800000>;
852 regulator-max-microvolt = <2800000>;
853 regulator-always-on;
854 };
855
856 smps10_out1 {
857 regulator-name = "vdd-fan";
858 regulator-min-microvolt = <5000000>;
859 regulator-max-microvolt = <5000000>;
860 regulator-always-on;
861 regulator-boot-on;
862 };
863
864 smps10_out2 {
865 regulator-name = "vdd-5v0-sys";
866 regulator-min-microvolt = <5000000>;
867 regulator-max-microvolt = <5000000>;
868 regulator-always-on;
869 regulator-boot-on;
870 };
871
872 ldo2 {
873 regulator-name = "vdd-2v8-display";
874 regulator-min-microvolt = <2800000>;
875 regulator-max-microvolt = <2800000>;
Alexandre Courbot2236927d2014-07-08 21:32:14 +0900[diff] [blame]876 regulator-always-on;
Alexandre Courbote9d68f92014-05-12 17:26:49 +0900[diff] [blame]877 regulator-boot-on;
878 };
879
Alexandre Courbot2236927d2014-07-08 21:32:14 +0900[diff] [blame]880 vdd_1v2_ap: ldo3 {
Alexandre Courbote9d68f92014-05-12 17:26:49 +0900[diff] [blame]881 regulator-name = "avdd-1v2";
882 regulator-min-microvolt = <1200000>;
883 regulator-max-microvolt = <1200000>;
884 regulator-always-on;
885 regulator-boot-on;
886 };
887
888 ldo4 {
889 regulator-name = "vpp-fuse";
890 regulator-min-microvolt = <1800000>;
891 regulator-max-microvolt = <1800000>;
892 };
893
894 ldo5 {
895 regulator-name = "avdd-hdmi-pll";
896 regulator-min-microvolt = <1200000>;
897 regulator-max-microvolt = <1200000>;
898 };
899
900 ldo6 {
901 regulator-name = "vdd-sensor-2v8";
902 regulator-min-microvolt = <2850000>;
903 regulator-max-microvolt = <2850000>;
904 };
905
906 ldo8 {
907 regulator-name = "vdd-rtc";
908 regulator-min-microvolt = <1100000>;
909 regulator-max-microvolt = <1100000>;
910 regulator-always-on;
911 regulator-boot-on;
912 ti,enable-ldo8-tracking;
913 };
914
915 vddio_sdmmc3: ldo9 {
916 regulator-name = "vddio-sdmmc3";
917 regulator-min-microvolt = <1800000>;
918 regulator-max-microvolt = <3300000>;
919 regulator-always-on;
920 regulator-boot-on;
921 };
922
923 ldousb {
924 regulator-name = "avdd-usb-hdmi";
925 regulator-min-microvolt = <3300000>;
926 regulator-max-microvolt = <3300000>;
927 regulator-always-on;
928 regulator-boot-on;
929 };
930
931 vdd_3v3_sys: regen1 {
932 regulator-name = "rail-3v3";
933 regulator-max-microvolt = <3300000>;
934 regulator-always-on;
935 regulator-boot-on;
936 };
937
938 regen2 {
939 regulator-name = "rail-5v0";
940 regulator-max-microvolt = <5000000>;
941 regulator-always-on;
942 regulator-boot-on;
943 };
944
945 };
946 };
947
948 rtc {
949 compatible = "ti,palmas-rtc";
950 interrupt-parent = <&palmas>;
951 interrupts = <8 0>;
952 };
953
954 };
955 };
956
957 pmc@7000e400 {
958 nvidia,invert-interrupt;
959 };
960
961 /* SD card */
962 sdhci@78000400 {
963 status = "okay";
964 bus-width = <4>;
965 vmmc-supply = <&vddio_sdmmc3>;
966 cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
967 power-gpios = <&gpio TEGRA_GPIO(H, 0) GPIO_ACTIVE_HIGH>;
968 };
969
970 /* eMMC */
971 sdhci@78000600 {
972 status = "okay";
973 bus-width = <8>;
974 vmmc-supply = <&vdd_1v8>;
975 non-removable;
976 };
977
978 /* External USB port (must be powered) */
979 usb@7d000000 {
980 status = "okay";
981 };
982
983 usb-phy@7d000000 {
984 status = "okay";
985 nvidia,xcvr-setup = <7>;
986 nvidia,xcvr-lsfslew = <2>;
987 nvidia,xcvr-lsrslew = <2>;
988 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
989 /* Should be changed to "otg" once we have vbus_supply */
990 /* As of now, USB devices need to be powered externally */
991 dr_mode = "host";
992 };
993
994 /* SHIELD controller */
995 usb@7d008000 {
996 status = "okay";
997 };
998
999 usb-phy@7d008000 {
1000 status = "okay";
1001 nvidia,xcvr-setup = <7>;
1002 nvidia,xcvr-lsfslew = <2>;
1003 nvidia,xcvr-lsrslew = <2>;
1004 };
1005
1006 backlight: backlight {
1007 compatible = "pwm-backlight";
1008 pwms = <&pwm 1 40000>;
1009
1010 brightness-levels = <0 4 8 16 32 64 128 255>;
1011 default-brightness-level = <6>;
1012
1013 power-supply = <&lcd_bl_en>;
1014 enable-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
1015 };
1016
1017 clocks {
1018 compatible = "simple-bus";
1019 #address-cells = <1>;
1020 #size-cells = <0>;
1021
1022 clk32k_in: clock {
1023 compatible = "fixed-clock";
1024 reg=<0>;
1025 #clock-cells = <0>;
1026 clock-frequency = <32768>;
1027 };
1028 };
1029
1030 gpio-keys {
1031 compatible = "gpio-keys";
1032
1033 back {
1034 label = "Back";
1035 gpios = <&gpio TEGRA_GPIO(R, 2) GPIO_ACTIVE_LOW>;
1036 linux,code = <KEY_BACK>;
1037 };
1038
1039 home {
1040 label = "Home";
1041 gpios = <&gpio TEGRA_GPIO(R, 1) GPIO_ACTIVE_LOW>;
1042 linux,code = <KEY_HOME>;
1043 };
1044
1045 power {
1046 label = "Power";
1047 gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>;
1048 linux,code = <KEY_POWER>;
1049 gpio-key,wakeup;
1050 };
1051 };
1052
1053 regulators {
1054 compatible = "simple-bus";
1055 #address-cells = <1>;
1056 #size-cells = <0>;
1057
1058 lcd_bl_en: regulator@0 {
1059 compatible = "regulator-fixed";
1060 reg = <0>;
1061 regulator-name = "lcd_bl_en";
1062 regulator-min-microvolt = <5000000>;
1063 regulator-max-microvolt = <5000000>;
1064 regulator-boot-on;
1065 };
1066
Alexandre Courbot2236927d2014-07-08 21:32:14 +0900[diff] [blame]1067 vdd_lcd: regulator@1 {
Alexandre Courbote9d68f92014-05-12 17:26:49 +0900[diff] [blame]1068 compatible = "regulator-fixed";
1069 reg = <1>;
1070 regulator-name = "vdd_lcd_1v8";
1071 regulator-min-microvolt = <1800000>;
1072 regulator-max-microvolt = <1800000>;
1073 vin-supply = <&vdd_1v8>;
1074 enable-active-high;
1075 gpio = <&gpio TEGRA_GPIO(U, 4) GPIO_ACTIVE_HIGH>;
1076 regulator-boot-on;
1077 };
1078
1079 regulator@2 {
1080 compatible = "regulator-fixed";
1081 reg = <2>;
1082 regulator-name = "vdd_1v8_ts";
1083 regulator-min-microvolt = <1800000>;
1084 regulator-max-microvolt = <1800000>;
1085 gpio = <&gpio TEGRA_GPIO(K, 3) GPIO_ACTIVE_LOW>;
1086 regulator-boot-on;
1087 };
1088
1089 regulator@3 {
1090 compatible = "regulator-fixed";
1091 reg = <3>;
1092 regulator-name = "vdd_3v3_ts";
1093 regulator-min-microvolt = <3300000>;
1094 regulator-max-microvolt = <3300000>;
1095 enable-active-high;
1096 gpio = <&gpio TEGRA_GPIO(H, 5) GPIO_ACTIVE_HIGH>;
1097 regulator-boot-on;
1098 };
1099
1100 regulator@4 {
1101 compatible = "regulator-fixed";
1102 reg = <4>;
1103 regulator-name = "vdd_1v8_com";
1104 regulator-min-microvolt = <1800000>;
1105 regulator-max-microvolt = <1800000>;
1106 vin-supply = <&vdd_1v8>;
1107 enable-active-high;
1108 gpio = <&gpio TEGRA_GPIO(X, 1) GPIO_ACTIVE_HIGH>;
1109 regulator-boot-on;
1110 };
1111
1112 regulator@5 {
1113 compatible = "regulator-fixed";
1114 reg = <5>;
1115 regulator-name = "vdd_3v3_com";
1116 regulator-min-microvolt = <3300000>;
1117 regulator-max-microvolt = <3300000>;
1118 vin-supply = <&vdd_3v3_sys>;
1119 enable-active-high;
1120 gpio = <&gpio TEGRA_GPIO(X, 7) GPIO_ACTIVE_HIGH>;
1121 regulator-always-on;
1122 regulator-boot-on;
1123 };
1124 };
1125};