blob: 3c4996b073ca2507c9471ac2f75031ad49817347 [file] [log] [blame]
Bjorn Helgaas8cfab3c2018-01-26 12:50:27 -06001// SPDX-License-Identifier: GPL-2.0
Jake Oshins4daace02016-02-16 21:56:23 +00002/*
3 * Copyright (c) Microsoft Corporation.
4 *
5 * Author:
6 * Jake Oshins <jakeo@microsoft.com>
7 *
8 * This driver acts as a paravirtual front-end for PCI Express root buses.
9 * When a PCI Express function (either an entire device or an SR-IOV
10 * Virtual Function) is being passed through to the VM, this driver exposes
11 * a new bus to the guest VM. This is modeled as a root PCI bus because
12 * no bridges are being exposed to the VM. In fact, with a "Generation 2"
13 * VM within Hyper-V, there may seem to be no PCI bus at all in the VM
14 * until a device as been exposed using this driver.
15 *
16 * Each root PCI bus has its own PCI domain, which is called "Segment" in
17 * the PCI Firmware Specifications. Thus while each device passed through
18 * to the VM using this front-end will appear at "device 0", the domain will
19 * be unique. Typically, each bus will have one PCI function on it, though
20 * this driver does support more than one.
21 *
22 * In order to map the interrupts from the device through to the guest VM,
23 * this driver also implements an IRQ Domain, which handles interrupts (either
24 * MSI or MSI-X) associated with the functions on the bus. As interrupts are
25 * set up, torn down, or reaffined, this driver communicates with the
26 * underlying hypervisor to adjust the mappings in the I/O MMU so that each
27 * interrupt will be delivered to the correct virtual processor at the right
28 * vector. This driver does not support level-triggered (line-based)
29 * interrupts, and will report that the Interrupt Line register in the
30 * function's configuration space is zero.
31 *
32 * The rest of this driver mostly maps PCI concepts onto underlying Hyper-V
33 * facilities. For instance, the configuration space of a function exposed
34 * by Hyper-V is mapped into a single page of memory space, and the
35 * read and write handlers for config space must be aware of this mechanism.
36 * Similarly, device setup and teardown involves messages sent to and from
37 * the PCI back-end driver in Hyper-V.
Jake Oshins4daace02016-02-16 21:56:23 +000038 */
39
40#include <linux/kernel.h>
41#include <linux/module.h>
42#include <linux/pci.h>
Stephen Hemminger80bfeeb2017-07-31 16:48:29 -070043#include <linux/delay.h>
Jake Oshins4daace02016-02-16 21:56:23 +000044#include <linux/semaphore.h>
45#include <linux/irqdomain.h>
46#include <asm/irqdomain.h>
47#include <asm/apic.h>
Nicolai Stange447ae312018-07-29 12:15:33 +020048#include <linux/irq.h>
Jake Oshins4daace02016-02-16 21:56:23 +000049#include <linux/msi.h>
50#include <linux/hyperv.h>
Elena Reshetova24196f02017-04-18 09:02:48 -050051#include <linux/refcount.h>
Jake Oshins4daace02016-02-16 21:56:23 +000052#include <asm/mshyperv.h>
53
54/*
55 * Protocol versions. The low word is the minor version, the high word the
56 * major version.
57 */
58
Jork Loeserb1db7e72017-05-24 13:41:27 -070059#define PCI_MAKE_VERSION(major, minor) ((u32)(((major) << 16) | (minor)))
Jake Oshins4daace02016-02-16 21:56:23 +000060#define PCI_MAJOR_VERSION(version) ((u32)(version) >> 16)
61#define PCI_MINOR_VERSION(version) ((u32)(version) & 0xff)
62
Jork Loeserb1db7e72017-05-24 13:41:27 -070063enum pci_protocol_version_t {
64 PCI_PROTOCOL_VERSION_1_1 = PCI_MAKE_VERSION(1, 1), /* Win10 */
Jork Loeser7dcf90e2017-05-24 13:41:28 -070065 PCI_PROTOCOL_VERSION_1_2 = PCI_MAKE_VERSION(1, 2), /* RS1 */
Jake Oshins4daace02016-02-16 21:56:23 +000066};
67
K. Y. Srinivasan433fcf62017-03-24 11:07:21 -070068#define CPU_AFFINITY_ALL -1ULL
Jork Loeserb1db7e72017-05-24 13:41:27 -070069
70/*
71 * Supported protocol versions in the order of probing - highest go
72 * first.
73 */
74static enum pci_protocol_version_t pci_protocol_versions[] = {
Jork Loeser7dcf90e2017-05-24 13:41:28 -070075 PCI_PROTOCOL_VERSION_1_2,
Jork Loeserb1db7e72017-05-24 13:41:27 -070076 PCI_PROTOCOL_VERSION_1_1,
77};
78
79/*
80 * Protocol version negotiated by hv_pci_protocol_negotiation().
81 */
82static enum pci_protocol_version_t pci_protocol_version;
83
Jake Oshins4daace02016-02-16 21:56:23 +000084#define PCI_CONFIG_MMIO_LENGTH 0x2000
85#define CFG_PAGE_OFFSET 0x1000
86#define CFG_PAGE_SIZE (PCI_CONFIG_MMIO_LENGTH - CFG_PAGE_OFFSET)
87
88#define MAX_SUPPORTED_MSI_MESSAGES 0x400
89
Jork Loeserb1db7e72017-05-24 13:41:27 -070090#define STATUS_REVISION_MISMATCH 0xC0000059
91
Stephen Hemmingera15f2c082018-09-14 12:54:56 -070092/* space for 32bit serial number as string */
93#define SLOT_NAME_SIZE 11
94
Jake Oshins4daace02016-02-16 21:56:23 +000095/*
96 * Message Types
97 */
98
99enum pci_message_type {
100 /*
101 * Version 1.1
102 */
103 PCI_MESSAGE_BASE = 0x42490000,
104 PCI_BUS_RELATIONS = PCI_MESSAGE_BASE + 0,
105 PCI_QUERY_BUS_RELATIONS = PCI_MESSAGE_BASE + 1,
106 PCI_POWER_STATE_CHANGE = PCI_MESSAGE_BASE + 4,
107 PCI_QUERY_RESOURCE_REQUIREMENTS = PCI_MESSAGE_BASE + 5,
108 PCI_QUERY_RESOURCE_RESOURCES = PCI_MESSAGE_BASE + 6,
109 PCI_BUS_D0ENTRY = PCI_MESSAGE_BASE + 7,
110 PCI_BUS_D0EXIT = PCI_MESSAGE_BASE + 8,
111 PCI_READ_BLOCK = PCI_MESSAGE_BASE + 9,
112 PCI_WRITE_BLOCK = PCI_MESSAGE_BASE + 0xA,
113 PCI_EJECT = PCI_MESSAGE_BASE + 0xB,
114 PCI_QUERY_STOP = PCI_MESSAGE_BASE + 0xC,
115 PCI_REENABLE = PCI_MESSAGE_BASE + 0xD,
116 PCI_QUERY_STOP_FAILED = PCI_MESSAGE_BASE + 0xE,
117 PCI_EJECTION_COMPLETE = PCI_MESSAGE_BASE + 0xF,
118 PCI_RESOURCES_ASSIGNED = PCI_MESSAGE_BASE + 0x10,
119 PCI_RESOURCES_RELEASED = PCI_MESSAGE_BASE + 0x11,
120 PCI_INVALIDATE_BLOCK = PCI_MESSAGE_BASE + 0x12,
121 PCI_QUERY_PROTOCOL_VERSION = PCI_MESSAGE_BASE + 0x13,
122 PCI_CREATE_INTERRUPT_MESSAGE = PCI_MESSAGE_BASE + 0x14,
123 PCI_DELETE_INTERRUPT_MESSAGE = PCI_MESSAGE_BASE + 0x15,
Jork Loeser7dcf90e2017-05-24 13:41:28 -0700124 PCI_RESOURCES_ASSIGNED2 = PCI_MESSAGE_BASE + 0x16,
125 PCI_CREATE_INTERRUPT_MESSAGE2 = PCI_MESSAGE_BASE + 0x17,
126 PCI_DELETE_INTERRUPT_MESSAGE2 = PCI_MESSAGE_BASE + 0x18, /* unused */
Jake Oshins4daace02016-02-16 21:56:23 +0000127 PCI_MESSAGE_MAXIMUM
128};
129
130/*
131 * Structures defining the virtual PCI Express protocol.
132 */
133
134union pci_version {
135 struct {
136 u16 minor_version;
137 u16 major_version;
138 } parts;
139 u32 version;
140} __packed;
141
142/*
143 * Function numbers are 8-bits wide on Express, as interpreted through ARI,
144 * which is all this driver does. This representation is the one used in
145 * Windows, which is what is expected when sending this back and forth with
146 * the Hyper-V parent partition.
147 */
148union win_slot_encoding {
149 struct {
Dexuan Cui60e2e2f2017-02-10 15:18:46 -0600150 u32 dev:5;
151 u32 func:3;
Jake Oshins4daace02016-02-16 21:56:23 +0000152 u32 reserved:24;
153 } bits;
154 u32 slot;
155} __packed;
156
157/*
158 * Pretty much as defined in the PCI Specifications.
159 */
160struct pci_function_description {
161 u16 v_id; /* vendor ID */
162 u16 d_id; /* device ID */
163 u8 rev;
164 u8 prog_intf;
165 u8 subclass;
166 u8 base_class;
167 u32 subsystem_id;
168 union win_slot_encoding win_slot;
169 u32 ser; /* serial number */
170} __packed;
171
172/**
173 * struct hv_msi_desc
174 * @vector: IDT entry
175 * @delivery_mode: As defined in Intel's Programmer's
176 * Reference Manual, Volume 3, Chapter 8.
177 * @vector_count: Number of contiguous entries in the
178 * Interrupt Descriptor Table that are
179 * occupied by this Message-Signaled
180 * Interrupt. For "MSI", as first defined
181 * in PCI 2.2, this can be between 1 and
182 * 32. For "MSI-X," as first defined in PCI
183 * 3.0, this must be 1, as each MSI-X table
184 * entry would have its own descriptor.
185 * @reserved: Empty space
186 * @cpu_mask: All the target virtual processors.
187 */
188struct hv_msi_desc {
189 u8 vector;
190 u8 delivery_mode;
191 u16 vector_count;
192 u32 reserved;
193 u64 cpu_mask;
194} __packed;
195
196/**
Jork Loeser7dcf90e2017-05-24 13:41:28 -0700197 * struct hv_msi_desc2 - 1.2 version of hv_msi_desc
198 * @vector: IDT entry
199 * @delivery_mode: As defined in Intel's Programmer's
200 * Reference Manual, Volume 3, Chapter 8.
201 * @vector_count: Number of contiguous entries in the
202 * Interrupt Descriptor Table that are
203 * occupied by this Message-Signaled
204 * Interrupt. For "MSI", as first defined
205 * in PCI 2.2, this can be between 1 and
206 * 32. For "MSI-X," as first defined in PCI
207 * 3.0, this must be 1, as each MSI-X table
208 * entry would have its own descriptor.
209 * @processor_count: number of bits enabled in array.
210 * @processor_array: All the target virtual processors.
211 */
212struct hv_msi_desc2 {
213 u8 vector;
214 u8 delivery_mode;
215 u16 vector_count;
216 u16 processor_count;
217 u16 processor_array[32];
218} __packed;
219
220/**
Jake Oshins4daace02016-02-16 21:56:23 +0000221 * struct tran_int_desc
222 * @reserved: unused, padding
223 * @vector_count: same as in hv_msi_desc
224 * @data: This is the "data payload" value that is
225 * written by the device when it generates
226 * a message-signaled interrupt, either MSI
227 * or MSI-X.
228 * @address: This is the address to which the data
229 * payload is written on interrupt
230 * generation.
231 */
232struct tran_int_desc {
233 u16 reserved;
234 u16 vector_count;
235 u32 data;
236 u64 address;
237} __packed;
238
239/*
240 * A generic message format for virtual PCI.
241 * Specific message formats are defined later in the file.
242 */
243
244struct pci_message {
Dexuan Cui0c6045d2016-08-23 04:45:51 +0000245 u32 type;
Jake Oshins4daace02016-02-16 21:56:23 +0000246} __packed;
247
248struct pci_child_message {
Dexuan Cui0c6045d2016-08-23 04:45:51 +0000249 struct pci_message message_type;
Jake Oshins4daace02016-02-16 21:56:23 +0000250 union win_slot_encoding wslot;
251} __packed;
252
253struct pci_incoming_message {
254 struct vmpacket_descriptor hdr;
255 struct pci_message message_type;
256} __packed;
257
258struct pci_response {
259 struct vmpacket_descriptor hdr;
260 s32 status; /* negative values are failures */
261} __packed;
262
263struct pci_packet {
264 void (*completion_func)(void *context, struct pci_response *resp,
265 int resp_packet_size);
266 void *compl_ctxt;
Dexuan Cui0c6045d2016-08-23 04:45:51 +0000267
268 struct pci_message message[0];
Jake Oshins4daace02016-02-16 21:56:23 +0000269};
270
271/*
272 * Specific message types supporting the PCI protocol.
273 */
274
275/*
276 * Version negotiation message. Sent from the guest to the host.
277 * The guest is free to try different versions until the host
278 * accepts the version.
279 *
280 * pci_version: The protocol version requested.
281 * is_last_attempt: If TRUE, this is the last version guest will request.
282 * reservedz: Reserved field, set to zero.
283 */
284
285struct pci_version_request {
286 struct pci_message message_type;
Jork Loeser691ac1d2017-05-24 13:41:24 -0700287 u32 protocol_version;
Jake Oshins4daace02016-02-16 21:56:23 +0000288} __packed;
289
290/*
291 * Bus D0 Entry. This is sent from the guest to the host when the virtual
292 * bus (PCI Express port) is ready for action.
293 */
294
295struct pci_bus_d0_entry {
296 struct pci_message message_type;
297 u32 reserved;
298 u64 mmio_base;
299} __packed;
300
301struct pci_bus_relations {
302 struct pci_incoming_message incoming;
303 u32 device_count;
Dexuan Cui7d0f8ee2016-08-23 04:46:39 +0000304 struct pci_function_description func[0];
Jake Oshins4daace02016-02-16 21:56:23 +0000305} __packed;
306
307struct pci_q_res_req_response {
308 struct vmpacket_descriptor hdr;
309 s32 status; /* negative values are failures */
310 u32 probed_bar[6];
311} __packed;
312
313struct pci_set_power {
314 struct pci_message message_type;
315 union win_slot_encoding wslot;
316 u32 power_state; /* In Windows terms */
317 u32 reserved;
318} __packed;
319
320struct pci_set_power_response {
321 struct vmpacket_descriptor hdr;
322 s32 status; /* negative values are failures */
323 union win_slot_encoding wslot;
324 u32 resultant_state; /* In Windows terms */
325 u32 reserved;
326} __packed;
327
328struct pci_resources_assigned {
329 struct pci_message message_type;
330 union win_slot_encoding wslot;
331 u8 memory_range[0x14][6]; /* not used here */
332 u32 msi_descriptors;
333 u32 reserved[4];
334} __packed;
335
Jork Loeser7dcf90e2017-05-24 13:41:28 -0700336struct pci_resources_assigned2 {
337 struct pci_message message_type;
338 union win_slot_encoding wslot;
339 u8 memory_range[0x14][6]; /* not used here */
340 u32 msi_descriptor_count;
341 u8 reserved[70];
342} __packed;
343
Jake Oshins4daace02016-02-16 21:56:23 +0000344struct pci_create_interrupt {
345 struct pci_message message_type;
346 union win_slot_encoding wslot;
347 struct hv_msi_desc int_desc;
348} __packed;
349
350struct pci_create_int_response {
351 struct pci_response response;
352 u32 reserved;
353 struct tran_int_desc int_desc;
354} __packed;
355
Jork Loeser7dcf90e2017-05-24 13:41:28 -0700356struct pci_create_interrupt2 {
357 struct pci_message message_type;
358 union win_slot_encoding wslot;
359 struct hv_msi_desc2 int_desc;
360} __packed;
361
Jake Oshins4daace02016-02-16 21:56:23 +0000362struct pci_delete_interrupt {
363 struct pci_message message_type;
364 union win_slot_encoding wslot;
365 struct tran_int_desc int_desc;
366} __packed;
367
Dexuan Cuie5d2f912019-08-22 05:05:37 +0000368/*
369 * Note: the VM must pass a valid block id, wslot and bytes_requested.
370 */
371struct pci_read_block {
372 struct pci_message message_type;
373 u32 block_id;
374 union win_slot_encoding wslot;
375 u32 bytes_requested;
376} __packed;
377
378struct pci_read_block_response {
379 struct vmpacket_descriptor hdr;
380 u32 status;
381 u8 bytes[HV_CONFIG_BLOCK_SIZE_MAX];
382} __packed;
383
384/*
385 * Note: the VM must pass a valid block id, wslot and byte_count.
386 */
387struct pci_write_block {
388 struct pci_message message_type;
389 u32 block_id;
390 union win_slot_encoding wslot;
391 u32 byte_count;
392 u8 bytes[HV_CONFIG_BLOCK_SIZE_MAX];
393} __packed;
394
395struct pci_dev_inval_block {
396 struct pci_incoming_message incoming;
397 union win_slot_encoding wslot;
398 u64 block_mask;
399} __packed;
400
Jake Oshins4daace02016-02-16 21:56:23 +0000401struct pci_dev_incoming {
402 struct pci_incoming_message incoming;
403 union win_slot_encoding wslot;
404} __packed;
405
406struct pci_eject_response {
Dexuan Cui0c6045d2016-08-23 04:45:51 +0000407 struct pci_message message_type;
Jake Oshins4daace02016-02-16 21:56:23 +0000408 union win_slot_encoding wslot;
409 u32 status;
410} __packed;
411
412static int pci_ring_size = (4 * PAGE_SIZE);
413
414/*
415 * Definitions or interrupt steering hypercall.
416 */
417#define HV_PARTITION_ID_SELF ((u64)-1)
418#define HVCALL_RETARGET_INTERRUPT 0x7e
419
Jork Loeser7dcf90e2017-05-24 13:41:28 -0700420struct hv_interrupt_entry {
Jake Oshins4daace02016-02-16 21:56:23 +0000421 u32 source; /* 1 for MSI(-X) */
422 u32 reserved1;
423 u32 address;
424 u32 data;
Jork Loeser7dcf90e2017-05-24 13:41:28 -0700425};
426
Jork Loeser7dcf90e2017-05-24 13:41:28 -0700427/*
428 * flags for hv_device_interrupt_target.flags
429 */
430#define HV_DEVICE_INTERRUPT_TARGET_MULTICAST 1
431#define HV_DEVICE_INTERRUPT_TARGET_PROCESSOR_SET 2
432
433struct hv_device_interrupt_target {
Jake Oshins4daace02016-02-16 21:56:23 +0000434 u32 vector;
435 u32 flags;
Jork Loeser7dcf90e2017-05-24 13:41:28 -0700436 union {
437 u64 vp_mask;
Maya Nakamura9bc11742019-03-01 06:59:02 +0000438 struct hv_vpset vp_set;
Jork Loeser7dcf90e2017-05-24 13:41:28 -0700439 };
440};
441
442struct retarget_msi_interrupt {
443 u64 partition_id; /* use "self" */
444 u64 device_id;
445 struct hv_interrupt_entry int_entry;
446 u64 reserved2;
447 struct hv_device_interrupt_target int_target;
Maya Nakamura6ae91572019-03-01 06:56:24 +0000448} __packed __aligned(8);
Jake Oshins4daace02016-02-16 21:56:23 +0000449
450/*
451 * Driver specific state.
452 */
453
454enum hv_pcibus_state {
455 hv_pcibus_init = 0,
456 hv_pcibus_probed,
457 hv_pcibus_installed,
Dexuan Cuiac82fc82019-11-24 21:33:52 -0800458 hv_pcibus_removing,
Long Lid3a78d82017-03-23 14:58:10 -0700459 hv_pcibus_removed,
Jake Oshins4daace02016-02-16 21:56:23 +0000460 hv_pcibus_maximum
461};
462
463struct hv_pcibus_device {
464 struct pci_sysdata sysdata;
465 enum hv_pcibus_state state;
Stephen Hemminger6708be92018-05-23 10:11:13 -0700466 refcount_t remove_lock;
Jake Oshins4daace02016-02-16 21:56:23 +0000467 struct hv_device *hdev;
468 resource_size_t low_mmio_space;
469 resource_size_t high_mmio_space;
470 struct resource *mem_config;
471 struct resource *low_mmio_res;
472 struct resource *high_mmio_res;
473 struct completion *survey_event;
474 struct completion remove_event;
475 struct pci_bus *pci_bus;
476 spinlock_t config_lock; /* Avoid two threads writing index page */
477 spinlock_t device_list_lock; /* Protect lists below */
478 void __iomem *cfg_addr;
479
Jake Oshins4daace02016-02-16 21:56:23 +0000480 struct list_head resources_for_children;
481
482 struct list_head children;
483 struct list_head dr_list;
Jake Oshins4daace02016-02-16 21:56:23 +0000484
485 struct msi_domain_info msi_info;
486 struct msi_controller msi_chip;
487 struct irq_domain *irq_domain;
Jork Loeserbe66b672017-05-24 13:41:25 -0700488
Long Li0de8ce32016-11-08 14:04:38 -0800489 spinlock_t retarget_msi_interrupt_lock;
Dexuan Cui021ad272018-03-15 14:20:53 +0000490
491 struct workqueue_struct *wq;
Maya Nakamura9bc11742019-03-01 06:59:02 +0000492
493 /* hypercall arg, must not cross page boundary */
494 struct retarget_msi_interrupt retarget_msi_interrupt_params;
495
496 /*
497 * Don't put anything here: retarget_msi_interrupt_params must be last
498 */
Jake Oshins4daace02016-02-16 21:56:23 +0000499};
500
501/*
502 * Tracks "Device Relations" messages from the host, which must be both
503 * processed in order and deferred so that they don't run in the context
504 * of the incoming packet callback.
505 */
506struct hv_dr_work {
507 struct work_struct wrk;
508 struct hv_pcibus_device *bus;
509};
510
511struct hv_dr_state {
512 struct list_head list_entry;
513 u32 device_count;
Dexuan Cui7d0f8ee2016-08-23 04:46:39 +0000514 struct pci_function_description func[0];
Jake Oshins4daace02016-02-16 21:56:23 +0000515};
516
517enum hv_pcichild_state {
518 hv_pcichild_init = 0,
519 hv_pcichild_requirements,
520 hv_pcichild_resourced,
521 hv_pcichild_ejecting,
522 hv_pcichild_maximum
523};
524
Jake Oshins4daace02016-02-16 21:56:23 +0000525struct hv_pci_dev {
526 /* List protected by pci_rescan_remove_lock */
527 struct list_head list_entry;
Elena Reshetova24196f02017-04-18 09:02:48 -0500528 refcount_t refs;
Jake Oshins4daace02016-02-16 21:56:23 +0000529 enum hv_pcichild_state state;
Stephen Hemmingera15f2c082018-09-14 12:54:56 -0700530 struct pci_slot *pci_slot;
Jake Oshins4daace02016-02-16 21:56:23 +0000531 struct pci_function_description desc;
532 bool reported_missing;
533 struct hv_pcibus_device *hbus;
534 struct work_struct wrk;
535
Dexuan Cuie5d2f912019-08-22 05:05:37 +0000536 void (*block_invalidate)(void *context, u64 block_mask);
537 void *invalidate_context;
538
Jake Oshins4daace02016-02-16 21:56:23 +0000539 /*
540 * What would be observed if one wrote 0xFFFFFFFF to a BAR and then
541 * read it back, for each of the BAR offsets within config space.
542 */
543 u32 probed_bar[6];
544};
545
546struct hv_pci_compl {
547 struct completion host_event;
548 s32 completion_status;
549};
550
Dexuan Cuide0aa7b2018-03-15 14:21:08 +0000551static void hv_pci_onchannelcallback(void *context);
552
Jake Oshins4daace02016-02-16 21:56:23 +0000553/**
554 * hv_pci_generic_compl() - Invoked for a completion packet
555 * @context: Set up by the sender of the packet.
556 * @resp: The response packet
557 * @resp_packet_size: Size in bytes of the packet
558 *
559 * This function is used to trigger an event and report status
560 * for any message for which the completion packet contains a
561 * status and nothing else.
562 */
Dexuan Cuia5b45b72016-08-23 04:49:22 +0000563static void hv_pci_generic_compl(void *context, struct pci_response *resp,
564 int resp_packet_size)
Jake Oshins4daace02016-02-16 21:56:23 +0000565{
566 struct hv_pci_compl *comp_pkt = context;
567
568 if (resp_packet_size >= offsetofend(struct pci_response, status))
569 comp_pkt->completion_status = resp->status;
Dexuan Cuia5b45b72016-08-23 04:49:22 +0000570 else
571 comp_pkt->completion_status = -1;
572
Jake Oshins4daace02016-02-16 21:56:23 +0000573 complete(&comp_pkt->host_event);
574}
575
576static struct hv_pci_dev *get_pcichild_wslot(struct hv_pcibus_device *hbus,
577 u32 wslot);
Stephen Hemminger8c99e122018-05-23 10:11:12 -0700578
579static void get_pcichild(struct hv_pci_dev *hpdev)
580{
581 refcount_inc(&hpdev->refs);
582}
583
584static void put_pcichild(struct hv_pci_dev *hpdev)
585{
586 if (refcount_dec_and_test(&hpdev->refs))
587 kfree(hpdev);
588}
Jake Oshins4daace02016-02-16 21:56:23 +0000589
590static void get_hvpcibus(struct hv_pcibus_device *hv_pcibus);
591static void put_hvpcibus(struct hv_pcibus_device *hv_pcibus);
592
Dexuan Cuic3635da2018-05-23 21:12:01 +0000593/*
594 * There is no good way to get notified from vmbus_onoffer_rescind(),
595 * so let's use polling here, since this is not a hot path.
596 */
597static int wait_for_response(struct hv_device *hdev,
598 struct completion *comp)
599{
600 while (true) {
601 if (hdev->channel->rescind) {
602 dev_warn_once(&hdev->device, "The device is gone.\n");
603 return -ENODEV;
604 }
605
606 if (wait_for_completion_timeout(comp, HZ / 10))
607 break;
608 }
609
610 return 0;
611}
612
Jake Oshins4daace02016-02-16 21:56:23 +0000613/**
614 * devfn_to_wslot() - Convert from Linux PCI slot to Windows
615 * @devfn: The Linux representation of PCI slot
616 *
617 * Windows uses a slightly different representation of PCI slot.
618 *
619 * Return: The Windows representation
620 */
621static u32 devfn_to_wslot(int devfn)
622{
623 union win_slot_encoding wslot;
624
625 wslot.slot = 0;
Dexuan Cui60e2e2f2017-02-10 15:18:46 -0600626 wslot.bits.dev = PCI_SLOT(devfn);
627 wslot.bits.func = PCI_FUNC(devfn);
Jake Oshins4daace02016-02-16 21:56:23 +0000628
629 return wslot.slot;
630}
631
632/**
633 * wslot_to_devfn() - Convert from Windows PCI slot to Linux
634 * @wslot: The Windows representation of PCI slot
635 *
636 * Windows uses a slightly different representation of PCI slot.
637 *
638 * Return: The Linux representation
639 */
640static int wslot_to_devfn(u32 wslot)
641{
642 union win_slot_encoding slot_no;
643
644 slot_no.slot = wslot;
Dexuan Cui60e2e2f2017-02-10 15:18:46 -0600645 return PCI_DEVFN(slot_no.bits.dev, slot_no.bits.func);
Jake Oshins4daace02016-02-16 21:56:23 +0000646}
647
648/*
649 * PCI Configuration Space for these root PCI buses is implemented as a pair
650 * of pages in memory-mapped I/O space. Writing to the first page chooses
651 * the PCI function being written or read. Once the first page has been
652 * written to, the following page maps in the entire configuration space of
653 * the function.
654 */
655
656/**
657 * _hv_pcifront_read_config() - Internal PCI config read
658 * @hpdev: The PCI driver's representation of the device
659 * @where: Offset within config space
660 * @size: Size of the transfer
661 * @val: Pointer to the buffer receiving the data
662 */
663static void _hv_pcifront_read_config(struct hv_pci_dev *hpdev, int where,
664 int size, u32 *val)
665{
666 unsigned long flags;
667 void __iomem *addr = hpdev->hbus->cfg_addr + CFG_PAGE_OFFSET + where;
668
669 /*
670 * If the attempt is to read the IDs or the ROM BAR, simulate that.
671 */
672 if (where + size <= PCI_COMMAND) {
673 memcpy(val, ((u8 *)&hpdev->desc.v_id) + where, size);
674 } else if (where >= PCI_CLASS_REVISION && where + size <=
675 PCI_CACHE_LINE_SIZE) {
676 memcpy(val, ((u8 *)&hpdev->desc.rev) + where -
677 PCI_CLASS_REVISION, size);
678 } else if (where >= PCI_SUBSYSTEM_VENDOR_ID && where + size <=
679 PCI_ROM_ADDRESS) {
680 memcpy(val, (u8 *)&hpdev->desc.subsystem_id + where -
681 PCI_SUBSYSTEM_VENDOR_ID, size);
682 } else if (where >= PCI_ROM_ADDRESS && where + size <=
683 PCI_CAPABILITY_LIST) {
684 /* ROM BARs are unimplemented */
685 *val = 0;
686 } else if (where >= PCI_INTERRUPT_LINE && where + size <=
687 PCI_INTERRUPT_PIN) {
688 /*
689 * Interrupt Line and Interrupt PIN are hard-wired to zero
690 * because this front-end only supports message-signaled
691 * interrupts.
692 */
693 *val = 0;
694 } else if (where + size <= CFG_PAGE_SIZE) {
695 spin_lock_irqsave(&hpdev->hbus->config_lock, flags);
696 /* Choose the function to be read. (See comment above) */
697 writel(hpdev->desc.win_slot.slot, hpdev->hbus->cfg_addr);
Vitaly Kuznetsovbdd74442016-05-03 14:22:00 +0200698 /* Make sure the function was chosen before we start reading. */
699 mb();
Jake Oshins4daace02016-02-16 21:56:23 +0000700 /* Read from that function's config space. */
701 switch (size) {
702 case 1:
703 *val = readb(addr);
704 break;
705 case 2:
706 *val = readw(addr);
707 break;
708 default:
709 *val = readl(addr);
710 break;
711 }
Vitaly Kuznetsovbdd74442016-05-03 14:22:00 +0200712 /*
Dexuan Cuidf3f2152018-03-15 14:21:35 +0000713 * Make sure the read was done before we release the spinlock
Vitaly Kuznetsovbdd74442016-05-03 14:22:00 +0200714 * allowing consecutive reads/writes.
715 */
716 mb();
Jake Oshins4daace02016-02-16 21:56:23 +0000717 spin_unlock_irqrestore(&hpdev->hbus->config_lock, flags);
718 } else {
719 dev_err(&hpdev->hbus->hdev->device,
720 "Attempt to read beyond a function's config space.\n");
721 }
722}
723
Dexuan Cuide0aa7b2018-03-15 14:21:08 +0000724static u16 hv_pcifront_get_vendor_id(struct hv_pci_dev *hpdev)
725{
726 u16 ret;
727 unsigned long flags;
728 void __iomem *addr = hpdev->hbus->cfg_addr + CFG_PAGE_OFFSET +
729 PCI_VENDOR_ID;
730
731 spin_lock_irqsave(&hpdev->hbus->config_lock, flags);
732
733 /* Choose the function to be read. (See comment above) */
734 writel(hpdev->desc.win_slot.slot, hpdev->hbus->cfg_addr);
735 /* Make sure the function was chosen before we start reading. */
736 mb();
737 /* Read from that function's config space. */
738 ret = readw(addr);
739 /*
740 * mb() is not required here, because the spin_unlock_irqrestore()
741 * is a barrier.
742 */
743
744 spin_unlock_irqrestore(&hpdev->hbus->config_lock, flags);
745
746 return ret;
747}
748
Jake Oshins4daace02016-02-16 21:56:23 +0000749/**
750 * _hv_pcifront_write_config() - Internal PCI config write
751 * @hpdev: The PCI driver's representation of the device
752 * @where: Offset within config space
753 * @size: Size of the transfer
754 * @val: The data being transferred
755 */
756static void _hv_pcifront_write_config(struct hv_pci_dev *hpdev, int where,
757 int size, u32 val)
758{
759 unsigned long flags;
760 void __iomem *addr = hpdev->hbus->cfg_addr + CFG_PAGE_OFFSET + where;
761
762 if (where >= PCI_SUBSYSTEM_VENDOR_ID &&
763 where + size <= PCI_CAPABILITY_LIST) {
764 /* SSIDs and ROM BARs are read-only */
765 } else if (where >= PCI_COMMAND && where + size <= CFG_PAGE_SIZE) {
766 spin_lock_irqsave(&hpdev->hbus->config_lock, flags);
767 /* Choose the function to be written. (See comment above) */
768 writel(hpdev->desc.win_slot.slot, hpdev->hbus->cfg_addr);
Vitaly Kuznetsovbdd74442016-05-03 14:22:00 +0200769 /* Make sure the function was chosen before we start writing. */
770 wmb();
Jake Oshins4daace02016-02-16 21:56:23 +0000771 /* Write to that function's config space. */
772 switch (size) {
773 case 1:
774 writeb(val, addr);
775 break;
776 case 2:
777 writew(val, addr);
778 break;
779 default:
780 writel(val, addr);
781 break;
782 }
Vitaly Kuznetsovbdd74442016-05-03 14:22:00 +0200783 /*
784 * Make sure the write was done before we release the spinlock
785 * allowing consecutive reads/writes.
786 */
787 mb();
Jake Oshins4daace02016-02-16 21:56:23 +0000788 spin_unlock_irqrestore(&hpdev->hbus->config_lock, flags);
789 } else {
790 dev_err(&hpdev->hbus->hdev->device,
791 "Attempt to write beyond a function's config space.\n");
792 }
793}
794
795/**
796 * hv_pcifront_read_config() - Read configuration space
797 * @bus: PCI Bus structure
798 * @devfn: Device/function
799 * @where: Offset from base
800 * @size: Byte/word/dword
801 * @val: Value to be read
802 *
803 * Return: PCIBIOS_SUCCESSFUL on success
804 * PCIBIOS_DEVICE_NOT_FOUND on failure
805 */
806static int hv_pcifront_read_config(struct pci_bus *bus, unsigned int devfn,
807 int where, int size, u32 *val)
808{
809 struct hv_pcibus_device *hbus =
810 container_of(bus->sysdata, struct hv_pcibus_device, sysdata);
811 struct hv_pci_dev *hpdev;
812
813 hpdev = get_pcichild_wslot(hbus, devfn_to_wslot(devfn));
814 if (!hpdev)
815 return PCIBIOS_DEVICE_NOT_FOUND;
816
817 _hv_pcifront_read_config(hpdev, where, size, val);
818
Stephen Hemminger8c99e122018-05-23 10:11:12 -0700819 put_pcichild(hpdev);
Jake Oshins4daace02016-02-16 21:56:23 +0000820 return PCIBIOS_SUCCESSFUL;
821}
822
823/**
824 * hv_pcifront_write_config() - Write configuration space
825 * @bus: PCI Bus structure
826 * @devfn: Device/function
827 * @where: Offset from base
828 * @size: Byte/word/dword
829 * @val: Value to be written to device
830 *
831 * Return: PCIBIOS_SUCCESSFUL on success
832 * PCIBIOS_DEVICE_NOT_FOUND on failure
833 */
834static int hv_pcifront_write_config(struct pci_bus *bus, unsigned int devfn,
835 int where, int size, u32 val)
836{
837 struct hv_pcibus_device *hbus =
838 container_of(bus->sysdata, struct hv_pcibus_device, sysdata);
839 struct hv_pci_dev *hpdev;
840
841 hpdev = get_pcichild_wslot(hbus, devfn_to_wslot(devfn));
842 if (!hpdev)
843 return PCIBIOS_DEVICE_NOT_FOUND;
844
845 _hv_pcifront_write_config(hpdev, where, size, val);
846
Stephen Hemminger8c99e122018-05-23 10:11:12 -0700847 put_pcichild(hpdev);
Jake Oshins4daace02016-02-16 21:56:23 +0000848 return PCIBIOS_SUCCESSFUL;
849}
850
851/* PCIe operations */
852static struct pci_ops hv_pcifront_ops = {
853 .read = hv_pcifront_read_config,
854 .write = hv_pcifront_write_config,
855};
856
Dexuan Cuie5d2f912019-08-22 05:05:37 +0000857/*
858 * Paravirtual backchannel
859 *
860 * Hyper-V SR-IOV provides a backchannel mechanism in software for
861 * communication between a VF driver and a PF driver. These
862 * "configuration blocks" are similar in concept to PCI configuration space,
863 * but instead of doing reads and writes in 32-bit chunks through a very slow
864 * path, packets of up to 128 bytes can be sent or received asynchronously.
865 *
866 * Nearly every SR-IOV device contains just such a communications channel in
867 * hardware, so using this one in software is usually optional. Using the
868 * software channel, however, allows driver implementers to leverage software
869 * tools that fuzz the communications channel looking for vulnerabilities.
870 *
871 * The usage model for these packets puts the responsibility for reading or
872 * writing on the VF driver. The VF driver sends a read or a write packet,
873 * indicating which "block" is being referred to by number.
874 *
875 * If the PF driver wishes to initiate communication, it can "invalidate" one or
876 * more of the first 64 blocks. This invalidation is delivered via a callback
877 * supplied by the VF driver by this driver.
878 *
879 * No protocol is implied, except that supplied by the PF and VF drivers.
880 */
881
882struct hv_read_config_compl {
883 struct hv_pci_compl comp_pkt;
884 void *buf;
885 unsigned int len;
886 unsigned int bytes_returned;
887};
888
889/**
890 * hv_pci_read_config_compl() - Invoked when a response packet
891 * for a read config block operation arrives.
892 * @context: Identifies the read config operation
893 * @resp: The response packet itself
894 * @resp_packet_size: Size in bytes of the response packet
895 */
896static void hv_pci_read_config_compl(void *context, struct pci_response *resp,
897 int resp_packet_size)
898{
899 struct hv_read_config_compl *comp = context;
900 struct pci_read_block_response *read_resp =
901 (struct pci_read_block_response *)resp;
902 unsigned int data_len, hdr_len;
903
904 hdr_len = offsetof(struct pci_read_block_response, bytes);
905 if (resp_packet_size < hdr_len) {
906 comp->comp_pkt.completion_status = -1;
907 goto out;
908 }
909
910 data_len = resp_packet_size - hdr_len;
911 if (data_len > 0 && read_resp->status == 0) {
912 comp->bytes_returned = min(comp->len, data_len);
913 memcpy(comp->buf, read_resp->bytes, comp->bytes_returned);
914 } else {
915 comp->bytes_returned = 0;
916 }
917
918 comp->comp_pkt.completion_status = read_resp->status;
919out:
920 complete(&comp->comp_pkt.host_event);
921}
922
923/**
924 * hv_read_config_block() - Sends a read config block request to
925 * the back-end driver running in the Hyper-V parent partition.
926 * @pdev: The PCI driver's representation for this device.
927 * @buf: Buffer into which the config block will be copied.
928 * @len: Size in bytes of buf.
929 * @block_id: Identifies the config block which has been requested.
930 * @bytes_returned: Size which came back from the back-end driver.
931 *
932 * Return: 0 on success, -errno on failure
933 */
934int hv_read_config_block(struct pci_dev *pdev, void *buf, unsigned int len,
935 unsigned int block_id, unsigned int *bytes_returned)
936{
937 struct hv_pcibus_device *hbus =
938 container_of(pdev->bus->sysdata, struct hv_pcibus_device,
939 sysdata);
940 struct {
941 struct pci_packet pkt;
942 char buf[sizeof(struct pci_read_block)];
943 } pkt;
944 struct hv_read_config_compl comp_pkt;
945 struct pci_read_block *read_blk;
946 int ret;
947
948 if (len == 0 || len > HV_CONFIG_BLOCK_SIZE_MAX)
949 return -EINVAL;
950
951 init_completion(&comp_pkt.comp_pkt.host_event);
952 comp_pkt.buf = buf;
953 comp_pkt.len = len;
954
955 memset(&pkt, 0, sizeof(pkt));
956 pkt.pkt.completion_func = hv_pci_read_config_compl;
957 pkt.pkt.compl_ctxt = &comp_pkt;
958 read_blk = (struct pci_read_block *)&pkt.pkt.message;
959 read_blk->message_type.type = PCI_READ_BLOCK;
960 read_blk->wslot.slot = devfn_to_wslot(pdev->devfn);
961 read_blk->block_id = block_id;
962 read_blk->bytes_requested = len;
963
964 ret = vmbus_sendpacket(hbus->hdev->channel, read_blk,
965 sizeof(*read_blk), (unsigned long)&pkt.pkt,
966 VM_PKT_DATA_INBAND,
967 VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
968 if (ret)
969 return ret;
970
971 ret = wait_for_response(hbus->hdev, &comp_pkt.comp_pkt.host_event);
972 if (ret)
973 return ret;
974
975 if (comp_pkt.comp_pkt.completion_status != 0 ||
976 comp_pkt.bytes_returned == 0) {
977 dev_err(&hbus->hdev->device,
978 "Read Config Block failed: 0x%x, bytes_returned=%d\n",
979 comp_pkt.comp_pkt.completion_status,
980 comp_pkt.bytes_returned);
981 return -EIO;
982 }
983
984 *bytes_returned = comp_pkt.bytes_returned;
985 return 0;
986}
Dexuan Cuie5d2f912019-08-22 05:05:37 +0000987
988/**
989 * hv_pci_write_config_compl() - Invoked when a response packet for a write
990 * config block operation arrives.
991 * @context: Identifies the write config operation
992 * @resp: The response packet itself
993 * @resp_packet_size: Size in bytes of the response packet
994 */
995static void hv_pci_write_config_compl(void *context, struct pci_response *resp,
996 int resp_packet_size)
997{
998 struct hv_pci_compl *comp_pkt = context;
999
1000 comp_pkt->completion_status = resp->status;
1001 complete(&comp_pkt->host_event);
1002}
1003
1004/**
1005 * hv_write_config_block() - Sends a write config block request to the
1006 * back-end driver running in the Hyper-V parent partition.
1007 * @pdev: The PCI driver's representation for this device.
1008 * @buf: Buffer from which the config block will be copied.
1009 * @len: Size in bytes of buf.
1010 * @block_id: Identifies the config block which is being written.
1011 *
1012 * Return: 0 on success, -errno on failure
1013 */
1014int hv_write_config_block(struct pci_dev *pdev, void *buf, unsigned int len,
1015 unsigned int block_id)
1016{
1017 struct hv_pcibus_device *hbus =
1018 container_of(pdev->bus->sysdata, struct hv_pcibus_device,
1019 sysdata);
1020 struct {
1021 struct pci_packet pkt;
1022 char buf[sizeof(struct pci_write_block)];
1023 u32 reserved;
1024 } pkt;
1025 struct hv_pci_compl comp_pkt;
1026 struct pci_write_block *write_blk;
1027 u32 pkt_size;
1028 int ret;
1029
1030 if (len == 0 || len > HV_CONFIG_BLOCK_SIZE_MAX)
1031 return -EINVAL;
1032
1033 init_completion(&comp_pkt.host_event);
1034
1035 memset(&pkt, 0, sizeof(pkt));
1036 pkt.pkt.completion_func = hv_pci_write_config_compl;
1037 pkt.pkt.compl_ctxt = &comp_pkt;
1038 write_blk = (struct pci_write_block *)&pkt.pkt.message;
1039 write_blk->message_type.type = PCI_WRITE_BLOCK;
1040 write_blk->wslot.slot = devfn_to_wslot(pdev->devfn);
1041 write_blk->block_id = block_id;
1042 write_blk->byte_count = len;
1043 memcpy(write_blk->bytes, buf, len);
1044 pkt_size = offsetof(struct pci_write_block, bytes) + len;
1045 /*
1046 * This quirk is required on some hosts shipped around 2018, because
1047 * these hosts don't check the pkt_size correctly (new hosts have been
1048 * fixed since early 2019). The quirk is also safe on very old hosts
1049 * and new hosts, because, on them, what really matters is the length
1050 * specified in write_blk->byte_count.
1051 */
1052 pkt_size += sizeof(pkt.reserved);
1053
1054 ret = vmbus_sendpacket(hbus->hdev->channel, write_blk, pkt_size,
1055 (unsigned long)&pkt.pkt, VM_PKT_DATA_INBAND,
1056 VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
1057 if (ret)
1058 return ret;
1059
1060 ret = wait_for_response(hbus->hdev, &comp_pkt.host_event);
1061 if (ret)
1062 return ret;
1063
1064 if (comp_pkt.completion_status != 0) {
1065 dev_err(&hbus->hdev->device,
1066 "Write Config Block failed: 0x%x\n",
1067 comp_pkt.completion_status);
1068 return -EIO;
1069 }
1070
1071 return 0;
1072}
Dexuan Cuie5d2f912019-08-22 05:05:37 +00001073
1074/**
1075 * hv_register_block_invalidate() - Invoked when a config block invalidation
1076 * arrives from the back-end driver.
1077 * @pdev: The PCI driver's representation for this device.
1078 * @context: Identifies the device.
1079 * @block_invalidate: Identifies all of the blocks being invalidated.
1080 *
1081 * Return: 0 on success, -errno on failure
1082 */
1083int hv_register_block_invalidate(struct pci_dev *pdev, void *context,
1084 void (*block_invalidate)(void *context,
1085 u64 block_mask))
1086{
1087 struct hv_pcibus_device *hbus =
1088 container_of(pdev->bus->sysdata, struct hv_pcibus_device,
1089 sysdata);
1090 struct hv_pci_dev *hpdev;
1091
1092 hpdev = get_pcichild_wslot(hbus, devfn_to_wslot(pdev->devfn));
1093 if (!hpdev)
1094 return -ENODEV;
1095
1096 hpdev->block_invalidate = block_invalidate;
1097 hpdev->invalidate_context = context;
1098
1099 put_pcichild(hpdev);
1100 return 0;
1101
1102}
Dexuan Cuie5d2f912019-08-22 05:05:37 +00001103
Jake Oshins4daace02016-02-16 21:56:23 +00001104/* Interrupt management hooks */
1105static void hv_int_desc_free(struct hv_pci_dev *hpdev,
1106 struct tran_int_desc *int_desc)
1107{
1108 struct pci_delete_interrupt *int_pkt;
1109 struct {
1110 struct pci_packet pkt;
Dexuan Cui0c6045d2016-08-23 04:45:51 +00001111 u8 buffer[sizeof(struct pci_delete_interrupt)];
Jake Oshins4daace02016-02-16 21:56:23 +00001112 } ctxt;
1113
1114 memset(&ctxt, 0, sizeof(ctxt));
1115 int_pkt = (struct pci_delete_interrupt *)&ctxt.pkt.message;
Dexuan Cui0c6045d2016-08-23 04:45:51 +00001116 int_pkt->message_type.type =
Jake Oshins4daace02016-02-16 21:56:23 +00001117 PCI_DELETE_INTERRUPT_MESSAGE;
1118 int_pkt->wslot.slot = hpdev->desc.win_slot.slot;
1119 int_pkt->int_desc = *int_desc;
1120 vmbus_sendpacket(hpdev->hbus->hdev->channel, int_pkt, sizeof(*int_pkt),
1121 (unsigned long)&ctxt.pkt, VM_PKT_DATA_INBAND, 0);
1122 kfree(int_desc);
1123}
1124
1125/**
1126 * hv_msi_free() - Free the MSI.
1127 * @domain: The interrupt domain pointer
1128 * @info: Extra MSI-related context
1129 * @irq: Identifies the IRQ.
1130 *
1131 * The Hyper-V parent partition and hypervisor are tracking the
1132 * messages that are in use, keeping the interrupt redirection
1133 * table up to date. This callback sends a message that frees
1134 * the IRT entry and related tracking nonsense.
1135 */
1136static void hv_msi_free(struct irq_domain *domain, struct msi_domain_info *info,
1137 unsigned int irq)
1138{
1139 struct hv_pcibus_device *hbus;
1140 struct hv_pci_dev *hpdev;
1141 struct pci_dev *pdev;
1142 struct tran_int_desc *int_desc;
1143 struct irq_data *irq_data = irq_domain_get_irq_data(domain, irq);
1144 struct msi_desc *msi = irq_data_get_msi_desc(irq_data);
1145
1146 pdev = msi_desc_to_pci_dev(msi);
1147 hbus = info->data;
Cathy Avery0c6e6172016-07-12 11:31:24 -04001148 int_desc = irq_data_get_irq_chip_data(irq_data);
1149 if (!int_desc)
Jake Oshins4daace02016-02-16 21:56:23 +00001150 return;
1151
Cathy Avery0c6e6172016-07-12 11:31:24 -04001152 irq_data->chip_data = NULL;
1153 hpdev = get_pcichild_wslot(hbus, devfn_to_wslot(pdev->devfn));
1154 if (!hpdev) {
1155 kfree(int_desc);
1156 return;
Jake Oshins4daace02016-02-16 21:56:23 +00001157 }
1158
Cathy Avery0c6e6172016-07-12 11:31:24 -04001159 hv_int_desc_free(hpdev, int_desc);
Stephen Hemminger8c99e122018-05-23 10:11:12 -07001160 put_pcichild(hpdev);
Jake Oshins4daace02016-02-16 21:56:23 +00001161}
1162
1163static int hv_set_affinity(struct irq_data *data, const struct cpumask *dest,
1164 bool force)
1165{
1166 struct irq_data *parent = data->parent_data;
1167
1168 return parent->chip->irq_set_affinity(parent, dest, force);
1169}
1170
Tobias Klauser542ccf42016-10-31 12:04:09 +01001171static void hv_irq_mask(struct irq_data *data)
Jake Oshins4daace02016-02-16 21:56:23 +00001172{
1173 pci_msi_mask_irq(data);
1174}
1175
1176/**
1177 * hv_irq_unmask() - "Unmask" the IRQ by setting its current
1178 * affinity.
1179 * @data: Describes the IRQ
1180 *
1181 * Build new a destination for the MSI and make a hypercall to
1182 * update the Interrupt Redirection Table. "Device Logical ID"
1183 * is built out of this PCI bus's instance GUID and the function
1184 * number of the device.
1185 */
Tobias Klauser542ccf42016-10-31 12:04:09 +01001186static void hv_irq_unmask(struct irq_data *data)
Jake Oshins4daace02016-02-16 21:56:23 +00001187{
1188 struct msi_desc *msi_desc = irq_data_get_msi_desc(data);
1189 struct irq_cfg *cfg = irqd_cfg(data);
Long Li0de8ce32016-11-08 14:04:38 -08001190 struct retarget_msi_interrupt *params;
Jake Oshins4daace02016-02-16 21:56:23 +00001191 struct hv_pcibus_device *hbus;
1192 struct cpumask *dest;
Maya Nakamurac8ccf752019-03-01 07:04:17 +00001193 cpumask_var_t tmp;
Jake Oshins4daace02016-02-16 21:56:23 +00001194 struct pci_bus *pbus;
1195 struct pci_dev *pdev;
Long Li0de8ce32016-11-08 14:04:38 -08001196 unsigned long flags;
Jork Loeser7dcf90e2017-05-24 13:41:28 -07001197 u32 var_size = 0;
Maya Nakamurac8ccf752019-03-01 07:04:17 +00001198 int cpu, nr_bank;
Jork Loeser7dcf90e2017-05-24 13:41:28 -07001199 u64 res;
Jake Oshins4daace02016-02-16 21:56:23 +00001200
Dexuan Cui79aa8012017-11-01 20:30:53 +00001201 dest = irq_data_get_effective_affinity_mask(data);
Jake Oshins4daace02016-02-16 21:56:23 +00001202 pdev = msi_desc_to_pci_dev(msi_desc);
1203 pbus = pdev->bus;
1204 hbus = container_of(pbus->sysdata, struct hv_pcibus_device, sysdata);
1205
Long Li0de8ce32016-11-08 14:04:38 -08001206 spin_lock_irqsave(&hbus->retarget_msi_interrupt_lock, flags);
1207
1208 params = &hbus->retarget_msi_interrupt_params;
1209 memset(params, 0, sizeof(*params));
1210 params->partition_id = HV_PARTITION_ID_SELF;
Jork Loeser7dcf90e2017-05-24 13:41:28 -07001211 params->int_entry.source = 1; /* MSI(-X) */
1212 params->int_entry.address = msi_desc->msg.address_lo;
1213 params->int_entry.data = msi_desc->msg.data;
Long Li0de8ce32016-11-08 14:04:38 -08001214 params->device_id = (hbus->hdev->dev_instance.b[5] << 24) |
Jake Oshins4daace02016-02-16 21:56:23 +00001215 (hbus->hdev->dev_instance.b[4] << 16) |
1216 (hbus->hdev->dev_instance.b[7] << 8) |
1217 (hbus->hdev->dev_instance.b[6] & 0xf8) |
1218 PCI_FUNC(pdev->devfn);
Jork Loeser7dcf90e2017-05-24 13:41:28 -07001219 params->int_target.vector = cfg->vector;
Jake Oshins4daace02016-02-16 21:56:23 +00001220
Jork Loeser7dcf90e2017-05-24 13:41:28 -07001221 /*
1222 * Honoring apic->irq_delivery_mode set to dest_Fixed by
1223 * setting the HV_DEVICE_INTERRUPT_TARGET_MULTICAST flag results in a
1224 * spurious interrupt storm. Not doing so does not seem to have a
1225 * negative effect (yet?).
1226 */
Jake Oshins4daace02016-02-16 21:56:23 +00001227
Jork Loeser7dcf90e2017-05-24 13:41:28 -07001228 if (pci_protocol_version >= PCI_PROTOCOL_VERSION_1_2) {
1229 /*
1230 * PCI_PROTOCOL_VERSION_1_2 supports the VP_SET version of the
1231 * HVCALL_RETARGET_INTERRUPT hypercall, which also coincides
1232 * with >64 VP support.
1233 * ms_hyperv.hints & HV_X64_EX_PROCESSOR_MASKS_RECOMMENDED
1234 * is not sufficient for this hypercall.
1235 */
1236 params->int_target.flags |=
1237 HV_DEVICE_INTERRUPT_TARGET_PROCESSOR_SET;
Maya Nakamurac8ccf752019-03-01 07:04:17 +00001238
1239 if (!alloc_cpumask_var(&tmp, GFP_ATOMIC)) {
1240 res = 1;
1241 goto exit_unlock;
1242 }
1243
1244 cpumask_and(tmp, dest, cpu_online_mask);
1245 nr_bank = cpumask_to_vpset(&params->int_target.vp_set, tmp);
1246 free_cpumask_var(tmp);
1247
1248 if (nr_bank <= 0) {
1249 res = 1;
1250 goto exit_unlock;
1251 }
Long Li0de8ce32016-11-08 14:04:38 -08001252
Jork Loeser7dcf90e2017-05-24 13:41:28 -07001253 /*
1254 * var-sized hypercall, var-size starts after vp_mask (thus
Maya Nakamura9bc11742019-03-01 06:59:02 +00001255 * vp_set.format does not count, but vp_set.valid_bank_mask
1256 * does).
Jork Loeser7dcf90e2017-05-24 13:41:28 -07001257 */
Maya Nakamurac8ccf752019-03-01 07:04:17 +00001258 var_size = 1 + nr_bank;
Jork Loeser7dcf90e2017-05-24 13:41:28 -07001259 } else {
1260 for_each_cpu_and(cpu, dest, cpu_online_mask) {
1261 params->int_target.vp_mask |=
Vitaly Kuznetsov7415aea2017-08-02 18:09:18 +02001262 (1ULL << hv_cpu_number_to_vp_number(cpu));
Jork Loeser7dcf90e2017-05-24 13:41:28 -07001263 }
1264 }
1265
1266 res = hv_do_hypercall(HVCALL_RETARGET_INTERRUPT | (var_size << 17),
1267 params, NULL);
1268
1269exit_unlock:
Long Li0de8ce32016-11-08 14:04:38 -08001270 spin_unlock_irqrestore(&hbus->retarget_msi_interrupt_lock, flags);
Jake Oshins4daace02016-02-16 21:56:23 +00001271
Jork Loeser7dcf90e2017-05-24 13:41:28 -07001272 if (res) {
1273 dev_err(&hbus->hdev->device,
1274 "%s() failed: %#llx", __func__, res);
1275 return;
1276 }
1277
Jake Oshins4daace02016-02-16 21:56:23 +00001278 pci_msi_unmask_irq(data);
1279}
1280
1281struct compose_comp_ctxt {
1282 struct hv_pci_compl comp_pkt;
1283 struct tran_int_desc int_desc;
1284};
1285
1286static void hv_pci_compose_compl(void *context, struct pci_response *resp,
1287 int resp_packet_size)
1288{
1289 struct compose_comp_ctxt *comp_pkt = context;
1290 struct pci_create_int_response *int_resp =
1291 (struct pci_create_int_response *)resp;
1292
1293 comp_pkt->comp_pkt.completion_status = resp->status;
1294 comp_pkt->int_desc = int_resp->int_desc;
1295 complete(&comp_pkt->comp_pkt.host_event);
1296}
1297
Jork Loeser7dcf90e2017-05-24 13:41:28 -07001298static u32 hv_compose_msi_req_v1(
1299 struct pci_create_interrupt *int_pkt, struct cpumask *affinity,
1300 u32 slot, u8 vector)
1301{
1302 int_pkt->message_type.type = PCI_CREATE_INTERRUPT_MESSAGE;
1303 int_pkt->wslot.slot = slot;
1304 int_pkt->int_desc.vector = vector;
1305 int_pkt->int_desc.vector_count = 1;
Thomas Gleixnera31e58e2017-12-28 11:33:33 +01001306 int_pkt->int_desc.delivery_mode = dest_Fixed;
Jork Loeser7dcf90e2017-05-24 13:41:28 -07001307
1308 /*
1309 * Create MSI w/ dummy vCPU set, overwritten by subsequent retarget in
1310 * hv_irq_unmask().
1311 */
1312 int_pkt->int_desc.cpu_mask = CPU_AFFINITY_ALL;
1313
1314 return sizeof(*int_pkt);
1315}
1316
1317static u32 hv_compose_msi_req_v2(
1318 struct pci_create_interrupt2 *int_pkt, struct cpumask *affinity,
1319 u32 slot, u8 vector)
1320{
1321 int cpu;
1322
1323 int_pkt->message_type.type = PCI_CREATE_INTERRUPT_MESSAGE2;
1324 int_pkt->wslot.slot = slot;
1325 int_pkt->int_desc.vector = vector;
1326 int_pkt->int_desc.vector_count = 1;
Thomas Gleixnera31e58e2017-12-28 11:33:33 +01001327 int_pkt->int_desc.delivery_mode = dest_Fixed;
Jork Loeser7dcf90e2017-05-24 13:41:28 -07001328
1329 /*
1330 * Create MSI w/ dummy vCPU set targeting just one vCPU, overwritten
1331 * by subsequent retarget in hv_irq_unmask().
1332 */
1333 cpu = cpumask_first_and(affinity, cpu_online_mask);
1334 int_pkt->int_desc.processor_array[0] =
Vitaly Kuznetsov7415aea2017-08-02 18:09:18 +02001335 hv_cpu_number_to_vp_number(cpu);
Jork Loeser7dcf90e2017-05-24 13:41:28 -07001336 int_pkt->int_desc.processor_count = 1;
1337
1338 return sizeof(*int_pkt);
1339}
1340
Jake Oshins4daace02016-02-16 21:56:23 +00001341/**
1342 * hv_compose_msi_msg() - Supplies a valid MSI address/data
1343 * @data: Everything about this MSI
1344 * @msg: Buffer that is filled in by this function
1345 *
1346 * This function unpacks the IRQ looking for target CPU set, IDT
1347 * vector and mode and sends a message to the parent partition
1348 * asking for a mapping for that tuple in this partition. The
1349 * response supplies a data value and address to which that data
1350 * should be written to trigger that interrupt.
1351 */
1352static void hv_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
1353{
1354 struct irq_cfg *cfg = irqd_cfg(data);
1355 struct hv_pcibus_device *hbus;
1356 struct hv_pci_dev *hpdev;
1357 struct pci_bus *pbus;
1358 struct pci_dev *pdev;
Dexuan Cui79aa8012017-11-01 20:30:53 +00001359 struct cpumask *dest;
Dexuan Cui35a88a12018-07-09 13:16:07 -05001360 unsigned long flags;
Jake Oshins4daace02016-02-16 21:56:23 +00001361 struct compose_comp_ctxt comp;
1362 struct tran_int_desc *int_desc;
Jake Oshins4daace02016-02-16 21:56:23 +00001363 struct {
Jork Loeser7dcf90e2017-05-24 13:41:28 -07001364 struct pci_packet pci_pkt;
1365 union {
1366 struct pci_create_interrupt v1;
1367 struct pci_create_interrupt2 v2;
1368 } int_pkts;
1369 } __packed ctxt;
1370
1371 u32 size;
Jake Oshins4daace02016-02-16 21:56:23 +00001372 int ret;
1373
1374 pdev = msi_desc_to_pci_dev(irq_data_get_msi_desc(data));
Dexuan Cui79aa8012017-11-01 20:30:53 +00001375 dest = irq_data_get_effective_affinity_mask(data);
Jake Oshins4daace02016-02-16 21:56:23 +00001376 pbus = pdev->bus;
1377 hbus = container_of(pbus->sysdata, struct hv_pcibus_device, sysdata);
1378 hpdev = get_pcichild_wslot(hbus, devfn_to_wslot(pdev->devfn));
1379 if (!hpdev)
1380 goto return_null_message;
1381
1382 /* Free any previous message that might have already been composed. */
1383 if (data->chip_data) {
1384 int_desc = data->chip_data;
1385 data->chip_data = NULL;
1386 hv_int_desc_free(hpdev, int_desc);
1387 }
1388
K. Y. Srinivasan59c58cee2017-03-24 11:07:22 -07001389 int_desc = kzalloc(sizeof(*int_desc), GFP_ATOMIC);
Jake Oshins4daace02016-02-16 21:56:23 +00001390 if (!int_desc)
1391 goto drop_reference;
1392
1393 memset(&ctxt, 0, sizeof(ctxt));
1394 init_completion(&comp.comp_pkt.host_event);
Jork Loeser7dcf90e2017-05-24 13:41:28 -07001395 ctxt.pci_pkt.completion_func = hv_pci_compose_compl;
1396 ctxt.pci_pkt.compl_ctxt = &comp;
Jake Oshins4daace02016-02-16 21:56:23 +00001397
Jork Loeser7dcf90e2017-05-24 13:41:28 -07001398 switch (pci_protocol_version) {
1399 case PCI_PROTOCOL_VERSION_1_1:
1400 size = hv_compose_msi_req_v1(&ctxt.int_pkts.v1,
Dexuan Cui79aa8012017-11-01 20:30:53 +00001401 dest,
Jork Loeser7dcf90e2017-05-24 13:41:28 -07001402 hpdev->desc.win_slot.slot,
1403 cfg->vector);
1404 break;
1405
1406 case PCI_PROTOCOL_VERSION_1_2:
1407 size = hv_compose_msi_req_v2(&ctxt.int_pkts.v2,
Dexuan Cui79aa8012017-11-01 20:30:53 +00001408 dest,
Jork Loeser7dcf90e2017-05-24 13:41:28 -07001409 hpdev->desc.win_slot.slot,
1410 cfg->vector);
1411 break;
1412
1413 default:
1414 /* As we only negotiate protocol versions known to this driver,
1415 * this path should never hit. However, this is it not a hot
1416 * path so we print a message to aid future updates.
1417 */
1418 dev_err(&hbus->hdev->device,
1419 "Unexpected vPCI protocol, update driver.");
1420 goto free_int_desc;
Jake Oshins4daace02016-02-16 21:56:23 +00001421 }
1422
Jork Loeser7dcf90e2017-05-24 13:41:28 -07001423 ret = vmbus_sendpacket(hpdev->hbus->hdev->channel, &ctxt.int_pkts,
1424 size, (unsigned long)&ctxt.pci_pkt,
Jake Oshins4daace02016-02-16 21:56:23 +00001425 VM_PKT_DATA_INBAND,
1426 VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
Jork Loeser7dcf90e2017-05-24 13:41:28 -07001427 if (ret) {
1428 dev_err(&hbus->hdev->device,
1429 "Sending request for interrupt failed: 0x%x",
1430 comp.comp_pkt.completion_status);
Dexuan Cui665e2242016-08-23 04:48:11 +00001431 goto free_int_desc;
Jork Loeser7dcf90e2017-05-24 13:41:28 -07001432 }
Dexuan Cui665e2242016-08-23 04:48:11 +00001433
Stephen Hemminger80bfeeb2017-07-31 16:48:29 -07001434 /*
1435 * Since this function is called with IRQ locks held, can't
1436 * do normal wait for completion; instead poll.
1437 */
Dexuan Cuide0aa7b2018-03-15 14:21:08 +00001438 while (!try_wait_for_completion(&comp.comp_pkt.host_event)) {
1439 /* 0xFFFF means an invalid PCI VENDOR ID. */
1440 if (hv_pcifront_get_vendor_id(hpdev) == 0xFFFF) {
1441 dev_err_once(&hbus->hdev->device,
1442 "the device has gone\n");
1443 goto free_int_desc;
1444 }
1445
1446 /*
1447 * When the higher level interrupt code calls us with
1448 * interrupt disabled, we must poll the channel by calling
1449 * the channel callback directly when channel->target_cpu is
1450 * the current CPU. When the higher level interrupt code
1451 * calls us with interrupt enabled, let's add the
Dexuan Cui35a88a12018-07-09 13:16:07 -05001452 * local_irq_save()/restore() to avoid race:
1453 * hv_pci_onchannelcallback() can also run in tasklet.
Dexuan Cuide0aa7b2018-03-15 14:21:08 +00001454 */
Dexuan Cui35a88a12018-07-09 13:16:07 -05001455 local_irq_save(flags);
Dexuan Cuide0aa7b2018-03-15 14:21:08 +00001456
1457 if (hbus->hdev->channel->target_cpu == smp_processor_id())
1458 hv_pci_onchannelcallback(hbus);
1459
Dexuan Cui35a88a12018-07-09 13:16:07 -05001460 local_irq_restore(flags);
Dexuan Cuide0aa7b2018-03-15 14:21:08 +00001461
1462 if (hpdev->state == hv_pcichild_ejecting) {
1463 dev_err_once(&hbus->hdev->device,
1464 "the device is being ejected\n");
1465 goto free_int_desc;
1466 }
1467
Stephen Hemminger80bfeeb2017-07-31 16:48:29 -07001468 udelay(100);
Dexuan Cuide0aa7b2018-03-15 14:21:08 +00001469 }
Jake Oshins4daace02016-02-16 21:56:23 +00001470
1471 if (comp.comp_pkt.completion_status < 0) {
1472 dev_err(&hbus->hdev->device,
1473 "Request for interrupt failed: 0x%x",
1474 comp.comp_pkt.completion_status);
1475 goto free_int_desc;
1476 }
1477
1478 /*
1479 * Record the assignment so that this can be unwound later. Using
1480 * irq_set_chip_data() here would be appropriate, but the lock it takes
1481 * is already held.
1482 */
1483 *int_desc = comp.int_desc;
1484 data->chip_data = int_desc;
1485
1486 /* Pass up the result. */
1487 msg->address_hi = comp.int_desc.address >> 32;
1488 msg->address_lo = comp.int_desc.address & 0xffffffff;
1489 msg->data = comp.int_desc.data;
1490
Stephen Hemminger8c99e122018-05-23 10:11:12 -07001491 put_pcichild(hpdev);
Jake Oshins4daace02016-02-16 21:56:23 +00001492 return;
1493
1494free_int_desc:
1495 kfree(int_desc);
1496drop_reference:
Stephen Hemminger8c99e122018-05-23 10:11:12 -07001497 put_pcichild(hpdev);
Jake Oshins4daace02016-02-16 21:56:23 +00001498return_null_message:
1499 msg->address_hi = 0;
1500 msg->address_lo = 0;
1501 msg->data = 0;
1502}
1503
1504/* HW Interrupt Chip Descriptor */
1505static struct irq_chip hv_msi_irq_chip = {
1506 .name = "Hyper-V PCIe MSI",
1507 .irq_compose_msi_msg = hv_compose_msi_msg,
1508 .irq_set_affinity = hv_set_affinity,
1509 .irq_ack = irq_chip_ack_parent,
1510 .irq_mask = hv_irq_mask,
1511 .irq_unmask = hv_irq_unmask,
1512};
1513
1514static irq_hw_number_t hv_msi_domain_ops_get_hwirq(struct msi_domain_info *info,
1515 msi_alloc_info_t *arg)
1516{
1517 return arg->msi_hwirq;
1518}
1519
1520static struct msi_domain_ops hv_msi_ops = {
1521 .get_hwirq = hv_msi_domain_ops_get_hwirq,
1522 .msi_prepare = pci_msi_prepare,
1523 .set_desc = pci_msi_set_desc,
1524 .msi_free = hv_msi_free,
1525};
1526
1527/**
1528 * hv_pcie_init_irq_domain() - Initialize IRQ domain
1529 * @hbus: The root PCI bus
1530 *
1531 * This function creates an IRQ domain which will be used for
1532 * interrupts from devices that have been passed through. These
1533 * devices only support MSI and MSI-X, not line-based interrupts
1534 * or simulations of line-based interrupts through PCIe's
1535 * fabric-layer messages. Because interrupts are remapped, we
1536 * can support multi-message MSI here.
1537 *
1538 * Return: '0' on success and error value on failure
1539 */
1540static int hv_pcie_init_irq_domain(struct hv_pcibus_device *hbus)
1541{
1542 hbus->msi_info.chip = &hv_msi_irq_chip;
1543 hbus->msi_info.ops = &hv_msi_ops;
1544 hbus->msi_info.flags = (MSI_FLAG_USE_DEF_DOM_OPS |
1545 MSI_FLAG_USE_DEF_CHIP_OPS | MSI_FLAG_MULTI_PCI_MSI |
1546 MSI_FLAG_PCI_MSIX);
1547 hbus->msi_info.handler = handle_edge_irq;
1548 hbus->msi_info.handler_name = "edge";
1549 hbus->msi_info.data = hbus;
1550 hbus->irq_domain = pci_msi_create_irq_domain(hbus->sysdata.fwnode,
1551 &hbus->msi_info,
1552 x86_vector_domain);
1553 if (!hbus->irq_domain) {
1554 dev_err(&hbus->hdev->device,
1555 "Failed to build an MSI IRQ domain\n");
1556 return -ENODEV;
1557 }
1558
1559 return 0;
1560}
1561
1562/**
1563 * get_bar_size() - Get the address space consumed by a BAR
1564 * @bar_val: Value that a BAR returned after -1 was written
1565 * to it.
1566 *
1567 * This function returns the size of the BAR, rounded up to 1
1568 * page. It has to be rounded up because the hypervisor's page
1569 * table entry that maps the BAR into the VM can't specify an
1570 * offset within a page. The invariant is that the hypervisor
1571 * must place any BARs of smaller than page length at the
1572 * beginning of a page.
1573 *
1574 * Return: Size in bytes of the consumed MMIO space.
1575 */
1576static u64 get_bar_size(u64 bar_val)
1577{
1578 return round_up((1 + ~(bar_val & PCI_BASE_ADDRESS_MEM_MASK)),
1579 PAGE_SIZE);
1580}
1581
1582/**
1583 * survey_child_resources() - Total all MMIO requirements
1584 * @hbus: Root PCI bus, as understood by this driver
1585 */
1586static void survey_child_resources(struct hv_pcibus_device *hbus)
1587{
Jake Oshins4daace02016-02-16 21:56:23 +00001588 struct hv_pci_dev *hpdev;
1589 resource_size_t bar_size = 0;
1590 unsigned long flags;
1591 struct completion *event;
1592 u64 bar_val;
1593 int i;
1594
1595 /* If nobody is waiting on the answer, don't compute it. */
1596 event = xchg(&hbus->survey_event, NULL);
1597 if (!event)
1598 return;
1599
1600 /* If the answer has already been computed, go with it. */
1601 if (hbus->low_mmio_space || hbus->high_mmio_space) {
1602 complete(event);
1603 return;
1604 }
1605
1606 spin_lock_irqsave(&hbus->device_list_lock, flags);
1607
1608 /*
1609 * Due to an interesting quirk of the PCI spec, all memory regions
1610 * for a child device are a power of 2 in size and aligned in memory,
1611 * so it's sufficient to just add them up without tracking alignment.
1612 */
Stephen Hemminger5b8db8f2018-05-23 10:11:14 -07001613 list_for_each_entry(hpdev, &hbus->children, list_entry) {
Jake Oshins4daace02016-02-16 21:56:23 +00001614 for (i = 0; i < 6; i++) {
1615 if (hpdev->probed_bar[i] & PCI_BASE_ADDRESS_SPACE_IO)
1616 dev_err(&hbus->hdev->device,
1617 "There's an I/O BAR in this list!\n");
1618
1619 if (hpdev->probed_bar[i] != 0) {
1620 /*
1621 * A probed BAR has all the upper bits set that
1622 * can be changed.
1623 */
1624
1625 bar_val = hpdev->probed_bar[i];
1626 if (bar_val & PCI_BASE_ADDRESS_MEM_TYPE_64)
1627 bar_val |=
1628 ((u64)hpdev->probed_bar[++i] << 32);
1629 else
1630 bar_val |= 0xffffffff00000000ULL;
1631
1632 bar_size = get_bar_size(bar_val);
1633
1634 if (bar_val & PCI_BASE_ADDRESS_MEM_TYPE_64)
1635 hbus->high_mmio_space += bar_size;
1636 else
1637 hbus->low_mmio_space += bar_size;
1638 }
1639 }
1640 }
1641
1642 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
1643 complete(event);
1644}
1645
1646/**
1647 * prepopulate_bars() - Fill in BARs with defaults
1648 * @hbus: Root PCI bus, as understood by this driver
1649 *
1650 * The core PCI driver code seems much, much happier if the BARs
1651 * for a device have values upon first scan. So fill them in.
1652 * The algorithm below works down from large sizes to small,
1653 * attempting to pack the assignments optimally. The assumption,
1654 * enforced in other parts of the code, is that the beginning of
1655 * the memory-mapped I/O space will be aligned on the largest
1656 * BAR size.
1657 */
1658static void prepopulate_bars(struct hv_pcibus_device *hbus)
1659{
1660 resource_size_t high_size = 0;
1661 resource_size_t low_size = 0;
1662 resource_size_t high_base = 0;
1663 resource_size_t low_base = 0;
1664 resource_size_t bar_size;
1665 struct hv_pci_dev *hpdev;
Jake Oshins4daace02016-02-16 21:56:23 +00001666 unsigned long flags;
1667 u64 bar_val;
1668 u32 command;
1669 bool high;
1670 int i;
1671
1672 if (hbus->low_mmio_space) {
1673 low_size = 1ULL << (63 - __builtin_clzll(hbus->low_mmio_space));
1674 low_base = hbus->low_mmio_res->start;
1675 }
1676
1677 if (hbus->high_mmio_space) {
1678 high_size = 1ULL <<
1679 (63 - __builtin_clzll(hbus->high_mmio_space));
1680 high_base = hbus->high_mmio_res->start;
1681 }
1682
1683 spin_lock_irqsave(&hbus->device_list_lock, flags);
1684
Dexuan Cuiac82fc82019-11-24 21:33:52 -08001685 /*
1686 * Clear the memory enable bit, in case it's already set. This occurs
1687 * in the suspend path of hibernation, where the device is suspended,
1688 * resumed and suspended again: see hibernation_snapshot() and
1689 * hibernation_platform_enter().
1690 *
1691 * If the memory enable bit is already set, Hyper-V sliently ignores
1692 * the below BAR updates, and the related PCI device driver can not
1693 * work, because reading from the device register(s) always returns
1694 * 0xFFFFFFFF.
1695 */
1696 list_for_each_entry(hpdev, &hbus->children, list_entry) {
1697 _hv_pcifront_read_config(hpdev, PCI_COMMAND, 2, &command);
1698 command &= ~PCI_COMMAND_MEMORY;
1699 _hv_pcifront_write_config(hpdev, PCI_COMMAND, 2, command);
1700 }
1701
Jake Oshins4daace02016-02-16 21:56:23 +00001702 /* Pick addresses for the BARs. */
1703 do {
Stephen Hemminger5b8db8f2018-05-23 10:11:14 -07001704 list_for_each_entry(hpdev, &hbus->children, list_entry) {
Jake Oshins4daace02016-02-16 21:56:23 +00001705 for (i = 0; i < 6; i++) {
1706 bar_val = hpdev->probed_bar[i];
1707 if (bar_val == 0)
1708 continue;
1709 high = bar_val & PCI_BASE_ADDRESS_MEM_TYPE_64;
1710 if (high) {
1711 bar_val |=
1712 ((u64)hpdev->probed_bar[i + 1]
1713 << 32);
1714 } else {
1715 bar_val |= 0xffffffffULL << 32;
1716 }
1717 bar_size = get_bar_size(bar_val);
1718 if (high) {
1719 if (high_size != bar_size) {
1720 i++;
1721 continue;
1722 }
1723 _hv_pcifront_write_config(hpdev,
1724 PCI_BASE_ADDRESS_0 + (4 * i),
1725 4,
1726 (u32)(high_base & 0xffffff00));
1727 i++;
1728 _hv_pcifront_write_config(hpdev,
1729 PCI_BASE_ADDRESS_0 + (4 * i),
1730 4, (u32)(high_base >> 32));
1731 high_base += bar_size;
1732 } else {
1733 if (low_size != bar_size)
1734 continue;
1735 _hv_pcifront_write_config(hpdev,
1736 PCI_BASE_ADDRESS_0 + (4 * i),
1737 4,
1738 (u32)(low_base & 0xffffff00));
1739 low_base += bar_size;
1740 }
1741 }
1742 if (high_size <= 1 && low_size <= 1) {
1743 /* Set the memory enable bit. */
1744 _hv_pcifront_read_config(hpdev, PCI_COMMAND, 2,
1745 &command);
1746 command |= PCI_COMMAND_MEMORY;
1747 _hv_pcifront_write_config(hpdev, PCI_COMMAND, 2,
1748 command);
1749 break;
1750 }
1751 }
1752
1753 high_size >>= 1;
1754 low_size >>= 1;
1755 } while (high_size || low_size);
1756
1757 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
1758}
1759
Stephen Hemmingera15f2c082018-09-14 12:54:56 -07001760/*
1761 * Assign entries in sysfs pci slot directory.
1762 *
1763 * Note that this function does not need to lock the children list
1764 * because it is called from pci_devices_present_work which
1765 * is serialized with hv_eject_device_work because they are on the
1766 * same ordered workqueue. Therefore hbus->children list will not change
1767 * even when pci_create_slot sleeps.
1768 */
1769static void hv_pci_assign_slots(struct hv_pcibus_device *hbus)
1770{
1771 struct hv_pci_dev *hpdev;
1772 char name[SLOT_NAME_SIZE];
1773 int slot_nr;
1774
1775 list_for_each_entry(hpdev, &hbus->children, list_entry) {
1776 if (hpdev->pci_slot)
1777 continue;
1778
1779 slot_nr = PCI_SLOT(wslot_to_devfn(hpdev->desc.win_slot.slot));
1780 snprintf(name, SLOT_NAME_SIZE, "%u", hpdev->desc.ser);
1781 hpdev->pci_slot = pci_create_slot(hbus->pci_bus, slot_nr,
1782 name, NULL);
Wei Yongjun54be5b82018-09-21 02:53:17 +00001783 if (IS_ERR(hpdev->pci_slot)) {
Stephen Hemmingera15f2c082018-09-14 12:54:56 -07001784 pr_warn("pci_create slot %s failed\n", name);
Wei Yongjun54be5b82018-09-21 02:53:17 +00001785 hpdev->pci_slot = NULL;
1786 }
Stephen Hemmingera15f2c082018-09-14 12:54:56 -07001787 }
1788}
1789
Dexuan Cui15becc22019-03-04 21:34:48 +00001790/*
1791 * Remove entries in sysfs pci slot directory.
1792 */
1793static void hv_pci_remove_slots(struct hv_pcibus_device *hbus)
1794{
1795 struct hv_pci_dev *hpdev;
1796
1797 list_for_each_entry(hpdev, &hbus->children, list_entry) {
1798 if (!hpdev->pci_slot)
1799 continue;
1800 pci_destroy_slot(hpdev->pci_slot);
1801 hpdev->pci_slot = NULL;
1802 }
1803}
1804
Jake Oshins4daace02016-02-16 21:56:23 +00001805/**
1806 * create_root_hv_pci_bus() - Expose a new root PCI bus
1807 * @hbus: Root PCI bus, as understood by this driver
1808 *
1809 * Return: 0 on success, -errno on failure
1810 */
1811static int create_root_hv_pci_bus(struct hv_pcibus_device *hbus)
1812{
1813 /* Register the device */
1814 hbus->pci_bus = pci_create_root_bus(&hbus->hdev->device,
1815 0, /* bus number is always zero */
1816 &hv_pcifront_ops,
1817 &hbus->sysdata,
1818 &hbus->resources_for_children);
1819 if (!hbus->pci_bus)
1820 return -ENODEV;
1821
1822 hbus->pci_bus->msi = &hbus->msi_chip;
1823 hbus->pci_bus->msi->dev = &hbus->hdev->device;
1824
Long Li414428c2017-03-23 14:58:32 -07001825 pci_lock_rescan_remove();
Jake Oshins4daace02016-02-16 21:56:23 +00001826 pci_scan_child_bus(hbus->pci_bus);
1827 pci_bus_assign_resources(hbus->pci_bus);
Stephen Hemmingera15f2c082018-09-14 12:54:56 -07001828 hv_pci_assign_slots(hbus);
Jake Oshins4daace02016-02-16 21:56:23 +00001829 pci_bus_add_devices(hbus->pci_bus);
Long Li414428c2017-03-23 14:58:32 -07001830 pci_unlock_rescan_remove();
Jake Oshins4daace02016-02-16 21:56:23 +00001831 hbus->state = hv_pcibus_installed;
1832 return 0;
1833}
1834
1835struct q_res_req_compl {
1836 struct completion host_event;
1837 struct hv_pci_dev *hpdev;
1838};
1839
1840/**
1841 * q_resource_requirements() - Query Resource Requirements
1842 * @context: The completion context.
1843 * @resp: The response that came from the host.
1844 * @resp_packet_size: The size in bytes of resp.
1845 *
1846 * This function is invoked on completion of a Query Resource
1847 * Requirements packet.
1848 */
1849static void q_resource_requirements(void *context, struct pci_response *resp,
1850 int resp_packet_size)
1851{
1852 struct q_res_req_compl *completion = context;
1853 struct pci_q_res_req_response *q_res_req =
1854 (struct pci_q_res_req_response *)resp;
1855 int i;
1856
1857 if (resp->status < 0) {
1858 dev_err(&completion->hpdev->hbus->hdev->device,
1859 "query resource requirements failed: %x\n",
1860 resp->status);
1861 } else {
1862 for (i = 0; i < 6; i++) {
1863 completion->hpdev->probed_bar[i] =
1864 q_res_req->probed_bar[i];
1865 }
1866 }
1867
1868 complete(&completion->host_event);
1869}
1870
Jake Oshins4daace02016-02-16 21:56:23 +00001871/**
1872 * new_pcichild_device() - Create a new child device
1873 * @hbus: The internal struct tracking this root PCI bus.
1874 * @desc: The information supplied so far from the host
1875 * about the device.
1876 *
1877 * This function creates the tracking structure for a new child
1878 * device and kicks off the process of figuring out what it is.
1879 *
1880 * Return: Pointer to the new tracking struct
1881 */
1882static struct hv_pci_dev *new_pcichild_device(struct hv_pcibus_device *hbus,
1883 struct pci_function_description *desc)
1884{
1885 struct hv_pci_dev *hpdev;
1886 struct pci_child_message *res_req;
1887 struct q_res_req_compl comp_pkt;
Dexuan Cui8286e962016-11-10 07:17:48 +00001888 struct {
1889 struct pci_packet init_packet;
1890 u8 buffer[sizeof(struct pci_child_message)];
Jake Oshins4daace02016-02-16 21:56:23 +00001891 } pkt;
1892 unsigned long flags;
1893 int ret;
1894
Jia-Ju Bai7403bd12018-03-18 22:53:28 +08001895 hpdev = kzalloc(sizeof(*hpdev), GFP_KERNEL);
Jake Oshins4daace02016-02-16 21:56:23 +00001896 if (!hpdev)
1897 return NULL;
1898
1899 hpdev->hbus = hbus;
1900
1901 memset(&pkt, 0, sizeof(pkt));
1902 init_completion(&comp_pkt.host_event);
1903 comp_pkt.hpdev = hpdev;
1904 pkt.init_packet.compl_ctxt = &comp_pkt;
1905 pkt.init_packet.completion_func = q_resource_requirements;
1906 res_req = (struct pci_child_message *)&pkt.init_packet.message;
Dexuan Cui0c6045d2016-08-23 04:45:51 +00001907 res_req->message_type.type = PCI_QUERY_RESOURCE_REQUIREMENTS;
Jake Oshins4daace02016-02-16 21:56:23 +00001908 res_req->wslot.slot = desc->win_slot.slot;
1909
1910 ret = vmbus_sendpacket(hbus->hdev->channel, res_req,
1911 sizeof(struct pci_child_message),
1912 (unsigned long)&pkt.init_packet,
1913 VM_PKT_DATA_INBAND,
1914 VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
1915 if (ret)
1916 goto error;
1917
Dexuan Cuic3635da2018-05-23 21:12:01 +00001918 if (wait_for_response(hbus->hdev, &comp_pkt.host_event))
1919 goto error;
Jake Oshins4daace02016-02-16 21:56:23 +00001920
1921 hpdev->desc = *desc;
Elena Reshetova24196f02017-04-18 09:02:48 -05001922 refcount_set(&hpdev->refs, 1);
Stephen Hemminger8c99e122018-05-23 10:11:12 -07001923 get_pcichild(hpdev);
Jake Oshins4daace02016-02-16 21:56:23 +00001924 spin_lock_irqsave(&hbus->device_list_lock, flags);
Haiyang Zhang4a9b0932017-02-13 18:10:11 +00001925
Jake Oshins4daace02016-02-16 21:56:23 +00001926 list_add_tail(&hpdev->list_entry, &hbus->children);
1927 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
1928 return hpdev;
1929
1930error:
1931 kfree(hpdev);
1932 return NULL;
1933}
1934
1935/**
1936 * get_pcichild_wslot() - Find device from slot
1937 * @hbus: Root PCI bus, as understood by this driver
1938 * @wslot: Location on the bus
1939 *
1940 * This function looks up a PCI device and returns the internal
1941 * representation of it. It acquires a reference on it, so that
1942 * the device won't be deleted while somebody is using it. The
1943 * caller is responsible for calling put_pcichild() to release
1944 * this reference.
1945 *
1946 * Return: Internal representation of a PCI device
1947 */
1948static struct hv_pci_dev *get_pcichild_wslot(struct hv_pcibus_device *hbus,
1949 u32 wslot)
1950{
1951 unsigned long flags;
1952 struct hv_pci_dev *iter, *hpdev = NULL;
1953
1954 spin_lock_irqsave(&hbus->device_list_lock, flags);
1955 list_for_each_entry(iter, &hbus->children, list_entry) {
1956 if (iter->desc.win_slot.slot == wslot) {
1957 hpdev = iter;
Stephen Hemminger8c99e122018-05-23 10:11:12 -07001958 get_pcichild(hpdev);
Jake Oshins4daace02016-02-16 21:56:23 +00001959 break;
1960 }
1961 }
1962 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
1963
1964 return hpdev;
1965}
1966
1967/**
1968 * pci_devices_present_work() - Handle new list of child devices
1969 * @work: Work struct embedded in struct hv_dr_work
1970 *
1971 * "Bus Relations" is the Windows term for "children of this
1972 * bus." The terminology is preserved here for people trying to
1973 * debug the interaction between Hyper-V and Linux. This
1974 * function is called when the parent partition reports a list
1975 * of functions that should be observed under this PCI Express
1976 * port (bus).
1977 *
1978 * This function updates the list, and must tolerate being
1979 * called multiple times with the same information. The typical
1980 * number of child devices is one, with very atypical cases
1981 * involving three or four, so the algorithms used here can be
1982 * simple and inefficient.
1983 *
1984 * It must also treat the omission of a previously observed device as
1985 * notification that the device no longer exists.
1986 *
Dexuan Cui021ad272018-03-15 14:20:53 +00001987 * Note that this function is serialized with hv_eject_device_work(),
1988 * because both are pushed to the ordered workqueue hbus->wq.
Jake Oshins4daace02016-02-16 21:56:23 +00001989 */
1990static void pci_devices_present_work(struct work_struct *work)
1991{
1992 u32 child_no;
1993 bool found;
Jake Oshins4daace02016-02-16 21:56:23 +00001994 struct pci_function_description *new_desc;
1995 struct hv_pci_dev *hpdev;
1996 struct hv_pcibus_device *hbus;
1997 struct list_head removed;
1998 struct hv_dr_work *dr_wrk;
1999 struct hv_dr_state *dr = NULL;
2000 unsigned long flags;
2001
2002 dr_wrk = container_of(work, struct hv_dr_work, wrk);
2003 hbus = dr_wrk->bus;
2004 kfree(dr_wrk);
2005
2006 INIT_LIST_HEAD(&removed);
2007
Jake Oshins4daace02016-02-16 21:56:23 +00002008 /* Pull this off the queue and process it if it was the last one. */
2009 spin_lock_irqsave(&hbus->device_list_lock, flags);
2010 while (!list_empty(&hbus->dr_list)) {
2011 dr = list_first_entry(&hbus->dr_list, struct hv_dr_state,
2012 list_entry);
2013 list_del(&dr->list_entry);
2014
2015 /* Throw this away if the list still has stuff in it. */
2016 if (!list_empty(&hbus->dr_list)) {
2017 kfree(dr);
2018 continue;
2019 }
2020 }
2021 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
2022
2023 if (!dr) {
Jake Oshins4daace02016-02-16 21:56:23 +00002024 put_hvpcibus(hbus);
2025 return;
2026 }
2027
2028 /* First, mark all existing children as reported missing. */
2029 spin_lock_irqsave(&hbus->device_list_lock, flags);
Stephen Hemminger5b8db8f2018-05-23 10:11:14 -07002030 list_for_each_entry(hpdev, &hbus->children, list_entry) {
2031 hpdev->reported_missing = true;
Jake Oshins4daace02016-02-16 21:56:23 +00002032 }
2033 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
2034
2035 /* Next, add back any reported devices. */
2036 for (child_no = 0; child_no < dr->device_count; child_no++) {
2037 found = false;
2038 new_desc = &dr->func[child_no];
2039
2040 spin_lock_irqsave(&hbus->device_list_lock, flags);
Stephen Hemminger5b8db8f2018-05-23 10:11:14 -07002041 list_for_each_entry(hpdev, &hbus->children, list_entry) {
2042 if ((hpdev->desc.win_slot.slot == new_desc->win_slot.slot) &&
Jake Oshins4daace02016-02-16 21:56:23 +00002043 (hpdev->desc.v_id == new_desc->v_id) &&
2044 (hpdev->desc.d_id == new_desc->d_id) &&
2045 (hpdev->desc.ser == new_desc->ser)) {
2046 hpdev->reported_missing = false;
2047 found = true;
2048 }
2049 }
2050 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
2051
2052 if (!found) {
2053 hpdev = new_pcichild_device(hbus, new_desc);
2054 if (!hpdev)
2055 dev_err(&hbus->hdev->device,
2056 "couldn't record a child device.\n");
2057 }
2058 }
2059
2060 /* Move missing children to a list on the stack. */
2061 spin_lock_irqsave(&hbus->device_list_lock, flags);
2062 do {
2063 found = false;
Stephen Hemminger5b8db8f2018-05-23 10:11:14 -07002064 list_for_each_entry(hpdev, &hbus->children, list_entry) {
Jake Oshins4daace02016-02-16 21:56:23 +00002065 if (hpdev->reported_missing) {
2066 found = true;
Stephen Hemminger8c99e122018-05-23 10:11:12 -07002067 put_pcichild(hpdev);
Wei Yongjun4f1cb012016-07-28 16:16:48 +00002068 list_move_tail(&hpdev->list_entry, &removed);
Jake Oshins4daace02016-02-16 21:56:23 +00002069 break;
2070 }
2071 }
2072 } while (found);
2073 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
2074
2075 /* Delete everything that should no longer exist. */
2076 while (!list_empty(&removed)) {
2077 hpdev = list_first_entry(&removed, struct hv_pci_dev,
2078 list_entry);
2079 list_del(&hpdev->list_entry);
Dexuan Cui340d4552019-03-04 21:34:49 +00002080
2081 if (hpdev->pci_slot)
2082 pci_destroy_slot(hpdev->pci_slot);
2083
Stephen Hemminger8c99e122018-05-23 10:11:12 -07002084 put_pcichild(hpdev);
Jake Oshins4daace02016-02-16 21:56:23 +00002085 }
2086
Jork Loeser691ac1d2017-05-24 13:41:24 -07002087 switch (hbus->state) {
Long Lid3a78d82017-03-23 14:58:10 -07002088 case hv_pcibus_installed:
2089 /*
Jork Loeser691ac1d2017-05-24 13:41:24 -07002090 * Tell the core to rescan bus
2091 * because there may have been changes.
2092 */
Jake Oshins4daace02016-02-16 21:56:23 +00002093 pci_lock_rescan_remove();
2094 pci_scan_child_bus(hbus->pci_bus);
Stephen Hemmingera15f2c082018-09-14 12:54:56 -07002095 hv_pci_assign_slots(hbus);
Jake Oshins4daace02016-02-16 21:56:23 +00002096 pci_unlock_rescan_remove();
Long Lid3a78d82017-03-23 14:58:10 -07002097 break;
2098
2099 case hv_pcibus_init:
2100 case hv_pcibus_probed:
Jake Oshins4daace02016-02-16 21:56:23 +00002101 survey_child_resources(hbus);
Long Lid3a78d82017-03-23 14:58:10 -07002102 break;
2103
2104 default:
2105 break;
Jake Oshins4daace02016-02-16 21:56:23 +00002106 }
2107
Jake Oshins4daace02016-02-16 21:56:23 +00002108 put_hvpcibus(hbus);
2109 kfree(dr);
2110}
2111
2112/**
2113 * hv_pci_devices_present() - Handles list of new children
2114 * @hbus: Root PCI bus, as understood by this driver
2115 * @relations: Packet from host listing children
2116 *
2117 * This function is invoked whenever a new list of devices for
2118 * this bus appears.
2119 */
2120static void hv_pci_devices_present(struct hv_pcibus_device *hbus,
2121 struct pci_bus_relations *relations)
2122{
2123 struct hv_dr_state *dr;
2124 struct hv_dr_work *dr_wrk;
2125 unsigned long flags;
Dexuan Cui948373b2018-03-15 14:22:00 +00002126 bool pending_dr;
Jake Oshins4daace02016-02-16 21:56:23 +00002127
Dexuan Cuiac82fc82019-11-24 21:33:52 -08002128 if (hbus->state == hv_pcibus_removing) {
2129 dev_info(&hbus->hdev->device,
2130 "PCI VMBus BUS_RELATIONS: ignored\n");
2131 return;
2132 }
2133
Jake Oshins4daace02016-02-16 21:56:23 +00002134 dr_wrk = kzalloc(sizeof(*dr_wrk), GFP_NOWAIT);
2135 if (!dr_wrk)
2136 return;
2137
2138 dr = kzalloc(offsetof(struct hv_dr_state, func) +
2139 (sizeof(struct pci_function_description) *
2140 (relations->device_count)), GFP_NOWAIT);
2141 if (!dr) {
2142 kfree(dr_wrk);
2143 return;
2144 }
2145
2146 INIT_WORK(&dr_wrk->wrk, pci_devices_present_work);
2147 dr_wrk->bus = hbus;
2148 dr->device_count = relations->device_count;
2149 if (dr->device_count != 0) {
2150 memcpy(dr->func, relations->func,
2151 sizeof(struct pci_function_description) *
2152 dr->device_count);
2153 }
2154
2155 spin_lock_irqsave(&hbus->device_list_lock, flags);
Dexuan Cui948373b2018-03-15 14:22:00 +00002156 /*
2157 * If pending_dr is true, we have already queued a work,
2158 * which will see the new dr. Otherwise, we need to
2159 * queue a new work.
2160 */
2161 pending_dr = !list_empty(&hbus->dr_list);
Jake Oshins4daace02016-02-16 21:56:23 +00002162 list_add_tail(&dr->list_entry, &hbus->dr_list);
2163 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
2164
Dexuan Cui948373b2018-03-15 14:22:00 +00002165 if (pending_dr) {
2166 kfree(dr_wrk);
2167 } else {
2168 get_hvpcibus(hbus);
2169 queue_work(hbus->wq, &dr_wrk->wrk);
2170 }
Jake Oshins4daace02016-02-16 21:56:23 +00002171}
2172
2173/**
2174 * hv_eject_device_work() - Asynchronously handles ejection
2175 * @work: Work struct embedded in internal device struct
2176 *
2177 * This function handles ejecting a device. Windows will
2178 * attempt to gracefully eject a device, waiting 60 seconds to
2179 * hear back from the guest OS that this completed successfully.
2180 * If this timer expires, the device will be forcibly removed.
2181 */
2182static void hv_eject_device_work(struct work_struct *work)
2183{
2184 struct pci_eject_response *ejct_pkt;
Dexuan Cui4df591b22019-06-21 23:45:23 +00002185 struct hv_pcibus_device *hbus;
Jake Oshins4daace02016-02-16 21:56:23 +00002186 struct hv_pci_dev *hpdev;
2187 struct pci_dev *pdev;
2188 unsigned long flags;
2189 int wslot;
2190 struct {
2191 struct pci_packet pkt;
Dexuan Cui0c6045d2016-08-23 04:45:51 +00002192 u8 buffer[sizeof(struct pci_eject_response)];
Jake Oshins4daace02016-02-16 21:56:23 +00002193 } ctxt;
2194
2195 hpdev = container_of(work, struct hv_pci_dev, wrk);
Dexuan Cui4df591b22019-06-21 23:45:23 +00002196 hbus = hpdev->hbus;
Jake Oshins4daace02016-02-16 21:56:23 +00002197
Dexuan Cuifca288c2018-03-15 14:21:43 +00002198 WARN_ON(hpdev->state != hv_pcichild_ejecting);
Jake Oshins4daace02016-02-16 21:56:23 +00002199
2200 /*
2201 * Ejection can come before or after the PCI bus has been set up, so
2202 * attempt to find it and tear down the bus state, if it exists. This
2203 * must be done without constructs like pci_domain_nr(hbus->pci_bus)
2204 * because hbus->pci_bus may not exist yet.
2205 */
2206 wslot = wslot_to_devfn(hpdev->desc.win_slot.slot);
Dexuan Cui4df591b22019-06-21 23:45:23 +00002207 pdev = pci_get_domain_bus_and_slot(hbus->sysdata.domain, 0, wslot);
Jake Oshins4daace02016-02-16 21:56:23 +00002208 if (pdev) {
Long Li414428c2017-03-23 14:58:32 -07002209 pci_lock_rescan_remove();
Jake Oshins4daace02016-02-16 21:56:23 +00002210 pci_stop_and_remove_bus_device(pdev);
2211 pci_dev_put(pdev);
Long Li414428c2017-03-23 14:58:32 -07002212 pci_unlock_rescan_remove();
Jake Oshins4daace02016-02-16 21:56:23 +00002213 }
2214
Dexuan Cui4df591b22019-06-21 23:45:23 +00002215 spin_lock_irqsave(&hbus->device_list_lock, flags);
Dexuan Cuie74d2eb2016-11-10 07:19:52 +00002216 list_del(&hpdev->list_entry);
Dexuan Cui4df591b22019-06-21 23:45:23 +00002217 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
Dexuan Cuie74d2eb2016-11-10 07:19:52 +00002218
Stephen Hemmingera15f2c082018-09-14 12:54:56 -07002219 if (hpdev->pci_slot)
2220 pci_destroy_slot(hpdev->pci_slot);
2221
Jake Oshins4daace02016-02-16 21:56:23 +00002222 memset(&ctxt, 0, sizeof(ctxt));
2223 ejct_pkt = (struct pci_eject_response *)&ctxt.pkt.message;
Dexuan Cui0c6045d2016-08-23 04:45:51 +00002224 ejct_pkt->message_type.type = PCI_EJECTION_COMPLETE;
Jake Oshins4daace02016-02-16 21:56:23 +00002225 ejct_pkt->wslot.slot = hpdev->desc.win_slot.slot;
Dexuan Cui4df591b22019-06-21 23:45:23 +00002226 vmbus_sendpacket(hbus->hdev->channel, ejct_pkt,
Jake Oshins4daace02016-02-16 21:56:23 +00002227 sizeof(*ejct_pkt), (unsigned long)&ctxt.pkt,
2228 VM_PKT_DATA_INBAND, 0);
2229
Dexuan Cui05f151a2019-03-04 21:34:48 +00002230 /* For the get_pcichild() in hv_pci_eject_device() */
2231 put_pcichild(hpdev);
2232 /* For the two refs got in new_pcichild_device() */
Stephen Hemminger8c99e122018-05-23 10:11:12 -07002233 put_pcichild(hpdev);
2234 put_pcichild(hpdev);
Dexuan Cui4df591b22019-06-21 23:45:23 +00002235 /* hpdev has been freed. Do not use it any more. */
2236
2237 put_hvpcibus(hbus);
Jake Oshins4daace02016-02-16 21:56:23 +00002238}
2239
2240/**
2241 * hv_pci_eject_device() - Handles device ejection
2242 * @hpdev: Internal device tracking struct
2243 *
2244 * This function is invoked when an ejection packet arrives. It
2245 * just schedules work so that we don't re-enter the packet
2246 * delivery code handling the ejection.
2247 */
2248static void hv_pci_eject_device(struct hv_pci_dev *hpdev)
2249{
Dexuan Cuiac82fc82019-11-24 21:33:52 -08002250 struct hv_pcibus_device *hbus = hpdev->hbus;
2251 struct hv_device *hdev = hbus->hdev;
2252
2253 if (hbus->state == hv_pcibus_removing) {
2254 dev_info(&hdev->device, "PCI VMBus EJECT: ignored\n");
2255 return;
2256 }
2257
Jake Oshins4daace02016-02-16 21:56:23 +00002258 hpdev->state = hv_pcichild_ejecting;
Stephen Hemminger8c99e122018-05-23 10:11:12 -07002259 get_pcichild(hpdev);
Jake Oshins4daace02016-02-16 21:56:23 +00002260 INIT_WORK(&hpdev->wrk, hv_eject_device_work);
Dexuan Cuiac82fc82019-11-24 21:33:52 -08002261 get_hvpcibus(hbus);
2262 queue_work(hbus->wq, &hpdev->wrk);
Jake Oshins4daace02016-02-16 21:56:23 +00002263}
2264
2265/**
2266 * hv_pci_onchannelcallback() - Handles incoming packets
2267 * @context: Internal bus tracking struct
2268 *
2269 * This function is invoked whenever the host sends a packet to
2270 * this channel (which is private to this root PCI bus).
2271 */
2272static void hv_pci_onchannelcallback(void *context)
2273{
2274 const int packet_size = 0x100;
2275 int ret;
2276 struct hv_pcibus_device *hbus = context;
2277 u32 bytes_recvd;
2278 u64 req_id;
2279 struct vmpacket_descriptor *desc;
2280 unsigned char *buffer;
2281 int bufferlen = packet_size;
2282 struct pci_packet *comp_packet;
2283 struct pci_response *response;
2284 struct pci_incoming_message *new_message;
2285 struct pci_bus_relations *bus_rel;
Dexuan Cuie5d2f912019-08-22 05:05:37 +00002286 struct pci_dev_inval_block *inval;
Jake Oshins4daace02016-02-16 21:56:23 +00002287 struct pci_dev_incoming *dev_message;
2288 struct hv_pci_dev *hpdev;
2289
2290 buffer = kmalloc(bufferlen, GFP_ATOMIC);
2291 if (!buffer)
2292 return;
2293
2294 while (1) {
2295 ret = vmbus_recvpacket_raw(hbus->hdev->channel, buffer,
2296 bufferlen, &bytes_recvd, &req_id);
2297
2298 if (ret == -ENOBUFS) {
2299 kfree(buffer);
2300 /* Handle large packet */
2301 bufferlen = bytes_recvd;
2302 buffer = kmalloc(bytes_recvd, GFP_ATOMIC);
2303 if (!buffer)
2304 return;
2305 continue;
2306 }
2307
Vitaly Kuznetsov837d7412016-06-17 12:45:30 -05002308 /* Zero length indicates there are no more packets. */
2309 if (ret || !bytes_recvd)
2310 break;
2311
Jake Oshins4daace02016-02-16 21:56:23 +00002312 /*
2313 * All incoming packets must be at least as large as a
2314 * response.
2315 */
Vitaly Kuznetsov60fcdac2016-05-30 16:17:58 +02002316 if (bytes_recvd <= sizeof(struct pci_response))
Vitaly Kuznetsov837d7412016-06-17 12:45:30 -05002317 continue;
Jake Oshins4daace02016-02-16 21:56:23 +00002318 desc = (struct vmpacket_descriptor *)buffer;
2319
2320 switch (desc->type) {
2321 case VM_PKT_COMP:
2322
2323 /*
2324 * The host is trusted, and thus it's safe to interpret
2325 * this transaction ID as a pointer.
2326 */
2327 comp_packet = (struct pci_packet *)req_id;
2328 response = (struct pci_response *)buffer;
2329 comp_packet->completion_func(comp_packet->compl_ctxt,
2330 response,
2331 bytes_recvd);
Vitaly Kuznetsov60fcdac2016-05-30 16:17:58 +02002332 break;
Jake Oshins4daace02016-02-16 21:56:23 +00002333
2334 case VM_PKT_DATA_INBAND:
2335
2336 new_message = (struct pci_incoming_message *)buffer;
Dexuan Cui0c6045d2016-08-23 04:45:51 +00002337 switch (new_message->message_type.type) {
Jake Oshins4daace02016-02-16 21:56:23 +00002338 case PCI_BUS_RELATIONS:
2339
2340 bus_rel = (struct pci_bus_relations *)buffer;
2341 if (bytes_recvd <
2342 offsetof(struct pci_bus_relations, func) +
2343 (sizeof(struct pci_function_description) *
2344 (bus_rel->device_count))) {
2345 dev_err(&hbus->hdev->device,
2346 "bus relations too small\n");
2347 break;
2348 }
2349
2350 hv_pci_devices_present(hbus, bus_rel);
2351 break;
2352
2353 case PCI_EJECT:
2354
2355 dev_message = (struct pci_dev_incoming *)buffer;
2356 hpdev = get_pcichild_wslot(hbus,
2357 dev_message->wslot.slot);
2358 if (hpdev) {
2359 hv_pci_eject_device(hpdev);
Stephen Hemminger8c99e122018-05-23 10:11:12 -07002360 put_pcichild(hpdev);
Jake Oshins4daace02016-02-16 21:56:23 +00002361 }
2362 break;
2363
Dexuan Cuie5d2f912019-08-22 05:05:37 +00002364 case PCI_INVALIDATE_BLOCK:
2365
2366 inval = (struct pci_dev_inval_block *)buffer;
2367 hpdev = get_pcichild_wslot(hbus,
2368 inval->wslot.slot);
2369 if (hpdev) {
2370 if (hpdev->block_invalidate) {
2371 hpdev->block_invalidate(
2372 hpdev->invalidate_context,
2373 inval->block_mask);
2374 }
2375 put_pcichild(hpdev);
2376 }
2377 break;
2378
Jake Oshins4daace02016-02-16 21:56:23 +00002379 default:
2380 dev_warn(&hbus->hdev->device,
2381 "Unimplemented protocol message %x\n",
Dexuan Cui0c6045d2016-08-23 04:45:51 +00002382 new_message->message_type.type);
Jake Oshins4daace02016-02-16 21:56:23 +00002383 break;
2384 }
2385 break;
2386
2387 default:
2388 dev_err(&hbus->hdev->device,
2389 "unhandled packet type %d, tid %llx len %d\n",
2390 desc->type, req_id, bytes_recvd);
2391 break;
2392 }
Jake Oshins4daace02016-02-16 21:56:23 +00002393 }
Vitaly Kuznetsov60fcdac2016-05-30 16:17:58 +02002394
2395 kfree(buffer);
Jake Oshins4daace02016-02-16 21:56:23 +00002396}
2397
2398/**
2399 * hv_pci_protocol_negotiation() - Set up protocol
2400 * @hdev: VMBus's tracking struct for this root PCI bus
2401 *
2402 * This driver is intended to support running on Windows 10
2403 * (server) and later versions. It will not run on earlier
2404 * versions, as they assume that many of the operations which
2405 * Linux needs accomplished with a spinlock held were done via
2406 * asynchronous messaging via VMBus. Windows 10 increases the
2407 * surface area of PCI emulation so that these actions can take
2408 * place by suspending a virtual processor for their duration.
2409 *
2410 * This function negotiates the channel protocol version,
2411 * failing if the host doesn't support the necessary protocol
2412 * level.
2413 */
Dexuan Cuia8e37502019-11-24 21:33:51 -08002414static int hv_pci_protocol_negotiation(struct hv_device *hdev,
2415 enum pci_protocol_version_t version[],
2416 int num_version)
Jake Oshins4daace02016-02-16 21:56:23 +00002417{
2418 struct pci_version_request *version_req;
2419 struct hv_pci_compl comp_pkt;
2420 struct pci_packet *pkt;
2421 int ret;
Jork Loeserb1db7e72017-05-24 13:41:27 -07002422 int i;
Jake Oshins4daace02016-02-16 21:56:23 +00002423
2424 /*
2425 * Initiate the handshake with the host and negotiate
2426 * a version that the host can support. We start with the
2427 * highest version number and go down if the host cannot
2428 * support it.
2429 */
2430 pkt = kzalloc(sizeof(*pkt) + sizeof(*version_req), GFP_KERNEL);
2431 if (!pkt)
2432 return -ENOMEM;
2433
2434 init_completion(&comp_pkt.host_event);
2435 pkt->completion_func = hv_pci_generic_compl;
2436 pkt->compl_ctxt = &comp_pkt;
2437 version_req = (struct pci_version_request *)&pkt->message;
Dexuan Cui0c6045d2016-08-23 04:45:51 +00002438 version_req->message_type.type = PCI_QUERY_PROTOCOL_VERSION;
Jake Oshins4daace02016-02-16 21:56:23 +00002439
Dexuan Cuia8e37502019-11-24 21:33:51 -08002440 for (i = 0; i < num_version; i++) {
2441 version_req->protocol_version = version[i];
Jork Loeserb1db7e72017-05-24 13:41:27 -07002442 ret = vmbus_sendpacket(hdev->channel, version_req,
2443 sizeof(struct pci_version_request),
2444 (unsigned long)pkt, VM_PKT_DATA_INBAND,
2445 VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
Dexuan Cuic3635da2018-05-23 21:12:01 +00002446 if (!ret)
2447 ret = wait_for_response(hdev, &comp_pkt.host_event);
2448
Jork Loeserb1db7e72017-05-24 13:41:27 -07002449 if (ret) {
2450 dev_err(&hdev->device,
Dexuan Cuic3635da2018-05-23 21:12:01 +00002451 "PCI Pass-through VSP failed to request version: %d",
Jork Loeserb1db7e72017-05-24 13:41:27 -07002452 ret);
2453 goto exit;
2454 }
Jake Oshins4daace02016-02-16 21:56:23 +00002455
Jork Loeserb1db7e72017-05-24 13:41:27 -07002456 if (comp_pkt.completion_status >= 0) {
Dexuan Cuia8e37502019-11-24 21:33:51 -08002457 pci_protocol_version = version[i];
Jork Loeserb1db7e72017-05-24 13:41:27 -07002458 dev_info(&hdev->device,
2459 "PCI VMBus probing: Using version %#x\n",
2460 pci_protocol_version);
2461 goto exit;
2462 }
2463
2464 if (comp_pkt.completion_status != STATUS_REVISION_MISMATCH) {
2465 dev_err(&hdev->device,
2466 "PCI Pass-through VSP failed version request: %#x",
2467 comp_pkt.completion_status);
2468 ret = -EPROTO;
2469 goto exit;
2470 }
2471
2472 reinit_completion(&comp_pkt.host_event);
Jake Oshins4daace02016-02-16 21:56:23 +00002473 }
2474
Jork Loeserb1db7e72017-05-24 13:41:27 -07002475 dev_err(&hdev->device,
2476 "PCI pass-through VSP failed to find supported version");
2477 ret = -EPROTO;
Jake Oshins4daace02016-02-16 21:56:23 +00002478
2479exit:
2480 kfree(pkt);
2481 return ret;
2482}
2483
2484/**
2485 * hv_pci_free_bridge_windows() - Release memory regions for the
2486 * bus
2487 * @hbus: Root PCI bus, as understood by this driver
2488 */
2489static void hv_pci_free_bridge_windows(struct hv_pcibus_device *hbus)
2490{
2491 /*
2492 * Set the resources back to the way they looked when they
2493 * were allocated by setting IORESOURCE_BUSY again.
2494 */
2495
2496 if (hbus->low_mmio_space && hbus->low_mmio_res) {
2497 hbus->low_mmio_res->flags |= IORESOURCE_BUSY;
Jake Oshins696ca5e2016-04-05 10:22:52 -07002498 vmbus_free_mmio(hbus->low_mmio_res->start,
2499 resource_size(hbus->low_mmio_res));
Jake Oshins4daace02016-02-16 21:56:23 +00002500 }
2501
2502 if (hbus->high_mmio_space && hbus->high_mmio_res) {
2503 hbus->high_mmio_res->flags |= IORESOURCE_BUSY;
Jake Oshins696ca5e2016-04-05 10:22:52 -07002504 vmbus_free_mmio(hbus->high_mmio_res->start,
2505 resource_size(hbus->high_mmio_res));
Jake Oshins4daace02016-02-16 21:56:23 +00002506 }
2507}
2508
2509/**
2510 * hv_pci_allocate_bridge_windows() - Allocate memory regions
2511 * for the bus
2512 * @hbus: Root PCI bus, as understood by this driver
2513 *
2514 * This function calls vmbus_allocate_mmio(), which is itself a
2515 * bit of a compromise. Ideally, we might change the pnp layer
2516 * in the kernel such that it comprehends either PCI devices
2517 * which are "grandchildren of ACPI," with some intermediate bus
2518 * node (in this case, VMBus) or change it such that it
2519 * understands VMBus. The pnp layer, however, has been declared
2520 * deprecated, and not subject to change.
2521 *
2522 * The workaround, implemented here, is to ask VMBus to allocate
2523 * MMIO space for this bus. VMBus itself knows which ranges are
2524 * appropriate by looking at its own ACPI objects. Then, after
2525 * these ranges are claimed, they're modified to look like they
2526 * would have looked if the ACPI and pnp code had allocated
2527 * bridge windows. These descriptors have to exist in this form
2528 * in order to satisfy the code which will get invoked when the
2529 * endpoint PCI function driver calls request_mem_region() or
2530 * request_mem_region_exclusive().
2531 *
2532 * Return: 0 on success, -errno on failure
2533 */
2534static int hv_pci_allocate_bridge_windows(struct hv_pcibus_device *hbus)
2535{
2536 resource_size_t align;
2537 int ret;
2538
2539 if (hbus->low_mmio_space) {
2540 align = 1ULL << (63 - __builtin_clzll(hbus->low_mmio_space));
2541 ret = vmbus_allocate_mmio(&hbus->low_mmio_res, hbus->hdev, 0,
2542 (u64)(u32)0xffffffff,
2543 hbus->low_mmio_space,
2544 align, false);
2545 if (ret) {
2546 dev_err(&hbus->hdev->device,
2547 "Need %#llx of low MMIO space. Consider reconfiguring the VM.\n",
2548 hbus->low_mmio_space);
2549 return ret;
2550 }
2551
2552 /* Modify this resource to become a bridge window. */
2553 hbus->low_mmio_res->flags |= IORESOURCE_WINDOW;
2554 hbus->low_mmio_res->flags &= ~IORESOURCE_BUSY;
2555 pci_add_resource(&hbus->resources_for_children,
2556 hbus->low_mmio_res);
2557 }
2558
2559 if (hbus->high_mmio_space) {
2560 align = 1ULL << (63 - __builtin_clzll(hbus->high_mmio_space));
2561 ret = vmbus_allocate_mmio(&hbus->high_mmio_res, hbus->hdev,
2562 0x100000000, -1,
2563 hbus->high_mmio_space, align,
2564 false);
2565 if (ret) {
2566 dev_err(&hbus->hdev->device,
2567 "Need %#llx of high MMIO space. Consider reconfiguring the VM.\n",
2568 hbus->high_mmio_space);
2569 goto release_low_mmio;
2570 }
2571
2572 /* Modify this resource to become a bridge window. */
2573 hbus->high_mmio_res->flags |= IORESOURCE_WINDOW;
2574 hbus->high_mmio_res->flags &= ~IORESOURCE_BUSY;
2575 pci_add_resource(&hbus->resources_for_children,
2576 hbus->high_mmio_res);
2577 }
2578
2579 return 0;
2580
2581release_low_mmio:
2582 if (hbus->low_mmio_res) {
Jake Oshins696ca5e2016-04-05 10:22:52 -07002583 vmbus_free_mmio(hbus->low_mmio_res->start,
2584 resource_size(hbus->low_mmio_res));
Jake Oshins4daace02016-02-16 21:56:23 +00002585 }
2586
2587 return ret;
2588}
2589
2590/**
2591 * hv_allocate_config_window() - Find MMIO space for PCI Config
2592 * @hbus: Root PCI bus, as understood by this driver
2593 *
2594 * This function claims memory-mapped I/O space for accessing
2595 * configuration space for the functions on this bus.
2596 *
2597 * Return: 0 on success, -errno on failure
2598 */
2599static int hv_allocate_config_window(struct hv_pcibus_device *hbus)
2600{
2601 int ret;
2602
2603 /*
2604 * Set up a region of MMIO space to use for accessing configuration
2605 * space.
2606 */
2607 ret = vmbus_allocate_mmio(&hbus->mem_config, hbus->hdev, 0, -1,
2608 PCI_CONFIG_MMIO_LENGTH, 0x1000, false);
2609 if (ret)
2610 return ret;
2611
2612 /*
2613 * vmbus_allocate_mmio() gets used for allocating both device endpoint
2614 * resource claims (those which cannot be overlapped) and the ranges
2615 * which are valid for the children of this bus, which are intended
2616 * to be overlapped by those children. Set the flag on this claim
2617 * meaning that this region can't be overlapped.
2618 */
2619
2620 hbus->mem_config->flags |= IORESOURCE_BUSY;
2621
2622 return 0;
2623}
2624
2625static void hv_free_config_window(struct hv_pcibus_device *hbus)
2626{
Jake Oshins696ca5e2016-04-05 10:22:52 -07002627 vmbus_free_mmio(hbus->mem_config->start, PCI_CONFIG_MMIO_LENGTH);
Jake Oshins4daace02016-02-16 21:56:23 +00002628}
2629
2630/**
2631 * hv_pci_enter_d0() - Bring the "bus" into the D0 power state
2632 * @hdev: VMBus's tracking struct for this root PCI bus
2633 *
2634 * Return: 0 on success, -errno on failure
2635 */
2636static int hv_pci_enter_d0(struct hv_device *hdev)
2637{
2638 struct hv_pcibus_device *hbus = hv_get_drvdata(hdev);
2639 struct pci_bus_d0_entry *d0_entry;
2640 struct hv_pci_compl comp_pkt;
2641 struct pci_packet *pkt;
2642 int ret;
2643
2644 /*
2645 * Tell the host that the bus is ready to use, and moved into the
2646 * powered-on state. This includes telling the host which region
2647 * of memory-mapped I/O space has been chosen for configuration space
2648 * access.
2649 */
2650 pkt = kzalloc(sizeof(*pkt) + sizeof(*d0_entry), GFP_KERNEL);
2651 if (!pkt)
2652 return -ENOMEM;
2653
2654 init_completion(&comp_pkt.host_event);
2655 pkt->completion_func = hv_pci_generic_compl;
2656 pkt->compl_ctxt = &comp_pkt;
2657 d0_entry = (struct pci_bus_d0_entry *)&pkt->message;
Dexuan Cui0c6045d2016-08-23 04:45:51 +00002658 d0_entry->message_type.type = PCI_BUS_D0ENTRY;
Jake Oshins4daace02016-02-16 21:56:23 +00002659 d0_entry->mmio_base = hbus->mem_config->start;
2660
2661 ret = vmbus_sendpacket(hdev->channel, d0_entry, sizeof(*d0_entry),
2662 (unsigned long)pkt, VM_PKT_DATA_INBAND,
2663 VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
Dexuan Cuic3635da2018-05-23 21:12:01 +00002664 if (!ret)
2665 ret = wait_for_response(hdev, &comp_pkt.host_event);
2666
Jake Oshins4daace02016-02-16 21:56:23 +00002667 if (ret)
2668 goto exit;
2669
Jake Oshins4daace02016-02-16 21:56:23 +00002670 if (comp_pkt.completion_status < 0) {
2671 dev_err(&hdev->device,
2672 "PCI Pass-through VSP failed D0 Entry with status %x\n",
2673 comp_pkt.completion_status);
2674 ret = -EPROTO;
2675 goto exit;
2676 }
2677
2678 ret = 0;
2679
2680exit:
2681 kfree(pkt);
2682 return ret;
2683}
2684
2685/**
2686 * hv_pci_query_relations() - Ask host to send list of child
2687 * devices
2688 * @hdev: VMBus's tracking struct for this root PCI bus
2689 *
2690 * Return: 0 on success, -errno on failure
2691 */
2692static int hv_pci_query_relations(struct hv_device *hdev)
2693{
2694 struct hv_pcibus_device *hbus = hv_get_drvdata(hdev);
2695 struct pci_message message;
2696 struct completion comp;
2697 int ret;
2698
2699 /* Ask the host to send along the list of child devices */
2700 init_completion(&comp);
2701 if (cmpxchg(&hbus->survey_event, NULL, &comp))
2702 return -ENOTEMPTY;
2703
2704 memset(&message, 0, sizeof(message));
Dexuan Cui0c6045d2016-08-23 04:45:51 +00002705 message.type = PCI_QUERY_BUS_RELATIONS;
Jake Oshins4daace02016-02-16 21:56:23 +00002706
2707 ret = vmbus_sendpacket(hdev->channel, &message, sizeof(message),
2708 0, VM_PKT_DATA_INBAND, 0);
Dexuan Cuic3635da2018-05-23 21:12:01 +00002709 if (!ret)
2710 ret = wait_for_response(hdev, &comp);
Jake Oshins4daace02016-02-16 21:56:23 +00002711
Dexuan Cuic3635da2018-05-23 21:12:01 +00002712 return ret;
Jake Oshins4daace02016-02-16 21:56:23 +00002713}
2714
2715/**
2716 * hv_send_resources_allocated() - Report local resource choices
2717 * @hdev: VMBus's tracking struct for this root PCI bus
2718 *
2719 * The host OS is expecting to be sent a request as a message
2720 * which contains all the resources that the device will use.
2721 * The response contains those same resources, "translated"
2722 * which is to say, the values which should be used by the
2723 * hardware, when it delivers an interrupt. (MMIO resources are
2724 * used in local terms.) This is nice for Windows, and lines up
2725 * with the FDO/PDO split, which doesn't exist in Linux. Linux
2726 * is deeply expecting to scan an emulated PCI configuration
2727 * space. So this message is sent here only to drive the state
2728 * machine on the host forward.
2729 *
2730 * Return: 0 on success, -errno on failure
2731 */
2732static int hv_send_resources_allocated(struct hv_device *hdev)
2733{
2734 struct hv_pcibus_device *hbus = hv_get_drvdata(hdev);
2735 struct pci_resources_assigned *res_assigned;
Jork Loeser7dcf90e2017-05-24 13:41:28 -07002736 struct pci_resources_assigned2 *res_assigned2;
Jake Oshins4daace02016-02-16 21:56:23 +00002737 struct hv_pci_compl comp_pkt;
2738 struct hv_pci_dev *hpdev;
2739 struct pci_packet *pkt;
Jork Loeser7dcf90e2017-05-24 13:41:28 -07002740 size_t size_res;
Jake Oshins4daace02016-02-16 21:56:23 +00002741 u32 wslot;
2742 int ret;
2743
Jork Loeser7dcf90e2017-05-24 13:41:28 -07002744 size_res = (pci_protocol_version < PCI_PROTOCOL_VERSION_1_2)
2745 ? sizeof(*res_assigned) : sizeof(*res_assigned2);
2746
2747 pkt = kmalloc(sizeof(*pkt) + size_res, GFP_KERNEL);
Jake Oshins4daace02016-02-16 21:56:23 +00002748 if (!pkt)
2749 return -ENOMEM;
2750
2751 ret = 0;
2752
2753 for (wslot = 0; wslot < 256; wslot++) {
2754 hpdev = get_pcichild_wslot(hbus, wslot);
2755 if (!hpdev)
2756 continue;
2757
Jork Loeser7dcf90e2017-05-24 13:41:28 -07002758 memset(pkt, 0, sizeof(*pkt) + size_res);
Jake Oshins4daace02016-02-16 21:56:23 +00002759 init_completion(&comp_pkt.host_event);
2760 pkt->completion_func = hv_pci_generic_compl;
2761 pkt->compl_ctxt = &comp_pkt;
Jake Oshins4daace02016-02-16 21:56:23 +00002762
Jork Loeser7dcf90e2017-05-24 13:41:28 -07002763 if (pci_protocol_version < PCI_PROTOCOL_VERSION_1_2) {
2764 res_assigned =
2765 (struct pci_resources_assigned *)&pkt->message;
2766 res_assigned->message_type.type =
2767 PCI_RESOURCES_ASSIGNED;
2768 res_assigned->wslot.slot = hpdev->desc.win_slot.slot;
2769 } else {
2770 res_assigned2 =
2771 (struct pci_resources_assigned2 *)&pkt->message;
2772 res_assigned2->message_type.type =
2773 PCI_RESOURCES_ASSIGNED2;
2774 res_assigned2->wslot.slot = hpdev->desc.win_slot.slot;
2775 }
Stephen Hemminger8c99e122018-05-23 10:11:12 -07002776 put_pcichild(hpdev);
Jake Oshins4daace02016-02-16 21:56:23 +00002777
Jork Loeser7dcf90e2017-05-24 13:41:28 -07002778 ret = vmbus_sendpacket(hdev->channel, &pkt->message,
2779 size_res, (unsigned long)pkt,
2780 VM_PKT_DATA_INBAND,
2781 VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
Dexuan Cuic3635da2018-05-23 21:12:01 +00002782 if (!ret)
2783 ret = wait_for_response(hdev, &comp_pkt.host_event);
Jake Oshins4daace02016-02-16 21:56:23 +00002784 if (ret)
2785 break;
2786
Jake Oshins4daace02016-02-16 21:56:23 +00002787 if (comp_pkt.completion_status < 0) {
2788 ret = -EPROTO;
2789 dev_err(&hdev->device,
2790 "resource allocated returned 0x%x",
2791 comp_pkt.completion_status);
2792 break;
2793 }
2794 }
2795
2796 kfree(pkt);
2797 return ret;
2798}
2799
2800/**
2801 * hv_send_resources_released() - Report local resources
2802 * released
2803 * @hdev: VMBus's tracking struct for this root PCI bus
2804 *
2805 * Return: 0 on success, -errno on failure
2806 */
2807static int hv_send_resources_released(struct hv_device *hdev)
2808{
2809 struct hv_pcibus_device *hbus = hv_get_drvdata(hdev);
2810 struct pci_child_message pkt;
2811 struct hv_pci_dev *hpdev;
2812 u32 wslot;
2813 int ret;
2814
2815 for (wslot = 0; wslot < 256; wslot++) {
2816 hpdev = get_pcichild_wslot(hbus, wslot);
2817 if (!hpdev)
2818 continue;
2819
2820 memset(&pkt, 0, sizeof(pkt));
Dexuan Cui0c6045d2016-08-23 04:45:51 +00002821 pkt.message_type.type = PCI_RESOURCES_RELEASED;
Jake Oshins4daace02016-02-16 21:56:23 +00002822 pkt.wslot.slot = hpdev->desc.win_slot.slot;
2823
Stephen Hemminger8c99e122018-05-23 10:11:12 -07002824 put_pcichild(hpdev);
Jake Oshins4daace02016-02-16 21:56:23 +00002825
2826 ret = vmbus_sendpacket(hdev->channel, &pkt, sizeof(pkt), 0,
2827 VM_PKT_DATA_INBAND, 0);
2828 if (ret)
2829 return ret;
2830 }
2831
2832 return 0;
2833}
2834
2835static void get_hvpcibus(struct hv_pcibus_device *hbus)
2836{
Stephen Hemminger6708be92018-05-23 10:11:13 -07002837 refcount_inc(&hbus->remove_lock);
Jake Oshins4daace02016-02-16 21:56:23 +00002838}
2839
2840static void put_hvpcibus(struct hv_pcibus_device *hbus)
2841{
Stephen Hemminger6708be92018-05-23 10:11:13 -07002842 if (refcount_dec_and_test(&hbus->remove_lock))
Jake Oshins4daace02016-02-16 21:56:23 +00002843 complete(&hbus->remove_event);
2844}
2845
Haiyang Zhangbe700102019-08-15 17:01:37 +00002846#define HVPCI_DOM_MAP_SIZE (64 * 1024)
2847static DECLARE_BITMAP(hvpci_dom_map, HVPCI_DOM_MAP_SIZE);
2848
2849/*
2850 * PCI domain number 0 is used by emulated devices on Gen1 VMs, so define 0
2851 * as invalid for passthrough PCI devices of this driver.
2852 */
2853#define HVPCI_DOM_INVALID 0
2854
2855/**
2856 * hv_get_dom_num() - Get a valid PCI domain number
2857 * Check if the PCI domain number is in use, and return another number if
2858 * it is in use.
2859 *
2860 * @dom: Requested domain number
2861 *
2862 * return: domain number on success, HVPCI_DOM_INVALID on failure
2863 */
2864static u16 hv_get_dom_num(u16 dom)
2865{
2866 unsigned int i;
2867
2868 if (test_and_set_bit(dom, hvpci_dom_map) == 0)
2869 return dom;
2870
2871 for_each_clear_bit(i, hvpci_dom_map, HVPCI_DOM_MAP_SIZE) {
2872 if (test_and_set_bit(i, hvpci_dom_map) == 0)
2873 return i;
2874 }
2875
2876 return HVPCI_DOM_INVALID;
2877}
2878
2879/**
2880 * hv_put_dom_num() - Mark the PCI domain number as free
2881 * @dom: Domain number to be freed
2882 */
2883static void hv_put_dom_num(u16 dom)
2884{
2885 clear_bit(dom, hvpci_dom_map);
2886}
2887
Jake Oshins4daace02016-02-16 21:56:23 +00002888/**
2889 * hv_pci_probe() - New VMBus channel probe, for a root PCI bus
2890 * @hdev: VMBus's tracking struct for this root PCI bus
2891 * @dev_id: Identifies the device itself
2892 *
2893 * Return: 0 on success, -errno on failure
2894 */
2895static int hv_pci_probe(struct hv_device *hdev,
2896 const struct hv_vmbus_device_id *dev_id)
2897{
2898 struct hv_pcibus_device *hbus;
Haiyang Zhangbe700102019-08-15 17:01:37 +00002899 u16 dom_req, dom;
Marc Zyngier467a3bb2019-08-06 15:23:33 +01002900 char *name;
Jake Oshins4daace02016-02-16 21:56:23 +00002901 int ret;
2902
Jork Loeserbe66b672017-05-24 13:41:25 -07002903 /*
2904 * hv_pcibus_device contains the hypercall arguments for retargeting in
2905 * hv_irq_unmask(). Those must not cross a page boundary.
2906 */
2907 BUILD_BUG_ON(sizeof(*hbus) > PAGE_SIZE);
2908
2909 hbus = (struct hv_pcibus_device *)get_zeroed_page(GFP_KERNEL);
Jake Oshins4daace02016-02-16 21:56:23 +00002910 if (!hbus)
2911 return -ENOMEM;
Long Lid3a78d82017-03-23 14:58:10 -07002912 hbus->state = hv_pcibus_init;
Jake Oshins4daace02016-02-16 21:56:23 +00002913
2914 /*
Haiyang Zhangbe700102019-08-15 17:01:37 +00002915 * The PCI bus "domain" is what is called "segment" in ACPI and other
2916 * specs. Pull it from the instance ID, to get something usually
2917 * unique. In rare cases of collision, we will find out another number
2918 * not in use.
2919 *
2920 * Note that, since this code only runs in a Hyper-V VM, Hyper-V
2921 * together with this guest driver can guarantee that (1) The only
2922 * domain used by Gen1 VMs for something that looks like a physical
2923 * PCI bus (which is actually emulated by the hypervisor) is domain 0.
2924 * (2) There will be no overlap between domains (after fixing possible
2925 * collisions) in the same VM.
Jake Oshins4daace02016-02-16 21:56:23 +00002926 */
Haiyang Zhangf73f8a52019-08-15 17:01:45 +00002927 dom_req = hdev->dev_instance.b[5] << 8 | hdev->dev_instance.b[4];
Haiyang Zhangbe700102019-08-15 17:01:37 +00002928 dom = hv_get_dom_num(dom_req);
2929
2930 if (dom == HVPCI_DOM_INVALID) {
2931 dev_err(&hdev->device,
2932 "Unable to use dom# 0x%hx or other numbers", dom_req);
2933 ret = -EINVAL;
2934 goto free_bus;
2935 }
2936
2937 if (dom != dom_req)
2938 dev_info(&hdev->device,
2939 "PCI dom# 0x%hx has collision, using 0x%hx",
2940 dom_req, dom);
2941
2942 hbus->sysdata.domain = dom;
Jake Oshins4daace02016-02-16 21:56:23 +00002943
2944 hbus->hdev = hdev;
Stephen Hemminger6708be92018-05-23 10:11:13 -07002945 refcount_set(&hbus->remove_lock, 1);
Jake Oshins4daace02016-02-16 21:56:23 +00002946 INIT_LIST_HEAD(&hbus->children);
2947 INIT_LIST_HEAD(&hbus->dr_list);
2948 INIT_LIST_HEAD(&hbus->resources_for_children);
2949 spin_lock_init(&hbus->config_lock);
2950 spin_lock_init(&hbus->device_list_lock);
Long Li0de8ce32016-11-08 14:04:38 -08002951 spin_lock_init(&hbus->retarget_msi_interrupt_lock);
Jake Oshins4daace02016-02-16 21:56:23 +00002952 init_completion(&hbus->remove_event);
Dexuan Cui021ad272018-03-15 14:20:53 +00002953 hbus->wq = alloc_ordered_workqueue("hv_pci_%x", 0,
2954 hbus->sysdata.domain);
2955 if (!hbus->wq) {
2956 ret = -ENOMEM;
Haiyang Zhangbe700102019-08-15 17:01:37 +00002957 goto free_dom;
Dexuan Cui021ad272018-03-15 14:20:53 +00002958 }
Jake Oshins4daace02016-02-16 21:56:23 +00002959
2960 ret = vmbus_open(hdev->channel, pci_ring_size, pci_ring_size, NULL, 0,
2961 hv_pci_onchannelcallback, hbus);
2962 if (ret)
Dexuan Cui021ad272018-03-15 14:20:53 +00002963 goto destroy_wq;
Jake Oshins4daace02016-02-16 21:56:23 +00002964
2965 hv_set_drvdata(hdev, hbus);
2966
Dexuan Cuia8e37502019-11-24 21:33:51 -08002967 ret = hv_pci_protocol_negotiation(hdev, pci_protocol_versions,
2968 ARRAY_SIZE(pci_protocol_versions));
Jake Oshins4daace02016-02-16 21:56:23 +00002969 if (ret)
2970 goto close;
2971
2972 ret = hv_allocate_config_window(hbus);
2973 if (ret)
2974 goto close;
2975
2976 hbus->cfg_addr = ioremap(hbus->mem_config->start,
2977 PCI_CONFIG_MMIO_LENGTH);
2978 if (!hbus->cfg_addr) {
2979 dev_err(&hdev->device,
2980 "Unable to map a virtual address for config space\n");
2981 ret = -ENOMEM;
2982 goto free_config;
2983 }
2984
Marc Zyngier467a3bb2019-08-06 15:23:33 +01002985 name = kasprintf(GFP_KERNEL, "%pUL", &hdev->dev_instance);
2986 if (!name) {
2987 ret = -ENOMEM;
2988 goto unmap;
2989 }
2990
2991 hbus->sysdata.fwnode = irq_domain_alloc_named_fwnode(name);
2992 kfree(name);
Jake Oshins4daace02016-02-16 21:56:23 +00002993 if (!hbus->sysdata.fwnode) {
2994 ret = -ENOMEM;
2995 goto unmap;
2996 }
2997
2998 ret = hv_pcie_init_irq_domain(hbus);
2999 if (ret)
3000 goto free_fwnode;
3001
3002 ret = hv_pci_query_relations(hdev);
3003 if (ret)
3004 goto free_irq_domain;
3005
3006 ret = hv_pci_enter_d0(hdev);
3007 if (ret)
3008 goto free_irq_domain;
3009
3010 ret = hv_pci_allocate_bridge_windows(hbus);
3011 if (ret)
3012 goto free_irq_domain;
3013
3014 ret = hv_send_resources_allocated(hdev);
3015 if (ret)
3016 goto free_windows;
3017
3018 prepopulate_bars(hbus);
3019
3020 hbus->state = hv_pcibus_probed;
3021
3022 ret = create_root_hv_pci_bus(hbus);
3023 if (ret)
3024 goto free_windows;
3025
3026 return 0;
3027
3028free_windows:
3029 hv_pci_free_bridge_windows(hbus);
3030free_irq_domain:
3031 irq_domain_remove(hbus->irq_domain);
3032free_fwnode:
3033 irq_domain_free_fwnode(hbus->sysdata.fwnode);
3034unmap:
3035 iounmap(hbus->cfg_addr);
3036free_config:
3037 hv_free_config_window(hbus);
3038close:
3039 vmbus_close(hdev->channel);
Dexuan Cui021ad272018-03-15 14:20:53 +00003040destroy_wq:
3041 destroy_workqueue(hbus->wq);
Haiyang Zhangbe700102019-08-15 17:01:37 +00003042free_dom:
3043 hv_put_dom_num(hbus->sysdata.domain);
Jake Oshins4daace02016-02-16 21:56:23 +00003044free_bus:
Jork Loeserbe66b672017-05-24 13:41:25 -07003045 free_page((unsigned long)hbus);
Jake Oshins4daace02016-02-16 21:56:23 +00003046 return ret;
3047}
3048
Dexuan Cuia8e37502019-11-24 21:33:51 -08003049static int hv_pci_bus_exit(struct hv_device *hdev, bool hibernating)
Jake Oshins4daace02016-02-16 21:56:23 +00003050{
Dexuan Cui179785242016-11-10 07:18:47 +00003051 struct hv_pcibus_device *hbus = hv_get_drvdata(hdev);
3052 struct {
Jake Oshins4daace02016-02-16 21:56:23 +00003053 struct pci_packet teardown_packet;
Dexuan Cui179785242016-11-10 07:18:47 +00003054 u8 buffer[sizeof(struct pci_message)];
Jake Oshins4daace02016-02-16 21:56:23 +00003055 } pkt;
3056 struct pci_bus_relations relations;
3057 struct hv_pci_compl comp_pkt;
Dexuan Cui179785242016-11-10 07:18:47 +00003058 int ret;
Jake Oshins4daace02016-02-16 21:56:23 +00003059
Dexuan Cui179785242016-11-10 07:18:47 +00003060 /*
3061 * After the host sends the RESCIND_CHANNEL message, it doesn't
3062 * access the per-channel ringbuffer any longer.
3063 */
3064 if (hdev->channel->rescind)
Dexuan Cuia8e37502019-11-24 21:33:51 -08003065 return 0;
Dexuan Cui179785242016-11-10 07:18:47 +00003066
Dexuan Cuia8e37502019-11-24 21:33:51 -08003067 if (!hibernating) {
3068 /* Delete any children which might still exist. */
3069 memset(&relations, 0, sizeof(relations));
3070 hv_pci_devices_present(hbus, &relations);
3071 }
Dexuan Cui179785242016-11-10 07:18:47 +00003072
3073 ret = hv_send_resources_released(hdev);
Dexuan Cuia8e37502019-11-24 21:33:51 -08003074 if (ret) {
Dexuan Cui179785242016-11-10 07:18:47 +00003075 dev_err(&hdev->device,
3076 "Couldn't send resources released packet(s)\n");
Dexuan Cuia8e37502019-11-24 21:33:51 -08003077 return ret;
3078 }
Jake Oshins4daace02016-02-16 21:56:23 +00003079
Jake Oshins4daace02016-02-16 21:56:23 +00003080 memset(&pkt.teardown_packet, 0, sizeof(pkt.teardown_packet));
3081 init_completion(&comp_pkt.host_event);
3082 pkt.teardown_packet.completion_func = hv_pci_generic_compl;
3083 pkt.teardown_packet.compl_ctxt = &comp_pkt;
Dexuan Cui0c6045d2016-08-23 04:45:51 +00003084 pkt.teardown_packet.message[0].type = PCI_BUS_D0EXIT;
Jake Oshins4daace02016-02-16 21:56:23 +00003085
3086 ret = vmbus_sendpacket(hdev->channel, &pkt.teardown_packet.message,
3087 sizeof(struct pci_message),
3088 (unsigned long)&pkt.teardown_packet,
3089 VM_PKT_DATA_INBAND,
3090 VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
Dexuan Cuia8e37502019-11-24 21:33:51 -08003091 if (ret)
3092 return ret;
3093
3094 if (wait_for_completion_timeout(&comp_pkt.host_event, 10 * HZ) == 0)
3095 return -ETIMEDOUT;
3096
3097 return 0;
Dexuan Cui179785242016-11-10 07:18:47 +00003098}
Jake Oshins4daace02016-02-16 21:56:23 +00003099
Dexuan Cui179785242016-11-10 07:18:47 +00003100/**
3101 * hv_pci_remove() - Remove routine for this VMBus channel
3102 * @hdev: VMBus's tracking struct for this root PCI bus
3103 *
3104 * Return: 0 on success, -errno on failure
3105 */
3106static int hv_pci_remove(struct hv_device *hdev)
3107{
3108 struct hv_pcibus_device *hbus;
Dexuan Cuia8e37502019-11-24 21:33:51 -08003109 int ret;
Dexuan Cui179785242016-11-10 07:18:47 +00003110
3111 hbus = hv_get_drvdata(hdev);
Jake Oshins4daace02016-02-16 21:56:23 +00003112 if (hbus->state == hv_pcibus_installed) {
3113 /* Remove the bus from PCI's point of view. */
3114 pci_lock_rescan_remove();
3115 pci_stop_root_bus(hbus->pci_bus);
Dexuan Cui15becc22019-03-04 21:34:48 +00003116 hv_pci_remove_slots(hbus);
Dexuan Cui533ca1f2019-08-02 22:50:20 +00003117 pci_remove_root_bus(hbus->pci_bus);
Jake Oshins4daace02016-02-16 21:56:23 +00003118 pci_unlock_rescan_remove();
Long Lid3a78d82017-03-23 14:58:10 -07003119 hbus->state = hv_pcibus_removed;
Jake Oshins4daace02016-02-16 21:56:23 +00003120 }
3121
Dexuan Cuia8e37502019-11-24 21:33:51 -08003122 ret = hv_pci_bus_exit(hdev, false);
Vitaly Kuznetsovdeb22e52016-04-29 11:39:10 +02003123
Jake Oshins4daace02016-02-16 21:56:23 +00003124 vmbus_close(hdev->channel);
3125
Jake Oshins4daace02016-02-16 21:56:23 +00003126 iounmap(hbus->cfg_addr);
3127 hv_free_config_window(hbus);
3128 pci_free_resource_list(&hbus->resources_for_children);
3129 hv_pci_free_bridge_windows(hbus);
3130 irq_domain_remove(hbus->irq_domain);
3131 irq_domain_free_fwnode(hbus->sysdata.fwnode);
3132 put_hvpcibus(hbus);
3133 wait_for_completion(&hbus->remove_event);
Dexuan Cui021ad272018-03-15 14:20:53 +00003134 destroy_workqueue(hbus->wq);
Haiyang Zhangbe700102019-08-15 17:01:37 +00003135
3136 hv_put_dom_num(hbus->sysdata.domain);
3137
Jork Loeserbe66b672017-05-24 13:41:25 -07003138 free_page((unsigned long)hbus);
Dexuan Cuia8e37502019-11-24 21:33:51 -08003139 return ret;
Jake Oshins4daace02016-02-16 21:56:23 +00003140}
3141
Dexuan Cuiac82fc82019-11-24 21:33:52 -08003142static int hv_pci_suspend(struct hv_device *hdev)
3143{
3144 struct hv_pcibus_device *hbus = hv_get_drvdata(hdev);
3145 enum hv_pcibus_state old_state;
3146 int ret;
3147
3148 /*
3149 * hv_pci_suspend() must make sure there are no pending work items
3150 * before calling vmbus_close(), since it runs in a process context
3151 * as a callback in dpm_suspend(). When it starts to run, the channel
3152 * callback hv_pci_onchannelcallback(), which runs in a tasklet
3153 * context, can be still running concurrently and scheduling new work
3154 * items onto hbus->wq in hv_pci_devices_present() and
3155 * hv_pci_eject_device(), and the work item handlers can access the
3156 * vmbus channel, which can be being closed by hv_pci_suspend(), e.g.
3157 * the work item handler pci_devices_present_work() ->
3158 * new_pcichild_device() writes to the vmbus channel.
3159 *
3160 * To eliminate the race, hv_pci_suspend() disables the channel
3161 * callback tasklet, sets hbus->state to hv_pcibus_removing, and
3162 * re-enables the tasklet. This way, when hv_pci_suspend() proceeds,
3163 * it knows that no new work item can be scheduled, and then it flushes
3164 * hbus->wq and safely closes the vmbus channel.
3165 */
3166 tasklet_disable(&hdev->channel->callback_event);
3167
3168 /* Change the hbus state to prevent new work items. */
3169 old_state = hbus->state;
3170 if (hbus->state == hv_pcibus_installed)
3171 hbus->state = hv_pcibus_removing;
3172
3173 tasklet_enable(&hdev->channel->callback_event);
3174
3175 if (old_state != hv_pcibus_installed)
3176 return -EINVAL;
3177
3178 flush_workqueue(hbus->wq);
3179
3180 ret = hv_pci_bus_exit(hdev, true);
3181 if (ret)
3182 return ret;
3183
3184 vmbus_close(hdev->channel);
3185
3186 return 0;
3187}
3188
3189static int hv_pci_resume(struct hv_device *hdev)
3190{
3191 struct hv_pcibus_device *hbus = hv_get_drvdata(hdev);
3192 enum pci_protocol_version_t version[1];
3193 int ret;
3194
3195 hbus->state = hv_pcibus_init;
3196
3197 ret = vmbus_open(hdev->channel, pci_ring_size, pci_ring_size, NULL, 0,
3198 hv_pci_onchannelcallback, hbus);
3199 if (ret)
3200 return ret;
3201
3202 /* Only use the version that was in use before hibernation. */
3203 version[0] = pci_protocol_version;
3204 ret = hv_pci_protocol_negotiation(hdev, version, 1);
3205 if (ret)
3206 goto out;
3207
3208 ret = hv_pci_query_relations(hdev);
3209 if (ret)
3210 goto out;
3211
3212 ret = hv_pci_enter_d0(hdev);
3213 if (ret)
3214 goto out;
3215
3216 ret = hv_send_resources_allocated(hdev);
3217 if (ret)
3218 goto out;
3219
3220 prepopulate_bars(hbus);
3221
3222 hbus->state = hv_pcibus_installed;
3223 return 0;
3224out:
3225 vmbus_close(hdev->channel);
3226 return ret;
3227}
3228
Jake Oshins4daace02016-02-16 21:56:23 +00003229static const struct hv_vmbus_device_id hv_pci_id_table[] = {
3230 /* PCI Pass-through Class ID */
3231 /* 44C4F61D-4444-4400-9D52-802E27EDE19F */
3232 { HV_PCIE_GUID, },
3233 { },
3234};
3235
3236MODULE_DEVICE_TABLE(vmbus, hv_pci_id_table);
3237
3238static struct hv_driver hv_pci_drv = {
3239 .name = "hv_pci",
3240 .id_table = hv_pci_id_table,
3241 .probe = hv_pci_probe,
3242 .remove = hv_pci_remove,
Dexuan Cuiac82fc82019-11-24 21:33:52 -08003243 .suspend = hv_pci_suspend,
3244 .resume = hv_pci_resume,
Jake Oshins4daace02016-02-16 21:56:23 +00003245};
3246
3247static void __exit exit_hv_pci_drv(void)
3248{
3249 vmbus_driver_unregister(&hv_pci_drv);
Haiyang Zhang348dd932019-08-22 05:05:41 +00003250
3251 hvpci_block_ops.read_block = NULL;
3252 hvpci_block_ops.write_block = NULL;
3253 hvpci_block_ops.reg_blk_invalidate = NULL;
Jake Oshins4daace02016-02-16 21:56:23 +00003254}
3255
3256static int __init init_hv_pci_drv(void)
3257{
Haiyang Zhangbe700102019-08-15 17:01:37 +00003258 /* Set the invalid domain number's bit, so it will not be used */
3259 set_bit(HVPCI_DOM_INVALID, hvpci_dom_map);
3260
Haiyang Zhang348dd932019-08-22 05:05:41 +00003261 /* Initialize PCI block r/w interface */
3262 hvpci_block_ops.read_block = hv_read_config_block;
3263 hvpci_block_ops.write_block = hv_write_config_block;
3264 hvpci_block_ops.reg_blk_invalidate = hv_register_block_invalidate;
3265
Jake Oshins4daace02016-02-16 21:56:23 +00003266 return vmbus_driver_register(&hv_pci_drv);
3267}
3268
3269module_init(init_hv_pci_drv);
3270module_exit(exit_hv_pci_drv);
3271
3272MODULE_DESCRIPTION("Hyper-V PCI");
3273MODULE_LICENSE("GPL v2");