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Mark Brown0a1bf552009-05-23 11:18:41 +01001/*
2 * wm8974.c -- WM8974 ALSA Soc Audio driver
3 *
Mark Brown8b83a192009-06-30 19:37:02 +01004 * Copyright 2006-2009 Wolfson Microelectronics PLC.
Mark Brown0a1bf552009-05-23 11:18:41 +01005 *
Mark Brown9a185b92011-10-06 11:10:01 +01006 * Author: Liam Girdwood <Liam.Girdwood@wolfsonmicro.com>
Mark Brown0a1bf552009-05-23 11:18:41 +01007 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/module.h>
Mark Brown0a1bf552009-05-23 11:18:41 +010014#include <linux/kernel.h>
15#include <linux/init.h>
16#include <linux/delay.h>
17#include <linux/pm.h>
18#include <linux/i2c.h>
Mark Browne40e0b52013-11-08 14:01:39 +000019#include <linux/regmap.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090020#include <linux/slab.h>
Mark Brown0a1bf552009-05-23 11:18:41 +010021#include <sound/core.h>
22#include <sound/pcm.h>
23#include <sound/pcm_params.h>
24#include <sound/soc.h>
Mark Brown0a1bf552009-05-23 11:18:41 +010025#include <sound/initval.h>
Mark Browna5f8d2f2009-06-30 19:30:33 +010026#include <sound/tlv.h>
Mark Brown0a1bf552009-05-23 11:18:41 +010027
28#include "wm8974.h"
29
Mans Rullgard51b2bb32016-01-25 12:36:43 +000030struct wm8974_priv {
31 unsigned int mclk;
32 unsigned int fs;
33};
34
Mark Browne40e0b52013-11-08 14:01:39 +000035static const struct reg_default wm8974_reg_defaults[] = {
36 { 0, 0x0000 }, { 1, 0x0000 }, { 2, 0x0000 }, { 3, 0x0000 },
37 { 4, 0x0050 }, { 5, 0x0000 }, { 6, 0x0140 }, { 7, 0x0000 },
38 { 8, 0x0000 }, { 9, 0x0000 }, { 10, 0x0000 }, { 11, 0x00ff },
39 { 12, 0x0000 }, { 13, 0x0000 }, { 14, 0x0100 }, { 15, 0x00ff },
40 { 16, 0x0000 }, { 17, 0x0000 }, { 18, 0x012c }, { 19, 0x002c },
41 { 20, 0x002c }, { 21, 0x002c }, { 22, 0x002c }, { 23, 0x0000 },
42 { 24, 0x0032 }, { 25, 0x0000 }, { 26, 0x0000 }, { 27, 0x0000 },
43 { 28, 0x0000 }, { 29, 0x0000 }, { 30, 0x0000 }, { 31, 0x0000 },
44 { 32, 0x0038 }, { 33, 0x000b }, { 34, 0x0032 }, { 35, 0x0000 },
45 { 36, 0x0008 }, { 37, 0x000c }, { 38, 0x0093 }, { 39, 0x00e9 },
46 { 40, 0x0000 }, { 41, 0x0000 }, { 42, 0x0000 }, { 43, 0x0000 },
47 { 44, 0x0003 }, { 45, 0x0010 }, { 46, 0x0000 }, { 47, 0x0000 },
48 { 48, 0x0000 }, { 49, 0x0002 }, { 50, 0x0000 }, { 51, 0x0000 },
49 { 52, 0x0000 }, { 53, 0x0000 }, { 54, 0x0039 }, { 55, 0x0000 },
50 { 56, 0x0000 },
Mark Brown0a1bf552009-05-23 11:18:41 +010051};
52
Mark Browndf1ef7a2009-06-30 19:01:09 +010053#define WM8974_POWER1_BIASEN 0x08
Guennadi Liakhovetski48c03ce2009-12-17 14:51:35 +010054#define WM8974_POWER1_BUFIOEN 0x04
Mark Browndf1ef7a2009-06-30 19:01:09 +010055
Kuninori Morimoto3e32a3f2018-01-29 03:06:52 +000056#define wm8974_reset(c) snd_soc_component_write(c, WM8974_RESET, 0)
Mark Brown0a1bf552009-05-23 11:18:41 +010057
58static const char *wm8974_companding[] = {"Off", "NC", "u-law", "A-law" };
59static const char *wm8974_deemp[] = {"None", "32kHz", "44.1kHz", "48kHz" };
60static const char *wm8974_eqmode[] = {"Capture", "Playback" };
61static const char *wm8974_bw[] = {"Narrow", "Wide" };
62static const char *wm8974_eq1[] = {"80Hz", "105Hz", "135Hz", "175Hz" };
63static const char *wm8974_eq2[] = {"230Hz", "300Hz", "385Hz", "500Hz" };
64static const char *wm8974_eq3[] = {"650Hz", "850Hz", "1.1kHz", "1.4kHz" };
65static const char *wm8974_eq4[] = {"1.8kHz", "2.4kHz", "3.2kHz", "4.1kHz" };
66static const char *wm8974_eq5[] = {"5.3kHz", "6.9kHz", "9kHz", "11.7kHz" };
67static const char *wm8974_alc[] = {"ALC", "Limiter" };
68
69static const struct soc_enum wm8974_enum[] = {
70 SOC_ENUM_SINGLE(WM8974_COMP, 1, 4, wm8974_companding), /* adc */
71 SOC_ENUM_SINGLE(WM8974_COMP, 3, 4, wm8974_companding), /* dac */
72 SOC_ENUM_SINGLE(WM8974_DAC, 4, 4, wm8974_deemp),
73 SOC_ENUM_SINGLE(WM8974_EQ1, 8, 2, wm8974_eqmode),
74
75 SOC_ENUM_SINGLE(WM8974_EQ1, 5, 4, wm8974_eq1),
76 SOC_ENUM_SINGLE(WM8974_EQ2, 8, 2, wm8974_bw),
77 SOC_ENUM_SINGLE(WM8974_EQ2, 5, 4, wm8974_eq2),
78 SOC_ENUM_SINGLE(WM8974_EQ3, 8, 2, wm8974_bw),
79
80 SOC_ENUM_SINGLE(WM8974_EQ3, 5, 4, wm8974_eq3),
81 SOC_ENUM_SINGLE(WM8974_EQ4, 8, 2, wm8974_bw),
82 SOC_ENUM_SINGLE(WM8974_EQ4, 5, 4, wm8974_eq4),
83 SOC_ENUM_SINGLE(WM8974_EQ5, 8, 2, wm8974_bw),
84
85 SOC_ENUM_SINGLE(WM8974_EQ5, 5, 4, wm8974_eq5),
86 SOC_ENUM_SINGLE(WM8974_ALC3, 8, 2, wm8974_alc),
87};
88
Mark Brown8a123ee2009-06-30 21:10:34 +010089static const char *wm8974_auxmode_text[] = { "Buffer", "Mixer" };
90
Takashi Iwaide461bd2014-02-18 10:43:31 +010091static SOC_ENUM_SINGLE_DECL(wm8974_auxmode,
92 WM8974_INPUT, 3, wm8974_auxmode_text);
Mark Brown8a123ee2009-06-30 21:10:34 +010093
Mark Browna5f8d2f2009-06-30 19:30:33 +010094static const DECLARE_TLV_DB_SCALE(digital_tlv, -12750, 50, 1);
95static const DECLARE_TLV_DB_SCALE(eq_tlv, -1200, 100, 0);
96static const DECLARE_TLV_DB_SCALE(inpga_tlv, -1200, 75, 0);
97static const DECLARE_TLV_DB_SCALE(spk_tlv, -5700, 100, 0);
98
Mark Brown0a1bf552009-05-23 11:18:41 +010099static const struct snd_kcontrol_new wm8974_snd_controls[] = {
100
101SOC_SINGLE("Digital Loopback Switch", WM8974_COMP, 0, 1, 0),
102
103SOC_ENUM("DAC Companding", wm8974_enum[1]),
104SOC_ENUM("ADC Companding", wm8974_enum[0]),
105
106SOC_ENUM("Playback De-emphasis", wm8974_enum[2]),
107SOC_SINGLE("DAC Inversion Switch", WM8974_DAC, 0, 1, 0),
108
Mark Browna5f8d2f2009-06-30 19:30:33 +0100109SOC_SINGLE_TLV("PCM Volume", WM8974_DACVOL, 0, 255, 0, digital_tlv),
Mark Brown0a1bf552009-05-23 11:18:41 +0100110
111SOC_SINGLE("High Pass Filter Switch", WM8974_ADC, 8, 1, 0),
112SOC_SINGLE("High Pass Cut Off", WM8974_ADC, 4, 7, 0),
javier Martin25cbf462009-07-21 11:15:06 +0200113SOC_SINGLE("ADC Inversion Switch", WM8974_ADC, 0, 1, 0),
Mark Brown0a1bf552009-05-23 11:18:41 +0100114
Mark Browna5f8d2f2009-06-30 19:30:33 +0100115SOC_SINGLE_TLV("Capture Volume", WM8974_ADCVOL, 0, 255, 0, digital_tlv),
Mark Brown0a1bf552009-05-23 11:18:41 +0100116
117SOC_ENUM("Equaliser Function", wm8974_enum[3]),
118SOC_ENUM("EQ1 Cut Off", wm8974_enum[4]),
Mark Browna5f8d2f2009-06-30 19:30:33 +0100119SOC_SINGLE_TLV("EQ1 Volume", WM8974_EQ1, 0, 24, 1, eq_tlv),
Mark Brown0a1bf552009-05-23 11:18:41 +0100120
Masanari Iidac46d5c02012-11-02 23:25:30 +0900121SOC_ENUM("Equaliser EQ2 Bandwidth", wm8974_enum[5]),
Mark Brown0a1bf552009-05-23 11:18:41 +0100122SOC_ENUM("EQ2 Cut Off", wm8974_enum[6]),
Mark Browna5f8d2f2009-06-30 19:30:33 +0100123SOC_SINGLE_TLV("EQ2 Volume", WM8974_EQ2, 0, 24, 1, eq_tlv),
Mark Brown0a1bf552009-05-23 11:18:41 +0100124
Masanari Iidac46d5c02012-11-02 23:25:30 +0900125SOC_ENUM("Equaliser EQ3 Bandwidth", wm8974_enum[7]),
Mark Brown0a1bf552009-05-23 11:18:41 +0100126SOC_ENUM("EQ3 Cut Off", wm8974_enum[8]),
Mark Browna5f8d2f2009-06-30 19:30:33 +0100127SOC_SINGLE_TLV("EQ3 Volume", WM8974_EQ3, 0, 24, 1, eq_tlv),
Mark Brown0a1bf552009-05-23 11:18:41 +0100128
Masanari Iidac46d5c02012-11-02 23:25:30 +0900129SOC_ENUM("Equaliser EQ4 Bandwidth", wm8974_enum[9]),
Mark Brown0a1bf552009-05-23 11:18:41 +0100130SOC_ENUM("EQ4 Cut Off", wm8974_enum[10]),
Mark Browna5f8d2f2009-06-30 19:30:33 +0100131SOC_SINGLE_TLV("EQ4 Volume", WM8974_EQ4, 0, 24, 1, eq_tlv),
Mark Brown0a1bf552009-05-23 11:18:41 +0100132
Masanari Iidaa895d572013-04-09 02:06:50 +0900133SOC_ENUM("Equaliser EQ5 Bandwidth", wm8974_enum[11]),
Mark Brown0a1bf552009-05-23 11:18:41 +0100134SOC_ENUM("EQ5 Cut Off", wm8974_enum[12]),
Mark Browna5f8d2f2009-06-30 19:30:33 +0100135SOC_SINGLE_TLV("EQ5 Volume", WM8974_EQ5, 0, 24, 1, eq_tlv),
Mark Brown0a1bf552009-05-23 11:18:41 +0100136
137SOC_SINGLE("DAC Playback Limiter Switch", WM8974_DACLIM1, 8, 1, 0),
138SOC_SINGLE("DAC Playback Limiter Decay", WM8974_DACLIM1, 4, 15, 0),
139SOC_SINGLE("DAC Playback Limiter Attack", WM8974_DACLIM1, 0, 15, 0),
140
141SOC_SINGLE("DAC Playback Limiter Threshold", WM8974_DACLIM2, 4, 7, 0),
142SOC_SINGLE("DAC Playback Limiter Boost", WM8974_DACLIM2, 0, 15, 0),
143
144SOC_SINGLE("ALC Enable Switch", WM8974_ALC1, 8, 1, 0),
145SOC_SINGLE("ALC Capture Max Gain", WM8974_ALC1, 3, 7, 0),
146SOC_SINGLE("ALC Capture Min Gain", WM8974_ALC1, 0, 7, 0),
147
148SOC_SINGLE("ALC Capture ZC Switch", WM8974_ALC2, 8, 1, 0),
149SOC_SINGLE("ALC Capture Hold", WM8974_ALC2, 4, 7, 0),
150SOC_SINGLE("ALC Capture Target", WM8974_ALC2, 0, 15, 0),
151
152SOC_ENUM("ALC Capture Mode", wm8974_enum[13]),
153SOC_SINGLE("ALC Capture Decay", WM8974_ALC3, 4, 15, 0),
154SOC_SINGLE("ALC Capture Attack", WM8974_ALC3, 0, 15, 0),
155
156SOC_SINGLE("ALC Capture Noise Gate Switch", WM8974_NGATE, 3, 1, 0),
157SOC_SINGLE("ALC Capture Noise Gate Threshold", WM8974_NGATE, 0, 7, 0),
158
159SOC_SINGLE("Capture PGA ZC Switch", WM8974_INPPGA, 7, 1, 0),
Mark Browna5f8d2f2009-06-30 19:30:33 +0100160SOC_SINGLE_TLV("Capture PGA Volume", WM8974_INPPGA, 0, 63, 0, inpga_tlv),
Mark Brown0a1bf552009-05-23 11:18:41 +0100161
162SOC_SINGLE("Speaker Playback ZC Switch", WM8974_SPKVOL, 7, 1, 0),
163SOC_SINGLE("Speaker Playback Switch", WM8974_SPKVOL, 6, 1, 1),
Mark Brown8a123ee2009-06-30 21:10:34 +0100164SOC_SINGLE_TLV("Speaker Playback Volume", WM8974_SPKVOL, 0, 63, 0, spk_tlv),
165
166SOC_ENUM("Aux Mode", wm8974_auxmode),
Mark Brown0a1bf552009-05-23 11:18:41 +0100167
168SOC_SINGLE("Capture Boost(+20dB)", WM8974_ADCBOOST, 8, 1, 0),
Mark Brown8a123ee2009-06-30 21:10:34 +0100169SOC_SINGLE("Mono Playback Switch", WM8974_MONOMIX, 6, 1, 1),
Guennadi Liakhovetskib2c3e922010-01-29 15:31:06 +0100170
171/* DAC / ADC oversampling */
172SOC_SINGLE("DAC 128x Oversampling Switch", WM8974_DAC, 8, 1, 0),
173SOC_SINGLE("ADC 128x Oversampling Switch", WM8974_ADC, 8, 1, 0),
Mark Brown0a1bf552009-05-23 11:18:41 +0100174};
175
Mark Brown0a1bf552009-05-23 11:18:41 +0100176/* Speaker Output Mixer */
177static const struct snd_kcontrol_new wm8974_speaker_mixer_controls[] = {
178SOC_DAPM_SINGLE("Line Bypass Switch", WM8974_SPKMIX, 1, 1, 0),
179SOC_DAPM_SINGLE("Aux Playback Switch", WM8974_SPKMIX, 5, 1, 0),
Mark Brown759512f2010-04-23 17:39:23 +0100180SOC_DAPM_SINGLE("PCM Playback Switch", WM8974_SPKMIX, 0, 1, 0),
Mark Brown0a1bf552009-05-23 11:18:41 +0100181};
182
183/* Mono Output Mixer */
184static const struct snd_kcontrol_new wm8974_mono_mixer_controls[] = {
185SOC_DAPM_SINGLE("Line Bypass Switch", WM8974_MONOMIX, 1, 1, 0),
186SOC_DAPM_SINGLE("Aux Playback Switch", WM8974_MONOMIX, 2, 1, 0),
Mark Brown8a123ee2009-06-30 21:10:34 +0100187SOC_DAPM_SINGLE("PCM Playback Switch", WM8974_MONOMIX, 0, 1, 0),
188};
189
190/* Boost mixer */
191static const struct snd_kcontrol_new wm8974_boost_mixer[] = {
192SOC_DAPM_SINGLE("Aux Switch", WM8974_INPPGA, 6, 1, 0),
193};
194
195/* Input PGA */
196static const struct snd_kcontrol_new wm8974_inpga[] = {
197SOC_DAPM_SINGLE("Aux Switch", WM8974_INPUT, 2, 1, 0),
198SOC_DAPM_SINGLE("MicN Switch", WM8974_INPUT, 1, 1, 0),
199SOC_DAPM_SINGLE("MicP Switch", WM8974_INPUT, 0, 1, 0),
Mark Brown0a1bf552009-05-23 11:18:41 +0100200};
201
202/* AUX Input boost vol */
203static const struct snd_kcontrol_new wm8974_aux_boost_controls =
204SOC_DAPM_SINGLE("Aux Volume", WM8974_ADCBOOST, 0, 7, 0);
205
206/* Mic Input boost vol */
207static const struct snd_kcontrol_new wm8974_mic_boost_controls =
208SOC_DAPM_SINGLE("Mic Volume", WM8974_ADCBOOST, 4, 7, 0);
209
Mark Brown0a1bf552009-05-23 11:18:41 +0100210static const struct snd_soc_dapm_widget wm8974_dapm_widgets[] = {
211SND_SOC_DAPM_MIXER("Speaker Mixer", WM8974_POWER3, 2, 0,
212 &wm8974_speaker_mixer_controls[0],
213 ARRAY_SIZE(wm8974_speaker_mixer_controls)),
214SND_SOC_DAPM_MIXER("Mono Mixer", WM8974_POWER3, 3, 0,
215 &wm8974_mono_mixer_controls[0],
216 ARRAY_SIZE(wm8974_mono_mixer_controls)),
217SND_SOC_DAPM_DAC("DAC", "HiFi Playback", WM8974_POWER3, 0, 0),
Mark Brown8a123ee2009-06-30 21:10:34 +0100218SND_SOC_DAPM_ADC("ADC", "HiFi Capture", WM8974_POWER2, 0, 0),
Mark Brown0a1bf552009-05-23 11:18:41 +0100219SND_SOC_DAPM_PGA("Aux Input", WM8974_POWER1, 6, 0, NULL, 0),
220SND_SOC_DAPM_PGA("SpkN Out", WM8974_POWER3, 5, 0, NULL, 0),
221SND_SOC_DAPM_PGA("SpkP Out", WM8974_POWER3, 6, 0, NULL, 0),
222SND_SOC_DAPM_PGA("Mono Out", WM8974_POWER3, 7, 0, NULL, 0),
Mark Brown0a1bf552009-05-23 11:18:41 +0100223
Mark Brown8a123ee2009-06-30 21:10:34 +0100224SND_SOC_DAPM_MIXER("Input PGA", WM8974_POWER2, 2, 0, wm8974_inpga,
225 ARRAY_SIZE(wm8974_inpga)),
226SND_SOC_DAPM_MIXER("Boost Mixer", WM8974_POWER2, 4, 0,
227 wm8974_boost_mixer, ARRAY_SIZE(wm8974_boost_mixer)),
Mark Brown0a1bf552009-05-23 11:18:41 +0100228
Mark Brown48dd2312011-10-27 09:47:09 +0200229SND_SOC_DAPM_SUPPLY("Mic Bias", WM8974_POWER1, 4, 0, NULL, 0),
Mark Brown0a1bf552009-05-23 11:18:41 +0100230
231SND_SOC_DAPM_INPUT("MICN"),
232SND_SOC_DAPM_INPUT("MICP"),
233SND_SOC_DAPM_INPUT("AUX"),
234SND_SOC_DAPM_OUTPUT("MONOOUT"),
235SND_SOC_DAPM_OUTPUT("SPKOUTP"),
236SND_SOC_DAPM_OUTPUT("SPKOUTN"),
237};
238
Mark Browna2bd6912011-12-29 11:10:27 +0000239static const struct snd_soc_dapm_route wm8974_dapm_routes[] = {
Mark Brown0a1bf552009-05-23 11:18:41 +0100240 /* Mono output mixer */
241 {"Mono Mixer", "PCM Playback Switch", "DAC"},
242 {"Mono Mixer", "Aux Playback Switch", "Aux Input"},
243 {"Mono Mixer", "Line Bypass Switch", "Boost Mixer"},
244
245 /* Speaker output mixer */
246 {"Speaker Mixer", "PCM Playback Switch", "DAC"},
247 {"Speaker Mixer", "Aux Playback Switch", "Aux Input"},
248 {"Speaker Mixer", "Line Bypass Switch", "Boost Mixer"},
249
250 /* Outputs */
251 {"Mono Out", NULL, "Mono Mixer"},
252 {"MONOOUT", NULL, "Mono Out"},
253 {"SpkN Out", NULL, "Speaker Mixer"},
254 {"SpkP Out", NULL, "Speaker Mixer"},
255 {"SPKOUTN", NULL, "SpkN Out"},
256 {"SPKOUTP", NULL, "SpkP Out"},
257
258 /* Boost Mixer */
Mark Brown8a123ee2009-06-30 21:10:34 +0100259 {"ADC", NULL, "Boost Mixer"},
260 {"Boost Mixer", "Aux Switch", "Aux Input"},
261 {"Boost Mixer", NULL, "Input PGA"},
262 {"Boost Mixer", NULL, "MICP"},
263
264 /* Input PGA */
265 {"Input PGA", "Aux Switch", "Aux Input"},
266 {"Input PGA", "MicN Switch", "MICN"},
267 {"Input PGA", "MicP Switch", "MICP"},
Mark Brown0a1bf552009-05-23 11:18:41 +0100268
269 /* Inputs */
Mark Brown8a123ee2009-06-30 21:10:34 +0100270 {"Aux Input", NULL, "AUX"},
Mark Brown0a1bf552009-05-23 11:18:41 +0100271};
272
Mark Brown0a1bf552009-05-23 11:18:41 +0100273struct pll_ {
Mark Brownc36b2fc2009-09-30 14:31:38 +0100274 unsigned int pre_div:1;
Mark Brown0a1bf552009-05-23 11:18:41 +0100275 unsigned int n:4;
276 unsigned int k;
277};
278
Mark Brown91d0c3e2009-06-30 19:02:32 +0100279/* The size in bits of the pll divide multiplied by 10
280 * to allow rounding later */
281#define FIXED_PLL_SIZE ((1 << 24) * 10)
282
Mark Brownc36b2fc2009-09-30 14:31:38 +0100283static void pll_factors(struct pll_ *pll_div,
284 unsigned int target, unsigned int source)
Mark Brown91d0c3e2009-06-30 19:02:32 +0100285{
286 unsigned long long Kpart;
287 unsigned int K, Ndiv, Nmod;
288
Mark Brownc36b2fc2009-09-30 14:31:38 +0100289 /* There is a fixed divide by 4 in the output path */
290 target *= 4;
291
Mark Brown91d0c3e2009-06-30 19:02:32 +0100292 Ndiv = target / source;
293 if (Ndiv < 6) {
Mark Brownc36b2fc2009-09-30 14:31:38 +0100294 source /= 2;
295 pll_div->pre_div = 1;
Mark Brown91d0c3e2009-06-30 19:02:32 +0100296 Ndiv = target / source;
297 } else
Mark Brownc36b2fc2009-09-30 14:31:38 +0100298 pll_div->pre_div = 0;
Mark Brown91d0c3e2009-06-30 19:02:32 +0100299
300 if ((Ndiv < 6) || (Ndiv > 12))
301 printk(KERN_WARNING
Mark Brown8b83a192009-06-30 19:37:02 +0100302 "WM8974 N value %u outwith recommended range!\n",
Mark Brown91d0c3e2009-06-30 19:02:32 +0100303 Ndiv);
304
Mark Brownc36b2fc2009-09-30 14:31:38 +0100305 pll_div->n = Ndiv;
Mark Brown91d0c3e2009-06-30 19:02:32 +0100306 Nmod = target % source;
307 Kpart = FIXED_PLL_SIZE * (long long)Nmod;
308
309 do_div(Kpart, source);
310
311 K = Kpart & 0xFFFFFFFF;
312
313 /* Check if we need to round */
314 if ((K % 10) >= 5)
315 K += 5;
316
317 /* Move down to proper range now rounding is done */
318 K /= 10;
319
Mark Brownc36b2fc2009-09-30 14:31:38 +0100320 pll_div->k = K;
Mark Brown91d0c3e2009-06-30 19:02:32 +0100321}
Mark Brown0a1bf552009-05-23 11:18:41 +0100322
Mark Brown85488032009-09-05 18:52:16 +0100323static int wm8974_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
324 int source, unsigned int freq_in, unsigned int freq_out)
Mark Brown0a1bf552009-05-23 11:18:41 +0100325{
Kuninori Morimoto3e32a3f2018-01-29 03:06:52 +0000326 struct snd_soc_component *component = codec_dai->component;
Mark Brownc36b2fc2009-09-30 14:31:38 +0100327 struct pll_ pll_div;
Mark Brown0a1bf552009-05-23 11:18:41 +0100328 u16 reg;
329
Mark Brown1a55b3f2009-05-23 11:31:40 +0100330 if (freq_in == 0 || freq_out == 0) {
Mark Brown91d0c3e2009-06-30 19:02:32 +0100331 /* Clock CODEC directly from MCLK */
Kuninori Morimoto3e32a3f2018-01-29 03:06:52 +0000332 reg = snd_soc_component_read32(component, WM8974_CLOCK);
333 snd_soc_component_write(component, WM8974_CLOCK, reg & 0x0ff);
Mark Brown91d0c3e2009-06-30 19:02:32 +0100334
335 /* Turn off PLL */
Kuninori Morimoto3e32a3f2018-01-29 03:06:52 +0000336 reg = snd_soc_component_read32(component, WM8974_POWER1);
337 snd_soc_component_write(component, WM8974_POWER1, reg & 0x1df);
Mark Brown0a1bf552009-05-23 11:18:41 +0100338 return 0;
339 }
340
Mark Brownc36b2fc2009-09-30 14:31:38 +0100341 pll_factors(&pll_div, freq_out, freq_in);
Mark Brown1a55b3f2009-05-23 11:31:40 +0100342
Kuninori Morimoto3e32a3f2018-01-29 03:06:52 +0000343 snd_soc_component_write(component, WM8974_PLLN, (pll_div.pre_div << 4) | pll_div.n);
344 snd_soc_component_write(component, WM8974_PLLK1, pll_div.k >> 18);
345 snd_soc_component_write(component, WM8974_PLLK2, (pll_div.k >> 9) & 0x1ff);
346 snd_soc_component_write(component, WM8974_PLLK3, pll_div.k & 0x1ff);
347 reg = snd_soc_component_read32(component, WM8974_POWER1);
348 snd_soc_component_write(component, WM8974_POWER1, reg | 0x020);
Mark Brown91d0c3e2009-06-30 19:02:32 +0100349
350 /* Run CODEC from PLL instead of MCLK */
Kuninori Morimoto3e32a3f2018-01-29 03:06:52 +0000351 reg = snd_soc_component_read32(component, WM8974_CLOCK);
352 snd_soc_component_write(component, WM8974_CLOCK, reg | 0x100);
Mark Brown91d0c3e2009-06-30 19:02:32 +0100353
354 return 0;
Mark Brown0a1bf552009-05-23 11:18:41 +0100355}
356
357/*
358 * Configure WM8974 clock dividers.
359 */
360static int wm8974_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
361 int div_id, int div)
362{
Kuninori Morimoto3e32a3f2018-01-29 03:06:52 +0000363 struct snd_soc_component *component = codec_dai->component;
Mark Brown0a1bf552009-05-23 11:18:41 +0100364 u16 reg;
365
366 switch (div_id) {
367 case WM8974_OPCLKDIV:
Kuninori Morimoto3e32a3f2018-01-29 03:06:52 +0000368 reg = snd_soc_component_read32(component, WM8974_GPIO) & 0x1cf;
369 snd_soc_component_write(component, WM8974_GPIO, reg | div);
Mark Brown0a1bf552009-05-23 11:18:41 +0100370 break;
371 case WM8974_MCLKDIV:
Kuninori Morimoto3e32a3f2018-01-29 03:06:52 +0000372 reg = snd_soc_component_read32(component, WM8974_CLOCK) & 0x11f;
373 snd_soc_component_write(component, WM8974_CLOCK, reg | div);
Mark Brown0a1bf552009-05-23 11:18:41 +0100374 break;
Mark Brown0a1bf552009-05-23 11:18:41 +0100375 case WM8974_BCLKDIV:
Kuninori Morimoto3e32a3f2018-01-29 03:06:52 +0000376 reg = snd_soc_component_read32(component, WM8974_CLOCK) & 0x1e3;
377 snd_soc_component_write(component, WM8974_CLOCK, reg | div);
Mark Brown0a1bf552009-05-23 11:18:41 +0100378 break;
379 default:
380 return -EINVAL;
381 }
382
383 return 0;
384}
385
Mans Rullgard51b2bb32016-01-25 12:36:43 +0000386static unsigned int wm8974_get_mclkdiv(unsigned int f_in, unsigned int f_out,
387 int *mclkdiv)
388{
389 unsigned int ratio = 2 * f_in / f_out;
390
391 if (ratio <= 2) {
392 *mclkdiv = WM8974_MCLKDIV_1;
393 ratio = 2;
394 } else if (ratio == 3) {
395 *mclkdiv = WM8974_MCLKDIV_1_5;
396 } else if (ratio == 4) {
397 *mclkdiv = WM8974_MCLKDIV_2;
398 } else if (ratio <= 6) {
399 *mclkdiv = WM8974_MCLKDIV_3;
400 ratio = 6;
401 } else if (ratio <= 8) {
402 *mclkdiv = WM8974_MCLKDIV_4;
403 ratio = 8;
404 } else if (ratio <= 12) {
405 *mclkdiv = WM8974_MCLKDIV_6;
406 ratio = 12;
407 } else if (ratio <= 16) {
408 *mclkdiv = WM8974_MCLKDIV_8;
409 ratio = 16;
410 } else {
411 *mclkdiv = WM8974_MCLKDIV_12;
412 ratio = 24;
413 }
414
415 return f_out * ratio / 2;
416}
417
418static int wm8974_update_clocks(struct snd_soc_dai *dai)
419{
Kuninori Morimoto3e32a3f2018-01-29 03:06:52 +0000420 struct snd_soc_component *component = dai->component;
421 struct wm8974_priv *priv = snd_soc_component_get_drvdata(component);
Mans Rullgard51b2bb32016-01-25 12:36:43 +0000422 unsigned int fs256;
423 unsigned int fpll = 0;
424 unsigned int f;
425 int mclkdiv;
426
427 if (!priv->mclk || !priv->fs)
428 return 0;
429
430 fs256 = 256 * priv->fs;
431
432 f = wm8974_get_mclkdiv(priv->mclk, fs256, &mclkdiv);
433
434 if (f != priv->mclk) {
435 /* The PLL performs best around 90MHz */
436 fpll = wm8974_get_mclkdiv(22500000, fs256, &mclkdiv);
437 }
438
439 wm8974_set_dai_pll(dai, 0, 0, priv->mclk, fpll);
440 wm8974_set_dai_clkdiv(dai, WM8974_MCLKDIV, mclkdiv);
441
442 return 0;
443}
444
445static int wm8974_set_dai_sysclk(struct snd_soc_dai *dai, int clk_id,
446 unsigned int freq, int dir)
447{
Kuninori Morimoto3e32a3f2018-01-29 03:06:52 +0000448 struct snd_soc_component *component = dai->component;
449 struct wm8974_priv *priv = snd_soc_component_get_drvdata(component);
Mans Rullgard51b2bb32016-01-25 12:36:43 +0000450
451 if (dir != SND_SOC_CLOCK_IN)
452 return -EINVAL;
453
454 priv->mclk = freq;
455
456 return wm8974_update_clocks(dai);
457}
458
Mark Brown0a1bf552009-05-23 11:18:41 +0100459static int wm8974_set_dai_fmt(struct snd_soc_dai *codec_dai,
460 unsigned int fmt)
461{
Kuninori Morimoto3e32a3f2018-01-29 03:06:52 +0000462 struct snd_soc_component *component = codec_dai->component;
Mark Brown0a1bf552009-05-23 11:18:41 +0100463 u16 iface = 0;
Kuninori Morimoto3e32a3f2018-01-29 03:06:52 +0000464 u16 clk = snd_soc_component_read32(component, WM8974_CLOCK) & 0x1fe;
Mark Brown0a1bf552009-05-23 11:18:41 +0100465
466 /* set master/slave audio interface */
467 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
468 case SND_SOC_DAIFMT_CBM_CFM:
469 clk |= 0x0001;
470 break;
471 case SND_SOC_DAIFMT_CBS_CFS:
472 break;
473 default:
474 return -EINVAL;
475 }
476
477 /* interface format */
478 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
479 case SND_SOC_DAIFMT_I2S:
480 iface |= 0x0010;
481 break;
482 case SND_SOC_DAIFMT_RIGHT_J:
483 break;
484 case SND_SOC_DAIFMT_LEFT_J:
485 iface |= 0x0008;
486 break;
487 case SND_SOC_DAIFMT_DSP_A:
488 iface |= 0x00018;
489 break;
490 default:
491 return -EINVAL;
492 }
493
494 /* clock inversion */
495 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
496 case SND_SOC_DAIFMT_NB_NF:
497 break;
498 case SND_SOC_DAIFMT_IB_IF:
499 iface |= 0x0180;
500 break;
501 case SND_SOC_DAIFMT_IB_NF:
502 iface |= 0x0100;
503 break;
504 case SND_SOC_DAIFMT_NB_IF:
505 iface |= 0x0080;
506 break;
507 default:
508 return -EINVAL;
509 }
510
Kuninori Morimoto3e32a3f2018-01-29 03:06:52 +0000511 snd_soc_component_write(component, WM8974_IFACE, iface);
512 snd_soc_component_write(component, WM8974_CLOCK, clk);
Mark Brown0a1bf552009-05-23 11:18:41 +0100513 return 0;
514}
515
516static int wm8974_pcm_hw_params(struct snd_pcm_substream *substream,
517 struct snd_pcm_hw_params *params,
518 struct snd_soc_dai *dai)
519{
Kuninori Morimoto3e32a3f2018-01-29 03:06:52 +0000520 struct snd_soc_component *component = dai->component;
521 struct wm8974_priv *priv = snd_soc_component_get_drvdata(component);
522 u16 iface = snd_soc_component_read32(component, WM8974_IFACE) & 0x19f;
523 u16 adn = snd_soc_component_read32(component, WM8974_ADD) & 0x1f1;
Mans Rullgard51b2bb32016-01-25 12:36:43 +0000524 int err;
525
526 priv->fs = params_rate(params);
527 err = wm8974_update_clocks(dai);
528 if (err)
529 return err;
Mark Brown0a1bf552009-05-23 11:18:41 +0100530
531 /* bit size */
Mark Brown6afdc9a2014-07-31 12:53:50 +0100532 switch (params_width(params)) {
533 case 16:
Mark Brown0a1bf552009-05-23 11:18:41 +0100534 break;
Mark Brown6afdc9a2014-07-31 12:53:50 +0100535 case 20:
Mark Brown0a1bf552009-05-23 11:18:41 +0100536 iface |= 0x0020;
537 break;
Mark Brown6afdc9a2014-07-31 12:53:50 +0100538 case 24:
Mark Brown0a1bf552009-05-23 11:18:41 +0100539 iface |= 0x0040;
540 break;
Mark Brown6afdc9a2014-07-31 12:53:50 +0100541 case 32:
Mark Brown0a1bf552009-05-23 11:18:41 +0100542 iface |= 0x0060;
543 break;
544 }
545
546 /* filter coefficient */
547 switch (params_rate(params)) {
Guennadi Liakhovetskib3172f22009-12-24 01:13:51 +0100548 case 8000:
Mark Brown0a1bf552009-05-23 11:18:41 +0100549 adn |= 0x5 << 1;
550 break;
Guennadi Liakhovetskib3172f22009-12-24 01:13:51 +0100551 case 11025:
Mark Brown0a1bf552009-05-23 11:18:41 +0100552 adn |= 0x4 << 1;
553 break;
Guennadi Liakhovetskib3172f22009-12-24 01:13:51 +0100554 case 16000:
Mark Brown0a1bf552009-05-23 11:18:41 +0100555 adn |= 0x3 << 1;
556 break;
Guennadi Liakhovetskib3172f22009-12-24 01:13:51 +0100557 case 22050:
Mark Brown0a1bf552009-05-23 11:18:41 +0100558 adn |= 0x2 << 1;
559 break;
Guennadi Liakhovetskib3172f22009-12-24 01:13:51 +0100560 case 32000:
Mark Brown0a1bf552009-05-23 11:18:41 +0100561 adn |= 0x1 << 1;
562 break;
Guennadi Liakhovetskib3172f22009-12-24 01:13:51 +0100563 case 44100:
564 case 48000:
Mark Brown0a1bf552009-05-23 11:18:41 +0100565 break;
566 }
567
Kuninori Morimoto3e32a3f2018-01-29 03:06:52 +0000568 snd_soc_component_write(component, WM8974_IFACE, iface);
569 snd_soc_component_write(component, WM8974_ADD, adn);
Mark Brown0a1bf552009-05-23 11:18:41 +0100570 return 0;
571}
572
573static int wm8974_mute(struct snd_soc_dai *dai, int mute)
574{
Kuninori Morimoto3e32a3f2018-01-29 03:06:52 +0000575 struct snd_soc_component *component = dai->component;
576 u16 mute_reg = snd_soc_component_read32(component, WM8974_DAC) & 0xffbf;
Mark Brown0a1bf552009-05-23 11:18:41 +0100577
Mark Brown1a55b3f2009-05-23 11:31:40 +0100578 if (mute)
Kuninori Morimoto3e32a3f2018-01-29 03:06:52 +0000579 snd_soc_component_write(component, WM8974_DAC, mute_reg | 0x40);
Mark Brown0a1bf552009-05-23 11:18:41 +0100580 else
Kuninori Morimoto3e32a3f2018-01-29 03:06:52 +0000581 snd_soc_component_write(component, WM8974_DAC, mute_reg);
Mark Brown0a1bf552009-05-23 11:18:41 +0100582 return 0;
583}
584
585/* liam need to make this lower power with dapm */
Kuninori Morimoto3e32a3f2018-01-29 03:06:52 +0000586static int wm8974_set_bias_level(struct snd_soc_component *component,
Mark Brown0a1bf552009-05-23 11:18:41 +0100587 enum snd_soc_bias_level level)
588{
Kuninori Morimoto3e32a3f2018-01-29 03:06:52 +0000589 u16 power1 = snd_soc_component_read32(component, WM8974_POWER1) & ~0x3;
Mark Browndf1ef7a2009-06-30 19:01:09 +0100590
Mark Brown0a1bf552009-05-23 11:18:41 +0100591 switch (level) {
592 case SND_SOC_BIAS_ON:
Mark Brown0a1bf552009-05-23 11:18:41 +0100593 case SND_SOC_BIAS_PREPARE:
Mark Browndf1ef7a2009-06-30 19:01:09 +0100594 power1 |= 0x1; /* VMID 50k */
Kuninori Morimoto3e32a3f2018-01-29 03:06:52 +0000595 snd_soc_component_write(component, WM8974_POWER1, power1);
Mark Brown0a1bf552009-05-23 11:18:41 +0100596 break;
Mark Browndf1ef7a2009-06-30 19:01:09 +0100597
Mark Brown0a1bf552009-05-23 11:18:41 +0100598 case SND_SOC_BIAS_STANDBY:
Mark Browndf1ef7a2009-06-30 19:01:09 +0100599 power1 |= WM8974_POWER1_BIASEN | WM8974_POWER1_BUFIOEN;
600
Kuninori Morimoto3e32a3f2018-01-29 03:06:52 +0000601 if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) {
602 regcache_sync(dev_get_regmap(component->dev, NULL));
Axel Lin0bad3d82011-10-07 21:52:42 +0800603
Mark Browndf1ef7a2009-06-30 19:01:09 +0100604 /* Initial cap charge at VMID 5k */
Kuninori Morimoto3e32a3f2018-01-29 03:06:52 +0000605 snd_soc_component_write(component, WM8974_POWER1, power1 | 0x3);
Mark Browndf1ef7a2009-06-30 19:01:09 +0100606 mdelay(100);
607 }
608
609 power1 |= 0x2; /* VMID 500k */
Kuninori Morimoto3e32a3f2018-01-29 03:06:52 +0000610 snd_soc_component_write(component, WM8974_POWER1, power1);
Mark Brown0a1bf552009-05-23 11:18:41 +0100611 break;
Mark Browndf1ef7a2009-06-30 19:01:09 +0100612
Mark Brown0a1bf552009-05-23 11:18:41 +0100613 case SND_SOC_BIAS_OFF:
Kuninori Morimoto3e32a3f2018-01-29 03:06:52 +0000614 snd_soc_component_write(component, WM8974_POWER1, 0);
615 snd_soc_component_write(component, WM8974_POWER2, 0);
616 snd_soc_component_write(component, WM8974_POWER3, 0);
Mark Brown0a1bf552009-05-23 11:18:41 +0100617 break;
618 }
Mark Browndf1ef7a2009-06-30 19:01:09 +0100619
Mark Brown0a1bf552009-05-23 11:18:41 +0100620 return 0;
621}
622
Mark Brown1a55b3f2009-05-23 11:31:40 +0100623#define WM8974_RATES (SNDRV_PCM_RATE_8000_48000)
Mark Brown0a1bf552009-05-23 11:18:41 +0100624
625#define WM8974_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
626 SNDRV_PCM_FMTBIT_S24_LE)
627
Lars-Peter Clausen85e76522011-11-23 11:40:40 +0100628static const struct snd_soc_dai_ops wm8974_ops = {
Mark Brown0a1bf552009-05-23 11:18:41 +0100629 .hw_params = wm8974_pcm_hw_params,
630 .digital_mute = wm8974_mute,
631 .set_fmt = wm8974_set_dai_fmt,
632 .set_clkdiv = wm8974_set_dai_clkdiv,
633 .set_pll = wm8974_set_dai_pll,
Mans Rullgard51b2bb32016-01-25 12:36:43 +0000634 .set_sysclk = wm8974_set_dai_sysclk,
Mark Brown0a1bf552009-05-23 11:18:41 +0100635};
636
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000637static struct snd_soc_dai_driver wm8974_dai = {
638 .name = "wm8974-hifi",
Mark Brown0a1bf552009-05-23 11:18:41 +0100639 .playback = {
640 .stream_name = "Playback",
641 .channels_min = 1,
Mark Brown33d81af2009-06-30 19:01:52 +0100642 .channels_max = 2, /* Only 1 channel of data */
Mark Brown0a1bf552009-05-23 11:18:41 +0100643 .rates = WM8974_RATES,
644 .formats = WM8974_FORMATS,},
645 .capture = {
646 .stream_name = "Capture",
647 .channels_min = 1,
Mark Brown33d81af2009-06-30 19:01:52 +0100648 .channels_max = 2, /* Only 1 channel of data */
Mark Brown0a1bf552009-05-23 11:18:41 +0100649 .rates = WM8974_RATES,
650 .formats = WM8974_FORMATS,},
651 .ops = &wm8974_ops,
Mark Browncb11d392009-06-30 19:36:39 +0100652 .symmetric_rates = 1,
Mark Brown0a1bf552009-05-23 11:18:41 +0100653};
Mark Brown0a1bf552009-05-23 11:18:41 +0100654
Mark Browne40e0b52013-11-08 14:01:39 +0000655static const struct regmap_config wm8974_regmap = {
656 .reg_bits = 7,
657 .val_bits = 9,
658
659 .max_register = WM8974_MONOMIX,
660 .reg_defaults = wm8974_reg_defaults,
661 .num_reg_defaults = ARRAY_SIZE(wm8974_reg_defaults),
Mans Rullgard1ea5998a2015-12-11 11:27:08 +0000662 .cache_type = REGCACHE_FLAT,
Mark Browne40e0b52013-11-08 14:01:39 +0000663};
664
Kuninori Morimoto3e32a3f2018-01-29 03:06:52 +0000665static int wm8974_probe(struct snd_soc_component *component)
Mark Brown0a1bf552009-05-23 11:18:41 +0100666{
Mark Brown0a1bf552009-05-23 11:18:41 +0100667 int ret = 0;
668
Kuninori Morimoto3e32a3f2018-01-29 03:06:52 +0000669 ret = wm8974_reset(component);
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000670 if (ret < 0) {
Kuninori Morimoto3e32a3f2018-01-29 03:06:52 +0000671 dev_err(component->dev, "Failed to issue reset\n");
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000672 return ret;
673 }
674
Mark Brown0a1bf552009-05-23 11:18:41 +0100675 return 0;
676}
677
Kuninori Morimoto3e32a3f2018-01-29 03:06:52 +0000678static const struct snd_soc_component_driver soc_component_dev_wm8974 = {
679 .probe = wm8974_probe,
680 .set_bias_level = wm8974_set_bias_level,
681 .controls = wm8974_snd_controls,
682 .num_controls = ARRAY_SIZE(wm8974_snd_controls),
683 .dapm_widgets = wm8974_dapm_widgets,
684 .num_dapm_widgets = ARRAY_SIZE(wm8974_dapm_widgets),
685 .dapm_routes = wm8974_dapm_routes,
686 .num_dapm_routes = ARRAY_SIZE(wm8974_dapm_routes),
687 .suspend_bias_off = 1,
688 .idle_bias_on = 1,
689 .use_pmdown_time = 1,
690 .endianness = 1,
691 .non_legacy_dai_naming = 1,
Mark Brown0a1bf552009-05-23 11:18:41 +0100692};
Mark Brown0a1bf552009-05-23 11:18:41 +0100693
Bill Pemberton7a79e942012-12-07 09:26:37 -0500694static int wm8974_i2c_probe(struct i2c_client *i2c,
695 const struct i2c_device_id *id)
Mark Brown4fcbbb62009-05-23 12:27:03 +0100696{
Mans Rullgard51b2bb32016-01-25 12:36:43 +0000697 struct wm8974_priv *priv;
Mark Browne40e0b52013-11-08 14:01:39 +0000698 struct regmap *regmap;
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000699 int ret;
Mark Brown4fcbbb62009-05-23 12:27:03 +0100700
Mans Rullgard51b2bb32016-01-25 12:36:43 +0000701 priv = devm_kzalloc(&i2c->dev, sizeof(*priv), GFP_KERNEL);
702 if (!priv)
703 return -ENOMEM;
704
705 i2c_set_clientdata(i2c, priv);
706
Mark Browne40e0b52013-11-08 14:01:39 +0000707 regmap = devm_regmap_init_i2c(i2c, &wm8974_regmap);
708 if (IS_ERR(regmap))
709 return PTR_ERR(regmap);
710
Kuninori Morimoto3e32a3f2018-01-29 03:06:52 +0000711 ret = devm_snd_soc_register_component(&i2c->dev,
712 &soc_component_dev_wm8974, &wm8974_dai, 1);
Mark Brownc2562a82011-12-29 11:11:25 +0000713
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000714 return ret;
Mark Brown4fcbbb62009-05-23 12:27:03 +0100715}
716
Mark Brown4fcbbb62009-05-23 12:27:03 +0100717static const struct i2c_device_id wm8974_i2c_id[] = {
718 { "wm8974", 0 },
719 { }
720};
721MODULE_DEVICE_TABLE(i2c, wm8974_i2c_id);
722
Mans Rullgard2005bd82015-12-16 13:02:55 +0000723static const struct of_device_id wm8974_of_match[] = {
724 { .compatible = "wlf,wm8974", },
725 { }
726};
727MODULE_DEVICE_TABLE(of, wm8974_of_match);
728
Mark Brown4fcbbb62009-05-23 12:27:03 +0100729static struct i2c_driver wm8974_i2c_driver = {
730 .driver = {
Mark Brown091edcc2011-12-02 22:08:49 +0000731 .name = "wm8974",
Mans Rullgard2005bd82015-12-16 13:02:55 +0000732 .of_match_table = wm8974_of_match,
Mark Brown4fcbbb62009-05-23 12:27:03 +0100733 },
734 .probe = wm8974_i2c_probe,
Mark Brown4fcbbb62009-05-23 12:27:03 +0100735 .id_table = wm8974_i2c_id,
736};
737
Sachin Kamat2be59412012-08-06 17:25:59 +0530738module_i2c_driver(wm8974_i2c_driver);
Mark Brown0a1bf552009-05-23 11:18:41 +0100739
740MODULE_DESCRIPTION("ASoC WM8974 driver");
741MODULE_AUTHOR("Liam Girdwood");
742MODULE_LICENSE("GPL");