Thomas Gleixner | 3795de2 | 2010-09-22 17:09:43 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar |
| 3 | * Copyright (C) 2005-2006, Thomas Gleixner, Russell King |
| 4 | * |
| 5 | * This file contains the interrupt descriptor management code |
| 6 | * |
| 7 | * Detailed information is available in Documentation/DocBook/genericirq |
| 8 | * |
| 9 | */ |
| 10 | #include <linux/irq.h> |
| 11 | #include <linux/slab.h> |
| 12 | #include <linux/module.h> |
| 13 | #include <linux/interrupt.h> |
| 14 | #include <linux/kernel_stat.h> |
| 15 | #include <linux/radix-tree.h> |
Thomas Gleixner | 1f5a5b8 | 2010-09-27 17:48:26 +0200 | [diff] [blame] | 16 | #include <linux/bitmap.h> |
Thomas Gleixner | 3795de2 | 2010-09-22 17:09:43 +0200 | [diff] [blame] | 17 | |
| 18 | #include "internals.h" |
| 19 | |
| 20 | /* |
| 21 | * lockdep: we want to handle all irq_desc locks as a single lock-class: |
| 22 | */ |
| 23 | struct lock_class_key irq_desc_lock_class; |
| 24 | |
| 25 | #if defined(CONFIG_SMP) && defined(CONFIG_GENERIC_HARDIRQS) |
| 26 | static void __init init_irq_default_affinity(void) |
| 27 | { |
| 28 | alloc_cpumask_var(&irq_default_affinity, GFP_NOWAIT); |
| 29 | cpumask_setall(irq_default_affinity); |
| 30 | } |
| 31 | #else |
| 32 | static void __init init_irq_default_affinity(void) |
| 33 | { |
| 34 | } |
| 35 | #endif |
| 36 | |
Thomas Gleixner | 1f5a5b8 | 2010-09-27 17:48:26 +0200 | [diff] [blame] | 37 | #ifdef CONFIG_SMP |
| 38 | static int alloc_masks(struct irq_desc *desc, gfp_t gfp, int node) |
| 39 | { |
| 40 | if (!zalloc_cpumask_var_node(&desc->irq_data.affinity, gfp, node)) |
| 41 | return -ENOMEM; |
| 42 | |
| 43 | #ifdef CONFIG_GENERIC_PENDING_IRQ |
| 44 | if (!zalloc_cpumask_var_node(&desc->pending_mask, gfp, node)) { |
| 45 | free_cpumask_var(desc->irq_data.affinity); |
| 46 | return -ENOMEM; |
| 47 | } |
| 48 | #endif |
| 49 | return 0; |
| 50 | } |
| 51 | |
| 52 | static void desc_smp_init(struct irq_desc *desc, int node) |
| 53 | { |
Thomas Gleixner | aa99ec0 | 2010-09-27 20:02:56 +0200 | [diff] [blame^] | 54 | desc->irq_data.node = node; |
Thomas Gleixner | 1f5a5b8 | 2010-09-27 17:48:26 +0200 | [diff] [blame] | 55 | cpumask_copy(desc->irq_data.affinity, irq_default_affinity); |
| 56 | } |
| 57 | |
| 58 | #else |
| 59 | static inline int |
| 60 | alloc_masks(struct irq_desc *desc, gfp_t gfp, int node) { return 0; } |
| 61 | static inline void desc_smp_init(struct irq_desc *desc, int node) { } |
| 62 | #endif |
| 63 | |
| 64 | static void desc_set_defaults(unsigned int irq, struct irq_desc *desc, int node) |
| 65 | { |
| 66 | desc->irq_data.irq = irq; |
| 67 | desc->irq_data.chip = &no_irq_chip; |
| 68 | desc->irq_data.chip_data = NULL; |
| 69 | desc->irq_data.handler_data = NULL; |
| 70 | desc->irq_data.msi_desc = NULL; |
| 71 | desc->status = IRQ_DEFAULT_INIT_FLAGS; |
| 72 | desc->handle_irq = handle_bad_irq; |
| 73 | desc->depth = 1; |
| 74 | desc->name = NULL; |
| 75 | memset(desc->kstat_irqs, 0, nr_cpu_ids * sizeof(*(desc->kstat_irqs))); |
| 76 | desc_smp_init(desc, node); |
| 77 | } |
| 78 | |
Thomas Gleixner | 3795de2 | 2010-09-22 17:09:43 +0200 | [diff] [blame] | 79 | int nr_irqs = NR_IRQS; |
| 80 | EXPORT_SYMBOL_GPL(nr_irqs); |
| 81 | |
Thomas Gleixner | 1f5a5b8 | 2010-09-27 17:48:26 +0200 | [diff] [blame] | 82 | DEFINE_RAW_SPINLOCK(sparse_irq_lock); |
| 83 | static DECLARE_BITMAP(allocated_irqs, NR_IRQS); |
| 84 | |
Thomas Gleixner | 3795de2 | 2010-09-22 17:09:43 +0200 | [diff] [blame] | 85 | #ifdef CONFIG_SPARSE_IRQ |
| 86 | |
Thomas Gleixner | 3795de2 | 2010-09-22 17:09:43 +0200 | [diff] [blame] | 87 | void __ref init_kstat_irqs(struct irq_desc *desc, int node, int nr) |
| 88 | { |
| 89 | void *ptr; |
| 90 | |
| 91 | ptr = kzalloc_node(nr * sizeof(*desc->kstat_irqs), |
| 92 | GFP_ATOMIC, node); |
| 93 | |
| 94 | /* |
| 95 | * don't overwite if can not get new one |
| 96 | * init_copy_kstat_irqs() could still use old one |
| 97 | */ |
| 98 | if (ptr) { |
| 99 | printk(KERN_DEBUG " alloc kstat_irqs on node %d\n", node); |
| 100 | desc->kstat_irqs = ptr; |
| 101 | } |
| 102 | } |
| 103 | |
Thomas Gleixner | 3795de2 | 2010-09-22 17:09:43 +0200 | [diff] [blame] | 104 | static RADIX_TREE(irq_desc_tree, GFP_ATOMIC); |
| 105 | |
Thomas Gleixner | 1f5a5b8 | 2010-09-27 17:48:26 +0200 | [diff] [blame] | 106 | static void irq_insert_desc(unsigned int irq, struct irq_desc *desc) |
Thomas Gleixner | 3795de2 | 2010-09-22 17:09:43 +0200 | [diff] [blame] | 107 | { |
| 108 | radix_tree_insert(&irq_desc_tree, irq, desc); |
| 109 | } |
| 110 | |
| 111 | struct irq_desc *irq_to_desc(unsigned int irq) |
| 112 | { |
| 113 | return radix_tree_lookup(&irq_desc_tree, irq); |
| 114 | } |
| 115 | |
| 116 | void replace_irq_desc(unsigned int irq, struct irq_desc *desc) |
| 117 | { |
| 118 | void **ptr; |
| 119 | |
| 120 | ptr = radix_tree_lookup_slot(&irq_desc_tree, irq); |
| 121 | if (ptr) |
| 122 | radix_tree_replace_slot(ptr, desc); |
| 123 | } |
| 124 | |
Thomas Gleixner | 1f5a5b8 | 2010-09-27 17:48:26 +0200 | [diff] [blame] | 125 | static void delete_irq_desc(unsigned int irq) |
| 126 | { |
| 127 | radix_tree_delete(&irq_desc_tree, irq); |
| 128 | } |
| 129 | |
| 130 | #ifdef CONFIG_SMP |
| 131 | static void free_masks(struct irq_desc *desc) |
| 132 | { |
| 133 | #ifdef CONFIG_GENERIC_PENDING_IRQ |
| 134 | free_cpumask_var(desc->pending_mask); |
| 135 | #endif |
| 136 | free_cpumask_var(desc->affinity); |
| 137 | } |
| 138 | #else |
| 139 | static inline void free_masks(struct irq_desc *desc) { } |
| 140 | #endif |
| 141 | |
| 142 | static struct irq_desc *alloc_desc(int irq, int node) |
| 143 | { |
Thomas Gleixner | aa99ec0 | 2010-09-27 20:02:56 +0200 | [diff] [blame^] | 144 | /* Temporary hack until we can switch to GFP_KERNEL */ |
| 145 | gfp_t gfp = gfp_allowed_mask == GFP_BOOT_MASK ? GFP_NOWAIT : GFP_ATOMIC; |
Thomas Gleixner | 1f5a5b8 | 2010-09-27 17:48:26 +0200 | [diff] [blame] | 146 | struct irq_desc *desc; |
Thomas Gleixner | 1f5a5b8 | 2010-09-27 17:48:26 +0200 | [diff] [blame] | 147 | |
| 148 | desc = kzalloc_node(sizeof(*desc), gfp, node); |
| 149 | if (!desc) |
| 150 | return NULL; |
| 151 | /* allocate based on nr_cpu_ids */ |
| 152 | desc->kstat_irqs = kzalloc_node(nr_cpu_ids * sizeof(*desc->kstat_irqs), |
| 153 | gfp, node); |
| 154 | if (!desc->kstat_irqs) |
| 155 | goto err_desc; |
| 156 | |
| 157 | if (alloc_masks(desc, gfp, node)) |
| 158 | goto err_kstat; |
| 159 | |
| 160 | raw_spin_lock_init(&desc->lock); |
| 161 | lockdep_set_class(&desc->lock, &irq_desc_lock_class); |
| 162 | |
| 163 | desc_set_defaults(irq, desc, node); |
| 164 | |
| 165 | return desc; |
| 166 | |
| 167 | err_kstat: |
| 168 | kfree(desc->kstat_irqs); |
| 169 | err_desc: |
| 170 | kfree(desc); |
| 171 | return NULL; |
| 172 | } |
| 173 | |
| 174 | static void free_desc(unsigned int irq) |
| 175 | { |
| 176 | struct irq_desc *desc = irq_to_desc(irq); |
| 177 | unsigned long flags; |
| 178 | |
Thomas Gleixner | 13bfe99 | 2010-09-30 02:46:07 +0200 | [diff] [blame] | 179 | unregister_irq_proc(irq, desc); |
| 180 | |
Thomas Gleixner | 1f5a5b8 | 2010-09-27 17:48:26 +0200 | [diff] [blame] | 181 | raw_spin_lock_irqsave(&sparse_irq_lock, flags); |
| 182 | delete_irq_desc(irq); |
| 183 | raw_spin_unlock_irqrestore(&sparse_irq_lock, flags); |
| 184 | |
| 185 | free_masks(desc); |
| 186 | kfree(desc->kstat_irqs); |
| 187 | kfree(desc); |
| 188 | } |
| 189 | |
| 190 | static int alloc_descs(unsigned int start, unsigned int cnt, int node) |
| 191 | { |
| 192 | struct irq_desc *desc; |
| 193 | unsigned long flags; |
| 194 | int i; |
| 195 | |
| 196 | for (i = 0; i < cnt; i++) { |
| 197 | desc = alloc_desc(start + i, node); |
| 198 | if (!desc) |
| 199 | goto err; |
Thomas Gleixner | aa99ec0 | 2010-09-27 20:02:56 +0200 | [diff] [blame^] | 200 | /* temporary until I fixed x86 madness */ |
| 201 | arch_init_chip_data(desc, node); |
Thomas Gleixner | 1f5a5b8 | 2010-09-27 17:48:26 +0200 | [diff] [blame] | 202 | raw_spin_lock_irqsave(&sparse_irq_lock, flags); |
| 203 | irq_insert_desc(start + i, desc); |
| 204 | raw_spin_unlock_irqrestore(&sparse_irq_lock, flags); |
| 205 | } |
| 206 | return start; |
| 207 | |
| 208 | err: |
| 209 | for (i--; i >= 0; i--) |
| 210 | free_desc(start + i); |
| 211 | |
| 212 | raw_spin_lock_irqsave(&sparse_irq_lock, flags); |
| 213 | bitmap_clear(allocated_irqs, start, cnt); |
| 214 | raw_spin_unlock_irqrestore(&sparse_irq_lock, flags); |
| 215 | return -ENOMEM; |
| 216 | } |
| 217 | |
Thomas Gleixner | aa99ec0 | 2010-09-27 20:02:56 +0200 | [diff] [blame^] | 218 | struct irq_desc * __ref irq_to_desc_alloc_node(unsigned int irq, int node) |
| 219 | { |
| 220 | int res = irq_alloc_descs(irq, irq, 1, node); |
Thomas Gleixner | 3795de2 | 2010-09-22 17:09:43 +0200 | [diff] [blame] | 221 | |
Thomas Gleixner | aa99ec0 | 2010-09-27 20:02:56 +0200 | [diff] [blame^] | 222 | if (res == -EEXIST || res == irq) |
| 223 | return irq_to_desc(irq); |
| 224 | return NULL; |
| 225 | } |
Thomas Gleixner | 3795de2 | 2010-09-22 17:09:43 +0200 | [diff] [blame] | 226 | |
| 227 | int __init early_irq_init(void) |
| 228 | { |
Thomas Gleixner | aa99ec0 | 2010-09-27 20:02:56 +0200 | [diff] [blame^] | 229 | int i, node = first_online_node; |
Thomas Gleixner | 3795de2 | 2010-09-22 17:09:43 +0200 | [diff] [blame] | 230 | struct irq_desc *desc; |
Thomas Gleixner | 3795de2 | 2010-09-22 17:09:43 +0200 | [diff] [blame] | 231 | |
| 232 | init_irq_default_affinity(); |
| 233 | |
| 234 | /* initialize nr_irqs based on nr_cpu_ids */ |
| 235 | arch_probe_nr_irqs(); |
| 236 | printk(KERN_INFO "NR_IRQS:%d nr_irqs:%d\n", NR_IRQS, nr_irqs); |
| 237 | |
Thomas Gleixner | aa99ec0 | 2010-09-27 20:02:56 +0200 | [diff] [blame^] | 238 | for (i = 0; i < NR_IRQS_LEGACY; i++) { |
| 239 | desc = alloc_desc(i, node); |
| 240 | set_bit(i, allocated_irqs); |
| 241 | irq_insert_desc(i, desc); |
Thomas Gleixner | 3795de2 | 2010-09-22 17:09:43 +0200 | [diff] [blame] | 242 | } |
Thomas Gleixner | 3795de2 | 2010-09-22 17:09:43 +0200 | [diff] [blame] | 243 | return arch_early_irq_init(); |
| 244 | } |
| 245 | |
Thomas Gleixner | 3795de2 | 2010-09-22 17:09:43 +0200 | [diff] [blame] | 246 | #else /* !CONFIG_SPARSE_IRQ */ |
| 247 | |
| 248 | struct irq_desc irq_desc[NR_IRQS] __cacheline_aligned_in_smp = { |
| 249 | [0 ... NR_IRQS-1] = { |
Thomas Gleixner | 1318a48 | 2010-09-27 21:01:37 +0200 | [diff] [blame] | 250 | .status = IRQ_DEFAULT_INIT_FLAGS, |
Thomas Gleixner | 3795de2 | 2010-09-22 17:09:43 +0200 | [diff] [blame] | 251 | .handle_irq = handle_bad_irq, |
| 252 | .depth = 1, |
| 253 | .lock = __RAW_SPIN_LOCK_UNLOCKED(irq_desc->lock), |
| 254 | } |
| 255 | }; |
| 256 | |
| 257 | static unsigned int kstat_irqs_all[NR_IRQS][NR_CPUS]; |
| 258 | int __init early_irq_init(void) |
| 259 | { |
Thomas Gleixner | aa99ec0 | 2010-09-27 20:02:56 +0200 | [diff] [blame^] | 260 | int count, i, node = first_online_node; |
Thomas Gleixner | 3795de2 | 2010-09-22 17:09:43 +0200 | [diff] [blame] | 261 | struct irq_desc *desc; |
Thomas Gleixner | 3795de2 | 2010-09-22 17:09:43 +0200 | [diff] [blame] | 262 | |
| 263 | init_irq_default_affinity(); |
| 264 | |
| 265 | printk(KERN_INFO "NR_IRQS:%d\n", NR_IRQS); |
| 266 | |
| 267 | desc = irq_desc; |
| 268 | count = ARRAY_SIZE(irq_desc); |
| 269 | |
| 270 | for (i = 0; i < count; i++) { |
| 271 | desc[i].irq_data.irq = i; |
| 272 | desc[i].irq_data.chip = &no_irq_chip; |
Thomas Gleixner | 3795de2 | 2010-09-22 17:09:43 +0200 | [diff] [blame] | 273 | desc[i].kstat_irqs = kstat_irqs_all[i]; |
Thomas Gleixner | aa99ec0 | 2010-09-27 20:02:56 +0200 | [diff] [blame^] | 274 | alloc_masks(desc + i, GFP_KERNEL, node); |
| 275 | desc_smp_init(desc + i, node); |
Thomas Gleixner | 154cd38 | 2010-09-22 15:58:45 +0200 | [diff] [blame] | 276 | lockdep_set_class(&desc[i].lock, &irq_desc_lock_class); |
Thomas Gleixner | 3795de2 | 2010-09-22 17:09:43 +0200 | [diff] [blame] | 277 | } |
| 278 | return arch_early_irq_init(); |
| 279 | } |
| 280 | |
| 281 | struct irq_desc *irq_to_desc(unsigned int irq) |
| 282 | { |
| 283 | return (irq < NR_IRQS) ? irq_desc + irq : NULL; |
| 284 | } |
| 285 | |
| 286 | struct irq_desc *irq_to_desc_alloc_node(unsigned int irq, int node) |
| 287 | { |
| 288 | return irq_to_desc(irq); |
| 289 | } |
Thomas Gleixner | 1f5a5b8 | 2010-09-27 17:48:26 +0200 | [diff] [blame] | 290 | |
| 291 | #ifdef CONFIG_SMP |
| 292 | static inline int desc_node(struct irq_desc *desc) |
| 293 | { |
| 294 | return desc->irq_data.node; |
| 295 | } |
| 296 | #else |
| 297 | static inline int desc_node(struct irq_desc *desc) { return 0; } |
| 298 | #endif |
| 299 | |
| 300 | static void free_desc(unsigned int irq) |
| 301 | { |
| 302 | struct irq_desc *desc = irq_to_desc(irq); |
| 303 | unsigned long flags; |
| 304 | |
| 305 | raw_spin_lock_irqsave(&desc->lock, flags); |
| 306 | desc_set_defaults(irq, desc, desc_node(desc)); |
| 307 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
| 308 | } |
| 309 | |
| 310 | static inline int alloc_descs(unsigned int start, unsigned int cnt, int node) |
| 311 | { |
| 312 | return start; |
| 313 | } |
Thomas Gleixner | 3795de2 | 2010-09-22 17:09:43 +0200 | [diff] [blame] | 314 | #endif /* !CONFIG_SPARSE_IRQ */ |
| 315 | |
Thomas Gleixner | 1f5a5b8 | 2010-09-27 17:48:26 +0200 | [diff] [blame] | 316 | /* Dynamic interrupt handling */ |
| 317 | |
| 318 | /** |
| 319 | * irq_free_descs - free irq descriptors |
| 320 | * @from: Start of descriptor range |
| 321 | * @cnt: Number of consecutive irqs to free |
| 322 | */ |
| 323 | void irq_free_descs(unsigned int from, unsigned int cnt) |
| 324 | { |
| 325 | unsigned long flags; |
| 326 | int i; |
| 327 | |
| 328 | if (from >= nr_irqs || (from + cnt) > nr_irqs) |
| 329 | return; |
| 330 | |
| 331 | for (i = 0; i < cnt; i++) |
| 332 | free_desc(from + i); |
| 333 | |
| 334 | raw_spin_lock_irqsave(&sparse_irq_lock, flags); |
| 335 | bitmap_clear(allocated_irqs, from, cnt); |
| 336 | raw_spin_unlock_irqrestore(&sparse_irq_lock, flags); |
| 337 | } |
| 338 | |
| 339 | /** |
| 340 | * irq_alloc_descs - allocate and initialize a range of irq descriptors |
| 341 | * @irq: Allocate for specific irq number if irq >= 0 |
| 342 | * @from: Start the search from this irq number |
| 343 | * @cnt: Number of consecutive irqs to allocate. |
| 344 | * @node: Preferred node on which the irq descriptor should be allocated |
| 345 | * |
| 346 | * Returns the first irq number or error code |
| 347 | */ |
| 348 | int __ref |
| 349 | irq_alloc_descs(int irq, unsigned int from, unsigned int cnt, int node) |
| 350 | { |
| 351 | unsigned long flags; |
| 352 | int start, ret; |
| 353 | |
| 354 | if (!cnt) |
| 355 | return -EINVAL; |
| 356 | |
| 357 | raw_spin_lock_irqsave(&sparse_irq_lock, flags); |
| 358 | |
| 359 | start = bitmap_find_next_zero_area(allocated_irqs, nr_irqs, from, cnt, 0); |
| 360 | ret = -EEXIST; |
| 361 | if (irq >=0 && start != irq) |
| 362 | goto err; |
| 363 | |
| 364 | ret = -ENOMEM; |
| 365 | if (start >= nr_irqs) |
| 366 | goto err; |
| 367 | |
| 368 | bitmap_set(allocated_irqs, start, cnt); |
| 369 | raw_spin_unlock_irqrestore(&sparse_irq_lock, flags); |
| 370 | return alloc_descs(start, cnt, node); |
| 371 | |
| 372 | err: |
| 373 | raw_spin_unlock_irqrestore(&sparse_irq_lock, flags); |
| 374 | return ret; |
| 375 | } |
| 376 | |
Thomas Gleixner | a98d24b | 2010-09-30 10:45:07 +0200 | [diff] [blame] | 377 | /** |
Thomas Gleixner | 06f6c33 | 2010-10-12 12:31:46 +0200 | [diff] [blame] | 378 | * irq_reserve_irqs - mark irqs allocated |
| 379 | * @from: mark from irq number |
| 380 | * @cnt: number of irqs to mark |
| 381 | * |
| 382 | * Returns 0 on success or an appropriate error code |
| 383 | */ |
| 384 | int irq_reserve_irqs(unsigned int from, unsigned int cnt) |
| 385 | { |
| 386 | unsigned long flags; |
| 387 | unsigned int start; |
| 388 | int ret = 0; |
| 389 | |
| 390 | if (!cnt || (from + cnt) > nr_irqs) |
| 391 | return -EINVAL; |
| 392 | |
| 393 | raw_spin_lock_irqsave(&sparse_irq_lock, flags); |
| 394 | start = bitmap_find_next_zero_area(allocated_irqs, nr_irqs, from, cnt, 0); |
| 395 | if (start == from) |
| 396 | bitmap_set(allocated_irqs, start, cnt); |
| 397 | else |
| 398 | ret = -EEXIST; |
| 399 | raw_spin_unlock_irqrestore(&sparse_irq_lock, flags); |
| 400 | return ret; |
| 401 | } |
| 402 | |
| 403 | /** |
Thomas Gleixner | a98d24b | 2010-09-30 10:45:07 +0200 | [diff] [blame] | 404 | * irq_get_next_irq - get next allocated irq number |
| 405 | * @offset: where to start the search |
| 406 | * |
| 407 | * Returns next irq number after offset or nr_irqs if none is found. |
| 408 | */ |
| 409 | unsigned int irq_get_next_irq(unsigned int offset) |
| 410 | { |
| 411 | return find_next_bit(allocated_irqs, nr_irqs, offset); |
| 412 | } |
| 413 | |
Thomas Gleixner | 1f5a5b8 | 2010-09-27 17:48:26 +0200 | [diff] [blame] | 414 | /* Statistics access */ |
Thomas Gleixner | 3795de2 | 2010-09-22 17:09:43 +0200 | [diff] [blame] | 415 | void clear_kstat_irqs(struct irq_desc *desc) |
| 416 | { |
| 417 | memset(desc->kstat_irqs, 0, nr_cpu_ids * sizeof(*(desc->kstat_irqs))); |
| 418 | } |
| 419 | |
Thomas Gleixner | 3795de2 | 2010-09-22 17:09:43 +0200 | [diff] [blame] | 420 | unsigned int kstat_irqs_cpu(unsigned int irq, int cpu) |
| 421 | { |
| 422 | struct irq_desc *desc = irq_to_desc(irq); |
| 423 | return desc ? desc->kstat_irqs[cpu] : 0; |
| 424 | } |