blob: db67f5ba1e9a324a7bf21168dd434efad079c902 [file] [log] [blame]
Thomas Gleixner1a59d1b82019-05-27 08:55:05 +02001// SPDX-License-Identifier: GPL-2.0-or-later
Bo Shen3951e4a2012-11-28 11:46:13 +08002/*
3 * atmel-pcm-dma.c -- ALSA PCM DMA support for the Atmel SoC.
4 *
5 * Copyright (C) 2012 Atmel
6 *
7 * Author: Bo Shen <voice.shen@atmel.com>
8 *
9 * Based on atmel-pcm by:
10 * Sedji Gaouaou <sedji.gaouaou@atmel.com>
11 * Copyright 2008 Atmel
Bo Shen3951e4a2012-11-28 11:46:13 +080012 */
13
14#include <linux/module.h>
15#include <linux/init.h>
16#include <linux/platform_device.h>
17#include <linux/slab.h>
18#include <linux/dma-mapping.h>
19#include <linux/dmaengine.h>
20#include <linux/atmel-ssc.h>
21#include <linux/platform_data/dma-atmel.h>
22
23#include <sound/core.h>
24#include <sound/pcm.h>
25#include <sound/pcm_params.h>
26#include <sound/soc.h>
27#include <sound/dmaengine_pcm.h>
28
29#include "atmel-pcm.h"
30
31/*--------------------------------------------------------------------------*\
32 * Hardware definition
33\*--------------------------------------------------------------------------*/
34static const struct snd_pcm_hardware atmel_pcm_dma_hardware = {
35 .info = SNDRV_PCM_INFO_MMAP |
36 SNDRV_PCM_INFO_MMAP_VALID |
37 SNDRV_PCM_INFO_INTERLEAVED |
38 SNDRV_PCM_INFO_RESUME |
39 SNDRV_PCM_INFO_PAUSE,
Bo Shen3951e4a2012-11-28 11:46:13 +080040 .period_bytes_min = 256, /* lighting DMA overhead */
41 .period_bytes_max = 2 * 0xffff, /* if 2 bytes format */
42 .periods_min = 8,
43 .periods_max = 1024, /* no limit */
Alexandre Bellonic14e2592015-03-30 21:40:37 +020044 .buffer_bytes_max = 512 * 1024,
Bo Shen3951e4a2012-11-28 11:46:13 +080045};
46
47/**
48 * atmel_pcm_dma_irq: SSC interrupt handler for DMAENGINE enabled SSC
49 *
50 * We use DMAENGINE to send/receive data to/from SSC so this ISR is only to
51 * check if any overrun occured.
52 */
53static void atmel_pcm_dma_irq(u32 ssc_sr,
54 struct snd_pcm_substream *substream)
55{
Lars-Peter Clausen5fe668a2013-03-22 14:12:09 +010056 struct snd_soc_pcm_runtime *rtd = substream->private_data;
Bo Shen3951e4a2012-11-28 11:46:13 +080057 struct atmel_pcm_dma_params *prtd;
58
Lars-Peter Clausen5fe668a2013-03-22 14:12:09 +010059 prtd = snd_soc_dai_get_dma_data(rtd->cpu_dai, substream);
Bo Shen3951e4a2012-11-28 11:46:13 +080060
61 if (ssc_sr & prtd->mask->ssc_error) {
62 if (snd_pcm_running(substream))
63 pr_warn("atmel-pcm: buffer %s on %s (SSC_SR=%#x)\n",
64 substream->stream == SNDRV_PCM_STREAM_PLAYBACK
65 ? "underrun" : "overrun", prtd->name,
66 ssc_sr);
67
68 /* stop RX and capture: will be enabled again at restart */
69 ssc_writex(prtd->ssc->regs, SSC_CR, prtd->mask->ssc_disable);
Takashi Iwai1fb85102014-11-07 17:08:28 +010070 snd_pcm_stop_xrun(substream);
Bo Shen3951e4a2012-11-28 11:46:13 +080071
72 /* now drain RHR and read status to remove xrun condition */
73 ssc_readx(prtd->ssc->regs, SSC_RHR);
74 ssc_readx(prtd->ssc->regs, SSC_SR);
75 }
76}
77
Bo Shen3951e4a2012-11-28 11:46:13 +080078static int atmel_pcm_configure_dma(struct snd_pcm_substream *substream,
Bo Shen95e0e072013-07-03 16:38:00 +080079 struct snd_pcm_hw_params *params, struct dma_slave_config *slave_config)
Bo Shen3951e4a2012-11-28 11:46:13 +080080{
Bo Shen95e0e072013-07-03 16:38:00 +080081 struct snd_soc_pcm_runtime *rtd = substream->private_data;
82 struct atmel_pcm_dma_params *prtd;
Bo Shen3951e4a2012-11-28 11:46:13 +080083 struct ssc_device *ssc;
Bo Shen3951e4a2012-11-28 11:46:13 +080084 int ret;
85
Bo Shen95e0e072013-07-03 16:38:00 +080086 prtd = snd_soc_dai_get_dma_data(rtd->cpu_dai, substream);
Bo Shen3951e4a2012-11-28 11:46:13 +080087 ssc = prtd->ssc;
88
Bo Shen95e0e072013-07-03 16:38:00 +080089 ret = snd_hwparams_to_dma_slave_config(substream, params, slave_config);
Bo Shen3951e4a2012-11-28 11:46:13 +080090 if (ret) {
91 pr_err("atmel-pcm: hwparams to dma slave configure failed\n");
92 return ret;
93 }
94
Bo Shen56bbd86c2015-02-02 14:44:46 +080095 slave_config->dst_addr = ssc->phybase + SSC_THR;
96 slave_config->dst_maxburst = 1;
97
98 slave_config->src_addr = ssc->phybase + SSC_RHR;
99 slave_config->src_maxburst = 1;
Bo Shen3951e4a2012-11-28 11:46:13 +0800100
101 prtd->dma_intr_handler = atmel_pcm_dma_irq;
102
103 return 0;
Bo Shen3951e4a2012-11-28 11:46:13 +0800104}
105
Bo Shen95e0e072013-07-03 16:38:00 +0800106static const struct snd_dmaengine_pcm_config atmel_dmaengine_pcm_config = {
107 .prepare_slave_config = atmel_pcm_configure_dma,
108 .pcm_hardware = &atmel_pcm_dma_hardware,
Alexandre Bellonic14e2592015-03-30 21:40:37 +0200109 .prealloc_buffer_size = 64 * 1024,
Bo Shen3951e4a2012-11-28 11:46:13 +0800110};
111
112int atmel_pcm_dma_platform_register(struct device *dev)
113{
Kuninori Morimoto8af26492019-06-28 13:07:05 +0900114 return devm_snd_dmaengine_pcm_register(dev,
115 &atmel_dmaengine_pcm_config, 0);
Bo Shen3951e4a2012-11-28 11:46:13 +0800116}
117EXPORT_SYMBOL(atmel_pcm_dma_platform_register);
118
Bo Shen3951e4a2012-11-28 11:46:13 +0800119MODULE_AUTHOR("Bo Shen <voice.shen@atmel.com>");
120MODULE_DESCRIPTION("Atmel DMA based PCM module");
121MODULE_LICENSE("GPL");