| Nishad Kamdar | 9aab906 | 2019-11-27 18:49:08 +0530 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| Arun Parameswaran | a1cba56 | 2015-10-06 12:25:48 -0700 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) 2015 Broadcom Corporation |
| Arun Parameswaran | a1cba56 | 2015-10-06 12:25:48 -0700 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | #ifndef _LINUX_BCM_PHY_LIB_H |
| 7 | #define _LINUX_BCM_PHY_LIB_H |
| 8 | |
| Florian Fainelli | 79fb218 | 2018-05-22 17:04:49 -0700 | [diff] [blame] | 9 | #include <linux/brcmphy.h> |
| Arun Parameswaran | a1cba56 | 2015-10-06 12:25:48 -0700 | [diff] [blame] | 10 | #include <linux/phy.h> |
| 11 | |
| Florian Fainelli | f878fe5 | 2019-03-20 12:53:12 -0700 | [diff] [blame] | 12 | /* 28nm only register definitions */ |
| 13 | #define MISC_ADDR(base, channel) base, channel |
| 14 | |
| 15 | #define DSP_TAP10 MISC_ADDR(0x0a, 0) |
| 16 | #define PLL_PLLCTRL_1 MISC_ADDR(0x32, 1) |
| 17 | #define PLL_PLLCTRL_2 MISC_ADDR(0x32, 2) |
| 18 | #define PLL_PLLCTRL_4 MISC_ADDR(0x33, 0) |
| 19 | |
| 20 | #define AFE_RXCONFIG_0 MISC_ADDR(0x38, 0) |
| 21 | #define AFE_RXCONFIG_1 MISC_ADDR(0x38, 1) |
| 22 | #define AFE_RXCONFIG_2 MISC_ADDR(0x38, 2) |
| 23 | #define AFE_RX_LP_COUNTER MISC_ADDR(0x38, 3) |
| 24 | #define AFE_TX_CONFIG MISC_ADDR(0x39, 0) |
| 25 | #define AFE_VDCA_ICTRL_0 MISC_ADDR(0x39, 1) |
| 26 | #define AFE_VDAC_OTHERS_0 MISC_ADDR(0x39, 3) |
| 27 | #define AFE_HPF_TRIM_OTHERS MISC_ADDR(0x3a, 0) |
| 28 | |
| 29 | |
| Arun Parameswaran | a1cba56 | 2015-10-06 12:25:48 -0700 | [diff] [blame] | 30 | int bcm_phy_write_exp(struct phy_device *phydev, u16 reg, u16 val); |
| 31 | int bcm_phy_read_exp(struct phy_device *phydev, u16 reg); |
| 32 | |
| Florian Fainelli | 79fb218 | 2018-05-22 17:04:49 -0700 | [diff] [blame] | 33 | static inline int bcm_phy_write_exp_sel(struct phy_device *phydev, |
| 34 | u16 reg, u16 val) |
| 35 | { |
| 36 | return bcm_phy_write_exp(phydev, reg | MII_BCM54XX_EXP_SEL_ER, val); |
| 37 | } |
| 38 | |
| Florian Fainelli | 5519da8 | 2016-11-22 11:40:54 -0800 | [diff] [blame] | 39 | int bcm54xx_auxctl_write(struct phy_device *phydev, u16 regnum, u16 val); |
| 40 | int bcm54xx_auxctl_read(struct phy_device *phydev, u16 regnum); |
| 41 | |
| Arun Parameswaran | a1cba56 | 2015-10-06 12:25:48 -0700 | [diff] [blame] | 42 | int bcm_phy_write_misc(struct phy_device *phydev, |
| 43 | u16 reg, u16 chl, u16 value); |
| 44 | int bcm_phy_read_misc(struct phy_device *phydev, |
| 45 | u16 reg, u16 chl); |
| 46 | |
| 47 | int bcm_phy_write_shadow(struct phy_device *phydev, u16 shadow, |
| 48 | u16 val); |
| 49 | int bcm_phy_read_shadow(struct phy_device *phydev, u16 shadow); |
| 50 | |
| 51 | int bcm_phy_ack_intr(struct phy_device *phydev); |
| 52 | int bcm_phy_config_intr(struct phy_device *phydev); |
| 53 | |
| 54 | int bcm_phy_enable_apd(struct phy_device *phydev, bool dll_pwr_down); |
| 55 | |
| Florian Fainelli | 99cec8a | 2016-11-22 11:40:56 -0800 | [diff] [blame] | 56 | int bcm_phy_set_eee(struct phy_device *phydev, bool enable); |
| Florian Fainelli | d06f78c | 2016-11-22 11:40:55 -0800 | [diff] [blame] | 57 | |
| 58 | int bcm_phy_downshift_get(struct phy_device *phydev, u8 *count); |
| 59 | |
| 60 | int bcm_phy_downshift_set(struct phy_device *phydev, u8 count); |
| 61 | |
| Florian Fainelli | 820ee17 | 2016-11-29 09:57:17 -0800 | [diff] [blame] | 62 | int bcm_phy_get_sset_count(struct phy_device *phydev); |
| 63 | void bcm_phy_get_strings(struct phy_device *phydev, u8 *data); |
| 64 | void bcm_phy_get_stats(struct phy_device *phydev, u64 *shadow, |
| 65 | struct ethtool_stats *stats, u64 *data); |
| Florian Fainelli | f878fe5 | 2019-03-20 12:53:12 -0700 | [diff] [blame] | 66 | void bcm_phy_r_rc_cal_reset(struct phy_device *phydev); |
| 67 | int bcm_phy_28nm_a0b0_afe_config_init(struct phy_device *phydev); |
| Florian Fainelli | 820ee17 | 2016-11-29 09:57:17 -0800 | [diff] [blame] | 68 | |
| Arun Parameswaran | a1cba56 | 2015-10-06 12:25:48 -0700 | [diff] [blame] | 69 | #endif /* _LINUX_BCM_PHY_LIB_H */ |