Blame - kernel/irq/Kconfig - SHIFTPHONES/mainline/linux

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Thomas Gleixner	ec8f24b	2019-05-19 13:07:45 +0100	[diff] [blame]	1	# SPDX-License-Identifier: GPL-2.0-only
Thomas Gleixner	d9817eb	2010-09-27 12:45:59 +0000	[diff] [blame]	2	menu "IRQ subsystem"
Thomas Gleixner	d9817eb	2010-09-27 12:45:59 +0000	[diff] [blame]	3	# Options selectable by the architecture code
Thomas Gleixner	c68fd4f	2011-03-08 19:52:55 +0100	[diff] [blame]	4
				5	# Make sparse irq Kconfig switch below available
Rob Herring	2ed86b1	2012-01-25 20:02:40 -0600	[diff] [blame]	6	config MAY_HAVE_SPARSE_IRQ
Jan Beulich	fd4afaf	2011-02-17 13:39:05 +0000	[diff] [blame]	7	bool
Thomas Gleixner	d9817eb	2010-09-27 12:45:59 +0000	[diff] [blame]	8
Thomas Gleixner	c940e01	2014-05-07 15:44:22 +0000	[diff] [blame]	9	# Legacy support, required for itanic
				10	config GENERIC_IRQ_LEGACY
				11	bool
				12
Thomas Gleixner	c68fd4f	2011-03-08 19:52:55 +0100	[diff] [blame]	13	# Enable the generic irq autoprobe mechanism
Thomas Gleixner	d9817eb	2010-09-27 12:45:59 +0000	[diff] [blame]	14	config GENERIC_IRQ_PROBE
Jan Beulich	fd4afaf	2011-02-17 13:39:05 +0000	[diff] [blame]	15	bool
Thomas Gleixner	d9817eb	2010-09-27 12:45:59 +0000	[diff] [blame]	16
Thomas Gleixner	c68fd4f	2011-03-08 19:52:55 +0100	[diff] [blame]	17	# Use the generic /proc/interrupts implementation
Thomas Gleixner	c78b9b6	2010-12-16 17:21:47 +0100	[diff] [blame]	18	config GENERIC_IRQ_SHOW
Jan Beulich	fd4afaf	2011-02-17 13:39:05 +0000	[diff] [blame]	19	bool
Thomas Gleixner	c78b9b6	2010-12-16 17:21:47 +0100	[diff] [blame]	20
Thomas Gleixner	ab7798f	2011-03-25 16:48:50 +0100	[diff] [blame]	21	# Print level/edge extra information
				22	config GENERIC_IRQ_SHOW_LEVEL
				23	bool
				24
Thomas Gleixner	0d3f542	2017-06-20 01:37:38 +0200	[diff] [blame]	25	# Supports effective affinity mask
				26	config GENERIC_IRQ_EFFECTIVE_AFF_MASK
				27	bool
				28
Thomas Gleixner	c68fd4f	2011-03-08 19:52:55 +0100	[diff] [blame]	29	# Support for delayed migration from interrupt context
Thomas Gleixner	d9817eb	2010-09-27 12:45:59 +0000	[diff] [blame]	30	config GENERIC_PENDING_IRQ
Jan Beulich	fd4afaf	2011-02-17 13:39:05 +0000	[diff] [blame]	31	bool
Thomas Gleixner	d9817eb	2010-09-27 12:45:59 +0000	[diff] [blame]	32
Yang Yingliang	f1e0bb0	2015-09-24 17:32:13 +0800	[diff] [blame]	33	# Support for generic irq migrating off cpu before the cpu is offline.
				34	config GENERIC_IRQ_MIGRATION
				35	bool
				36
Thomas Gleixner	c68fd4f	2011-03-08 19:52:55 +0100	[diff] [blame]	37	# Alpha specific irq affinity mechanism
Thomas Gleixner	d9817eb	2010-09-27 12:45:59 +0000	[diff] [blame]	38	config AUTO_IRQ_AFFINITY
Jan Beulich	fd4afaf	2011-02-17 13:39:05 +0000	[diff] [blame]	39	bool
Thomas Gleixner	d9817eb	2010-09-27 12:45:59 +0000	[diff] [blame]	40
Thomas Gleixner	acd26bc	2020-03-06 14:03:47 +0100	[diff] [blame]	41	# Interrupt injection mechanism
				42	config GENERIC_IRQ_INJECTION
				43	bool
				44
Thomas Gleixner	c68fd4f	2011-03-08 19:52:55 +0100	[diff] [blame]	45	# Tasklet based software resend for pending interrupts on enable_irq()
Thomas Gleixner	d9817eb	2010-09-27 12:45:59 +0000	[diff] [blame]	46	config HARDIRQS_SW_RESEND
Jan Beulich	fd4afaf	2011-02-17 13:39:05 +0000	[diff] [blame]	47	bool
Thomas Gleixner	d9817eb	2010-09-27 12:45:59 +0000	[diff] [blame]	48
Thomas Gleixner	0521c8f	2011-03-28 16:13:24 +0200	[diff] [blame]	49	# Edge style eoi based handler (cell)
				50	config IRQ_EDGE_EOI_HANDLER
				51	bool
				52
Thomas Gleixner	c42321c	2011-05-02 18:16:22 +0200	[diff] [blame]	53	# Generic configurable interrupt chip implementation
				54	config GENERIC_IRQ_CHIP
				55	bool
Nitin A Kamble	923fa4e	2014-01-30 16:50:10 -0800	[diff] [blame]	56	select IRQ_DOMAIN
Thomas Gleixner	c42321c	2011-05-02 18:16:22 +0200	[diff] [blame]	57
Grant Likely	08a543a	2011-07-26 03:19:06 -0600	[diff] [blame]	58	# Generic irq_domain hw <--> linux irq number translation
				59	config IRQ_DOMAIN
				60	bool
				61
Bartosz Golaszewski	b19af51	2017-08-14 16:53:16 +0200	[diff] [blame]	62	# Support for simulated interrupts
				63	config IRQ_SIM
				64	bool
				65	select IRQ_WORK
Bartosz Golaszewski	337cbeb	2020-05-14 10:39:01 +0200	[diff] [blame]	66	select IRQ_DOMAIN
Bartosz Golaszewski	b19af51	2017-08-14 16:53:16 +0200	[diff] [blame]	67
Jiang Liu	f8264e3	2014-11-06 22:20:14 +0800	[diff] [blame]	68	# Support for hierarchical irq domains
				69	config IRQ_DOMAIN_HIERARCHY
				70	bool
				71	select IRQ_DOMAIN
				72
Marc Zyngier	e37af80	2021-04-04 13:06:39 +0100	[diff] [blame]	73	# Support for obsolete non-mapping irq domains
				74	config IRQ_DOMAIN_NOMAP
				75	bool
				76	select IRQ_DOMAIN
				77
David Daney	7703b08	2017-08-17 17:53:31 -0700	[diff] [blame]	78	# Support for hierarchical fasteoi+edge and fasteoi+level handlers
				79	config IRQ_FASTEOI_HIERARCHY_HANDLERS
				80	bool
				81
Qais Yousef	379b656	2015-12-08 13:20:14 +0000	[diff] [blame]	82	# Generic IRQ IPI support
				83	config GENERIC_IRQ_IPI
				84	bool
Marc Zyngier	151a535	2020-10-15 21:41:44 +0100	[diff] [blame]	85	select IRQ_DOMAIN_HIERARCHY
Qais Yousef	379b656	2015-12-08 13:20:14 +0000	[diff] [blame]	86
Jiang Liu	f3cf8bb	2014-11-12 11:39:03 +0100	[diff] [blame]	87	# Generic MSI interrupt support
				88	config GENERIC_MSI_IRQ
				89	bool
				90
				91	# Generic MSI hierarchical interrupt domain support
				92	config GENERIC_MSI_IRQ_DOMAIN
				93	bool
				94	select IRQ_DOMAIN_HIERARCHY
				95	select GENERIC_MSI_IRQ
				96
Julien Grall	aaebdf8	2019-05-01 14:58:18 +0100	[diff] [blame]	97	config IRQ_MSI_IOMMU
				98	bool
				99
Daniel Lezcano	b2d3d61	2017-06-23 16:11:07 +0200	[diff] [blame]	100	config IRQ_TIMINGS
				101	bool
				102
Thomas Gleixner	2f75d9e	2017-09-13 23:29:14 +0200	[diff] [blame]	103	config GENERIC_IRQ_MATRIX_ALLOCATOR
				104	bool
				105
Thomas Gleixner	2b5175c	2017-10-17 09:54:57 +0200	[diff] [blame]	106	config GENERIC_IRQ_RESERVATION_MODE
				107	bool
				108
Thomas Gleixner	c68fd4f	2011-03-08 19:52:55 +0100	[diff] [blame]	109	# Support forced irq threading
Thomas Gleixner	8d32a30	2011-02-23 23:52:23 +0000	[diff] [blame]	110	config IRQ_FORCED_THREADING
				111	bool
				112
Thomas Gleixner	d9817eb	2010-09-27 12:45:59 +0000	[diff] [blame]	113	config SPARSE_IRQ
Rob Herring	2ed86b1	2012-01-25 20:02:40 -0600	[diff] [blame]	114	bool "Support sparse irq numbering" if MAY_HAVE_SPARSE_IRQ
Masahiro Yamada	a7f7f62	2020-06-14 01:50:22 +0900	[diff] [blame]	115	help
Thomas Gleixner	d9817eb	2010-09-27 12:45:59 +0000	[diff] [blame]	116
				117	Sparse irq numbering is useful for distro kernels that want
				118	to define a high CONFIG_NR_CPUS value but still want to have
				119	low kernel memory footprint on smaller machines.
				120
				121	( Sparse irqs can also be beneficial on NUMA boxes, as they spread
				122	out the interrupt descriptors in a more NUMA-friendly way. )
				123
				124	If you don't know what to do here, say N.
				125
Thomas Gleixner	087cdfb	2017-06-20 01:37:17 +0200	[diff] [blame]	126	config GENERIC_IRQ_DEBUGFS
				127	bool "Expose irq internals in debugfs"
				128	depends on DEBUG_FS
Thomas Gleixner	acd26bc	2020-03-06 14:03:47 +0100	[diff] [blame]	129	select GENERIC_IRQ_INJECTION
Thomas Gleixner	087cdfb	2017-06-20 01:37:17 +0200	[diff] [blame]	130	default n
Masahiro Yamada	a7f7f62	2020-06-14 01:50:22 +0900	[diff] [blame]	131	help
Thomas Gleixner	087cdfb	2017-06-20 01:37:17 +0200	[diff] [blame]	132
				133	Exposes internal state information through debugfs. Mostly for
				134	developers and debugging of hard to diagnose interrupt problems.
				135
				136	If you don't know what to do here, say N.
				137
Thomas Gleixner	d9817eb	2010-09-27 12:45:59 +0000	[diff] [blame]	138	endmenu
Palmer Dabbelt	caacdbf	2018-03-07 15:57:27 -0800	[diff] [blame]	139
				140	config GENERIC_IRQ_MULTI_HANDLER
				141	bool
				142	help
				143	Allow to specify the low level IRQ handler at run time.
Marc Zyngier	8d15a72	2021-10-21 18:04:14 +0100	[diff] [blame]	144
				145	# Cavium Octeon is the last system to use this deprecated option
				146	# Do not even think of enabling this on any new platform
				147	config DEPRECATED_IRQ_CPU_ONOFFLINE
				148	bool
				149	depends on CAVIUM_OCTEON_SOC
				150	default CAVIUM_OCTEON_SOC