ankit patel | 50b1cf8 | 2018-06-15 13:42:12 -0500 | [diff] [blame] | 1 | /* SPDX-License-Identifier: LGPL-2.0+ */ |
David Schleef | ed9eccb | 2008-11-04 20:29:31 -0800 | [diff] [blame] | 2 | /* |
Ian Abbott | 2892ffc | 2016-02-09 15:17:20 +0000 | [diff] [blame] | 3 | * comedi.h |
| 4 | * header file for COMEDI user API |
Daniel H. Hemmingsen | af904c4 | 2015-11-12 17:03:18 +0100 | [diff] [blame] | 5 | * |
| 6 | * COMEDI - Linux Control and Measurement Device Interface |
| 7 | * Copyright (C) 1998-2001 David A. Schleef <ds@schleef.org> |
Daniel H. Hemmingsen | af904c4 | 2015-11-12 17:03:18 +0100 | [diff] [blame] | 8 | */ |
David Schleef | ed9eccb | 2008-11-04 20:29:31 -0800 | [diff] [blame] | 9 | |
| 10 | #ifndef _COMEDI_H |
| 11 | #define _COMEDI_H |
| 12 | |
David Schleef | ed9eccb | 2008-11-04 20:29:31 -0800 | [diff] [blame] | 13 | #define COMEDI_MAJORVERSION 0 |
| 14 | #define COMEDI_MINORVERSION 7 |
| 15 | #define COMEDI_MICROVERSION 76 |
| 16 | #define VERSION "0.7.76" |
| 17 | |
| 18 | /* comedi's major device number */ |
| 19 | #define COMEDI_MAJOR 98 |
| 20 | |
| 21 | /* |
Daniel H. Hemmingsen | af904c4 | 2015-11-12 17:03:18 +0100 | [diff] [blame] | 22 | * maximum number of minor devices. This can be increased, although |
| 23 | * kernel structures are currently statically allocated, thus you |
| 24 | * don't want this to be much more than you actually use. |
David Schleef | ed9eccb | 2008-11-04 20:29:31 -0800 | [diff] [blame] | 25 | */ |
| 26 | #define COMEDI_NDEVICES 16 |
| 27 | |
| 28 | /* number of config options in the config structure */ |
| 29 | #define COMEDI_NDEVCONFOPTS 32 |
H Hartley Sweeten | d184313 | 2013-01-09 09:46:10 -0700 | [diff] [blame] | 30 | |
| 31 | /* |
| 32 | * NOTE: 'comedi_config --init-data' is deprecated |
| 33 | * |
| 34 | * The following indexes in the config options were used by |
| 35 | * comedi_config to pass firmware blobs from user space to the |
| 36 | * comedi drivers. The request_firmware() hotplug interface is |
| 37 | * now used by all comedi drivers instead. |
| 38 | */ |
| 39 | |
| 40 | /* length of nth chunk of firmware data -*/ |
David Schleef | ed9eccb | 2008-11-04 20:29:31 -0800 | [diff] [blame] | 41 | #define COMEDI_DEVCONF_AUX_DATA3_LENGTH 25 |
| 42 | #define COMEDI_DEVCONF_AUX_DATA2_LENGTH 26 |
| 43 | #define COMEDI_DEVCONF_AUX_DATA1_LENGTH 27 |
| 44 | #define COMEDI_DEVCONF_AUX_DATA0_LENGTH 28 |
Mark Rankilor | e012b4c | 2010-05-06 18:07:44 +0800 | [diff] [blame] | 45 | /* most significant 32 bits of pointer address (if needed) */ |
| 46 | #define COMEDI_DEVCONF_AUX_DATA_HI 29 |
| 47 | /* least significant 32 bits of pointer address */ |
| 48 | #define COMEDI_DEVCONF_AUX_DATA_LO 30 |
Greg Kroah-Hartman | e0dcef7 | 2008-11-13 16:36:22 -0800 | [diff] [blame] | 49 | #define COMEDI_DEVCONF_AUX_DATA_LENGTH 31 /* total data length */ |
David Schleef | ed9eccb | 2008-11-04 20:29:31 -0800 | [diff] [blame] | 50 | |
| 51 | /* max length of device and driver names */ |
| 52 | #define COMEDI_NAMELEN 20 |
| 53 | |
David Schleef | ed9eccb | 2008-11-04 20:29:31 -0800 | [diff] [blame] | 54 | /* packs and unpacks a channel/range number */ |
| 55 | |
Mark Rankilor | e012b4c | 2010-05-06 18:07:44 +0800 | [diff] [blame] | 56 | #define CR_PACK(chan, rng, aref) \ |
Daniel H. Hemmingsen | af904c4 | 2015-11-12 17:03:18 +0100 | [diff] [blame] | 57 | ((((aref) & 0x3) << 24) | (((rng) & 0xff) << 16) | (chan)) |
Mark Rankilor | e012b4c | 2010-05-06 18:07:44 +0800 | [diff] [blame] | 58 | #define CR_PACK_FLAGS(chan, range, aref, flags) \ |
| 59 | (CR_PACK(chan, range, aref) | ((flags) & CR_FLAGS_MASK)) |
David Schleef | ed9eccb | 2008-11-04 20:29:31 -0800 | [diff] [blame] | 60 | |
Daniel H. Hemmingsen | af904c4 | 2015-11-12 17:03:18 +0100 | [diff] [blame] | 61 | #define CR_CHAN(a) ((a) & 0xffff) |
| 62 | #define CR_RANGE(a) (((a) >> 16) & 0xff) |
| 63 | #define CR_AREF(a) (((a) >> 24) & 0x03) |
David Schleef | ed9eccb | 2008-11-04 20:29:31 -0800 | [diff] [blame] | 64 | |
| 65 | #define CR_FLAGS_MASK 0xfc000000 |
Ian Abbott | 9cee3d4 | 2016-03-02 14:27:37 +0000 | [diff] [blame] | 66 | #define CR_ALT_FILTER 0x04000000 |
Greg Kroah-Hartman | e0dcef7 | 2008-11-13 16:36:22 -0800 | [diff] [blame] | 67 | #define CR_DITHER CR_ALT_FILTER |
| 68 | #define CR_DEGLITCH CR_ALT_FILTER |
Ian Abbott | 9cee3d4 | 2016-03-02 14:27:37 +0000 | [diff] [blame] | 69 | #define CR_ALT_SOURCE 0x08000000 |
| 70 | #define CR_EDGE 0x40000000 |
| 71 | #define CR_INVERT 0x80000000 |
David Schleef | ed9eccb | 2008-11-04 20:29:31 -0800 | [diff] [blame] | 72 | |
| 73 | #define AREF_GROUND 0x00 /* analog ref = analog ground */ |
| 74 | #define AREF_COMMON 0x01 /* analog ref = analog common */ |
| 75 | #define AREF_DIFF 0x02 /* analog ref = differential */ |
| 76 | #define AREF_OTHER 0x03 /* analog ref = other (undefined) */ |
| 77 | |
| 78 | /* counters -- these are arbitrary values */ |
| 79 | #define GPCT_RESET 0x0001 |
| 80 | #define GPCT_SET_SOURCE 0x0002 |
| 81 | #define GPCT_SET_GATE 0x0004 |
| 82 | #define GPCT_SET_DIRECTION 0x0008 |
| 83 | #define GPCT_SET_OPERATION 0x0010 |
| 84 | #define GPCT_ARM 0x0020 |
| 85 | #define GPCT_DISARM 0x0040 |
| 86 | #define GPCT_GET_INT_CLK_FRQ 0x0080 |
| 87 | |
| 88 | #define GPCT_INT_CLOCK 0x0001 |
| 89 | #define GPCT_EXT_PIN 0x0002 |
| 90 | #define GPCT_NO_GATE 0x0004 |
| 91 | #define GPCT_UP 0x0008 |
| 92 | #define GPCT_DOWN 0x0010 |
| 93 | #define GPCT_HWUD 0x0020 |
| 94 | #define GPCT_SIMPLE_EVENT 0x0040 |
| 95 | #define GPCT_SINGLE_PERIOD 0x0080 |
| 96 | #define GPCT_SINGLE_PW 0x0100 |
| 97 | #define GPCT_CONT_PULSE_OUT 0x0200 |
| 98 | #define GPCT_SINGLE_PULSE_OUT 0x0400 |
| 99 | |
| 100 | /* instructions */ |
| 101 | |
| 102 | #define INSN_MASK_WRITE 0x8000000 |
| 103 | #define INSN_MASK_READ 0x4000000 |
| 104 | #define INSN_MASK_SPECIAL 0x2000000 |
| 105 | |
Greg Kroah-Hartman | e0dcef7 | 2008-11-13 16:36:22 -0800 | [diff] [blame] | 106 | #define INSN_READ (0 | INSN_MASK_READ) |
| 107 | #define INSN_WRITE (1 | INSN_MASK_WRITE) |
Daniel H. Hemmingsen | af904c4 | 2015-11-12 17:03:18 +0100 | [diff] [blame] | 108 | #define INSN_BITS (2 | INSN_MASK_READ | INSN_MASK_WRITE) |
| 109 | #define INSN_CONFIG (3 | INSN_MASK_READ | INSN_MASK_WRITE) |
Spencer E. Olson | d7569ad | 2018-10-03 14:56:02 -0600 | [diff] [blame] | 110 | #define INSN_DEVICE_CONFIG (INSN_CONFIG | INSN_MASK_SPECIAL) |
Daniel H. Hemmingsen | af904c4 | 2015-11-12 17:03:18 +0100 | [diff] [blame] | 111 | #define INSN_GTOD (4 | INSN_MASK_READ | INSN_MASK_SPECIAL) |
| 112 | #define INSN_WAIT (5 | INSN_MASK_WRITE | INSN_MASK_SPECIAL) |
| 113 | #define INSN_INTTRIG (6 | INSN_MASK_WRITE | INSN_MASK_SPECIAL) |
David Schleef | ed9eccb | 2008-11-04 20:29:31 -0800 | [diff] [blame] | 114 | |
David Schleef | ed9eccb | 2008-11-04 20:29:31 -0800 | [diff] [blame] | 115 | /* command flags */ |
| 116 | /* These flags are used in comedi_cmd structures */ |
| 117 | |
Ian Abbott | dd7eb12 | 2014-09-03 13:45:43 +0100 | [diff] [blame] | 118 | #define CMDF_BOGUS 0x00000001 /* do the motions */ |
| 119 | |
Mark Rankilor | e012b4c | 2010-05-06 18:07:44 +0800 | [diff] [blame] | 120 | /* try to use a real-time interrupt while performing command */ |
| 121 | #define CMDF_PRIORITY 0x00000008 |
David Schleef | ed9eccb | 2008-11-04 20:29:31 -0800 | [diff] [blame] | 122 | |
Ian Abbott | 3e15acd | 2014-09-03 13:45:29 +0100 | [diff] [blame] | 123 | /* wake up on end-of-scan events */ |
| 124 | #define CMDF_WAKE_EOS 0x00000020 |
David Schleef | ed9eccb | 2008-11-04 20:29:31 -0800 | [diff] [blame] | 125 | |
| 126 | #define CMDF_WRITE 0x00000040 |
David Schleef | ed9eccb | 2008-11-04 20:29:31 -0800 | [diff] [blame] | 127 | |
| 128 | #define CMDF_RAWDATA 0x00000080 |
| 129 | |
Ian Abbott | 3ab4ca1 | 2014-09-03 13:45:45 +0100 | [diff] [blame] | 130 | /* timer rounding definitions */ |
| 131 | #define CMDF_ROUND_MASK 0x00030000 |
| 132 | #define CMDF_ROUND_NEAREST 0x00000000 |
| 133 | #define CMDF_ROUND_DOWN 0x00010000 |
| 134 | #define CMDF_ROUND_UP 0x00020000 |
| 135 | #define CMDF_ROUND_UP_NEXT 0x00030000 |
| 136 | |
David Schleef | ed9eccb | 2008-11-04 20:29:31 -0800 | [diff] [blame] | 137 | #define COMEDI_EV_START 0x00040000 |
| 138 | #define COMEDI_EV_SCAN_BEGIN 0x00080000 |
| 139 | #define COMEDI_EV_CONVERT 0x00100000 |
| 140 | #define COMEDI_EV_SCAN_END 0x00200000 |
| 141 | #define COMEDI_EV_STOP 0x00400000 |
| 142 | |
Ian Abbott | 3e15acd | 2014-09-03 13:45:29 +0100 | [diff] [blame] | 143 | /* compatibility definitions */ |
Ian Abbott | dd7eb12 | 2014-09-03 13:45:43 +0100 | [diff] [blame] | 144 | #define TRIG_BOGUS CMDF_BOGUS |
Ian Abbott | 3e15acd | 2014-09-03 13:45:29 +0100 | [diff] [blame] | 145 | #define TRIG_RT CMDF_PRIORITY |
| 146 | #define TRIG_WAKE_EOS CMDF_WAKE_EOS |
| 147 | #define TRIG_WRITE CMDF_WRITE |
Ian Abbott | 3ab4ca1 | 2014-09-03 13:45:45 +0100 | [diff] [blame] | 148 | #define TRIG_ROUND_MASK CMDF_ROUND_MASK |
| 149 | #define TRIG_ROUND_NEAREST CMDF_ROUND_NEAREST |
| 150 | #define TRIG_ROUND_DOWN CMDF_ROUND_DOWN |
| 151 | #define TRIG_ROUND_UP CMDF_ROUND_UP |
| 152 | #define TRIG_ROUND_UP_NEXT CMDF_ROUND_UP_NEXT |
Ian Abbott | 3e15acd | 2014-09-03 13:45:29 +0100 | [diff] [blame] | 153 | |
David Schleef | ed9eccb | 2008-11-04 20:29:31 -0800 | [diff] [blame] | 154 | /* trigger sources */ |
| 155 | |
| 156 | #define TRIG_ANY 0xffffffff |
| 157 | #define TRIG_INVALID 0x00000000 |
| 158 | |
Mark | a9560a7 | 2010-05-10 17:56:05 +0800 | [diff] [blame] | 159 | #define TRIG_NONE 0x00000001 /* never trigger */ |
| 160 | #define TRIG_NOW 0x00000002 /* trigger now + N ns */ |
| 161 | #define TRIG_FOLLOW 0x00000004 /* trigger on next lower level trig */ |
| 162 | #define TRIG_TIME 0x00000008 /* trigger at time N ns */ |
| 163 | #define TRIG_TIMER 0x00000010 /* trigger at rate N ns */ |
| 164 | #define TRIG_COUNT 0x00000020 /* trigger when count reaches N */ |
| 165 | #define TRIG_EXT 0x00000040 /* trigger on external signal N */ |
| 166 | #define TRIG_INT 0x00000080 /* trigger on comedi-internal signal N */ |
| 167 | #define TRIG_OTHER 0x00000100 /* driver defined */ |
David Schleef | ed9eccb | 2008-11-04 20:29:31 -0800 | [diff] [blame] | 168 | |
| 169 | /* subdevice flags */ |
| 170 | |
| 171 | #define SDF_BUSY 0x0001 /* device is busy */ |
| 172 | #define SDF_BUSY_OWNER 0x0002 /* device is busy with your job */ |
| 173 | #define SDF_LOCKED 0x0004 /* subdevice is locked */ |
| 174 | #define SDF_LOCK_OWNER 0x0008 /* you own lock */ |
| 175 | #define SDF_MAXDATA 0x0010 /* maxdata depends on channel */ |
| 176 | #define SDF_FLAGS 0x0020 /* flags depend on channel */ |
| 177 | #define SDF_RANGETYPE 0x0040 /* range type depends on channel */ |
Ian Abbott | 222c402 | 2016-02-09 15:17:24 +0000 | [diff] [blame] | 178 | #define SDF_PWM_COUNTER 0x0080 /* PWM can automatically switch off */ |
| 179 | #define SDF_PWM_HBRIDGE 0x0100 /* PWM is signed (H-bridge) */ |
David Schleef | ed9eccb | 2008-11-04 20:29:31 -0800 | [diff] [blame] | 180 | #define SDF_CMD 0x1000 /* can do commands (deprecated) */ |
Mark | a9560a7 | 2010-05-10 17:56:05 +0800 | [diff] [blame] | 181 | #define SDF_SOFT_CALIBRATED 0x2000 /* subdevice uses software calibration */ |
| 182 | #define SDF_CMD_WRITE 0x4000 /* can do output commands */ |
| 183 | #define SDF_CMD_READ 0x8000 /* can do input commands */ |
David Schleef | ed9eccb | 2008-11-04 20:29:31 -0800 | [diff] [blame] | 184 | |
Mark | a9560a7 | 2010-05-10 17:56:05 +0800 | [diff] [blame] | 185 | /* subdevice can be read (e.g. analog input) */ |
| 186 | #define SDF_READABLE 0x00010000 |
| 187 | /* subdevice can be written (e.g. analog output) */ |
| 188 | #define SDF_WRITABLE 0x00020000 |
David Schleef | ed9eccb | 2008-11-04 20:29:31 -0800 | [diff] [blame] | 189 | #define SDF_WRITEABLE SDF_WRITABLE /* spelling error in API */ |
Mark | a9560a7 | 2010-05-10 17:56:05 +0800 | [diff] [blame] | 190 | /* subdevice does not have externally visible lines */ |
| 191 | #define SDF_INTERNAL 0x00040000 |
David Schleef | ed9eccb | 2008-11-04 20:29:31 -0800 | [diff] [blame] | 192 | #define SDF_GROUND 0x00100000 /* can do aref=ground */ |
| 193 | #define SDF_COMMON 0x00200000 /* can do aref=common */ |
| 194 | #define SDF_DIFF 0x00400000 /* can do aref=diff */ |
| 195 | #define SDF_OTHER 0x00800000 /* can do aref=other */ |
| 196 | #define SDF_DITHER 0x01000000 /* can do dithering */ |
| 197 | #define SDF_DEGLITCH 0x02000000 /* can do deglitching */ |
| 198 | #define SDF_MMAP 0x04000000 /* can do mmap() */ |
| 199 | #define SDF_RUNNING 0x08000000 /* subdevice is acquiring data */ |
| 200 | #define SDF_LSAMPL 0x10000000 /* subdevice uses 32-bit samples */ |
| 201 | #define SDF_PACKED 0x20000000 /* subdevice can do packed DIO */ |
David Schleef | ed9eccb | 2008-11-04 20:29:31 -0800 | [diff] [blame] | 202 | |
| 203 | /* subdevice types */ |
| 204 | |
Ian Abbott | 8fb02b2 | 2016-02-09 15:17:21 +0000 | [diff] [blame] | 205 | /** |
| 206 | * enum comedi_subdevice_type - COMEDI subdevice types |
| 207 | * @COMEDI_SUBD_UNUSED: Unused subdevice. |
| 208 | * @COMEDI_SUBD_AI: Analog input. |
| 209 | * @COMEDI_SUBD_AO: Analog output. |
| 210 | * @COMEDI_SUBD_DI: Digital input. |
| 211 | * @COMEDI_SUBD_DO: Digital output. |
| 212 | * @COMEDI_SUBD_DIO: Digital input/output. |
| 213 | * @COMEDI_SUBD_COUNTER: Counter. |
| 214 | * @COMEDI_SUBD_TIMER: Timer. |
| 215 | * @COMEDI_SUBD_MEMORY: Memory, EEPROM, DPRAM. |
| 216 | * @COMEDI_SUBD_CALIB: Calibration DACs. |
| 217 | * @COMEDI_SUBD_PROC: Processor, DSP. |
| 218 | * @COMEDI_SUBD_SERIAL: Serial I/O. |
| 219 | * @COMEDI_SUBD_PWM: Pulse-Width Modulation output. |
| 220 | */ |
H Hartley Sweeten | 25b73c7 | 2012-09-18 11:40:15 -0700 | [diff] [blame] | 221 | enum comedi_subdevice_type { |
Ian Abbott | 8fb02b2 | 2016-02-09 15:17:21 +0000 | [diff] [blame] | 222 | COMEDI_SUBD_UNUSED, |
| 223 | COMEDI_SUBD_AI, |
| 224 | COMEDI_SUBD_AO, |
| 225 | COMEDI_SUBD_DI, |
| 226 | COMEDI_SUBD_DO, |
| 227 | COMEDI_SUBD_DIO, |
| 228 | COMEDI_SUBD_COUNTER, |
| 229 | COMEDI_SUBD_TIMER, |
| 230 | COMEDI_SUBD_MEMORY, |
| 231 | COMEDI_SUBD_CALIB, |
| 232 | COMEDI_SUBD_PROC, |
| 233 | COMEDI_SUBD_SERIAL, |
| 234 | COMEDI_SUBD_PWM |
H Hartley Sweeten | 25b73c7 | 2012-09-18 11:40:15 -0700 | [diff] [blame] | 235 | }; |
David Schleef | ed9eccb | 2008-11-04 20:29:31 -0800 | [diff] [blame] | 236 | |
| 237 | /* configuration instructions */ |
| 238 | |
Ian Abbott | 8fb02b2 | 2016-02-09 15:17:21 +0000 | [diff] [blame] | 239 | /** |
Spencer E. Olson | cc7a6d6 | 2016-10-08 15:38:43 -0600 | [diff] [blame] | 240 | * enum comedi_io_direction - COMEDI I/O directions |
| 241 | * @COMEDI_INPUT: Input. |
| 242 | * @COMEDI_OUTPUT: Output. |
| 243 | * @COMEDI_OPENDRAIN: Open-drain (or open-collector) output. |
| 244 | * |
| 245 | * These are used by the %INSN_CONFIG_DIO_QUERY configuration instruction to |
| 246 | * report a direction. They may also be used in other places where a direction |
| 247 | * needs to be specified. |
| 248 | */ |
| 249 | enum comedi_io_direction { |
| 250 | COMEDI_INPUT = 0, |
| 251 | COMEDI_OUTPUT = 1, |
| 252 | COMEDI_OPENDRAIN = 2 |
| 253 | }; |
| 254 | |
| 255 | /** |
Ian Abbott | 8fb02b2 | 2016-02-09 15:17:21 +0000 | [diff] [blame] | 256 | * enum configuration_ids - COMEDI configuration instruction codes |
| 257 | * @INSN_CONFIG_DIO_INPUT: Configure digital I/O as input. |
| 258 | * @INSN_CONFIG_DIO_OUTPUT: Configure digital I/O as output. |
| 259 | * @INSN_CONFIG_DIO_OPENDRAIN: Configure digital I/O as open-drain (or open |
| 260 | * collector) output. |
| 261 | * @INSN_CONFIG_ANALOG_TRIG: Configure analog trigger. |
| 262 | * @INSN_CONFIG_ALT_SOURCE: Configure alternate input source. |
| 263 | * @INSN_CONFIG_DIGITAL_TRIG: Configure digital trigger. |
| 264 | * @INSN_CONFIG_BLOCK_SIZE: Configure block size for DMA transfers. |
| 265 | * @INSN_CONFIG_TIMER_1: Configure divisor for external clock. |
| 266 | * @INSN_CONFIG_FILTER: Configure a filter. |
| 267 | * @INSN_CONFIG_CHANGE_NOTIFY: Configure change notification for digital |
| 268 | * inputs. (New drivers should use |
| 269 | * %INSN_CONFIG_DIGITAL_TRIG instead.) |
| 270 | * @INSN_CONFIG_SERIAL_CLOCK: Configure clock for serial I/O. |
| 271 | * @INSN_CONFIG_BIDIRECTIONAL_DATA: Send and receive byte over serial I/O. |
| 272 | * @INSN_CONFIG_DIO_QUERY: Query direction of digital I/O channel. |
| 273 | * @INSN_CONFIG_PWM_OUTPUT: Configure pulse-width modulator output. |
| 274 | * @INSN_CONFIG_GET_PWM_OUTPUT: Get pulse-width modulator output configuration. |
| 275 | * @INSN_CONFIG_ARM: Arm a subdevice or channel. |
| 276 | * @INSN_CONFIG_DISARM: Disarm a subdevice or channel. |
| 277 | * @INSN_CONFIG_GET_COUNTER_STATUS: Get counter status. |
| 278 | * @INSN_CONFIG_RESET: Reset a subdevice or channel. |
| 279 | * @INSN_CONFIG_GPCT_SINGLE_PULSE_GENERATOR: Configure counter/timer as |
| 280 | * single pulse generator. |
| 281 | * @INSN_CONFIG_GPCT_PULSE_TRAIN_GENERATOR: Configure counter/timer as |
| 282 | * pulse train generator. |
| 283 | * @INSN_CONFIG_GPCT_QUADRATURE_ENCODER: Configure counter as a quadrature |
| 284 | * encoder. |
| 285 | * @INSN_CONFIG_SET_GATE_SRC: Set counter/timer gate source. |
| 286 | * @INSN_CONFIG_GET_GATE_SRC: Get counter/timer gate source. |
| 287 | * @INSN_CONFIG_SET_CLOCK_SRC: Set counter/timer master clock source. |
| 288 | * @INSN_CONFIG_GET_CLOCK_SRC: Get counter/timer master clock source. |
| 289 | * @INSN_CONFIG_SET_OTHER_SRC: Set counter/timer "other" source. |
| 290 | * @INSN_CONFIG_GET_HARDWARE_BUFFER_SIZE: Get size (in bytes) of subdevice's |
| 291 | * on-board FIFOs used during streaming |
| 292 | * input/output. |
| 293 | * @INSN_CONFIG_SET_COUNTER_MODE: Set counter/timer mode. |
| 294 | * @INSN_CONFIG_8254_SET_MODE: (Deprecated) Same as |
| 295 | * %INSN_CONFIG_SET_COUNTER_MODE. |
| 296 | * @INSN_CONFIG_8254_READ_STATUS: Read status of 8254 counter channel. |
| 297 | * @INSN_CONFIG_SET_ROUTING: Set routing for a channel. |
| 298 | * @INSN_CONFIG_GET_ROUTING: Get routing for a channel. |
| 299 | * @INSN_CONFIG_PWM_SET_PERIOD: Set PWM period in nanoseconds. |
| 300 | * @INSN_CONFIG_PWM_GET_PERIOD: Get PWM period in nanoseconds. |
| 301 | * @INSN_CONFIG_GET_PWM_STATUS: Get PWM status. |
| 302 | * @INSN_CONFIG_PWM_SET_H_BRIDGE: Set PWM H bridge duty cycle and polarity for |
| 303 | * a relay simultaneously. |
| 304 | * @INSN_CONFIG_PWM_GET_H_BRIDGE: Get PWM H bridge duty cycle and polarity. |
Spencer E. Olson | 832f333 | 2018-09-19 10:51:03 -0600 | [diff] [blame] | 305 | * @INSN_CONFIG_GET_CMD_TIMING_CONSTRAINTS: Get the hardware timing restraints, |
| 306 | * regardless of trigger sources. |
Ian Abbott | 8fb02b2 | 2016-02-09 15:17:21 +0000 | [diff] [blame] | 307 | */ |
H Hartley Sweeten | 25b73c7 | 2012-09-18 11:40:15 -0700 | [diff] [blame] | 308 | enum configuration_ids { |
Spencer E. Olson | cc7a6d6 | 2016-10-08 15:38:43 -0600 | [diff] [blame] | 309 | INSN_CONFIG_DIO_INPUT = COMEDI_INPUT, |
| 310 | INSN_CONFIG_DIO_OUTPUT = COMEDI_OUTPUT, |
| 311 | INSN_CONFIG_DIO_OPENDRAIN = COMEDI_OPENDRAIN, |
H Hartley Sweeten | 25b73c7 | 2012-09-18 11:40:15 -0700 | [diff] [blame] | 312 | INSN_CONFIG_ANALOG_TRIG = 16, |
Greg Kroah-Hartman | e0dcef7 | 2008-11-13 16:36:22 -0800 | [diff] [blame] | 313 | /* INSN_CONFIG_WAVEFORM = 17, */ |
| 314 | /* INSN_CONFIG_TRIG = 18, */ |
| 315 | /* INSN_CONFIG_COUNTER = 19, */ |
H Hartley Sweeten | 25b73c7 | 2012-09-18 11:40:15 -0700 | [diff] [blame] | 316 | INSN_CONFIG_ALT_SOURCE = 20, |
| 317 | INSN_CONFIG_DIGITAL_TRIG = 21, |
| 318 | INSN_CONFIG_BLOCK_SIZE = 22, |
| 319 | INSN_CONFIG_TIMER_1 = 23, |
| 320 | INSN_CONFIG_FILTER = 24, |
| 321 | INSN_CONFIG_CHANGE_NOTIFY = 25, |
David Schleef | ed9eccb | 2008-11-04 20:29:31 -0800 | [diff] [blame] | 322 | |
H Hartley Sweeten | 25b73c7 | 2012-09-18 11:40:15 -0700 | [diff] [blame] | 323 | INSN_CONFIG_SERIAL_CLOCK = 26, /*ALPHA*/ |
| 324 | INSN_CONFIG_BIDIRECTIONAL_DATA = 27, |
| 325 | INSN_CONFIG_DIO_QUERY = 28, |
| 326 | INSN_CONFIG_PWM_OUTPUT = 29, |
| 327 | INSN_CONFIG_GET_PWM_OUTPUT = 30, |
| 328 | INSN_CONFIG_ARM = 31, |
| 329 | INSN_CONFIG_DISARM = 32, |
| 330 | INSN_CONFIG_GET_COUNTER_STATUS = 33, |
| 331 | INSN_CONFIG_RESET = 34, |
H Hartley Sweeten | 25b73c7 | 2012-09-18 11:40:15 -0700 | [diff] [blame] | 332 | INSN_CONFIG_GPCT_SINGLE_PULSE_GENERATOR = 1001, |
H Hartley Sweeten | 25b73c7 | 2012-09-18 11:40:15 -0700 | [diff] [blame] | 333 | INSN_CONFIG_GPCT_PULSE_TRAIN_GENERATOR = 1002, |
H Hartley Sweeten | 25b73c7 | 2012-09-18 11:40:15 -0700 | [diff] [blame] | 334 | INSN_CONFIG_GPCT_QUADRATURE_ENCODER = 1003, |
Ian Abbott | 8fb02b2 | 2016-02-09 15:17:21 +0000 | [diff] [blame] | 335 | INSN_CONFIG_SET_GATE_SRC = 2001, |
| 336 | INSN_CONFIG_GET_GATE_SRC = 2002, |
H Hartley Sweeten | 25b73c7 | 2012-09-18 11:40:15 -0700 | [diff] [blame] | 337 | INSN_CONFIG_SET_CLOCK_SRC = 2003, |
Ian Abbott | 8fb02b2 | 2016-02-09 15:17:21 +0000 | [diff] [blame] | 338 | INSN_CONFIG_GET_CLOCK_SRC = 2004, |
| 339 | INSN_CONFIG_SET_OTHER_SRC = 2005, |
H Hartley Sweeten | 25b73c7 | 2012-09-18 11:40:15 -0700 | [diff] [blame] | 340 | INSN_CONFIG_GET_HARDWARE_BUFFER_SIZE = 2006, |
| 341 | INSN_CONFIG_SET_COUNTER_MODE = 4097, |
H Hartley Sweeten | 25b73c7 | 2012-09-18 11:40:15 -0700 | [diff] [blame] | 342 | INSN_CONFIG_8254_SET_MODE = INSN_CONFIG_SET_COUNTER_MODE, |
| 343 | INSN_CONFIG_8254_READ_STATUS = 4098, |
| 344 | INSN_CONFIG_SET_ROUTING = 4099, |
| 345 | INSN_CONFIG_GET_ROUTING = 4109, |
Ian Abbott | 8fb02b2 | 2016-02-09 15:17:21 +0000 | [diff] [blame] | 346 | INSN_CONFIG_PWM_SET_PERIOD = 5000, |
| 347 | INSN_CONFIG_PWM_GET_PERIOD = 5001, |
| 348 | INSN_CONFIG_GET_PWM_STATUS = 5002, |
H Hartley Sweeten | 25b73c7 | 2012-09-18 11:40:15 -0700 | [diff] [blame] | 349 | INSN_CONFIG_PWM_SET_H_BRIDGE = 5003, |
Spencer E. Olson | 832f333 | 2018-09-19 10:51:03 -0600 | [diff] [blame] | 350 | INSN_CONFIG_PWM_GET_H_BRIDGE = 5004, |
| 351 | INSN_CONFIG_GET_CMD_TIMING_CONSTRAINTS = 5005, |
H Hartley Sweeten | 25b73c7 | 2012-09-18 11:40:15 -0700 | [diff] [blame] | 352 | }; |
David Schleef | ed9eccb | 2008-11-04 20:29:31 -0800 | [diff] [blame] | 353 | |
Ian Abbott | 8fb02b2 | 2016-02-09 15:17:21 +0000 | [diff] [blame] | 354 | /** |
Spencer E. Olson | d7569ad | 2018-10-03 14:56:02 -0600 | [diff] [blame] | 355 | * enum device_configuration_ids - COMEDI configuration instruction codes global |
| 356 | * to an entire device. |
| 357 | * @INSN_DEVICE_CONFIG_TEST_ROUTE: Validate the possibility of a |
| 358 | * globally-named route |
| 359 | * @INSN_DEVICE_CONFIG_CONNECT_ROUTE: Connect a globally-named route |
| 360 | * @INSN_DEVICE_CONFIG_DISCONNECT_ROUTE:Disconnect a globally-named route |
| 361 | * @INSN_DEVICE_CONFIG_GET_ROUTES: Get a list of all globally-named routes |
| 362 | * that are valid for a particular device. |
| 363 | */ |
| 364 | enum device_config_route_ids { |
| 365 | INSN_DEVICE_CONFIG_TEST_ROUTE = 0, |
| 366 | INSN_DEVICE_CONFIG_CONNECT_ROUTE = 1, |
| 367 | INSN_DEVICE_CONFIG_DISCONNECT_ROUTE = 2, |
| 368 | INSN_DEVICE_CONFIG_GET_ROUTES = 3, |
| 369 | }; |
| 370 | |
| 371 | /** |
Ian Abbott | 8fb02b2 | 2016-02-09 15:17:21 +0000 | [diff] [blame] | 372 | * enum comedi_digital_trig_op - operations for configuring a digital trigger |
| 373 | * @COMEDI_DIGITAL_TRIG_DISABLE: Return digital trigger to its default, |
| 374 | * inactive, unconfigured state. |
| 375 | * @COMEDI_DIGITAL_TRIG_ENABLE_EDGES: Set rising and/or falling edge inputs |
| 376 | * that each can fire the trigger. |
| 377 | * @COMEDI_DIGITAL_TRIG_ENABLE_LEVELS: Set a combination of high and/or low |
| 378 | * level inputs that can fire the trigger. |
Ian Abbott | 206cb10 | 2012-11-14 11:22:55 +0000 | [diff] [blame] | 379 | * |
Ian Abbott | 8fb02b2 | 2016-02-09 15:17:21 +0000 | [diff] [blame] | 380 | * These are used with the %INSN_CONFIG_DIGITAL_TRIG configuration instruction. |
| 381 | * The data for the configuration instruction is as follows... |
Ian Abbott | 206cb10 | 2012-11-14 11:22:55 +0000 | [diff] [blame] | 382 | * |
Ian Abbott | 8fb02b2 | 2016-02-09 15:17:21 +0000 | [diff] [blame] | 383 | * data[%0] = %INSN_CONFIG_DIGITAL_TRIG |
Ian Abbott | 206cb10 | 2012-11-14 11:22:55 +0000 | [diff] [blame] | 384 | * |
Ian Abbott | 8fb02b2 | 2016-02-09 15:17:21 +0000 | [diff] [blame] | 385 | * data[%1] = trigger ID |
Ian Abbott | 206cb10 | 2012-11-14 11:22:55 +0000 | [diff] [blame] | 386 | * |
Ian Abbott | 8fb02b2 | 2016-02-09 15:17:21 +0000 | [diff] [blame] | 387 | * data[%2] = configuration operation |
Ian Abbott | 206cb10 | 2012-11-14 11:22:55 +0000 | [diff] [blame] | 388 | * |
Ian Abbott | 8fb02b2 | 2016-02-09 15:17:21 +0000 | [diff] [blame] | 389 | * data[%3] = configuration parameter 1 |
Ian Abbott | 206cb10 | 2012-11-14 11:22:55 +0000 | [diff] [blame] | 390 | * |
Ian Abbott | 8fb02b2 | 2016-02-09 15:17:21 +0000 | [diff] [blame] | 391 | * data[%4] = configuration parameter 2 |
| 392 | * |
| 393 | * data[%5] = configuration parameter 3 |
| 394 | * |
| 395 | * The trigger ID (data[%1]) is used to differentiate multiple digital triggers |
| 396 | * belonging to the same subdevice. The configuration operation (data[%2]) is |
| 397 | * one of the enum comedi_digital_trig_op values. The configuration |
| 398 | * parameters (data[%3], data[%4], and data[%5]) depend on the operation; they |
| 399 | * are not used with %COMEDI_DIGITAL_TRIG_DISABLE. |
| 400 | * |
| 401 | * For %COMEDI_DIGITAL_TRIG_ENABLE_EDGES and %COMEDI_DIGITAL_TRIG_ENABLE_LEVELS, |
| 402 | * configuration parameter 1 (data[%3]) contains a "left-shift" value that |
| 403 | * specifies the input corresponding to bit 0 of configuration parameters 2 |
| 404 | * and 3. This is useful if the trigger has more than 32 inputs. |
| 405 | * |
| 406 | * For %COMEDI_DIGITAL_TRIG_ENABLE_EDGES, configuration parameter 2 (data[%4]) |
| 407 | * specifies which of up to 32 inputs have rising-edge sensitivity, and |
| 408 | * configuration parameter 3 (data[%5]) specifies which of up to 32 inputs |
| 409 | * have falling-edge sensitivity that can fire the trigger. |
| 410 | * |
| 411 | * For %COMEDI_DIGITAL_TRIG_ENABLE_LEVELS, configuration parameter 2 (data[%4]) |
| 412 | * specifies which of up to 32 inputs must be at a high level, and |
| 413 | * configuration parameter 3 (data[%5]) specifies which of up to 32 inputs |
| 414 | * must be at a low level for the trigger to fire. |
| 415 | * |
| 416 | * Some sequences of %INSN_CONFIG_DIGITAL_TRIG instructions may have a (partly) |
Ian Abbott | 206cb10 | 2012-11-14 11:22:55 +0000 | [diff] [blame] | 417 | * accumulative effect, depending on the low-level driver. This is useful |
Ian Abbott | 8fb02b2 | 2016-02-09 15:17:21 +0000 | [diff] [blame] | 418 | * when setting up a trigger that has more than 32 inputs, or has a combination |
| 419 | * of edge- and level-triggered inputs. |
Ian Abbott | 206cb10 | 2012-11-14 11:22:55 +0000 | [diff] [blame] | 420 | */ |
| 421 | enum comedi_digital_trig_op { |
| 422 | COMEDI_DIGITAL_TRIG_DISABLE = 0, |
| 423 | COMEDI_DIGITAL_TRIG_ENABLE_EDGES = 1, |
| 424 | COMEDI_DIGITAL_TRIG_ENABLE_LEVELS = 2 |
| 425 | }; |
| 426 | |
Ian Abbott | 8fb02b2 | 2016-02-09 15:17:21 +0000 | [diff] [blame] | 427 | /** |
Ian Abbott | 8fb02b2 | 2016-02-09 15:17:21 +0000 | [diff] [blame] | 428 | * enum comedi_support_level - support level for a COMEDI feature |
| 429 | * @COMEDI_UNKNOWN_SUPPORT: Unspecified support for feature. |
| 430 | * @COMEDI_SUPPORTED: Feature is supported. |
| 431 | * @COMEDI_UNSUPPORTED: Feature is unsupported. |
| 432 | */ |
H Hartley Sweeten | 25b73c7 | 2012-09-18 11:40:15 -0700 | [diff] [blame] | 433 | enum comedi_support_level { |
| 434 | COMEDI_UNKNOWN_SUPPORT = 0, |
| 435 | COMEDI_SUPPORTED, |
| 436 | COMEDI_UNSUPPORTED |
| 437 | }; |
David Schleef | ed9eccb | 2008-11-04 20:29:31 -0800 | [diff] [blame] | 438 | |
Ian Abbott | 8fb02b2 | 2016-02-09 15:17:21 +0000 | [diff] [blame] | 439 | /** |
| 440 | * enum comedi_counter_status_flags - counter status bits |
| 441 | * @COMEDI_COUNTER_ARMED: Counter is armed. |
| 442 | * @COMEDI_COUNTER_COUNTING: Counter is counting. |
| 443 | * @COMEDI_COUNTER_TERMINAL_COUNT: Counter reached terminal count. |
| 444 | * |
| 445 | * These bitwise values are used by the %INSN_CONFIG_GET_COUNTER_STATUS |
| 446 | * configuration instruction to report the status of a counter. |
| 447 | */ |
| 448 | enum comedi_counter_status_flags { |
| 449 | COMEDI_COUNTER_ARMED = 0x1, |
| 450 | COMEDI_COUNTER_COUNTING = 0x2, |
| 451 | COMEDI_COUNTER_TERMINAL_COUNT = 0x4, |
| 452 | }; |
| 453 | |
David Schleef | ed9eccb | 2008-11-04 20:29:31 -0800 | [diff] [blame] | 454 | /* ioctls */ |
| 455 | |
| 456 | #define CIO 'd' |
Bill Pemberton | 0707bb0 | 2009-03-16 22:06:20 -0400 | [diff] [blame] | 457 | #define COMEDI_DEVCONFIG _IOW(CIO, 0, struct comedi_devconfig) |
Bill Pemberton | 063db04 | 2009-03-16 22:06:15 -0400 | [diff] [blame] | 458 | #define COMEDI_DEVINFO _IOR(CIO, 1, struct comedi_devinfo) |
Bill Pemberton | bd52efbb | 2009-03-16 22:06:09 -0400 | [diff] [blame] | 459 | #define COMEDI_SUBDINFO _IOR(CIO, 2, struct comedi_subdinfo) |
Bill Pemberton | a18b416 | 2009-03-16 22:06:04 -0400 | [diff] [blame] | 460 | #define COMEDI_CHANINFO _IOR(CIO, 3, struct comedi_chaninfo) |
Ian Abbott | 75aa1ca | 2016-02-09 15:17:23 +0000 | [diff] [blame] | 461 | /* _IOWR(CIO, 4, ...) is reserved */ |
Greg Kroah-Hartman | e0dcef7 | 2008-11-13 16:36:22 -0800 | [diff] [blame] | 462 | #define COMEDI_LOCK _IO(CIO, 5) |
| 463 | #define COMEDI_UNLOCK _IO(CIO, 6) |
| 464 | #define COMEDI_CANCEL _IO(CIO, 7) |
Bill Pemberton | d0a353f | 2009-03-16 22:06:26 -0400 | [diff] [blame] | 465 | #define COMEDI_RANGEINFO _IOR(CIO, 8, struct comedi_rangeinfo) |
Bill Pemberton | ea6d0d4 | 2009-03-16 22:05:47 -0400 | [diff] [blame] | 466 | #define COMEDI_CMD _IOR(CIO, 9, struct comedi_cmd) |
| 467 | #define COMEDI_CMDTEST _IOR(CIO, 10, struct comedi_cmd) |
Bill Pemberton | da613f4 | 2009-03-16 22:05:59 -0400 | [diff] [blame] | 468 | #define COMEDI_INSNLIST _IOR(CIO, 11, struct comedi_insnlist) |
Bill Pemberton | 90035c0 | 2009-03-16 22:05:53 -0400 | [diff] [blame] | 469 | #define COMEDI_INSN _IOR(CIO, 12, struct comedi_insn) |
Bill Pemberton | be6aba4 | 2009-03-16 22:06:37 -0400 | [diff] [blame] | 470 | #define COMEDI_BUFCONFIG _IOR(CIO, 13, struct comedi_bufconfig) |
Bill Pemberton | 9aa5339 | 2009-03-16 22:06:42 -0400 | [diff] [blame] | 471 | #define COMEDI_BUFINFO _IOWR(CIO, 14, struct comedi_bufinfo) |
Greg Kroah-Hartman | e0dcef7 | 2008-11-13 16:36:22 -0800 | [diff] [blame] | 472 | #define COMEDI_POLL _IO(CIO, 15) |
Ian Abbott | c299a67 | 2014-11-04 18:09:01 +0000 | [diff] [blame] | 473 | #define COMEDI_SETRSUBD _IO(CIO, 16) |
| 474 | #define COMEDI_SETWSUBD _IO(CIO, 17) |
David Schleef | ed9eccb | 2008-11-04 20:29:31 -0800 | [diff] [blame] | 475 | |
| 476 | /* structures */ |
| 477 | |
Ian Abbott | ace7aa7 | 2016-02-09 15:17:22 +0000 | [diff] [blame] | 478 | /** |
| 479 | * struct comedi_insn - COMEDI instruction |
| 480 | * @insn: COMEDI instruction type (%INSN_xxx). |
| 481 | * @n: Length of @data[]. |
| 482 | * @data: Pointer to data array operated on by the instruction. |
| 483 | * @subdev: Subdevice index. |
| 484 | * @chanspec: A packed "chanspec" value consisting of channel number, |
| 485 | * analog range index, analog reference type, and flags. |
| 486 | * @unused: Reserved for future use. |
| 487 | * |
| 488 | * This is used with the %COMEDI_INSN ioctl, and indirectly with the |
| 489 | * %COMEDI_INSNLIST ioctl. |
| 490 | */ |
H Hartley Sweeten | 25b73c7 | 2012-09-18 11:40:15 -0700 | [diff] [blame] | 491 | struct comedi_insn { |
| 492 | unsigned int insn; |
| 493 | unsigned int n; |
| 494 | unsigned int __user *data; |
| 495 | unsigned int subdev; |
| 496 | unsigned int chanspec; |
| 497 | unsigned int unused[3]; |
| 498 | }; |
David Schleef | ed9eccb | 2008-11-04 20:29:31 -0800 | [diff] [blame] | 499 | |
Ian Abbott | ace7aa7 | 2016-02-09 15:17:22 +0000 | [diff] [blame] | 500 | /** |
| 501 | * struct comedi_insnlist - list of COMEDI instructions |
| 502 | * @n_insns: Number of COMEDI instructions. |
| 503 | * @insns: Pointer to array COMEDI instructions. |
| 504 | * |
| 505 | * This is used with the %COMEDI_INSNLIST ioctl. |
| 506 | */ |
H Hartley Sweeten | 25b73c7 | 2012-09-18 11:40:15 -0700 | [diff] [blame] | 507 | struct comedi_insnlist { |
| 508 | unsigned int n_insns; |
| 509 | struct comedi_insn __user *insns; |
| 510 | }; |
David Schleef | ed9eccb | 2008-11-04 20:29:31 -0800 | [diff] [blame] | 511 | |
Ian Abbott | ace7aa7 | 2016-02-09 15:17:22 +0000 | [diff] [blame] | 512 | /** |
| 513 | * struct comedi_cmd - COMEDI asynchronous acquisition command details |
| 514 | * @subdev: Subdevice index. |
| 515 | * @flags: Command flags (%CMDF_xxx). |
| 516 | * @start_src: "Start acquisition" trigger source (%TRIG_xxx). |
| 517 | * @start_arg: "Start acquisition" trigger argument. |
| 518 | * @scan_begin_src: "Scan begin" trigger source. |
| 519 | * @scan_begin_arg: "Scan begin" trigger argument. |
| 520 | * @convert_src: "Convert" trigger source. |
| 521 | * @convert_arg: "Convert" trigger argument. |
| 522 | * @scan_end_src: "Scan end" trigger source. |
| 523 | * @scan_end_arg: "Scan end" trigger argument. |
| 524 | * @stop_src: "Stop acquisition" trigger source. |
| 525 | * @stop_arg: "Stop acquisition" trigger argument. |
| 526 | * @chanlist: Pointer to array of "chanspec" values, containing a |
| 527 | * sequence of channel numbers packed with analog range |
| 528 | * index, etc. |
| 529 | * @chanlist_len: Number of channels in sequence. |
| 530 | * @data: Pointer to miscellaneous set-up data (not used). |
| 531 | * @data_len: Length of miscellaneous set-up data. |
| 532 | * |
| 533 | * This is used with the %COMEDI_CMD or %COMEDI_CMDTEST ioctl to set-up |
| 534 | * or validate an asynchronous acquisition command. The ioctl may modify |
| 535 | * the &struct comedi_cmd and copy it back to the caller. |
| 536 | * |
| 537 | * Optional command @flags values that can be ORed together... |
| 538 | * |
| 539 | * %CMDF_BOGUS - makes %COMEDI_CMD ioctl return error %EAGAIN instead of |
| 540 | * starting the command. |
| 541 | * |
| 542 | * %CMDF_PRIORITY - requests "hard real-time" processing (which is not |
| 543 | * supported in this version of COMEDI). |
| 544 | * |
| 545 | * %CMDF_WAKE_EOS - requests the command makes data available for reading |
| 546 | * after every "scan" period. |
| 547 | * |
| 548 | * %CMDF_WRITE - marks the command as being in the "write" (to device) |
| 549 | * direction. This does not need to be specified by the caller unless the |
| 550 | * subdevice supports commands in either direction. |
| 551 | * |
| 552 | * %CMDF_RAWDATA - prevents the command from "munging" the data between the |
| 553 | * COMEDI sample format and the raw hardware sample format. |
| 554 | * |
| 555 | * %CMDF_ROUND_NEAREST - requests timing periods to be rounded to nearest |
| 556 | * supported values. |
| 557 | * |
| 558 | * %CMDF_ROUND_DOWN - requests timing periods to be rounded down to supported |
| 559 | * values (frequencies rounded up). |
| 560 | * |
| 561 | * %CMDF_ROUND_UP - requests timing periods to be rounded up to supported |
| 562 | * values (frequencies rounded down). |
| 563 | * |
| 564 | * Trigger source values for @start_src, @scan_begin_src, @convert_src, |
| 565 | * @scan_end_src, and @stop_src... |
| 566 | * |
| 567 | * %TRIG_ANY - "all ones" value used to test which trigger sources are |
| 568 | * supported. |
| 569 | * |
| 570 | * %TRIG_INVALID - "all zeroes" value used to indicate that all requested |
| 571 | * trigger sources are invalid. |
| 572 | * |
| 573 | * %TRIG_NONE - never trigger (often used as a @stop_src value). |
| 574 | * |
| 575 | * %TRIG_NOW - trigger after '_arg' nanoseconds. |
| 576 | * |
| 577 | * %TRIG_FOLLOW - trigger follows another event. |
| 578 | * |
| 579 | * %TRIG_TIMER - trigger every '_arg' nanoseconds. |
| 580 | * |
| 581 | * %TRIG_COUNT - trigger when count '_arg' is reached. |
| 582 | * |
| 583 | * %TRIG_EXT - trigger on external signal specified by '_arg'. |
| 584 | * |
| 585 | * %TRIG_INT - trigger on internal, software trigger specified by '_arg'. |
| 586 | * |
| 587 | * %TRIG_OTHER - trigger on other, driver-defined signal specified by '_arg'. |
| 588 | */ |
H Hartley Sweeten | 25b73c7 | 2012-09-18 11:40:15 -0700 | [diff] [blame] | 589 | struct comedi_cmd { |
| 590 | unsigned int subdev; |
| 591 | unsigned int flags; |
David Schleef | ed9eccb | 2008-11-04 20:29:31 -0800 | [diff] [blame] | 592 | |
H Hartley Sweeten | 25b73c7 | 2012-09-18 11:40:15 -0700 | [diff] [blame] | 593 | unsigned int start_src; |
| 594 | unsigned int start_arg; |
David Schleef | ed9eccb | 2008-11-04 20:29:31 -0800 | [diff] [blame] | 595 | |
H Hartley Sweeten | 25b73c7 | 2012-09-18 11:40:15 -0700 | [diff] [blame] | 596 | unsigned int scan_begin_src; |
| 597 | unsigned int scan_begin_arg; |
David Schleef | ed9eccb | 2008-11-04 20:29:31 -0800 | [diff] [blame] | 598 | |
H Hartley Sweeten | 25b73c7 | 2012-09-18 11:40:15 -0700 | [diff] [blame] | 599 | unsigned int convert_src; |
| 600 | unsigned int convert_arg; |
David Schleef | ed9eccb | 2008-11-04 20:29:31 -0800 | [diff] [blame] | 601 | |
H Hartley Sweeten | 25b73c7 | 2012-09-18 11:40:15 -0700 | [diff] [blame] | 602 | unsigned int scan_end_src; |
| 603 | unsigned int scan_end_arg; |
David Schleef | ed9eccb | 2008-11-04 20:29:31 -0800 | [diff] [blame] | 604 | |
H Hartley Sweeten | 25b73c7 | 2012-09-18 11:40:15 -0700 | [diff] [blame] | 605 | unsigned int stop_src; |
| 606 | unsigned int stop_arg; |
David Schleef | ed9eccb | 2008-11-04 20:29:31 -0800 | [diff] [blame] | 607 | |
Ian Abbott | ace7aa7 | 2016-02-09 15:17:22 +0000 | [diff] [blame] | 608 | unsigned int *chanlist; |
H Hartley Sweeten | 25b73c7 | 2012-09-18 11:40:15 -0700 | [diff] [blame] | 609 | unsigned int chanlist_len; |
David Schleef | ed9eccb | 2008-11-04 20:29:31 -0800 | [diff] [blame] | 610 | |
Ian Abbott | ace7aa7 | 2016-02-09 15:17:22 +0000 | [diff] [blame] | 611 | short __user *data; |
H Hartley Sweeten | 25b73c7 | 2012-09-18 11:40:15 -0700 | [diff] [blame] | 612 | unsigned int data_len; |
| 613 | }; |
David Schleef | ed9eccb | 2008-11-04 20:29:31 -0800 | [diff] [blame] | 614 | |
Ian Abbott | ace7aa7 | 2016-02-09 15:17:22 +0000 | [diff] [blame] | 615 | /** |
| 616 | * struct comedi_chaninfo - used to retrieve per-channel information |
| 617 | * @subdev: Subdevice index. |
| 618 | * @maxdata_list: Optional pointer to per-channel maximum data values. |
| 619 | * @flaglist: Optional pointer to per-channel flags. |
| 620 | * @rangelist: Optional pointer to per-channel range types. |
| 621 | * @unused: Reserved for future use. |
| 622 | * |
| 623 | * This is used with the %COMEDI_CHANINFO ioctl to get per-channel information |
| 624 | * for the subdevice. Use of this requires knowledge of the number of channels |
| 625 | * and subdevice flags obtained using the %COMEDI_SUBDINFO ioctl. |
| 626 | * |
| 627 | * The @maxdata_list member must be %NULL unless the %SDF_MAXDATA subdevice |
| 628 | * flag is set. The @flaglist member must be %NULL unless the %SDF_FLAGS |
| 629 | * subdevice flag is set. The @rangelist member must be %NULL unless the |
| 630 | * %SDF_RANGETYPE subdevice flag is set. Otherwise, the arrays they point to |
| 631 | * must be at least as long as the number of channels. |
| 632 | */ |
H Hartley Sweeten | 25b73c7 | 2012-09-18 11:40:15 -0700 | [diff] [blame] | 633 | struct comedi_chaninfo { |
| 634 | unsigned int subdev; |
| 635 | unsigned int __user *maxdata_list; |
| 636 | unsigned int __user *flaglist; |
| 637 | unsigned int __user *rangelist; |
| 638 | unsigned int unused[4]; |
| 639 | }; |
David Schleef | ed9eccb | 2008-11-04 20:29:31 -0800 | [diff] [blame] | 640 | |
Ian Abbott | ace7aa7 | 2016-02-09 15:17:22 +0000 | [diff] [blame] | 641 | /** |
| 642 | * struct comedi_rangeinfo - used to retrieve the range table for a channel |
| 643 | * @range_type: Encodes subdevice index (bits 27:24), channel index |
| 644 | * (bits 23:16) and range table length (bits 15:0). |
| 645 | * @range_ptr: Pointer to array of @struct comedi_krange to be filled |
| 646 | * in with the range table for the channel or subdevice. |
| 647 | * |
| 648 | * This is used with the %COMEDI_RANGEINFO ioctl to retrieve the range table |
| 649 | * for a specific channel (if the subdevice has the %SDF_RANGETYPE flag set to |
| 650 | * indicate that the range table depends on the channel), or for the subdevice |
| 651 | * as a whole (if the %SDF_RANGETYPE flag is clear, indicating the range table |
| 652 | * is shared by all channels). |
| 653 | * |
| 654 | * The @range_type value is an input to the ioctl and comes from a previous |
| 655 | * use of the %COMEDI_SUBDINFO ioctl (if the %SDF_RANGETYPE flag is clear), |
| 656 | * or the %COMEDI_CHANINFO ioctl (if the %SDF_RANGETYPE flag is set). |
| 657 | */ |
H Hartley Sweeten | 25b73c7 | 2012-09-18 11:40:15 -0700 | [diff] [blame] | 658 | struct comedi_rangeinfo { |
| 659 | unsigned int range_type; |
| 660 | void __user *range_ptr; |
| 661 | }; |
David Schleef | ed9eccb | 2008-11-04 20:29:31 -0800 | [diff] [blame] | 662 | |
Ian Abbott | ace7aa7 | 2016-02-09 15:17:22 +0000 | [diff] [blame] | 663 | /** |
| 664 | * struct comedi_krange - describes a range in a range table |
| 665 | * @min: Minimum value in millionths (1e-6) of a unit. |
| 666 | * @max: Maximum value in millionths (1e-6) of a unit. |
| 667 | * @flags: Indicates the units (in bits 7:0) OR'ed with optional flags. |
| 668 | * |
| 669 | * A range table is associated with a single channel, or with all channels in a |
| 670 | * subdevice, and a list of one or more ranges. A %struct comedi_krange |
| 671 | * describes the physical range of units for one of those ranges. Sample |
| 672 | * values in COMEDI are unsigned from %0 up to some 'maxdata' value. The |
| 673 | * mapping from sample values to physical units is assumed to be nomimally |
| 674 | * linear (for the purpose of describing the range), with sample value %0 |
| 675 | * mapping to @min, and the 'maxdata' sample value mapping to @max. |
| 676 | * |
| 677 | * The currently defined units are %UNIT_volt (%0), %UNIT_mA (%1), and |
| 678 | * %UNIT_none (%2). The @min and @max values are the physical range multiplied |
| 679 | * by 1e6, so a @max value of %1000000 (with %UNIT_volt) represents a maximal |
| 680 | * value of 1 volt. |
| 681 | * |
Ian Abbott | d20f8a7 | 2016-03-02 14:27:38 +0000 | [diff] [blame] | 682 | * The only defined flag value is %RF_EXTERNAL (%0x100), indicating that the |
Ethan Edwards | f6a1a42 | 2020-08-24 20:29:55 -0400 | [diff] [blame] | 683 | * range needs to be multiplied by an external reference. |
Ian Abbott | ace7aa7 | 2016-02-09 15:17:22 +0000 | [diff] [blame] | 684 | */ |
H Hartley Sweeten | 25b73c7 | 2012-09-18 11:40:15 -0700 | [diff] [blame] | 685 | struct comedi_krange { |
Ian Abbott | ace7aa7 | 2016-02-09 15:17:22 +0000 | [diff] [blame] | 686 | int min; |
| 687 | int max; |
H Hartley Sweeten | 25b73c7 | 2012-09-18 11:40:15 -0700 | [diff] [blame] | 688 | unsigned int flags; |
| 689 | }; |
David Schleef | ed9eccb | 2008-11-04 20:29:31 -0800 | [diff] [blame] | 690 | |
Ian Abbott | ace7aa7 | 2016-02-09 15:17:22 +0000 | [diff] [blame] | 691 | /** |
| 692 | * struct comedi_subdinfo - used to retrieve information about a subdevice |
| 693 | * @type: Type of subdevice from &enum comedi_subdevice_type. |
| 694 | * @n_chan: Number of channels the subdevice supports. |
| 695 | * @subd_flags: A mixture of static and dynamic flags describing |
| 696 | * aspects of the subdevice and its current state. |
| 697 | * @timer_type: Timer type. Always set to %5 ("nanosecond timer"). |
| 698 | * @len_chanlist: Maximum length of a channel list if the subdevice |
| 699 | * supports asynchronous acquisition commands. |
| 700 | * @maxdata: Maximum sample value for all channels if the |
| 701 | * %SDF_MAXDATA subdevice flag is clear. |
| 702 | * @flags: Channel flags for all channels if the %SDF_FLAGS |
| 703 | * subdevice flag is clear. |
| 704 | * @range_type: The range type for all channels if the %SDF_RANGETYPE |
| 705 | * subdevice flag is clear. Encodes the subdevice index |
| 706 | * (bits 27:24), a dummy channel index %0 (bits 23:16), |
| 707 | * and the range table length (bits 15:0). |
| 708 | * @settling_time_0: Not used. |
| 709 | * @insn_bits_support: Set to %COMEDI_SUPPORTED if the subdevice supports the |
| 710 | * %INSN_BITS instruction, or to %COMEDI_UNSUPPORTED if it |
| 711 | * does not. |
| 712 | * @unused: Reserved for future use. |
| 713 | * |
| 714 | * This is used with the %COMEDI_SUBDINFO ioctl which copies an array of |
| 715 | * &struct comedi_subdinfo back to user space, with one element per subdevice. |
| 716 | * Use of this requires knowledge of the number of subdevices obtained from |
| 717 | * the %COMEDI_DEVINFO ioctl. |
| 718 | * |
| 719 | * These are the @subd_flags values that may be ORed together... |
| 720 | * |
| 721 | * %SDF_BUSY - the subdevice is busy processing an asynchronous command or a |
| 722 | * synchronous instruction. |
| 723 | * |
| 724 | * %SDF_BUSY_OWNER - the subdevice is busy processing an asynchronous |
| 725 | * acquisition command started on the current file object (the file object |
| 726 | * issuing the %COMEDI_SUBDINFO ioctl). |
| 727 | * |
| 728 | * %SDF_LOCKED - the subdevice is locked by a %COMEDI_LOCK ioctl. |
| 729 | * |
| 730 | * %SDF_LOCK_OWNER - the subdevice is locked by a %COMEDI_LOCK ioctl from the |
| 731 | * current file object. |
| 732 | * |
| 733 | * %SDF_MAXDATA - maximum sample values are channel-specific. |
| 734 | * |
| 735 | * %SDF_FLAGS - channel flags are channel-specific. |
| 736 | * |
| 737 | * %SDF_RANGETYPE - range types are channel-specific. |
| 738 | * |
Ian Abbott | 222c402 | 2016-02-09 15:17:24 +0000 | [diff] [blame] | 739 | * %SDF_PWM_COUNTER - PWM can switch off automatically. |
Ian Abbott | ace7aa7 | 2016-02-09 15:17:22 +0000 | [diff] [blame] | 740 | * |
Ian Abbott | 222c402 | 2016-02-09 15:17:24 +0000 | [diff] [blame] | 741 | * %SDF_PWM_HBRIDGE - or PWM is signed (H-bridge). |
Ian Abbott | ace7aa7 | 2016-02-09 15:17:22 +0000 | [diff] [blame] | 742 | * |
| 743 | * %SDF_CMD - the subdevice supports asynchronous commands. |
| 744 | * |
| 745 | * %SDF_SOFT_CALIBRATED - the subdevice uses software calibration. |
| 746 | * |
| 747 | * %SDF_CMD_WRITE - the subdevice supports asynchronous commands in the output |
| 748 | * ("write") direction. |
| 749 | * |
| 750 | * %SDF_CMD_READ - the subdevice supports asynchronous commands in the input |
| 751 | * ("read") direction. |
| 752 | * |
| 753 | * %SDF_READABLE - the subdevice is readable (e.g. analog input). |
| 754 | * |
| 755 | * %SDF_WRITABLE (aliased as %SDF_WRITEABLE) - the subdevice is writable (e.g. |
| 756 | * analog output). |
| 757 | * |
| 758 | * %SDF_INTERNAL - the subdevice has no externally visible lines. |
| 759 | * |
| 760 | * %SDF_GROUND - the subdevice can use ground as an analog reference. |
| 761 | * |
| 762 | * %SDF_COMMON - the subdevice can use a common analog reference. |
| 763 | * |
| 764 | * %SDF_DIFF - the subdevice can use differential inputs (or outputs). |
| 765 | * |
| 766 | * %SDF_OTHER - the subdevice can use some other analog reference. |
| 767 | * |
| 768 | * %SDF_DITHER - the subdevice can do dithering. |
| 769 | * |
| 770 | * %SDF_DEGLITCH - the subdevice can do deglitching. |
| 771 | * |
| 772 | * %SDF_MMAP - this is never set. |
| 773 | * |
| 774 | * %SDF_RUNNING - an asynchronous command is still running. |
| 775 | * |
| 776 | * %SDF_LSAMPL - the subdevice uses "long" (32-bit) samples (for asynchronous |
| 777 | * command data). |
| 778 | * |
| 779 | * %SDF_PACKED - the subdevice packs several DIO samples into a single sample |
| 780 | * (for asynchronous command data). |
| 781 | * |
| 782 | * No "channel flags" (@flags) values are currently defined. |
| 783 | */ |
H Hartley Sweeten | 25b73c7 | 2012-09-18 11:40:15 -0700 | [diff] [blame] | 784 | struct comedi_subdinfo { |
| 785 | unsigned int type; |
| 786 | unsigned int n_chan; |
| 787 | unsigned int subd_flags; |
| 788 | unsigned int timer_type; |
| 789 | unsigned int len_chanlist; |
| 790 | unsigned int maxdata; |
Ian Abbott | ace7aa7 | 2016-02-09 15:17:22 +0000 | [diff] [blame] | 791 | unsigned int flags; |
| 792 | unsigned int range_type; |
H Hartley Sweeten | 25b73c7 | 2012-09-18 11:40:15 -0700 | [diff] [blame] | 793 | unsigned int settling_time_0; |
Nikita Eshkeev | f7ede00 | 2016-05-03 18:22:23 +0300 | [diff] [blame] | 794 | unsigned int insn_bits_support; |
H Hartley Sweeten | 25b73c7 | 2012-09-18 11:40:15 -0700 | [diff] [blame] | 795 | unsigned int unused[8]; |
| 796 | }; |
David Schleef | ed9eccb | 2008-11-04 20:29:31 -0800 | [diff] [blame] | 797 | |
Ian Abbott | ace7aa7 | 2016-02-09 15:17:22 +0000 | [diff] [blame] | 798 | /** |
| 799 | * struct comedi_devinfo - used to retrieve information about a COMEDI device |
| 800 | * @version_code: COMEDI version code. |
| 801 | * @n_subdevs: Number of subdevices the device has. |
| 802 | * @driver_name: Null-terminated COMEDI driver name. |
| 803 | * @board_name: Null-terminated COMEDI board name. |
| 804 | * @read_subdevice: Index of the current "read" subdevice (%-1 if none). |
| 805 | * @write_subdevice: Index of the current "write" subdevice (%-1 if none). |
| 806 | * @unused: Reserved for future use. |
| 807 | * |
| 808 | * This is used with the %COMEDI_DEVINFO ioctl to get basic information about |
| 809 | * the device. |
| 810 | */ |
H Hartley Sweeten | 25b73c7 | 2012-09-18 11:40:15 -0700 | [diff] [blame] | 811 | struct comedi_devinfo { |
| 812 | unsigned int version_code; |
| 813 | unsigned int n_subdevs; |
| 814 | char driver_name[COMEDI_NAMELEN]; |
| 815 | char board_name[COMEDI_NAMELEN]; |
| 816 | int read_subdevice; |
| 817 | int write_subdevice; |
| 818 | int unused[30]; |
| 819 | }; |
David Schleef | ed9eccb | 2008-11-04 20:29:31 -0800 | [diff] [blame] | 820 | |
Ian Abbott | ace7aa7 | 2016-02-09 15:17:22 +0000 | [diff] [blame] | 821 | /** |
| 822 | * struct comedi_devconfig - used to configure a legacy COMEDI device |
| 823 | * @board_name: Null-terminated string specifying the type of board |
| 824 | * to configure. |
| 825 | * @options: An array of integer configuration options. |
| 826 | * |
| 827 | * This is used with the %COMEDI_DEVCONFIG ioctl to configure a "legacy" COMEDI |
| 828 | * device, such as an ISA card. Not all COMEDI drivers support this. Those |
| 829 | * that do either expect the specified board name to match one of a list of |
| 830 | * names registered with the COMEDI core, or expect the specified board name |
| 831 | * to match the COMEDI driver name itself. The configuration options are |
| 832 | * handled in a driver-specific manner. |
| 833 | */ |
H Hartley Sweeten | 25b73c7 | 2012-09-18 11:40:15 -0700 | [diff] [blame] | 834 | struct comedi_devconfig { |
| 835 | char board_name[COMEDI_NAMELEN]; |
| 836 | int options[COMEDI_NDEVCONFOPTS]; |
| 837 | }; |
David Schleef | ed9eccb | 2008-11-04 20:29:31 -0800 | [diff] [blame] | 838 | |
Ian Abbott | ace7aa7 | 2016-02-09 15:17:22 +0000 | [diff] [blame] | 839 | /** |
| 840 | * struct comedi_bufconfig - used to set or get buffer size for a subdevice |
| 841 | * @subdevice: Subdevice index. |
| 842 | * @flags: Not used. |
| 843 | * @maximum_size: Maximum allowed buffer size. |
| 844 | * @size: Buffer size. |
| 845 | * @unused: Reserved for future use. |
| 846 | * |
| 847 | * This is used with the %COMEDI_BUFCONFIG ioctl to get or configure the |
| 848 | * maximum buffer size and current buffer size for a COMEDI subdevice that |
| 849 | * supports asynchronous commands. If the subdevice does not support |
| 850 | * asynchronous commands, @maximum_size and @size are ignored and set to 0. |
| 851 | * |
| 852 | * On ioctl input, non-zero values of @maximum_size and @size specify a |
| 853 | * new maximum size and new current size (in bytes), respectively. These |
| 854 | * will by rounded up to a multiple of %PAGE_SIZE. Specifying a new maximum |
| 855 | * size requires admin capabilities. |
| 856 | * |
| 857 | * On ioctl output, @maximum_size and @size and set to the current maximum |
| 858 | * buffer size and current buffer size, respectively. |
| 859 | */ |
H Hartley Sweeten | 25b73c7 | 2012-09-18 11:40:15 -0700 | [diff] [blame] | 860 | struct comedi_bufconfig { |
| 861 | unsigned int subdevice; |
| 862 | unsigned int flags; |
David Schleef | ed9eccb | 2008-11-04 20:29:31 -0800 | [diff] [blame] | 863 | |
H Hartley Sweeten | 25b73c7 | 2012-09-18 11:40:15 -0700 | [diff] [blame] | 864 | unsigned int maximum_size; |
| 865 | unsigned int size; |
David Schleef | ed9eccb | 2008-11-04 20:29:31 -0800 | [diff] [blame] | 866 | |
H Hartley Sweeten | 25b73c7 | 2012-09-18 11:40:15 -0700 | [diff] [blame] | 867 | unsigned int unused[4]; |
| 868 | }; |
David Schleef | ed9eccb | 2008-11-04 20:29:31 -0800 | [diff] [blame] | 869 | |
Ian Abbott | ace7aa7 | 2016-02-09 15:17:22 +0000 | [diff] [blame] | 870 | /** |
| 871 | * struct comedi_bufinfo - used to manipulate buffer position for a subdevice |
| 872 | * @subdevice: Subdevice index. |
| 873 | * @bytes_read: Specify amount to advance read position for an |
| 874 | * asynchronous command in the input ("read") direction. |
| 875 | * @buf_write_ptr: Current write position (index) within the buffer. |
| 876 | * @buf_read_ptr: Current read position (index) within the buffer. |
| 877 | * @buf_write_count: Total amount written, modulo 2^32. |
| 878 | * @buf_read_count: Total amount read, modulo 2^32. |
| 879 | * @bytes_written: Specify amount to advance write position for an |
| 880 | * asynchronous command in the output ("write") direction. |
| 881 | * @unused: Reserved for future use. |
| 882 | * |
| 883 | * This is used with the %COMEDI_BUFINFO ioctl to optionally advance the |
| 884 | * current read or write position in an asynchronous acquisition data buffer, |
| 885 | * and to get the current read and write positions in the buffer. |
| 886 | */ |
H Hartley Sweeten | 25b73c7 | 2012-09-18 11:40:15 -0700 | [diff] [blame] | 887 | struct comedi_bufinfo { |
| 888 | unsigned int subdevice; |
| 889 | unsigned int bytes_read; |
David Schleef | ed9eccb | 2008-11-04 20:29:31 -0800 | [diff] [blame] | 890 | |
H Hartley Sweeten | 25b73c7 | 2012-09-18 11:40:15 -0700 | [diff] [blame] | 891 | unsigned int buf_write_ptr; |
| 892 | unsigned int buf_read_ptr; |
| 893 | unsigned int buf_write_count; |
| 894 | unsigned int buf_read_count; |
David Schleef | ed9eccb | 2008-11-04 20:29:31 -0800 | [diff] [blame] | 895 | |
H Hartley Sweeten | 25b73c7 | 2012-09-18 11:40:15 -0700 | [diff] [blame] | 896 | unsigned int bytes_written; |
David Schleef | ed9eccb | 2008-11-04 20:29:31 -0800 | [diff] [blame] | 897 | |
H Hartley Sweeten | 25b73c7 | 2012-09-18 11:40:15 -0700 | [diff] [blame] | 898 | unsigned int unused[4]; |
| 899 | }; |
David Schleef | ed9eccb | 2008-11-04 20:29:31 -0800 | [diff] [blame] | 900 | |
| 901 | /* range stuff */ |
| 902 | |
Daniel H. Hemmingsen | af904c4 | 2015-11-12 17:03:18 +0100 | [diff] [blame] | 903 | #define __RANGE(a, b) ((((a) & 0xffff) << 16) | ((b) & 0xffff)) |
David Schleef | ed9eccb | 2008-11-04 20:29:31 -0800 | [diff] [blame] | 904 | |
Daniel H. Hemmingsen | af904c4 | 2015-11-12 17:03:18 +0100 | [diff] [blame] | 905 | #define RANGE_OFFSET(a) (((a) >> 16) & 0xffff) |
| 906 | #define RANGE_LENGTH(b) ((b) & 0xffff) |
David Schleef | ed9eccb | 2008-11-04 20:29:31 -0800 | [diff] [blame] | 907 | |
Daniel H. Hemmingsen | af904c4 | 2015-11-12 17:03:18 +0100 | [diff] [blame] | 908 | #define RF_UNIT(flags) ((flags) & 0xff) |
Ian Abbott | 9cee3d4 | 2016-03-02 14:27:37 +0000 | [diff] [blame] | 909 | #define RF_EXTERNAL 0x100 |
David Schleef | ed9eccb | 2008-11-04 20:29:31 -0800 | [diff] [blame] | 910 | |
| 911 | #define UNIT_volt 0 |
| 912 | #define UNIT_mA 1 |
| 913 | #define UNIT_none 2 |
| 914 | |
Pablo G. Gallardo | b9491ea | 2016-02-04 21:43:13 -0200 | [diff] [blame] | 915 | #define COMEDI_MIN_SPEED 0xffffffffu |
David Schleef | ed9eccb | 2008-11-04 20:29:31 -0800 | [diff] [blame] | 916 | |
David Schleef | ed9eccb | 2008-11-04 20:29:31 -0800 | [diff] [blame] | 917 | /**********************************************************/ |
| 918 | /* everything after this line is ALPHA */ |
| 919 | /**********************************************************/ |
| 920 | |
| 921 | /* |
Daniel H. Hemmingsen | af904c4 | 2015-11-12 17:03:18 +0100 | [diff] [blame] | 922 | * 8254 specific configuration. |
| 923 | * |
| 924 | * It supports two config commands: |
| 925 | * |
| 926 | * 0 ID: INSN_CONFIG_SET_COUNTER_MODE |
| 927 | * 1 8254 Mode |
| 928 | * I8254_MODE0, I8254_MODE1, ..., I8254_MODE5 |
| 929 | * OR'ed with: |
| 930 | * I8254_BCD, I8254_BINARY |
| 931 | * |
| 932 | * 0 ID: INSN_CONFIG_8254_READ_STATUS |
| 933 | * 1 <-- Status byte returned here. |
| 934 | * B7 = Output |
| 935 | * B6 = NULL Count |
| 936 | * B5 - B0 Current mode. |
| 937 | */ |
David Schleef | ed9eccb | 2008-11-04 20:29:31 -0800 | [diff] [blame] | 938 | |
H Hartley Sweeten | 25b73c7 | 2012-09-18 11:40:15 -0700 | [diff] [blame] | 939 | enum i8254_mode { |
| 940 | I8254_MODE0 = (0 << 1), /* Interrupt on terminal count */ |
| 941 | I8254_MODE1 = (1 << 1), /* Hardware retriggerable one-shot */ |
| 942 | I8254_MODE2 = (2 << 1), /* Rate generator */ |
| 943 | I8254_MODE3 = (3 << 1), /* Square wave mode */ |
| 944 | I8254_MODE4 = (4 << 1), /* Software triggered strobe */ |
Daniel H. Hemmingsen | af904c4 | 2015-11-12 17:03:18 +0100 | [diff] [blame] | 945 | /* Hardware triggered strobe (retriggerable) */ |
| 946 | I8254_MODE5 = (5 << 1), |
| 947 | /* Use binary-coded decimal instead of binary (pretty useless) */ |
| 948 | I8254_BCD = 1, |
H Hartley Sweeten | 25b73c7 | 2012-09-18 11:40:15 -0700 | [diff] [blame] | 949 | I8254_BINARY = 0 |
| 950 | }; |
David Schleef | ed9eccb | 2008-11-04 20:29:31 -0800 | [diff] [blame] | 951 | |
Spencer E. Olson | 5912827 | 2018-10-03 14:56:01 -0600 | [diff] [blame] | 952 | /* *** BEGIN GLOBALLY-NAMED NI TERMINALS/SIGNALS *** */ |
| 953 | |
| 954 | /* |
| 955 | * Common National Instruments Terminal/Signal names. |
| 956 | * Some of these have no NI_ prefix as they are useful for non-NI hardware, such |
| 957 | * as those that utilize the PXI/RTSI trigger lines. |
| 958 | * |
| 959 | * NOTE ABOUT THE CHOICE OF NAMES HERE AND THE CAMELSCRIPT: |
| 960 | * The choice to use CamelScript and the exact names below is for |
| 961 | * maintainability, clarity, similarity to manufacturer's documentation, |
| 962 | * _and_ a mitigation for confusion that has plagued the use of these drivers |
| 963 | * for years! |
| 964 | * |
| 965 | * More detail: |
| 966 | * There have been significant confusions over the past many years for users |
| 967 | * when trying to understand how to connect to/from signals and terminals on |
| 968 | * NI hardware using comedi. The major reason for this is that the actual |
| 969 | * register values were exposed and required to be used by users. Several |
| 970 | * major reasons exist why this caused major confusion for users: |
| 971 | * 1) The register values are _NOT_ in user documentation, but rather in |
| 972 | * arcane locations, such as a few register programming manuals that are |
Ethan Edwards | f6a1a42 | 2020-08-24 20:29:55 -0400 | [diff] [blame] | 973 | * increasingly hard to find and the NI MHDDK (comments in example code). |
Spencer E. Olson | 5912827 | 2018-10-03 14:56:01 -0600 | [diff] [blame] | 974 | * There is no one place to find the various valid values of the registers. |
| 975 | * 2) The register values are _NOT_ completely consistent. There is no way to |
| 976 | * gain any sense of intuition of which values, or even enums one should use |
| 977 | * for various registers. There was some attempt in prior use of comedi to |
| 978 | * name enums such that a user might know which enums should be used for |
| 979 | * varying purposes, but the end-user had to gain a knowledge of register |
| 980 | * values to correctly wield this approach. |
| 981 | * 3) The names for signals and registers found in the various register level |
| 982 | * programming manuals and vendor-provided documentation are _not_ even |
| 983 | * close to the same names that are in the end-user documentation. |
| 984 | * |
| 985 | * Similar, albeit less, confusion plagued NI's previous version of their own |
| 986 | * drivers. Earlier than 2003, NI greatly simplified the situation for users |
| 987 | * by releasing a new API that abstracted the names of signals/terminals to a |
| 988 | * common and intuitive set of names. |
| 989 | * |
| 990 | * The names below mirror the names chosen and well documented by NI. These |
| 991 | * names are exposed to the user via the comedilib user library. By keeping |
| 992 | * the names below, in spite of the use of CamelScript, maintenance will be |
| 993 | * greatly eased and confusion for users _and_ comedi developers will be |
| 994 | * greatly reduced. |
| 995 | */ |
| 996 | |
| 997 | /* |
| 998 | * Base of abstracted NI names. |
| 999 | * The first 16 bits of *_arg are reserved for channel selection. |
| 1000 | * Since we only actually need the first 4 or 5 bits for all register values on |
| 1001 | * NI select registers anyways, we'll identify all values >= (1<<15) as being an |
| 1002 | * abstracted NI signal/terminal name. |
| 1003 | * These values are also used/returned by INSN_DEVICE_CONFIG_TEST_ROUTE, |
| 1004 | * INSN_DEVICE_CONFIG_CONNECT_ROUTE, INSN_DEVICE_CONFIG_DISCONNECT_ROUTE, |
| 1005 | * and INSN_DEVICE_CONFIG_GET_ROUTES. |
| 1006 | */ |
| 1007 | #define NI_NAMES_BASE 0x8000u |
Spencer E. Olson | 4dc2a3c | 2018-10-24 08:33:40 -0600 | [diff] [blame] | 1008 | |
| 1009 | #define _TERM_N(base, n, x) ((base) + ((x) & ((n) - 1))) |
| 1010 | |
Spencer E. Olson | 5912827 | 2018-10-03 14:56:01 -0600 | [diff] [blame] | 1011 | /* |
| 1012 | * not necessarily all allowed 64 PFIs are valid--certainly not for all devices |
| 1013 | */ |
Spencer E. Olson | 4dc2a3c | 2018-10-24 08:33:40 -0600 | [diff] [blame] | 1014 | #define NI_PFI(x) _TERM_N(NI_NAMES_BASE, 64, x) |
Spencer E. Olson | 5912827 | 2018-10-03 14:56:01 -0600 | [diff] [blame] | 1015 | /* 8 trigger lines by standard, Some devices cannot talk to all eight. */ |
Spencer E. Olson | 4dc2a3c | 2018-10-24 08:33:40 -0600 | [diff] [blame] | 1016 | #define TRIGGER_LINE(x) _TERM_N(NI_PFI(-1) + 1, 8, x) |
Spencer E. Olson | 5912827 | 2018-10-03 14:56:01 -0600 | [diff] [blame] | 1017 | /* 4 RTSI shared MUXes to route signals to/from TRIGGER_LINES on NI hardware */ |
Spencer E. Olson | 4dc2a3c | 2018-10-24 08:33:40 -0600 | [diff] [blame] | 1018 | #define NI_RTSI_BRD(x) _TERM_N(TRIGGER_LINE(-1) + 1, 4, x) |
Spencer E. Olson | 5912827 | 2018-10-03 14:56:01 -0600 | [diff] [blame] | 1019 | |
| 1020 | /* *** Counter/timer names : 8 counters max *** */ |
Spencer E. Olson | 4dc2a3c | 2018-10-24 08:33:40 -0600 | [diff] [blame] | 1021 | #define NI_MAX_COUNTERS 8 |
| 1022 | #define NI_COUNTER_NAMES_BASE (NI_RTSI_BRD(-1) + 1) |
| 1023 | #define NI_CtrSource(x) _TERM_N(NI_COUNTER_NAMES_BASE, NI_MAX_COUNTERS, x) |
Spencer E. Olson | 5912827 | 2018-10-03 14:56:01 -0600 | [diff] [blame] | 1024 | /* Gate, Aux, A,B,Z are all treated, at times as gates */ |
Spencer E. Olson | 4dc2a3c | 2018-10-24 08:33:40 -0600 | [diff] [blame] | 1025 | #define NI_GATES_NAMES_BASE (NI_CtrSource(-1) + 1) |
| 1026 | #define NI_CtrGate(x) _TERM_N(NI_GATES_NAMES_BASE, NI_MAX_COUNTERS, x) |
| 1027 | #define NI_CtrAux(x) _TERM_N(NI_CtrGate(-1) + 1, NI_MAX_COUNTERS, x) |
| 1028 | #define NI_CtrA(x) _TERM_N(NI_CtrAux(-1) + 1, NI_MAX_COUNTERS, x) |
| 1029 | #define NI_CtrB(x) _TERM_N(NI_CtrA(-1) + 1, NI_MAX_COUNTERS, x) |
| 1030 | #define NI_CtrZ(x) _TERM_N(NI_CtrB(-1) + 1, NI_MAX_COUNTERS, x) |
| 1031 | #define NI_GATES_NAMES_MAX NI_CtrZ(-1) |
| 1032 | #define NI_CtrArmStartTrigger(x) _TERM_N(NI_CtrZ(-1) + 1, NI_MAX_COUNTERS, x) |
Spencer E. Olson | 5912827 | 2018-10-03 14:56:01 -0600 | [diff] [blame] | 1033 | #define NI_CtrInternalOutput(x) \ |
Spencer E. Olson | 4dc2a3c | 2018-10-24 08:33:40 -0600 | [diff] [blame] | 1034 | _TERM_N(NI_CtrArmStartTrigger(-1) + 1, NI_MAX_COUNTERS, x) |
Spencer E. Olson | 5912827 | 2018-10-03 14:56:01 -0600 | [diff] [blame] | 1035 | /** external pin(s) labeled conveniently as Ctr<i>Out. */ |
Spencer E. Olson | 4dc2a3c | 2018-10-24 08:33:40 -0600 | [diff] [blame] | 1036 | #define NI_CtrOut(x) _TERM_N(NI_CtrInternalOutput(-1) + 1, NI_MAX_COUNTERS, x) |
Spencer E. Olson | 5912827 | 2018-10-03 14:56:01 -0600 | [diff] [blame] | 1037 | /** For Buffered sampling of ctr -- x series capability. */ |
Spencer E. Olson | 4dc2a3c | 2018-10-24 08:33:40 -0600 | [diff] [blame] | 1038 | #define NI_CtrSampleClock(x) _TERM_N(NI_CtrOut(-1) + 1, NI_MAX_COUNTERS, x) |
| 1039 | #define NI_COUNTER_NAMES_MAX NI_CtrSampleClock(-1) |
Spencer E. Olson | 5912827 | 2018-10-03 14:56:01 -0600 | [diff] [blame] | 1040 | |
| 1041 | enum ni_common_signal_names { |
| 1042 | /* PXI_Star: this is a non-NI-specific signal */ |
| 1043 | PXI_Star = NI_COUNTER_NAMES_MAX + 1, |
| 1044 | PXI_Clk10, |
| 1045 | PXIe_Clk100, |
| 1046 | NI_AI_SampleClock, |
| 1047 | NI_AI_SampleClockTimebase, |
| 1048 | NI_AI_StartTrigger, |
| 1049 | NI_AI_ReferenceTrigger, |
| 1050 | NI_AI_ConvertClock, |
| 1051 | NI_AI_ConvertClockTimebase, |
| 1052 | NI_AI_PauseTrigger, |
| 1053 | NI_AI_HoldCompleteEvent, |
| 1054 | NI_AI_HoldComplete, |
| 1055 | NI_AI_ExternalMUXClock, |
| 1056 | NI_AI_STOP, /* pulse signal that occurs when a update is finished(?) */ |
| 1057 | NI_AO_SampleClock, |
| 1058 | NI_AO_SampleClockTimebase, |
| 1059 | NI_AO_StartTrigger, |
| 1060 | NI_AO_PauseTrigger, |
| 1061 | NI_DI_SampleClock, |
| 1062 | NI_DI_SampleClockTimebase, |
| 1063 | NI_DI_StartTrigger, |
| 1064 | NI_DI_ReferenceTrigger, |
| 1065 | NI_DI_PauseTrigger, |
| 1066 | NI_DI_InputBufferFull, |
| 1067 | NI_DI_ReadyForStartEvent, |
| 1068 | NI_DI_ReadyForTransferEventBurst, |
| 1069 | NI_DI_ReadyForTransferEventPipelined, |
| 1070 | NI_DO_SampleClock, |
| 1071 | NI_DO_SampleClockTimebase, |
| 1072 | NI_DO_StartTrigger, |
| 1073 | NI_DO_PauseTrigger, |
| 1074 | NI_DO_OutputBufferFull, |
| 1075 | NI_DO_DataActiveEvent, |
| 1076 | NI_DO_ReadyForStartEvent, |
| 1077 | NI_DO_ReadyForTransferEvent, |
| 1078 | NI_MasterTimebase, |
| 1079 | NI_20MHzTimebase, |
| 1080 | NI_80MHzTimebase, |
| 1081 | NI_100MHzTimebase, |
| 1082 | NI_200MHzTimebase, |
| 1083 | NI_100kHzTimebase, |
| 1084 | NI_10MHzRefClock, |
| 1085 | NI_FrequencyOutput, |
| 1086 | NI_ChangeDetectionEvent, |
| 1087 | NI_AnalogComparisonEvent, |
| 1088 | NI_WatchdogExpiredEvent, |
| 1089 | NI_WatchdogExpirationTrigger, |
| 1090 | NI_SCXI_Trig1, |
| 1091 | NI_LogicLow, |
| 1092 | NI_LogicHigh, |
| 1093 | NI_ExternalStrobe, |
| 1094 | NI_PFI_DO, |
| 1095 | NI_CaseGround, |
| 1096 | /* special internal signal used as variable source for RTSI bus: */ |
| 1097 | NI_RGOUT0, |
| 1098 | |
| 1099 | /* just a name to make the next more convenient, regardless of above */ |
| 1100 | _NI_NAMES_MAX_PLUS_1, |
| 1101 | NI_NUM_NAMES = _NI_NAMES_MAX_PLUS_1 - NI_NAMES_BASE, |
| 1102 | }; |
| 1103 | |
| 1104 | /* *** END GLOBALLY-NAMED NI TERMINALS/SIGNALS *** */ |
| 1105 | |
H Hartley Sweeten | 40af57a | 2014-07-18 14:28:13 -0700 | [diff] [blame] | 1106 | #define NI_USUAL_PFI_SELECT(x) (((x) < 10) ? (0x1 + (x)) : (0xb + (x))) |
| 1107 | #define NI_USUAL_RTSI_SELECT(x) (((x) < 7) ? (0xb + (x)) : 0x1b) |
Ralf Thielow | f80d1d2 | 2011-05-28 01:37:03 +0200 | [diff] [blame] | 1108 | |
Daniel H. Hemmingsen | af904c4 | 2015-11-12 17:03:18 +0100 | [diff] [blame] | 1109 | /* |
| 1110 | * mode bits for NI general-purpose counters, set with |
| 1111 | * INSN_CONFIG_SET_COUNTER_MODE |
| 1112 | */ |
David Schleef | ed9eccb | 2008-11-04 20:29:31 -0800 | [diff] [blame] | 1113 | #define NI_GPCT_COUNTING_MODE_SHIFT 16 |
| 1114 | #define NI_GPCT_INDEX_PHASE_BITSHIFT 20 |
| 1115 | #define NI_GPCT_COUNTING_DIRECTION_SHIFT 24 |
H Hartley Sweeten | 25b73c7 | 2012-09-18 11:40:15 -0700 | [diff] [blame] | 1116 | enum ni_gpct_mode_bits { |
| 1117 | NI_GPCT_GATE_ON_BOTH_EDGES_BIT = 0x4, |
| 1118 | NI_GPCT_EDGE_GATE_MODE_MASK = 0x18, |
| 1119 | NI_GPCT_EDGE_GATE_STARTS_STOPS_BITS = 0x0, |
| 1120 | NI_GPCT_EDGE_GATE_STOPS_STARTS_BITS = 0x8, |
| 1121 | NI_GPCT_EDGE_GATE_STARTS_BITS = 0x10, |
| 1122 | NI_GPCT_EDGE_GATE_NO_STARTS_NO_STOPS_BITS = 0x18, |
| 1123 | NI_GPCT_STOP_MODE_MASK = 0x60, |
| 1124 | NI_GPCT_STOP_ON_GATE_BITS = 0x00, |
| 1125 | NI_GPCT_STOP_ON_GATE_OR_TC_BITS = 0x20, |
| 1126 | NI_GPCT_STOP_ON_GATE_OR_SECOND_TC_BITS = 0x40, |
| 1127 | NI_GPCT_LOAD_B_SELECT_BIT = 0x80, |
| 1128 | NI_GPCT_OUTPUT_MODE_MASK = 0x300, |
| 1129 | NI_GPCT_OUTPUT_TC_PULSE_BITS = 0x100, |
| 1130 | NI_GPCT_OUTPUT_TC_TOGGLE_BITS = 0x200, |
| 1131 | NI_GPCT_OUTPUT_TC_OR_GATE_TOGGLE_BITS = 0x300, |
| 1132 | NI_GPCT_HARDWARE_DISARM_MASK = 0xc00, |
| 1133 | NI_GPCT_NO_HARDWARE_DISARM_BITS = 0x000, |
| 1134 | NI_GPCT_DISARM_AT_TC_BITS = 0x400, |
| 1135 | NI_GPCT_DISARM_AT_GATE_BITS = 0x800, |
| 1136 | NI_GPCT_DISARM_AT_TC_OR_GATE_BITS = 0xc00, |
| 1137 | NI_GPCT_LOADING_ON_TC_BIT = 0x1000, |
| 1138 | NI_GPCT_LOADING_ON_GATE_BIT = 0x4000, |
| 1139 | NI_GPCT_COUNTING_MODE_MASK = 0x7 << NI_GPCT_COUNTING_MODE_SHIFT, |
| 1140 | NI_GPCT_COUNTING_MODE_NORMAL_BITS = |
| 1141 | 0x0 << NI_GPCT_COUNTING_MODE_SHIFT, |
| 1142 | NI_GPCT_COUNTING_MODE_QUADRATURE_X1_BITS = |
| 1143 | 0x1 << NI_GPCT_COUNTING_MODE_SHIFT, |
| 1144 | NI_GPCT_COUNTING_MODE_QUADRATURE_X2_BITS = |
| 1145 | 0x2 << NI_GPCT_COUNTING_MODE_SHIFT, |
| 1146 | NI_GPCT_COUNTING_MODE_QUADRATURE_X4_BITS = |
| 1147 | 0x3 << NI_GPCT_COUNTING_MODE_SHIFT, |
| 1148 | NI_GPCT_COUNTING_MODE_TWO_PULSE_BITS = |
| 1149 | 0x4 << NI_GPCT_COUNTING_MODE_SHIFT, |
| 1150 | NI_GPCT_COUNTING_MODE_SYNC_SOURCE_BITS = |
| 1151 | 0x6 << NI_GPCT_COUNTING_MODE_SHIFT, |
| 1152 | NI_GPCT_INDEX_PHASE_MASK = 0x3 << NI_GPCT_INDEX_PHASE_BITSHIFT, |
| 1153 | NI_GPCT_INDEX_PHASE_LOW_A_LOW_B_BITS = |
| 1154 | 0x0 << NI_GPCT_INDEX_PHASE_BITSHIFT, |
| 1155 | NI_GPCT_INDEX_PHASE_LOW_A_HIGH_B_BITS = |
| 1156 | 0x1 << NI_GPCT_INDEX_PHASE_BITSHIFT, |
| 1157 | NI_GPCT_INDEX_PHASE_HIGH_A_LOW_B_BITS = |
| 1158 | 0x2 << NI_GPCT_INDEX_PHASE_BITSHIFT, |
| 1159 | NI_GPCT_INDEX_PHASE_HIGH_A_HIGH_B_BITS = |
| 1160 | 0x3 << NI_GPCT_INDEX_PHASE_BITSHIFT, |
| 1161 | NI_GPCT_INDEX_ENABLE_BIT = 0x400000, |
| 1162 | NI_GPCT_COUNTING_DIRECTION_MASK = |
| 1163 | 0x3 << NI_GPCT_COUNTING_DIRECTION_SHIFT, |
| 1164 | NI_GPCT_COUNTING_DIRECTION_DOWN_BITS = |
| 1165 | 0x00 << NI_GPCT_COUNTING_DIRECTION_SHIFT, |
| 1166 | NI_GPCT_COUNTING_DIRECTION_UP_BITS = |
| 1167 | 0x1 << NI_GPCT_COUNTING_DIRECTION_SHIFT, |
| 1168 | NI_GPCT_COUNTING_DIRECTION_HW_UP_DOWN_BITS = |
| 1169 | 0x2 << NI_GPCT_COUNTING_DIRECTION_SHIFT, |
| 1170 | NI_GPCT_COUNTING_DIRECTION_HW_GATE_BITS = |
| 1171 | 0x3 << NI_GPCT_COUNTING_DIRECTION_SHIFT, |
| 1172 | NI_GPCT_RELOAD_SOURCE_MASK = 0xc000000, |
| 1173 | NI_GPCT_RELOAD_SOURCE_FIXED_BITS = 0x0, |
| 1174 | NI_GPCT_RELOAD_SOURCE_SWITCHING_BITS = 0x4000000, |
| 1175 | NI_GPCT_RELOAD_SOURCE_GATE_SELECT_BITS = 0x8000000, |
| 1176 | NI_GPCT_OR_GATE_BIT = 0x10000000, |
| 1177 | NI_GPCT_INVERT_OUTPUT_BIT = 0x20000000 |
| 1178 | }; |
David Schleef | ed9eccb | 2008-11-04 20:29:31 -0800 | [diff] [blame] | 1179 | |
Daniel H. Hemmingsen | af904c4 | 2015-11-12 17:03:18 +0100 | [diff] [blame] | 1180 | /* |
| 1181 | * Bits for setting a clock source with |
| 1182 | * INSN_CONFIG_SET_CLOCK_SRC when using NI general-purpose counters. |
| 1183 | */ |
H Hartley Sweeten | 25b73c7 | 2012-09-18 11:40:15 -0700 | [diff] [blame] | 1184 | enum ni_gpct_clock_source_bits { |
| 1185 | NI_GPCT_CLOCK_SRC_SELECT_MASK = 0x3f, |
| 1186 | NI_GPCT_TIMEBASE_1_CLOCK_SRC_BITS = 0x0, |
| 1187 | NI_GPCT_TIMEBASE_2_CLOCK_SRC_BITS = 0x1, |
| 1188 | NI_GPCT_TIMEBASE_3_CLOCK_SRC_BITS = 0x2, |
| 1189 | NI_GPCT_LOGIC_LOW_CLOCK_SRC_BITS = 0x3, |
| 1190 | NI_GPCT_NEXT_GATE_CLOCK_SRC_BITS = 0x4, |
| 1191 | NI_GPCT_NEXT_TC_CLOCK_SRC_BITS = 0x5, |
| 1192 | /* NI 660x-specific */ |
| 1193 | NI_GPCT_SOURCE_PIN_i_CLOCK_SRC_BITS = 0x6, |
| 1194 | NI_GPCT_PXI10_CLOCK_SRC_BITS = 0x7, |
| 1195 | NI_GPCT_PXI_STAR_TRIGGER_CLOCK_SRC_BITS = 0x8, |
| 1196 | NI_GPCT_ANALOG_TRIGGER_OUT_CLOCK_SRC_BITS = 0x9, |
| 1197 | NI_GPCT_PRESCALE_MODE_CLOCK_SRC_MASK = 0x30000000, |
| 1198 | NI_GPCT_NO_PRESCALE_CLOCK_SRC_BITS = 0x0, |
| 1199 | /* divide source by 2 */ |
| 1200 | NI_GPCT_PRESCALE_X2_CLOCK_SRC_BITS = 0x10000000, |
| 1201 | /* divide source by 8 */ |
| 1202 | NI_GPCT_PRESCALE_X8_CLOCK_SRC_BITS = 0x20000000, |
| 1203 | NI_GPCT_INVERT_CLOCK_SRC_BIT = 0x80000000 |
| 1204 | }; |
H Hartley Sweeten | 40af57a | 2014-07-18 14:28:13 -0700 | [diff] [blame] | 1205 | |
| 1206 | /* NI 660x-specific */ |
| 1207 | #define NI_GPCT_SOURCE_PIN_CLOCK_SRC_BITS(x) (0x10 + (x)) |
| 1208 | |
| 1209 | #define NI_GPCT_RTSI_CLOCK_SRC_BITS(x) (0x18 + (x)) |
| 1210 | |
| 1211 | /* no pfi on NI 660x */ |
| 1212 | #define NI_GPCT_PFI_CLOCK_SRC_BITS(x) (0x20 + (x)) |
David Schleef | ed9eccb | 2008-11-04 20:29:31 -0800 | [diff] [blame] | 1213 | |
Daniel H. Hemmingsen | af904c4 | 2015-11-12 17:03:18 +0100 | [diff] [blame] | 1214 | /* |
| 1215 | * Possibilities for setting a gate source with |
| 1216 | * INSN_CONFIG_SET_GATE_SRC when using NI general-purpose counters. |
| 1217 | * May be bitwise-or'd with CR_EDGE or CR_INVERT. |
| 1218 | */ |
H Hartley Sweeten | 25b73c7 | 2012-09-18 11:40:15 -0700 | [diff] [blame] | 1219 | enum ni_gpct_gate_select { |
| 1220 | /* m-series gates */ |
| 1221 | NI_GPCT_TIMESTAMP_MUX_GATE_SELECT = 0x0, |
| 1222 | NI_GPCT_AI_START2_GATE_SELECT = 0x12, |
| 1223 | NI_GPCT_PXI_STAR_TRIGGER_GATE_SELECT = 0x13, |
| 1224 | NI_GPCT_NEXT_OUT_GATE_SELECT = 0x14, |
| 1225 | NI_GPCT_AI_START1_GATE_SELECT = 0x1c, |
| 1226 | NI_GPCT_NEXT_SOURCE_GATE_SELECT = 0x1d, |
| 1227 | NI_GPCT_ANALOG_TRIGGER_OUT_GATE_SELECT = 0x1e, |
| 1228 | NI_GPCT_LOGIC_LOW_GATE_SELECT = 0x1f, |
| 1229 | /* more gates for 660x */ |
| 1230 | NI_GPCT_SOURCE_PIN_i_GATE_SELECT = 0x100, |
| 1231 | NI_GPCT_GATE_PIN_i_GATE_SELECT = 0x101, |
| 1232 | /* more gates for 660x "second gate" */ |
| 1233 | NI_GPCT_UP_DOWN_PIN_i_GATE_SELECT = 0x201, |
| 1234 | NI_GPCT_SELECTED_GATE_GATE_SELECT = 0x21e, |
Daniel H. Hemmingsen | af904c4 | 2015-11-12 17:03:18 +0100 | [diff] [blame] | 1235 | /* |
| 1236 | * m-series "second gate" sources are unknown, |
H Hartley Sweeten | 25b73c7 | 2012-09-18 11:40:15 -0700 | [diff] [blame] | 1237 | * we should add them here with an offset of 0x300 when |
Daniel H. Hemmingsen | af904c4 | 2015-11-12 17:03:18 +0100 | [diff] [blame] | 1238 | * known. |
| 1239 | */ |
H Hartley Sweeten | 25b73c7 | 2012-09-18 11:40:15 -0700 | [diff] [blame] | 1240 | NI_GPCT_DISABLED_GATE_SELECT = 0x8000, |
| 1241 | }; |
H Hartley Sweeten | 40af57a | 2014-07-18 14:28:13 -0700 | [diff] [blame] | 1242 | |
| 1243 | #define NI_GPCT_GATE_PIN_GATE_SELECT(x) (0x102 + (x)) |
| 1244 | #define NI_GPCT_RTSI_GATE_SELECT(x) NI_USUAL_RTSI_SELECT(x) |
| 1245 | #define NI_GPCT_PFI_GATE_SELECT(x) NI_USUAL_PFI_SELECT(x) |
| 1246 | #define NI_GPCT_UP_DOWN_PIN_GATE_SELECT(x) (0x202 + (x)) |
David Schleef | ed9eccb | 2008-11-04 20:29:31 -0800 | [diff] [blame] | 1247 | |
Daniel H. Hemmingsen | af904c4 | 2015-11-12 17:03:18 +0100 | [diff] [blame] | 1248 | /* |
| 1249 | * Possibilities for setting a source with |
| 1250 | * INSN_CONFIG_SET_OTHER_SRC when using NI general-purpose counters. |
| 1251 | */ |
H Hartley Sweeten | 25b73c7 | 2012-09-18 11:40:15 -0700 | [diff] [blame] | 1252 | enum ni_gpct_other_index { |
| 1253 | NI_GPCT_SOURCE_ENCODER_A, |
| 1254 | NI_GPCT_SOURCE_ENCODER_B, |
| 1255 | NI_GPCT_SOURCE_ENCODER_Z |
| 1256 | }; |
H Hartley Sweeten | 40af57a | 2014-07-18 14:28:13 -0700 | [diff] [blame] | 1257 | |
H Hartley Sweeten | 25b73c7 | 2012-09-18 11:40:15 -0700 | [diff] [blame] | 1258 | enum ni_gpct_other_select { |
| 1259 | /* m-series gates */ |
| 1260 | /* Still unknown, probably only need NI_GPCT_PFI_OTHER_SELECT */ |
| 1261 | NI_GPCT_DISABLED_OTHER_SELECT = 0x8000, |
| 1262 | }; |
H Hartley Sweeten | 40af57a | 2014-07-18 14:28:13 -0700 | [diff] [blame] | 1263 | |
| 1264 | #define NI_GPCT_PFI_OTHER_SELECT(x) NI_USUAL_PFI_SELECT(x) |
David Schleef | ed9eccb | 2008-11-04 20:29:31 -0800 | [diff] [blame] | 1265 | |
Daniel H. Hemmingsen | af904c4 | 2015-11-12 17:03:18 +0100 | [diff] [blame] | 1266 | /* |
| 1267 | * start sources for ni general-purpose counters for use with |
| 1268 | * INSN_CONFIG_ARM |
| 1269 | */ |
H Hartley Sweeten | 25b73c7 | 2012-09-18 11:40:15 -0700 | [diff] [blame] | 1270 | enum ni_gpct_arm_source { |
| 1271 | NI_GPCT_ARM_IMMEDIATE = 0x0, |
Daniel H. Hemmingsen | af904c4 | 2015-11-12 17:03:18 +0100 | [diff] [blame] | 1272 | /* |
Spencer E. Olson | 5c53440 | 2016-10-08 15:37:29 -0600 | [diff] [blame] | 1273 | * Start both the counter and the adjacent paired counter simultaneously |
Daniel H. Hemmingsen | af904c4 | 2015-11-12 17:03:18 +0100 | [diff] [blame] | 1274 | */ |
| 1275 | NI_GPCT_ARM_PAIRED_IMMEDIATE = 0x1, |
| 1276 | /* |
Spencer E. Olson | 5c53440 | 2016-10-08 15:37:29 -0600 | [diff] [blame] | 1277 | * If the NI_GPCT_HW_ARM bit is set, we will pass the least significant |
| 1278 | * bits (3 bits for 660x or 5 bits for m-series) through to the |
| 1279 | * hardware. To select a hardware trigger, pass the appropriate select |
| 1280 | * bit, e.g., |
| 1281 | * NI_GPCT_HW_ARM | NI_GPCT_AI_START1_GATE_SELECT or |
| 1282 | * NI_GPCT_HW_ARM | NI_GPCT_PFI_GATE_SELECT(pfi_number) |
Daniel H. Hemmingsen | af904c4 | 2015-11-12 17:03:18 +0100 | [diff] [blame] | 1283 | */ |
Spencer E. Olson | 5c53440 | 2016-10-08 15:37:29 -0600 | [diff] [blame] | 1284 | NI_GPCT_HW_ARM = 0x1000, |
| 1285 | NI_GPCT_ARM_UNKNOWN = NI_GPCT_HW_ARM, /* for backward compatibility */ |
H Hartley Sweeten | 25b73c7 | 2012-09-18 11:40:15 -0700 | [diff] [blame] | 1286 | }; |
David Schleef | ed9eccb | 2008-11-04 20:29:31 -0800 | [diff] [blame] | 1287 | |
| 1288 | /* digital filtering options for ni 660x for use with INSN_CONFIG_FILTER. */ |
H Hartley Sweeten | 25b73c7 | 2012-09-18 11:40:15 -0700 | [diff] [blame] | 1289 | enum ni_gpct_filter_select { |
| 1290 | NI_GPCT_FILTER_OFF = 0x0, |
| 1291 | NI_GPCT_FILTER_TIMEBASE_3_SYNC = 0x1, |
| 1292 | NI_GPCT_FILTER_100x_TIMEBASE_1 = 0x2, |
| 1293 | NI_GPCT_FILTER_20x_TIMEBASE_1 = 0x3, |
| 1294 | NI_GPCT_FILTER_10x_TIMEBASE_1 = 0x4, |
| 1295 | NI_GPCT_FILTER_2x_TIMEBASE_1 = 0x5, |
| 1296 | NI_GPCT_FILTER_2x_TIMEBASE_3 = 0x6 |
| 1297 | }; |
David Schleef | ed9eccb | 2008-11-04 20:29:31 -0800 | [diff] [blame] | 1298 | |
Daniel H. Hemmingsen | af904c4 | 2015-11-12 17:03:18 +0100 | [diff] [blame] | 1299 | /* |
| 1300 | * PFI digital filtering options for ni m-series for use with |
| 1301 | * INSN_CONFIG_FILTER. |
| 1302 | */ |
H Hartley Sweeten | 25b73c7 | 2012-09-18 11:40:15 -0700 | [diff] [blame] | 1303 | enum ni_pfi_filter_select { |
| 1304 | NI_PFI_FILTER_OFF = 0x0, |
| 1305 | NI_PFI_FILTER_125ns = 0x1, |
| 1306 | NI_PFI_FILTER_6425ns = 0x2, |
| 1307 | NI_PFI_FILTER_2550us = 0x3 |
| 1308 | }; |
David Schleef | ed9eccb | 2008-11-04 20:29:31 -0800 | [diff] [blame] | 1309 | |
| 1310 | /* master clock sources for ni mio boards and INSN_CONFIG_SET_CLOCK_SRC */ |
H Hartley Sweeten | 25b73c7 | 2012-09-18 11:40:15 -0700 | [diff] [blame] | 1311 | enum ni_mio_clock_source { |
| 1312 | NI_MIO_INTERNAL_CLOCK = 0, |
Daniel H. Hemmingsen | af904c4 | 2015-11-12 17:03:18 +0100 | [diff] [blame] | 1313 | /* |
| 1314 | * Doesn't work for m-series, use NI_MIO_PLL_RTSI_CLOCK() |
| 1315 | * the NI_MIO_PLL_* sources are m-series only |
| 1316 | */ |
| 1317 | NI_MIO_RTSI_CLOCK = 1, |
H Hartley Sweeten | 25b73c7 | 2012-09-18 11:40:15 -0700 | [diff] [blame] | 1318 | NI_MIO_PLL_PXI_STAR_TRIGGER_CLOCK = 2, |
| 1319 | NI_MIO_PLL_PXI10_CLOCK = 3, |
| 1320 | NI_MIO_PLL_RTSI0_CLOCK = 4 |
| 1321 | }; |
H Hartley Sweeten | 40af57a | 2014-07-18 14:28:13 -0700 | [diff] [blame] | 1322 | |
| 1323 | #define NI_MIO_PLL_RTSI_CLOCK(x) (NI_MIO_PLL_RTSI0_CLOCK + (x)) |
David Schleef | ed9eccb | 2008-11-04 20:29:31 -0800 | [diff] [blame] | 1324 | |
Daniel H. Hemmingsen | af904c4 | 2015-11-12 17:03:18 +0100 | [diff] [blame] | 1325 | /* |
| 1326 | * Signals which can be routed to an NI RTSI pin with INSN_CONFIG_SET_ROUTING. |
| 1327 | * The numbers assigned are not arbitrary, they correspond to the bits required |
| 1328 | * to program the board. |
| 1329 | */ |
H Hartley Sweeten | 25b73c7 | 2012-09-18 11:40:15 -0700 | [diff] [blame] | 1330 | enum ni_rtsi_routing { |
| 1331 | NI_RTSI_OUTPUT_ADR_START1 = 0, |
| 1332 | NI_RTSI_OUTPUT_ADR_START2 = 1, |
| 1333 | NI_RTSI_OUTPUT_SCLKG = 2, |
| 1334 | NI_RTSI_OUTPUT_DACUPDN = 3, |
| 1335 | NI_RTSI_OUTPUT_DA_START1 = 4, |
| 1336 | NI_RTSI_OUTPUT_G_SRC0 = 5, |
| 1337 | NI_RTSI_OUTPUT_G_GATE0 = 6, |
| 1338 | NI_RTSI_OUTPUT_RGOUT0 = 7, |
| 1339 | NI_RTSI_OUTPUT_RTSI_BRD_0 = 8, |
Daniel H. Hemmingsen | af904c4 | 2015-11-12 17:03:18 +0100 | [diff] [blame] | 1340 | /* Pre-m-series always have RTSI clock on line 7 */ |
| 1341 | NI_RTSI_OUTPUT_RTSI_OSC = 12 |
H Hartley Sweeten | 25b73c7 | 2012-09-18 11:40:15 -0700 | [diff] [blame] | 1342 | }; |
H Hartley Sweeten | 40af57a | 2014-07-18 14:28:13 -0700 | [diff] [blame] | 1343 | |
| 1344 | #define NI_RTSI_OUTPUT_RTSI_BRD(x) (NI_RTSI_OUTPUT_RTSI_BRD_0 + (x)) |
David Schleef | ed9eccb | 2008-11-04 20:29:31 -0800 | [diff] [blame] | 1345 | |
Daniel H. Hemmingsen | af904c4 | 2015-11-12 17:03:18 +0100 | [diff] [blame] | 1346 | /* |
| 1347 | * Signals which can be routed to an NI PFI pin on an m-series board with |
Greg Kroah-Hartman | e0dcef7 | 2008-11-13 16:36:22 -0800 | [diff] [blame] | 1348 | * INSN_CONFIG_SET_ROUTING. These numbers are also returned by |
| 1349 | * INSN_CONFIG_GET_ROUTING on pre-m-series boards, even though their routing |
| 1350 | * cannot be changed. The numbers assigned are not arbitrary, they correspond |
Daniel H. Hemmingsen | af904c4 | 2015-11-12 17:03:18 +0100 | [diff] [blame] | 1351 | * to the bits required to program the board. |
| 1352 | */ |
H Hartley Sweeten | 25b73c7 | 2012-09-18 11:40:15 -0700 | [diff] [blame] | 1353 | enum ni_pfi_routing { |
| 1354 | NI_PFI_OUTPUT_PFI_DEFAULT = 0, |
| 1355 | NI_PFI_OUTPUT_AI_START1 = 1, |
| 1356 | NI_PFI_OUTPUT_AI_START2 = 2, |
| 1357 | NI_PFI_OUTPUT_AI_CONVERT = 3, |
| 1358 | NI_PFI_OUTPUT_G_SRC1 = 4, |
| 1359 | NI_PFI_OUTPUT_G_GATE1 = 5, |
| 1360 | NI_PFI_OUTPUT_AO_UPDATE_N = 6, |
| 1361 | NI_PFI_OUTPUT_AO_START1 = 7, |
| 1362 | NI_PFI_OUTPUT_AI_START_PULSE = 8, |
| 1363 | NI_PFI_OUTPUT_G_SRC0 = 9, |
| 1364 | NI_PFI_OUTPUT_G_GATE0 = 10, |
| 1365 | NI_PFI_OUTPUT_EXT_STROBE = 11, |
| 1366 | NI_PFI_OUTPUT_AI_EXT_MUX_CLK = 12, |
| 1367 | NI_PFI_OUTPUT_GOUT0 = 13, |
| 1368 | NI_PFI_OUTPUT_GOUT1 = 14, |
| 1369 | NI_PFI_OUTPUT_FREQ_OUT = 15, |
| 1370 | NI_PFI_OUTPUT_PFI_DO = 16, |
| 1371 | NI_PFI_OUTPUT_I_ATRIG = 17, |
| 1372 | NI_PFI_OUTPUT_RTSI0 = 18, |
| 1373 | NI_PFI_OUTPUT_PXI_STAR_TRIGGER_IN = 26, |
| 1374 | NI_PFI_OUTPUT_SCXI_TRIG1 = 27, |
| 1375 | NI_PFI_OUTPUT_DIO_CHANGE_DETECT_RTSI = 28, |
| 1376 | NI_PFI_OUTPUT_CDI_SAMPLE = 29, |
| 1377 | NI_PFI_OUTPUT_CDO_UPDATE = 30 |
| 1378 | }; |
H Hartley Sweeten | 40af57a | 2014-07-18 14:28:13 -0700 | [diff] [blame] | 1379 | |
| 1380 | #define NI_PFI_OUTPUT_RTSI(x) (NI_PFI_OUTPUT_RTSI0 + (x)) |
David Schleef | ed9eccb | 2008-11-04 20:29:31 -0800 | [diff] [blame] | 1381 | |
Daniel H. Hemmingsen | af904c4 | 2015-11-12 17:03:18 +0100 | [diff] [blame] | 1382 | /* |
| 1383 | * Signals which can be routed to output on a NI PFI pin on a 660x board |
| 1384 | * with INSN_CONFIG_SET_ROUTING. The numbers assigned are |
| 1385 | * not arbitrary, they correspond to the bits required |
| 1386 | * to program the board. Lines 0 to 7 can only be set to |
| 1387 | * NI_660X_PFI_OUTPUT_DIO. Lines 32 to 39 can only be set to |
| 1388 | * NI_660X_PFI_OUTPUT_COUNTER. |
| 1389 | */ |
H Hartley Sweeten | 25b73c7 | 2012-09-18 11:40:15 -0700 | [diff] [blame] | 1390 | enum ni_660x_pfi_routing { |
| 1391 | NI_660X_PFI_OUTPUT_COUNTER = 1, /* counter */ |
| 1392 | NI_660X_PFI_OUTPUT_DIO = 2, /* static digital output */ |
| 1393 | }; |
David Schleef | ed9eccb | 2008-11-04 20:29:31 -0800 | [diff] [blame] | 1394 | |
Daniel H. Hemmingsen | af904c4 | 2015-11-12 17:03:18 +0100 | [diff] [blame] | 1395 | /* |
| 1396 | * NI External Trigger lines. These values are not arbitrary, but are related |
Greg Kroah-Hartman | e0dcef7 | 2008-11-13 16:36:22 -0800 | [diff] [blame] | 1397 | * to the bits required to program the board (offset by 1 for historical |
Daniel H. Hemmingsen | af904c4 | 2015-11-12 17:03:18 +0100 | [diff] [blame] | 1398 | * reasons). |
| 1399 | */ |
H Hartley Sweeten | 40af57a | 2014-07-18 14:28:13 -0700 | [diff] [blame] | 1400 | #define NI_EXT_PFI(x) (NI_USUAL_PFI_SELECT(x) - 1) |
| 1401 | #define NI_EXT_RTSI(x) (NI_USUAL_RTSI_SELECT(x) - 1) |
David Schleef | ed9eccb | 2008-11-04 20:29:31 -0800 | [diff] [blame] | 1402 | |
Daniel H. Hemmingsen | af904c4 | 2015-11-12 17:03:18 +0100 | [diff] [blame] | 1403 | /* |
| 1404 | * Clock sources for CDIO subdevice on NI m-series boards. Used as the |
Greg Kroah-Hartman | e0dcef7 | 2008-11-13 16:36:22 -0800 | [diff] [blame] | 1405 | * scan_begin_arg for a comedi_command. These sources may also be bitwise-or'd |
Daniel H. Hemmingsen | af904c4 | 2015-11-12 17:03:18 +0100 | [diff] [blame] | 1406 | * with CR_INVERT to change polarity. |
| 1407 | */ |
H Hartley Sweeten | 25b73c7 | 2012-09-18 11:40:15 -0700 | [diff] [blame] | 1408 | enum ni_m_series_cdio_scan_begin_src { |
| 1409 | NI_CDIO_SCAN_BEGIN_SRC_GROUND = 0, |
| 1410 | NI_CDIO_SCAN_BEGIN_SRC_AI_START = 18, |
| 1411 | NI_CDIO_SCAN_BEGIN_SRC_AI_CONVERT = 19, |
| 1412 | NI_CDIO_SCAN_BEGIN_SRC_PXI_STAR_TRIGGER = 20, |
| 1413 | NI_CDIO_SCAN_BEGIN_SRC_G0_OUT = 28, |
| 1414 | NI_CDIO_SCAN_BEGIN_SRC_G1_OUT = 29, |
| 1415 | NI_CDIO_SCAN_BEGIN_SRC_ANALOG_TRIGGER = 30, |
| 1416 | NI_CDIO_SCAN_BEGIN_SRC_AO_UPDATE = 31, |
| 1417 | NI_CDIO_SCAN_BEGIN_SRC_FREQ_OUT = 32, |
| 1418 | NI_CDIO_SCAN_BEGIN_SRC_DIO_CHANGE_DETECT_IRQ = 33 |
| 1419 | }; |
H Hartley Sweeten | 40af57a | 2014-07-18 14:28:13 -0700 | [diff] [blame] | 1420 | |
| 1421 | #define NI_CDIO_SCAN_BEGIN_SRC_PFI(x) NI_USUAL_PFI_SELECT(x) |
| 1422 | #define NI_CDIO_SCAN_BEGIN_SRC_RTSI(x) NI_USUAL_RTSI_SELECT(x) |
David Schleef | ed9eccb | 2008-11-04 20:29:31 -0800 | [diff] [blame] | 1423 | |
Daniel H. Hemmingsen | af904c4 | 2015-11-12 17:03:18 +0100 | [diff] [blame] | 1424 | /* |
| 1425 | * scan_begin_src for scan_begin_arg==TRIG_EXT with analog output command on NI |
Greg Kroah-Hartman | e0dcef7 | 2008-11-13 16:36:22 -0800 | [diff] [blame] | 1426 | * boards. These scan begin sources can also be bitwise-or'd with CR_INVERT to |
Daniel H. Hemmingsen | af904c4 | 2015-11-12 17:03:18 +0100 | [diff] [blame] | 1427 | * change polarity. |
| 1428 | */ |
H Hartley Sweeten | 40af57a | 2014-07-18 14:28:13 -0700 | [diff] [blame] | 1429 | #define NI_AO_SCAN_BEGIN_SRC_PFI(x) NI_USUAL_PFI_SELECT(x) |
| 1430 | #define NI_AO_SCAN_BEGIN_SRC_RTSI(x) NI_USUAL_RTSI_SELECT(x) |
David Schleef | ed9eccb | 2008-11-04 20:29:31 -0800 | [diff] [blame] | 1431 | |
Daniel H. Hemmingsen | af904c4 | 2015-11-12 17:03:18 +0100 | [diff] [blame] | 1432 | /* |
| 1433 | * Bits for setting a clock source with |
| 1434 | * INSN_CONFIG_SET_CLOCK_SRC when using NI frequency output subdevice. |
| 1435 | */ |
H Hartley Sweeten | 25b73c7 | 2012-09-18 11:40:15 -0700 | [diff] [blame] | 1436 | enum ni_freq_out_clock_source_bits { |
| 1437 | NI_FREQ_OUT_TIMEBASE_1_DIV_2_CLOCK_SRC, /* 10 MHz */ |
| 1438 | NI_FREQ_OUT_TIMEBASE_2_CLOCK_SRC /* 100 KHz */ |
| 1439 | }; |
David Schleef | ed9eccb | 2008-11-04 20:29:31 -0800 | [diff] [blame] | 1440 | |
Daniel H. Hemmingsen | af904c4 | 2015-11-12 17:03:18 +0100 | [diff] [blame] | 1441 | /* |
| 1442 | * Values for setting a clock source with INSN_CONFIG_SET_CLOCK_SRC for |
| 1443 | * 8254 counter subdevices on Amplicon DIO boards (amplc_dio200 driver). |
| 1444 | */ |
H Hartley Sweeten | 25b73c7 | 2012-09-18 11:40:15 -0700 | [diff] [blame] | 1445 | enum amplc_dio_clock_source { |
Daniel H. Hemmingsen | af904c4 | 2015-11-12 17:03:18 +0100 | [diff] [blame] | 1446 | /* |
| 1447 | * Per channel external clock |
| 1448 | * input/output pin (pin is only an |
| 1449 | * input when clock source set to this value, |
| 1450 | * otherwise it is an output) |
| 1451 | */ |
| 1452 | AMPLC_DIO_CLK_CLKN, |
H Hartley Sweeten | 25b73c7 | 2012-09-18 11:40:15 -0700 | [diff] [blame] | 1453 | AMPLC_DIO_CLK_10MHZ, /* 10 MHz internal clock */ |
| 1454 | AMPLC_DIO_CLK_1MHZ, /* 1 MHz internal clock */ |
| 1455 | AMPLC_DIO_CLK_100KHZ, /* 100 kHz internal clock */ |
| 1456 | AMPLC_DIO_CLK_10KHZ, /* 10 kHz internal clock */ |
| 1457 | AMPLC_DIO_CLK_1KHZ, /* 1 kHz internal clock */ |
Daniel H. Hemmingsen | af904c4 | 2015-11-12 17:03:18 +0100 | [diff] [blame] | 1458 | /* |
| 1459 | * Output of preceding counter channel |
| 1460 | * (for channel 0, preceding counter |
| 1461 | * channel is channel 2 on preceding |
| 1462 | * counter subdevice, for first counter |
| 1463 | * subdevice, preceding counter |
| 1464 | * subdevice is the last counter |
| 1465 | * subdevice) |
| 1466 | */ |
| 1467 | AMPLC_DIO_CLK_OUTNM1, |
Ian Abbott | 025d1f6 | 2012-10-24 16:48:09 +0100 | [diff] [blame] | 1468 | AMPLC_DIO_CLK_EXT, /* per chip external input pin */ |
| 1469 | /* the following are "enhanced" clock sources for PCIe models */ |
| 1470 | AMPLC_DIO_CLK_VCC, /* clock input HIGH */ |
| 1471 | AMPLC_DIO_CLK_GND, /* clock input LOW */ |
| 1472 | AMPLC_DIO_CLK_PAT_PRESENT, /* "pattern present" signal */ |
| 1473 | AMPLC_DIO_CLK_20MHZ /* 20 MHz internal clock */ |
H Hartley Sweeten | 25b73c7 | 2012-09-18 11:40:15 -0700 | [diff] [blame] | 1474 | }; |
David Schleef | ed9eccb | 2008-11-04 20:29:31 -0800 | [diff] [blame] | 1475 | |
Daniel H. Hemmingsen | af904c4 | 2015-11-12 17:03:18 +0100 | [diff] [blame] | 1476 | /* |
| 1477 | * Values for setting a clock source with INSN_CONFIG_SET_CLOCK_SRC for |
| 1478 | * timer subdevice on some Amplicon DIO PCIe boards (amplc_dio200 driver). |
| 1479 | */ |
Ian Abbott | c59515a | 2012-10-24 16:48:12 +0100 | [diff] [blame] | 1480 | enum amplc_dio_ts_clock_src { |
| 1481 | AMPLC_DIO_TS_CLK_1GHZ, /* 1 ns period with 20 ns granularity */ |
| 1482 | AMPLC_DIO_TS_CLK_1MHZ, /* 1 us period */ |
| 1483 | AMPLC_DIO_TS_CLK_1KHZ /* 1 ms period */ |
| 1484 | }; |
| 1485 | |
Daniel H. Hemmingsen | af904c4 | 2015-11-12 17:03:18 +0100 | [diff] [blame] | 1486 | /* |
| 1487 | * Values for setting a gate source with INSN_CONFIG_SET_GATE_SRC for |
| 1488 | * 8254 counter subdevices on Amplicon DIO boards (amplc_dio200 driver). |
| 1489 | */ |
H Hartley Sweeten | 25b73c7 | 2012-09-18 11:40:15 -0700 | [diff] [blame] | 1490 | enum amplc_dio_gate_source { |
| 1491 | AMPLC_DIO_GAT_VCC, /* internal high logic level */ |
| 1492 | AMPLC_DIO_GAT_GND, /* internal low logic level */ |
| 1493 | AMPLC_DIO_GAT_GATN, /* per channel external gate input */ |
Daniel H. Hemmingsen | af904c4 | 2015-11-12 17:03:18 +0100 | [diff] [blame] | 1494 | /* |
| 1495 | * negated output of counter channel minus 2 |
| 1496 | * (for channels 0 or 1, channel minus 2 is channel 1 or 2 on |
| 1497 | * the preceding counter subdevice, for the first counter subdevice |
| 1498 | * the preceding counter subdevice is the last counter subdevice) |
| 1499 | */ |
| 1500 | AMPLC_DIO_GAT_NOUTNM2, |
H Hartley Sweeten | 25b73c7 | 2012-09-18 11:40:15 -0700 | [diff] [blame] | 1501 | AMPLC_DIO_GAT_RESERVED4, |
| 1502 | AMPLC_DIO_GAT_RESERVED5, |
| 1503 | AMPLC_DIO_GAT_RESERVED6, |
Ian Abbott | 025d1f6 | 2012-10-24 16:48:09 +0100 | [diff] [blame] | 1504 | AMPLC_DIO_GAT_RESERVED7, |
| 1505 | /* the following are "enhanced" gate sources for PCIe models */ |
| 1506 | AMPLC_DIO_GAT_NGATN = 6, /* negated per channel gate input */ |
Daniel H. Hemmingsen | af904c4 | 2015-11-12 17:03:18 +0100 | [diff] [blame] | 1507 | /* non-negated output of counter channel minus 2 */ |
| 1508 | AMPLC_DIO_GAT_OUTNM2, |
Ian Abbott | 025d1f6 | 2012-10-24 16:48:09 +0100 | [diff] [blame] | 1509 | AMPLC_DIO_GAT_PAT_PRESENT, /* "pattern present" signal */ |
| 1510 | AMPLC_DIO_GAT_PAT_OCCURRED, /* "pattern occurred" latched */ |
| 1511 | AMPLC_DIO_GAT_PAT_GONE, /* "pattern gone away" latched */ |
| 1512 | AMPLC_DIO_GAT_NPAT_PRESENT, /* negated "pattern present" */ |
| 1513 | AMPLC_DIO_GAT_NPAT_OCCURRED, /* negated "pattern occurred" */ |
| 1514 | AMPLC_DIO_GAT_NPAT_GONE /* negated "pattern gone away" */ |
H Hartley Sweeten | 25b73c7 | 2012-09-18 11:40:15 -0700 | [diff] [blame] | 1515 | }; |
David Schleef | ed9eccb | 2008-11-04 20:29:31 -0800 | [diff] [blame] | 1516 | |
H Hartley Sweeten | 5fc3918 | 2014-06-20 10:39:43 -0700 | [diff] [blame] | 1517 | /* |
| 1518 | * Values for setting a clock source with INSN_CONFIG_SET_CLOCK_SRC for |
| 1519 | * the counter subdevice on the Kolter Electronic PCI-Counter board |
| 1520 | * (ke_counter driver). |
| 1521 | */ |
| 1522 | enum ke_counter_clock_source { |
| 1523 | KE_CLK_20MHZ, /* internal 20MHz (default) */ |
| 1524 | KE_CLK_4MHZ, /* internal 4MHz (option) */ |
| 1525 | KE_CLK_EXT /* external clock on pin 21 of D-Sub */ |
| 1526 | }; |
| 1527 | |
David Schleef | ed9eccb | 2008-11-04 20:29:31 -0800 | [diff] [blame] | 1528 | #endif /* _COMEDI_H */ |