blob: 72086f0c078262d7d4bf371e2ecef6ccf4c39f66 [file] [log] [blame]
Chen-Yu Tsai9765d2d2014-08-26 11:54:55 +08001/*
2 * An RTC driver for Allwinner A31/A23
3 *
4 * Copyright (c) 2014, Chen-Yu Tsai <wens@csie.org>
5 *
6 * based on rtc-sunxi.c
7 *
8 * An RTC driver for Allwinner A10/A20
9 *
10 * Copyright (c) 2013, Carlo Caione <carlo.caione@gmail.com>
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful, but WITHOUT
18 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
19 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
20 * more details.
21 */
22
23#include <linux/delay.h>
24#include <linux/err.h>
25#include <linux/fs.h>
26#include <linux/init.h>
27#include <linux/interrupt.h>
28#include <linux/io.h>
29#include <linux/kernel.h>
30#include <linux/module.h>
31#include <linux/of.h>
32#include <linux/of_address.h>
33#include <linux/of_device.h>
34#include <linux/platform_device.h>
35#include <linux/rtc.h>
36#include <linux/types.h>
37
38/* Control register */
39#define SUN6I_LOSC_CTRL 0x0000
40#define SUN6I_LOSC_CTRL_ALM_DHMS_ACC BIT(9)
41#define SUN6I_LOSC_CTRL_RTC_HMS_ACC BIT(8)
42#define SUN6I_LOSC_CTRL_RTC_YMD_ACC BIT(7)
43#define SUN6I_LOSC_CTRL_ACC_MASK GENMASK(9, 7)
44
45/* RTC */
46#define SUN6I_RTC_YMD 0x0010
47#define SUN6I_RTC_HMS 0x0014
48
49/* Alarm 0 (counter) */
50#define SUN6I_ALRM_COUNTER 0x0020
51#define SUN6I_ALRM_CUR_VAL 0x0024
52#define SUN6I_ALRM_EN 0x0028
53#define SUN6I_ALRM_EN_CNT_EN BIT(0)
54#define SUN6I_ALRM_IRQ_EN 0x002c
55#define SUN6I_ALRM_IRQ_EN_CNT_IRQ_EN BIT(0)
56#define SUN6I_ALRM_IRQ_STA 0x0030
57#define SUN6I_ALRM_IRQ_STA_CNT_IRQ_PEND BIT(0)
58
59/* Alarm 1 (wall clock) */
60#define SUN6I_ALRM1_EN 0x0044
61#define SUN6I_ALRM1_IRQ_EN 0x0048
62#define SUN6I_ALRM1_IRQ_STA 0x004c
63#define SUN6I_ALRM1_IRQ_STA_WEEK_IRQ_PEND BIT(0)
64
65/* Alarm config */
66#define SUN6I_ALARM_CONFIG 0x0050
67#define SUN6I_ALARM_CONFIG_WAKEUP BIT(0)
68
69/*
70 * Get date values
71 */
72#define SUN6I_DATE_GET_DAY_VALUE(x) ((x) & 0x0000001f)
73#define SUN6I_DATE_GET_MON_VALUE(x) (((x) & 0x00000f00) >> 8)
74#define SUN6I_DATE_GET_YEAR_VALUE(x) (((x) & 0x003f0000) >> 16)
75#define SUN6I_LEAP_GET_VALUE(x) (((x) & 0x00400000) >> 22)
76
77/*
78 * Get time values
79 */
80#define SUN6I_TIME_GET_SEC_VALUE(x) ((x) & 0x0000003f)
81#define SUN6I_TIME_GET_MIN_VALUE(x) (((x) & 0x00003f00) >> 8)
82#define SUN6I_TIME_GET_HOUR_VALUE(x) (((x) & 0x001f0000) >> 16)
83
84/*
85 * Set date values
86 */
87#define SUN6I_DATE_SET_DAY_VALUE(x) ((x) & 0x0000001f)
88#define SUN6I_DATE_SET_MON_VALUE(x) ((x) << 8 & 0x00000f00)
89#define SUN6I_DATE_SET_YEAR_VALUE(x) ((x) << 16 & 0x003f0000)
90#define SUN6I_LEAP_SET_VALUE(x) ((x) << 22 & 0x00400000)
91
92/*
93 * Set time values
94 */
95#define SUN6I_TIME_SET_SEC_VALUE(x) ((x) & 0x0000003f)
96#define SUN6I_TIME_SET_MIN_VALUE(x) ((x) << 8 & 0x00003f00)
97#define SUN6I_TIME_SET_HOUR_VALUE(x) ((x) << 16 & 0x001f0000)
98
99/*
100 * The year parameter passed to the driver is usually an offset relative to
101 * the year 1900. This macro is used to convert this offset to another one
102 * relative to the minimum year allowed by the hardware.
103 *
104 * The year range is 1970 - 2033. This range is selected to match Allwinner's
105 * driver, even though it is somewhat limited.
106 */
107#define SUN6I_YEAR_MIN 1970
108#define SUN6I_YEAR_MAX 2033
109#define SUN6I_YEAR_OFF (SUN6I_YEAR_MIN - 1900)
110
111struct sun6i_rtc_dev {
112 struct rtc_device *rtc;
113 struct device *dev;
114 void __iomem *base;
115 int irq;
116 unsigned long alarm;
Maxime Riparda9422a12017-01-23 11:41:47 +0100117
118 spinlock_t lock;
Chen-Yu Tsai9765d2d2014-08-26 11:54:55 +0800119};
120
121static irqreturn_t sun6i_rtc_alarmirq(int irq, void *id)
122{
123 struct sun6i_rtc_dev *chip = (struct sun6i_rtc_dev *) id;
Maxime Riparda9422a12017-01-23 11:41:47 +0100124 irqreturn_t ret = IRQ_NONE;
Chen-Yu Tsai9765d2d2014-08-26 11:54:55 +0800125 u32 val;
126
Maxime Riparda9422a12017-01-23 11:41:47 +0100127 spin_lock(&chip->lock);
Chen-Yu Tsai9765d2d2014-08-26 11:54:55 +0800128 val = readl(chip->base + SUN6I_ALRM_IRQ_STA);
129
130 if (val & SUN6I_ALRM_IRQ_STA_CNT_IRQ_PEND) {
131 val |= SUN6I_ALRM_IRQ_STA_CNT_IRQ_PEND;
132 writel(val, chip->base + SUN6I_ALRM_IRQ_STA);
133
134 rtc_update_irq(chip->rtc, 1, RTC_AF | RTC_IRQF);
135
Maxime Riparda9422a12017-01-23 11:41:47 +0100136 ret = IRQ_HANDLED;
Chen-Yu Tsai9765d2d2014-08-26 11:54:55 +0800137 }
Maxime Riparda9422a12017-01-23 11:41:47 +0100138 spin_unlock(&chip->lock);
Chen-Yu Tsai9765d2d2014-08-26 11:54:55 +0800139
Maxime Riparda9422a12017-01-23 11:41:47 +0100140 return ret;
Chen-Yu Tsai9765d2d2014-08-26 11:54:55 +0800141}
142
143static void sun6i_rtc_setaie(int to, struct sun6i_rtc_dev *chip)
144{
145 u32 alrm_val = 0;
146 u32 alrm_irq_val = 0;
147 u32 alrm_wake_val = 0;
Maxime Riparda9422a12017-01-23 11:41:47 +0100148 unsigned long flags;
Chen-Yu Tsai9765d2d2014-08-26 11:54:55 +0800149
150 if (to) {
151 alrm_val = SUN6I_ALRM_EN_CNT_EN;
152 alrm_irq_val = SUN6I_ALRM_IRQ_EN_CNT_IRQ_EN;
153 alrm_wake_val = SUN6I_ALARM_CONFIG_WAKEUP;
154 } else {
155 writel(SUN6I_ALRM_IRQ_STA_CNT_IRQ_PEND,
156 chip->base + SUN6I_ALRM_IRQ_STA);
157 }
158
Maxime Riparda9422a12017-01-23 11:41:47 +0100159 spin_lock_irqsave(&chip->lock, flags);
Chen-Yu Tsai9765d2d2014-08-26 11:54:55 +0800160 writel(alrm_val, chip->base + SUN6I_ALRM_EN);
161 writel(alrm_irq_val, chip->base + SUN6I_ALRM_IRQ_EN);
162 writel(alrm_wake_val, chip->base + SUN6I_ALARM_CONFIG);
Maxime Riparda9422a12017-01-23 11:41:47 +0100163 spin_unlock_irqrestore(&chip->lock, flags);
Chen-Yu Tsai9765d2d2014-08-26 11:54:55 +0800164}
165
166static int sun6i_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm)
167{
168 struct sun6i_rtc_dev *chip = dev_get_drvdata(dev);
169 u32 date, time;
170
171 /*
172 * read again in case it changes
173 */
174 do {
175 date = readl(chip->base + SUN6I_RTC_YMD);
176 time = readl(chip->base + SUN6I_RTC_HMS);
177 } while ((date != readl(chip->base + SUN6I_RTC_YMD)) ||
178 (time != readl(chip->base + SUN6I_RTC_HMS)));
179
180 rtc_tm->tm_sec = SUN6I_TIME_GET_SEC_VALUE(time);
181 rtc_tm->tm_min = SUN6I_TIME_GET_MIN_VALUE(time);
182 rtc_tm->tm_hour = SUN6I_TIME_GET_HOUR_VALUE(time);
183
184 rtc_tm->tm_mday = SUN6I_DATE_GET_DAY_VALUE(date);
185 rtc_tm->tm_mon = SUN6I_DATE_GET_MON_VALUE(date);
186 rtc_tm->tm_year = SUN6I_DATE_GET_YEAR_VALUE(date);
187
188 rtc_tm->tm_mon -= 1;
189
190 /*
191 * switch from (data_year->min)-relative offset to
192 * a (1900)-relative one
193 */
194 rtc_tm->tm_year += SUN6I_YEAR_OFF;
195
196 return rtc_valid_tm(rtc_tm);
197}
198
199static int sun6i_rtc_getalarm(struct device *dev, struct rtc_wkalrm *wkalrm)
200{
201 struct sun6i_rtc_dev *chip = dev_get_drvdata(dev);
Maxime Riparda9422a12017-01-23 11:41:47 +0100202 unsigned long flags;
Chen-Yu Tsai9765d2d2014-08-26 11:54:55 +0800203 u32 alrm_st;
204 u32 alrm_en;
205
Maxime Riparda9422a12017-01-23 11:41:47 +0100206 spin_lock_irqsave(&chip->lock, flags);
Chen-Yu Tsai9765d2d2014-08-26 11:54:55 +0800207 alrm_en = readl(chip->base + SUN6I_ALRM_IRQ_EN);
208 alrm_st = readl(chip->base + SUN6I_ALRM_IRQ_STA);
Maxime Riparda9422a12017-01-23 11:41:47 +0100209 spin_unlock_irqrestore(&chip->lock, flags);
210
Chen-Yu Tsai9765d2d2014-08-26 11:54:55 +0800211 wkalrm->enabled = !!(alrm_en & SUN6I_ALRM_EN_CNT_EN);
212 wkalrm->pending = !!(alrm_st & SUN6I_ALRM_EN_CNT_EN);
213 rtc_time_to_tm(chip->alarm, &wkalrm->time);
214
215 return 0;
216}
217
218static int sun6i_rtc_setalarm(struct device *dev, struct rtc_wkalrm *wkalrm)
219{
220 struct sun6i_rtc_dev *chip = dev_get_drvdata(dev);
221 struct rtc_time *alrm_tm = &wkalrm->time;
222 struct rtc_time tm_now;
223 unsigned long time_now = 0;
224 unsigned long time_set = 0;
225 unsigned long time_gap = 0;
226 int ret = 0;
227
228 ret = sun6i_rtc_gettime(dev, &tm_now);
229 if (ret < 0) {
230 dev_err(dev, "Error in getting time\n");
231 return -EINVAL;
232 }
233
234 rtc_tm_to_time(alrm_tm, &time_set);
235 rtc_tm_to_time(&tm_now, &time_now);
236 if (time_set <= time_now) {
237 dev_err(dev, "Date to set in the past\n");
238 return -EINVAL;
239 }
240
241 time_gap = time_set - time_now;
242
243 if (time_gap > U32_MAX) {
244 dev_err(dev, "Date too far in the future\n");
245 return -EINVAL;
246 }
247
248 sun6i_rtc_setaie(0, chip);
249 writel(0, chip->base + SUN6I_ALRM_COUNTER);
250 usleep_range(100, 300);
251
252 writel(time_gap, chip->base + SUN6I_ALRM_COUNTER);
253 chip->alarm = time_set;
254
255 sun6i_rtc_setaie(wkalrm->enabled, chip);
256
257 return 0;
258}
259
260static int sun6i_rtc_wait(struct sun6i_rtc_dev *chip, int offset,
261 unsigned int mask, unsigned int ms_timeout)
262{
263 const unsigned long timeout = jiffies + msecs_to_jiffies(ms_timeout);
264 u32 reg;
265
266 do {
267 reg = readl(chip->base + offset);
268 reg &= mask;
269
270 if (!reg)
271 return 0;
272
273 } while (time_before(jiffies, timeout));
274
275 return -ETIMEDOUT;
276}
277
278static int sun6i_rtc_settime(struct device *dev, struct rtc_time *rtc_tm)
279{
280 struct sun6i_rtc_dev *chip = dev_get_drvdata(dev);
281 u32 date = 0;
282 u32 time = 0;
283 int year;
284
285 year = rtc_tm->tm_year + 1900;
286 if (year < SUN6I_YEAR_MIN || year > SUN6I_YEAR_MAX) {
287 dev_err(dev, "rtc only supports year in range %d - %d\n",
288 SUN6I_YEAR_MIN, SUN6I_YEAR_MAX);
289 return -EINVAL;
290 }
291
292 rtc_tm->tm_year -= SUN6I_YEAR_OFF;
293 rtc_tm->tm_mon += 1;
294
295 date = SUN6I_DATE_SET_DAY_VALUE(rtc_tm->tm_mday) |
296 SUN6I_DATE_SET_MON_VALUE(rtc_tm->tm_mon) |
297 SUN6I_DATE_SET_YEAR_VALUE(rtc_tm->tm_year);
298
299 if (is_leap_year(year))
300 date |= SUN6I_LEAP_SET_VALUE(1);
301
302 time = SUN6I_TIME_SET_SEC_VALUE(rtc_tm->tm_sec) |
303 SUN6I_TIME_SET_MIN_VALUE(rtc_tm->tm_min) |
304 SUN6I_TIME_SET_HOUR_VALUE(rtc_tm->tm_hour);
305
306 /* Check whether registers are writable */
307 if (sun6i_rtc_wait(chip, SUN6I_LOSC_CTRL,
308 SUN6I_LOSC_CTRL_ACC_MASK, 50)) {
309 dev_err(dev, "rtc is still busy.\n");
310 return -EBUSY;
311 }
312
313 writel(time, chip->base + SUN6I_RTC_HMS);
314
315 /*
316 * After writing the RTC HH-MM-SS register, the
317 * SUN6I_LOSC_CTRL_RTC_HMS_ACC bit is set and it will not
318 * be cleared until the real writing operation is finished
319 */
320
321 if (sun6i_rtc_wait(chip, SUN6I_LOSC_CTRL,
322 SUN6I_LOSC_CTRL_RTC_HMS_ACC, 50)) {
323 dev_err(dev, "Failed to set rtc time.\n");
324 return -ETIMEDOUT;
325 }
326
327 writel(date, chip->base + SUN6I_RTC_YMD);
328
329 /*
330 * After writing the RTC YY-MM-DD register, the
331 * SUN6I_LOSC_CTRL_RTC_YMD_ACC bit is set and it will not
332 * be cleared until the real writing operation is finished
333 */
334
335 if (sun6i_rtc_wait(chip, SUN6I_LOSC_CTRL,
336 SUN6I_LOSC_CTRL_RTC_YMD_ACC, 50)) {
337 dev_err(dev, "Failed to set rtc time.\n");
338 return -ETIMEDOUT;
339 }
340
341 return 0;
342}
343
344static int sun6i_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
345{
346 struct sun6i_rtc_dev *chip = dev_get_drvdata(dev);
347
348 if (!enabled)
349 sun6i_rtc_setaie(enabled, chip);
350
351 return 0;
352}
353
354static const struct rtc_class_ops sun6i_rtc_ops = {
355 .read_time = sun6i_rtc_gettime,
356 .set_time = sun6i_rtc_settime,
357 .read_alarm = sun6i_rtc_getalarm,
358 .set_alarm = sun6i_rtc_setalarm,
359 .alarm_irq_enable = sun6i_rtc_alarm_irq_enable
360};
361
362static int sun6i_rtc_probe(struct platform_device *pdev)
363{
364 struct sun6i_rtc_dev *chip;
365 struct resource *res;
366 int ret;
367
368 chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL);
369 if (!chip)
370 return -ENOMEM;
Maxime Riparda9422a12017-01-23 11:41:47 +0100371 spin_lock_init(&chip->lock);
Chen-Yu Tsai9765d2d2014-08-26 11:54:55 +0800372
373 platform_set_drvdata(pdev, chip);
374 chip->dev = &pdev->dev;
375
376 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
377 chip->base = devm_ioremap_resource(&pdev->dev, res);
378 if (IS_ERR(chip->base))
379 return PTR_ERR(chip->base);
380
381 chip->irq = platform_get_irq(pdev, 0);
382 if (chip->irq < 0) {
383 dev_err(&pdev->dev, "No IRQ resource\n");
384 return chip->irq;
385 }
386
387 ret = devm_request_irq(&pdev->dev, chip->irq, sun6i_rtc_alarmirq,
388 0, dev_name(&pdev->dev), chip);
389 if (ret) {
390 dev_err(&pdev->dev, "Could not request IRQ\n");
391 return ret;
392 }
393
394 /* clear the alarm counter value */
395 writel(0, chip->base + SUN6I_ALRM_COUNTER);
396
397 /* disable counter alarm */
398 writel(0, chip->base + SUN6I_ALRM_EN);
399
400 /* disable counter alarm interrupt */
401 writel(0, chip->base + SUN6I_ALRM_IRQ_EN);
402
403 /* disable week alarm */
404 writel(0, chip->base + SUN6I_ALRM1_EN);
405
406 /* disable week alarm interrupt */
407 writel(0, chip->base + SUN6I_ALRM1_IRQ_EN);
408
409 /* clear counter alarm pending interrupts */
410 writel(SUN6I_ALRM_IRQ_STA_CNT_IRQ_PEND,
411 chip->base + SUN6I_ALRM_IRQ_STA);
412
413 /* clear week alarm pending interrupts */
414 writel(SUN6I_ALRM1_IRQ_STA_WEEK_IRQ_PEND,
415 chip->base + SUN6I_ALRM1_IRQ_STA);
416
417 /* disable alarm wakeup */
418 writel(0, chip->base + SUN6I_ALARM_CONFIG);
419
420 chip->rtc = rtc_device_register("rtc-sun6i", &pdev->dev,
421 &sun6i_rtc_ops, THIS_MODULE);
422 if (IS_ERR(chip->rtc)) {
423 dev_err(&pdev->dev, "unable to register device\n");
424 return PTR_ERR(chip->rtc);
425 }
426
427 dev_info(&pdev->dev, "RTC enabled\n");
428
429 return 0;
430}
431
432static int sun6i_rtc_remove(struct platform_device *pdev)
433{
434 struct sun6i_rtc_dev *chip = platform_get_drvdata(pdev);
435
436 rtc_device_unregister(chip->rtc);
437
438 return 0;
439}
440
441static const struct of_device_id sun6i_rtc_dt_ids[] = {
442 { .compatible = "allwinner,sun6i-a31-rtc" },
443 { /* sentinel */ },
444};
445MODULE_DEVICE_TABLE(of, sun6i_rtc_dt_ids);
446
447static struct platform_driver sun6i_rtc_driver = {
448 .probe = sun6i_rtc_probe,
449 .remove = sun6i_rtc_remove,
450 .driver = {
451 .name = "sun6i-rtc",
452 .of_match_table = sun6i_rtc_dt_ids,
453 },
454};
Maxime Ripard37539412017-01-23 11:41:46 +0100455builtin_platform_driver(sun6i_rtc_driver);