Thomas Gleixner | a912e80 | 2019-05-27 08:55:00 +0200 | [diff] [blame^] | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
Lars-Peter Clausen | 9869848 | 2010-07-17 11:08:43 +0000 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) 2009-2010, Lars-Peter Clausen <lars@metafoo.de> |
| 4 | * JZ4740 platform IRQ support |
Lars-Peter Clausen | 9869848 | 2010-07-17 11:08:43 +0000 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | #include <linux/errno.h> |
| 8 | #include <linux/init.h> |
| 9 | #include <linux/types.h> |
| 10 | #include <linux/interrupt.h> |
| 11 | #include <linux/ioport.h> |
Joel Porquet | 41a83e06 | 2015-07-07 17:11:46 -0400 | [diff] [blame] | 12 | #include <linux/irqchip.h> |
Paul Burton | 44e08e7 | 2015-05-24 16:11:31 +0100 | [diff] [blame] | 13 | #include <linux/irqchip/ingenic.h> |
Paul Burton | 3aa9459 | 2015-05-24 16:11:28 +0100 | [diff] [blame] | 14 | #include <linux/of_address.h> |
Paul Burton | adbdce7 | 2015-05-24 16:11:21 +0100 | [diff] [blame] | 15 | #include <linux/of_irq.h> |
Lars-Peter Clausen | 9869848 | 2010-07-17 11:08:43 +0000 | [diff] [blame] | 16 | #include <linux/timex.h> |
| 17 | #include <linux/slab.h> |
| 18 | #include <linux/delay.h> |
| 19 | |
Lars-Peter Clausen | 9869848 | 2010-07-17 11:08:43 +0000 | [diff] [blame] | 20 | #include <asm/io.h> |
Brian Norris | 942e22d | 2014-12-17 18:39:01 -0800 | [diff] [blame] | 21 | #include <asm/mach-jz4740/irq.h> |
| 22 | |
Paul Burton | fe778ec | 2015-05-24 16:11:25 +0100 | [diff] [blame] | 23 | struct ingenic_intc_data { |
| 24 | void __iomem *base; |
Paul Burton | 943d69c | 2015-05-24 16:11:26 +0100 | [diff] [blame] | 25 | unsigned num_chips; |
Paul Burton | fe778ec | 2015-05-24 16:11:25 +0100 | [diff] [blame] | 26 | }; |
Lars-Peter Clausen | 9869848 | 2010-07-17 11:08:43 +0000 | [diff] [blame] | 27 | |
| 28 | #define JZ_REG_INTC_STATUS 0x00 |
| 29 | #define JZ_REG_INTC_MASK 0x04 |
| 30 | #define JZ_REG_INTC_SET_MASK 0x08 |
| 31 | #define JZ_REG_INTC_CLEAR_MASK 0x0c |
| 32 | #define JZ_REG_INTC_PENDING 0x10 |
Paul Burton | 943d69c | 2015-05-24 16:11:26 +0100 | [diff] [blame] | 33 | #define CHIP_SIZE 0x20 |
Lars-Peter Clausen | 9869848 | 2010-07-17 11:08:43 +0000 | [diff] [blame] | 34 | |
Paul Burton | 2da0188 | 2015-05-24 16:11:29 +0100 | [diff] [blame] | 35 | static irqreturn_t intc_cascade(int irq, void *data) |
Lars-Peter Clausen | 9869848 | 2010-07-17 11:08:43 +0000 | [diff] [blame] | 36 | { |
Paul Burton | fe778ec | 2015-05-24 16:11:25 +0100 | [diff] [blame] | 37 | struct ingenic_intc_data *intc = irq_get_handler_data(irq); |
Lars-Peter Clausen | 9869848 | 2010-07-17 11:08:43 +0000 | [diff] [blame] | 38 | uint32_t irq_reg; |
Paul Burton | 943d69c | 2015-05-24 16:11:26 +0100 | [diff] [blame] | 39 | unsigned i; |
Lars-Peter Clausen | 9869848 | 2010-07-17 11:08:43 +0000 | [diff] [blame] | 40 | |
Paul Burton | 943d69c | 2015-05-24 16:11:26 +0100 | [diff] [blame] | 41 | for (i = 0; i < intc->num_chips; i++) { |
| 42 | irq_reg = readl(intc->base + (i * CHIP_SIZE) + |
| 43 | JZ_REG_INTC_PENDING); |
| 44 | if (!irq_reg) |
| 45 | continue; |
Lars-Peter Clausen | 9869848 | 2010-07-17 11:08:43 +0000 | [diff] [blame] | 46 | |
Paul Burton | 943d69c | 2015-05-24 16:11:26 +0100 | [diff] [blame] | 47 | generic_handle_irq(__fls(irq_reg) + (i * 32) + JZ4740_IRQ_BASE); |
| 48 | } |
Lars-Peter Clausen | 9869848 | 2010-07-17 11:08:43 +0000 | [diff] [blame] | 49 | |
| 50 | return IRQ_HANDLED; |
| 51 | } |
| 52 | |
Paul Burton | 2da0188 | 2015-05-24 16:11:29 +0100 | [diff] [blame] | 53 | static void intc_irq_set_mask(struct irq_chip_generic *gc, uint32_t mask) |
Lars-Peter Clausen | 83bc769 | 2011-09-24 02:29:46 +0200 | [diff] [blame] | 54 | { |
| 55 | struct irq_chip_regs *regs = &gc->chip_types->regs; |
| 56 | |
| 57 | writel(mask, gc->reg_base + regs->enable); |
| 58 | writel(~mask, gc->reg_base + regs->disable); |
| 59 | } |
| 60 | |
Paul Burton | 2da0188 | 2015-05-24 16:11:29 +0100 | [diff] [blame] | 61 | void ingenic_intc_irq_suspend(struct irq_data *data) |
Lars-Peter Clausen | 83bc769 | 2011-09-24 02:29:46 +0200 | [diff] [blame] | 62 | { |
| 63 | struct irq_chip_generic *gc = irq_data_get_irq_chip_data(data); |
Paul Burton | 2da0188 | 2015-05-24 16:11:29 +0100 | [diff] [blame] | 64 | intc_irq_set_mask(gc, gc->wake_active); |
Lars-Peter Clausen | 83bc769 | 2011-09-24 02:29:46 +0200 | [diff] [blame] | 65 | } |
| 66 | |
Paul Burton | 2da0188 | 2015-05-24 16:11:29 +0100 | [diff] [blame] | 67 | void ingenic_intc_irq_resume(struct irq_data *data) |
Lars-Peter Clausen | 83bc769 | 2011-09-24 02:29:46 +0200 | [diff] [blame] | 68 | { |
| 69 | struct irq_chip_generic *gc = irq_data_get_irq_chip_data(data); |
Paul Burton | 2da0188 | 2015-05-24 16:11:29 +0100 | [diff] [blame] | 70 | intc_irq_set_mask(gc, gc->mask_cache); |
Lars-Peter Clausen | 83bc769 | 2011-09-24 02:29:46 +0200 | [diff] [blame] | 71 | } |
| 72 | |
Paul Burton | 2da0188 | 2015-05-24 16:11:29 +0100 | [diff] [blame] | 73 | static struct irqaction intc_cascade_action = { |
| 74 | .handler = intc_cascade, |
| 75 | .name = "SoC intc cascade interrupt", |
Lars-Peter Clausen | 9869848 | 2010-07-17 11:08:43 +0000 | [diff] [blame] | 76 | }; |
| 77 | |
Paul Burton | 943d69c | 2015-05-24 16:11:26 +0100 | [diff] [blame] | 78 | static int __init ingenic_intc_of_init(struct device_node *node, |
| 79 | unsigned num_chips) |
Lars-Peter Clausen | 9869848 | 2010-07-17 11:08:43 +0000 | [diff] [blame] | 80 | { |
Paul Burton | fe778ec | 2015-05-24 16:11:25 +0100 | [diff] [blame] | 81 | struct ingenic_intc_data *intc; |
Lars-Peter Clausen | 83bc769 | 2011-09-24 02:29:46 +0200 | [diff] [blame] | 82 | struct irq_chip_generic *gc; |
| 83 | struct irq_chip_type *ct; |
Paul Burton | 638c885 | 2015-05-24 16:11:23 +0100 | [diff] [blame] | 84 | struct irq_domain *domain; |
Paul Burton | fe778ec | 2015-05-24 16:11:25 +0100 | [diff] [blame] | 85 | int parent_irq, err = 0; |
Paul Burton | 943d69c | 2015-05-24 16:11:26 +0100 | [diff] [blame] | 86 | unsigned i; |
Paul Burton | fe778ec | 2015-05-24 16:11:25 +0100 | [diff] [blame] | 87 | |
| 88 | intc = kzalloc(sizeof(*intc), GFP_KERNEL); |
| 89 | if (!intc) { |
| 90 | err = -ENOMEM; |
| 91 | goto out_err; |
| 92 | } |
Paul Burton | 69ce4b2 | 2015-05-24 16:11:22 +0100 | [diff] [blame] | 93 | |
| 94 | parent_irq = irq_of_parse_and_map(node, 0); |
Paul Burton | fe778ec | 2015-05-24 16:11:25 +0100 | [diff] [blame] | 95 | if (!parent_irq) { |
| 96 | err = -EINVAL; |
| 97 | goto out_free; |
| 98 | } |
Lars-Peter Clausen | 83bc769 | 2011-09-24 02:29:46 +0200 | [diff] [blame] | 99 | |
Paul Burton | fe778ec | 2015-05-24 16:11:25 +0100 | [diff] [blame] | 100 | err = irq_set_handler_data(parent_irq, intc); |
| 101 | if (err) |
| 102 | goto out_unmap_irq; |
| 103 | |
Paul Burton | 943d69c | 2015-05-24 16:11:26 +0100 | [diff] [blame] | 104 | intc->num_chips = num_chips; |
Paul Burton | 3aa9459 | 2015-05-24 16:11:28 +0100 | [diff] [blame] | 105 | intc->base = of_iomap(node, 0); |
| 106 | if (!intc->base) { |
| 107 | err = -ENODEV; |
| 108 | goto out_unmap_irq; |
| 109 | } |
Lars-Peter Clausen | 9869848 | 2010-07-17 11:08:43 +0000 | [diff] [blame] | 110 | |
Paul Burton | 943d69c | 2015-05-24 16:11:26 +0100 | [diff] [blame] | 111 | for (i = 0; i < num_chips; i++) { |
| 112 | /* Mask all irqs */ |
| 113 | writel(0xffffffff, intc->base + (i * CHIP_SIZE) + |
| 114 | JZ_REG_INTC_SET_MASK); |
Thomas Gleixner | 42b64f3 | 2011-03-23 21:08:53 +0000 | [diff] [blame] | 115 | |
Paul Burton | 943d69c | 2015-05-24 16:11:26 +0100 | [diff] [blame] | 116 | gc = irq_alloc_generic_chip("INTC", 1, |
| 117 | JZ4740_IRQ_BASE + (i * 32), |
| 118 | intc->base + (i * CHIP_SIZE), |
| 119 | handle_level_irq); |
Lars-Peter Clausen | 83bc769 | 2011-09-24 02:29:46 +0200 | [diff] [blame] | 120 | |
Paul Burton | 943d69c | 2015-05-24 16:11:26 +0100 | [diff] [blame] | 121 | gc->wake_enabled = IRQ_MSK(32); |
Lars-Peter Clausen | 83bc769 | 2011-09-24 02:29:46 +0200 | [diff] [blame] | 122 | |
Paul Burton | 943d69c | 2015-05-24 16:11:26 +0100 | [diff] [blame] | 123 | ct = gc->chip_types; |
| 124 | ct->regs.enable = JZ_REG_INTC_CLEAR_MASK; |
| 125 | ct->regs.disable = JZ_REG_INTC_SET_MASK; |
| 126 | ct->chip.irq_unmask = irq_gc_unmask_enable_reg; |
| 127 | ct->chip.irq_mask = irq_gc_mask_disable_reg; |
| 128 | ct->chip.irq_mask_ack = irq_gc_mask_disable_reg; |
| 129 | ct->chip.irq_set_wake = irq_gc_set_wake; |
Paul Burton | 2da0188 | 2015-05-24 16:11:29 +0100 | [diff] [blame] | 130 | ct->chip.irq_suspend = ingenic_intc_irq_suspend; |
| 131 | ct->chip.irq_resume = ingenic_intc_irq_resume; |
Lars-Peter Clausen | 83bc769 | 2011-09-24 02:29:46 +0200 | [diff] [blame] | 132 | |
Paul Burton | 943d69c | 2015-05-24 16:11:26 +0100 | [diff] [blame] | 133 | irq_setup_generic_chip(gc, IRQ_MSK(32), 0, 0, |
| 134 | IRQ_NOPROBE | IRQ_LEVEL); |
| 135 | } |
Lars-Peter Clausen | 9869848 | 2010-07-17 11:08:43 +0000 | [diff] [blame] | 136 | |
Paul Burton | 638c885 | 2015-05-24 16:11:23 +0100 | [diff] [blame] | 137 | domain = irq_domain_add_legacy(node, num_chips * 32, JZ4740_IRQ_BASE, 0, |
| 138 | &irq_domain_simple_ops, NULL); |
| 139 | if (!domain) |
| 140 | pr_warn("unable to register IRQ domain\n"); |
| 141 | |
Paul Burton | 2da0188 | 2015-05-24 16:11:29 +0100 | [diff] [blame] | 142 | setup_irq(parent_irq, &intc_cascade_action); |
Paul Burton | adbdce7 | 2015-05-24 16:11:21 +0100 | [diff] [blame] | 143 | return 0; |
Paul Burton | fe778ec | 2015-05-24 16:11:25 +0100 | [diff] [blame] | 144 | |
| 145 | out_unmap_irq: |
| 146 | irq_dispose_mapping(parent_irq); |
| 147 | out_free: |
| 148 | kfree(intc); |
| 149 | out_err: |
| 150 | return err; |
Lars-Peter Clausen | 9869848 | 2010-07-17 11:08:43 +0000 | [diff] [blame] | 151 | } |
Paul Burton | 943d69c | 2015-05-24 16:11:26 +0100 | [diff] [blame] | 152 | |
| 153 | static int __init intc_1chip_of_init(struct device_node *node, |
| 154 | struct device_node *parent) |
| 155 | { |
| 156 | return ingenic_intc_of_init(node, 1); |
| 157 | } |
| 158 | IRQCHIP_DECLARE(jz4740_intc, "ingenic,jz4740-intc", intc_1chip_of_init); |
Paul Cercueil | 1047557 | 2018-07-13 16:49:09 +0200 | [diff] [blame] | 159 | IRQCHIP_DECLARE(jz4725b_intc, "ingenic,jz4725b-intc", intc_1chip_of_init); |
Paul Burton | 24ccfa0 | 2015-05-24 16:11:30 +0100 | [diff] [blame] | 160 | |
| 161 | static int __init intc_2chip_of_init(struct device_node *node, |
| 162 | struct device_node *parent) |
| 163 | { |
| 164 | return ingenic_intc_of_init(node, 2); |
| 165 | } |
| 166 | IRQCHIP_DECLARE(jz4770_intc, "ingenic,jz4770-intc", intc_2chip_of_init); |
| 167 | IRQCHIP_DECLARE(jz4775_intc, "ingenic,jz4775-intc", intc_2chip_of_init); |
| 168 | IRQCHIP_DECLARE(jz4780_intc, "ingenic,jz4780-intc", intc_2chip_of_init); |