| viresh kumar | a7e9c45 | 2010-04-01 12:30:19 +0100 | [diff] [blame^] | 1 | /* |
| 2 | * arch/arm/mach-spear3xx/include/mach/entry-macro.S |
| 3 | * |
| 4 | * Low-level IRQ helper macros for SPEAr3xx machine family |
| 5 | * |
| 6 | * Copyright (C) 2009 ST Microelectronics |
| 7 | * Viresh Kumar<viresh.kumar@st.com> |
| 8 | * |
| 9 | * This file is licensed under the terms of the GNU General Public |
| 10 | * License version 2. This program is licensed "as is" without any |
| 11 | * warranty of any kind, whether express or implied. |
| 12 | */ |
| 13 | |
| 14 | #include <mach/hardware.h> |
| 15 | #include <mach/spear.h> |
| 16 | #include <asm/hardware/vic.h> |
| 17 | |
| 18 | .macro disable_fiq |
| 19 | .endm |
| 20 | |
| 21 | .macro get_irqnr_preamble, base, tmp |
| 22 | .endm |
| 23 | |
| 24 | .macro arch_ret_to_user, tmp1, tmp2 |
| 25 | .endm |
| 26 | |
| 27 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
| 28 | ldr \base, =VA_SPEAR3XX_ML1_VIC_BASE |
| 29 | ldr \irqstat, [\base, #VIC_IRQ_STATUS] @ get status |
| 30 | teq \irqstat, #0 |
| 31 | beq 1001f @ this will set/reset |
| 32 | @ zero register |
| 33 | /* |
| 34 | * Following code will find bit position of least significang |
| 35 | * bit set in irqstat, using following equation |
| 36 | * least significant bit set in n = (n & ~(n-1)) |
| 37 | */ |
| 38 | sub \tmp, \irqstat, #1 @ tmp = irqstat - 1 |
| 39 | mvn \tmp, \tmp @ tmp = ~tmp |
| 40 | and \irqstat, \irqstat, \tmp @ irqstat &= tmp |
| 41 | /* Now, irqstat is = bit no. of 1st bit set in vic irq status */ |
| 42 | clz \tmp, \irqstat @ tmp = leading zeros |
| 43 | rsb \irqnr, \tmp, #0x1F @ irqnr = 32 - tmp - 1 |
| 44 | |
| 45 | 1001: /* EQ will be set if no irqs pending */ |
| 46 | .endm |