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Takashi Iwaie3d280f2015-02-17 21:46:37 +01001/*
2 * HD-audio core stuff
3 */
4
5#ifndef __SOUND_HDAUDIO_H
6#define __SOUND_HDAUDIO_H
7
8#include <linux/device.h>
Takashi Iwai14752412015-04-14 12:15:47 +02009#include <linux/interrupt.h>
10#include <linux/timecounter.h>
11#include <sound/core.h>
12#include <sound/memalloc.h>
Takashi Iwaid068ebc2015-03-02 23:22:59 +010013#include <sound/hda_verbs.h>
14
Takashi Iwai7639a062015-03-03 10:07:24 +010015/* codec node id */
16typedef u16 hda_nid_t;
17
Takashi Iwaid068ebc2015-03-02 23:22:59 +010018struct hdac_bus;
Takashi Iwai14752412015-04-14 12:15:47 +020019struct hdac_stream;
Takashi Iwaid068ebc2015-03-02 23:22:59 +010020struct hdac_device;
21struct hdac_driver;
Takashi Iwai3256be62015-02-24 14:59:42 +010022struct hdac_widget_tree;
Takashi Iwaie3d280f2015-02-17 21:46:37 +010023
24/*
25 * exported bus type
26 */
27extern struct bus_type snd_hda_bus_type;
28
29/*
Takashi Iwai71fc4c72015-03-03 17:33:10 +010030 * generic arrays
31 */
32struct snd_array {
33 unsigned int used;
34 unsigned int alloced;
35 unsigned int elem_size;
36 unsigned int alloc_align;
37 void *list;
38};
39
40/*
Takashi Iwaie3d280f2015-02-17 21:46:37 +010041 * HD-audio codec base device
42 */
43struct hdac_device {
44 struct device dev;
45 int type;
Takashi Iwaid068ebc2015-03-02 23:22:59 +010046 struct hdac_bus *bus;
47 unsigned int addr; /* codec address */
48 struct list_head list; /* list point for bus codec_list */
Takashi Iwai7639a062015-03-03 10:07:24 +010049
50 hda_nid_t afg; /* AFG node id */
51 hda_nid_t mfg; /* MFG node id */
52
53 /* ids */
54 unsigned int vendor_id;
55 unsigned int subsystem_id;
56 unsigned int revision_id;
57 unsigned int afg_function_id;
58 unsigned int mfg_function_id;
59 unsigned int afg_unsol:1;
60 unsigned int mfg_unsol:1;
61
62 unsigned int power_caps; /* FG power caps */
63
64 const char *vendor_name; /* codec vendor name */
65 const char *chip_name; /* codec chip name */
66
Takashi Iwai058524482015-03-03 15:40:08 +010067 /* verb exec op override */
68 int (*exec_verb)(struct hdac_device *dev, unsigned int cmd,
69 unsigned int flags, unsigned int *res);
70
Takashi Iwai7639a062015-03-03 10:07:24 +010071 /* widgets */
72 unsigned int num_nodes;
73 hda_nid_t start_nid, end_nid;
74
75 /* misc flags */
76 atomic_t in_pm; /* suspend/resume being performed */
Mengdong Lina5e7e072015-04-29 17:43:20 +080077 bool link_power_control:1;
Takashi Iwai3256be62015-02-24 14:59:42 +010078
79 /* sysfs */
80 struct hdac_widget_tree *widgets;
Takashi Iwai4d75faa02015-02-25 14:42:38 +010081
82 /* regmap */
83 struct regmap *regmap;
Takashi Iwai5e56bce2015-02-26 12:29:03 +010084 struct snd_array vendor_verbs;
Takashi Iwai4d75faa02015-02-25 14:42:38 +010085 bool lazy_cache:1; /* don't wake up for writes */
Takashi Iwaifaa75f82015-02-26 08:54:56 +010086 bool caps_overwriting:1; /* caps overwrite being in process */
Takashi Iwai40ba66a2015-03-13 15:56:25 +010087 bool cache_coef:1; /* cache COEF read/write too */
Takashi Iwaie3d280f2015-02-17 21:46:37 +010088};
89
90/* device/driver type used for matching */
91enum {
92 HDA_DEV_CORE,
93 HDA_DEV_LEGACY,
Ramesh Babuc1cc18b2015-04-17 17:58:57 +053094 HDA_DEV_ASOC,
Takashi Iwaie3d280f2015-02-17 21:46:37 +010095};
96
Takashi Iwai7639a062015-03-03 10:07:24 +010097/* direction */
98enum {
99 HDA_INPUT, HDA_OUTPUT
100};
101
Takashi Iwaie3d280f2015-02-17 21:46:37 +0100102#define dev_to_hdac_dev(_dev) container_of(_dev, struct hdac_device, dev)
103
Takashi Iwai7639a062015-03-03 10:07:24 +0100104int snd_hdac_device_init(struct hdac_device *dev, struct hdac_bus *bus,
105 const char *name, unsigned int addr);
106void snd_hdac_device_exit(struct hdac_device *dev);
Takashi Iwai3256be62015-02-24 14:59:42 +0100107int snd_hdac_device_register(struct hdac_device *codec);
108void snd_hdac_device_unregister(struct hdac_device *codec);
Takashi Iwai7639a062015-03-03 10:07:24 +0100109
110int snd_hdac_refresh_widgets(struct hdac_device *codec);
111
112unsigned int snd_hdac_make_cmd(struct hdac_device *codec, hda_nid_t nid,
113 unsigned int verb, unsigned int parm);
Takashi Iwai058524482015-03-03 15:40:08 +0100114int snd_hdac_exec_verb(struct hdac_device *codec, unsigned int cmd,
115 unsigned int flags, unsigned int *res);
Takashi Iwai7639a062015-03-03 10:07:24 +0100116int snd_hdac_read(struct hdac_device *codec, hda_nid_t nid,
117 unsigned int verb, unsigned int parm, unsigned int *res);
Takashi Iwai01ed3c02015-02-26 13:57:47 +0100118int _snd_hdac_read_parm(struct hdac_device *codec, hda_nid_t nid, int parm,
119 unsigned int *res);
Takashi Iwai9ba17b42015-03-03 23:29:47 +0100120int snd_hdac_read_parm_uncached(struct hdac_device *codec, hda_nid_t nid,
121 int parm);
Takashi Iwaifaa75f82015-02-26 08:54:56 +0100122int snd_hdac_override_parm(struct hdac_device *codec, hda_nid_t nid,
123 unsigned int parm, unsigned int val);
Takashi Iwai7639a062015-03-03 10:07:24 +0100124int snd_hdac_get_connections(struct hdac_device *codec, hda_nid_t nid,
125 hda_nid_t *conn_list, int max_conns);
126int snd_hdac_get_sub_nodes(struct hdac_device *codec, hda_nid_t nid,
127 hda_nid_t *start_id);
Takashi Iwaib7d023e2015-04-16 08:19:06 +0200128unsigned int snd_hdac_calc_stream_format(unsigned int rate,
129 unsigned int channels,
130 unsigned int format,
131 unsigned int maxbps,
132 unsigned short spdif_ctls);
133int snd_hdac_query_supported_pcm(struct hdac_device *codec, hda_nid_t nid,
134 u32 *ratesp, u64 *formatsp, unsigned int *bpsp);
135bool snd_hdac_is_supported_format(struct hdac_device *codec, hda_nid_t nid,
136 unsigned int format);
Takashi Iwai7639a062015-03-03 10:07:24 +0100137
Takashi Iwai01ed3c02015-02-26 13:57:47 +0100138/**
139 * snd_hdac_read_parm - read a codec parameter
140 * @codec: the codec object
141 * @nid: NID to read a parameter
142 * @parm: parameter to read
143 *
144 * Returns -1 for error. If you need to distinguish the error more
145 * strictly, use _snd_hdac_read_parm() directly.
146 */
147static inline int snd_hdac_read_parm(struct hdac_device *codec, hda_nid_t nid,
148 int parm)
149{
150 unsigned int val;
151
152 return _snd_hdac_read_parm(codec, nid, parm, &val) < 0 ? -1 : val;
153}
154
Takashi Iwai7639a062015-03-03 10:07:24 +0100155#ifdef CONFIG_PM
156void snd_hdac_power_up(struct hdac_device *codec);
157void snd_hdac_power_down(struct hdac_device *codec);
Takashi Iwaic3aeda62015-04-13 11:01:14 +0200158void snd_hdac_power_up_pm(struct hdac_device *codec);
159void snd_hdac_power_down_pm(struct hdac_device *codec);
Takashi Iwai7639a062015-03-03 10:07:24 +0100160#else
161static inline void snd_hdac_power_up(struct hdac_device *codec) {}
162static inline void snd_hdac_power_down(struct hdac_device *codec) {}
Takashi Iwaic3aeda62015-04-13 11:01:14 +0200163static inline void snd_hdac_power_up_pm(struct hdac_device *codec) {}
164static inline void snd_hdac_power_down_pm(struct hdac_device *codec) {}
Takashi Iwai7639a062015-03-03 10:07:24 +0100165#endif
166
Takashi Iwaie3d280f2015-02-17 21:46:37 +0100167/*
168 * HD-audio codec base driver
169 */
170struct hdac_driver {
171 struct device_driver driver;
172 int type;
173 int (*match)(struct hdac_device *dev, struct hdac_driver *drv);
Takashi Iwaid068ebc2015-03-02 23:22:59 +0100174 void (*unsol_event)(struct hdac_device *dev, unsigned int event);
Takashi Iwaie3d280f2015-02-17 21:46:37 +0100175};
176
177#define drv_to_hdac_driver(_drv) container_of(_drv, struct hdac_driver, driver)
178
Takashi Iwaid068ebc2015-03-02 23:22:59 +0100179/*
Takashi Iwai14752412015-04-14 12:15:47 +0200180 * Bus verb operators
Takashi Iwaid068ebc2015-03-02 23:22:59 +0100181 */
182struct hdac_bus_ops {
183 /* send a single command */
184 int (*command)(struct hdac_bus *bus, unsigned int cmd);
185 /* get a response from the last command */
186 int (*get_response)(struct hdac_bus *bus, unsigned int addr,
187 unsigned int *res);
Mengdong Lina5e7e072015-04-29 17:43:20 +0800188 /* control the link power */
189 int (*link_power)(struct hdac_bus *bus, bool enable);
Takashi Iwaid068ebc2015-03-02 23:22:59 +0100190};
191
Takashi Iwai14752412015-04-14 12:15:47 +0200192/*
193 * Lowlevel I/O operators
194 */
195struct hdac_io_ops {
196 /* mapped register accesses */
197 void (*reg_writel)(u32 value, u32 __iomem *addr);
198 u32 (*reg_readl)(u32 __iomem *addr);
199 void (*reg_writew)(u16 value, u16 __iomem *addr);
200 u16 (*reg_readw)(u16 __iomem *addr);
201 void (*reg_writeb)(u8 value, u8 __iomem *addr);
202 u8 (*reg_readb)(u8 __iomem *addr);
Takashi Iwai8f3f6002015-04-14 12:53:28 +0200203 /* Allocation ops */
204 int (*dma_alloc_pages)(struct hdac_bus *bus, int type, size_t size,
205 struct snd_dma_buffer *buf);
206 void (*dma_free_pages)(struct hdac_bus *bus,
207 struct snd_dma_buffer *buf);
Takashi Iwai14752412015-04-14 12:15:47 +0200208};
Takashi Iwaid068ebc2015-03-02 23:22:59 +0100209
Takashi Iwai14752412015-04-14 12:15:47 +0200210#define HDA_UNSOL_QUEUE_SIZE 64
211#define HDA_MAX_CODECS 8 /* limit by controller side */
212
213/* HD Audio class code */
214#define PCI_CLASS_MULTIMEDIA_HD_AUDIO 0x0403
215
216/*
217 * CORB/RIRB
218 *
219 * Each CORB entry is 4byte, RIRB is 8byte
220 */
221struct hdac_rb {
222 __le32 *buf; /* virtual address of CORB/RIRB buffer */
223 dma_addr_t addr; /* physical address of CORB/RIRB buffer */
224 unsigned short rp, wp; /* RIRB read/write pointers */
225 int cmds[HDA_MAX_CODECS]; /* number of pending requests */
226 u32 res[HDA_MAX_CODECS]; /* last read value */
227};
228
229/*
230 * HD-audio bus base driver
231 */
Takashi Iwaid068ebc2015-03-02 23:22:59 +0100232struct hdac_bus {
233 struct device *dev;
234 const struct hdac_bus_ops *ops;
Takashi Iwai14752412015-04-14 12:15:47 +0200235 const struct hdac_io_ops *io_ops;
236
237 /* h/w resources */
238 unsigned long addr;
239 void __iomem *remap_addr;
240 int irq;
Takashi Iwaid068ebc2015-03-02 23:22:59 +0100241
242 /* codec linked list */
243 struct list_head codec_list;
244 unsigned int num_codecs;
245
246 /* link caddr -> codec */
247 struct hdac_device *caddr_tbl[HDA_MAX_CODEC_ADDRESS + 1];
248
249 /* unsolicited event queue */
250 u32 unsol_queue[HDA_UNSOL_QUEUE_SIZE * 2]; /* ring buffer */
251 unsigned int unsol_rp, unsol_wp;
252 struct work_struct unsol_work;
253
Takashi Iwai14752412015-04-14 12:15:47 +0200254 /* bit flags of detected codecs */
255 unsigned long codec_mask;
256
Takashi Iwaid068ebc2015-03-02 23:22:59 +0100257 /* bit flags of powered codecs */
258 unsigned long codec_powered;
259
Takashi Iwai14752412015-04-14 12:15:47 +0200260 /* CORB/RIRB */
261 struct hdac_rb corb;
262 struct hdac_rb rirb;
263 unsigned int last_cmd[HDA_MAX_CODECS]; /* last sent command */
264
265 /* CORB/RIRB and position buffers */
266 struct snd_dma_buffer rb;
267 struct snd_dma_buffer posbuf;
268
269 /* hdac_stream linked list */
270 struct list_head stream_list;
271
272 /* operation state */
273 bool chip_init:1; /* h/w initialized */
274
275 /* behavior flags */
Takashi Iwaid068ebc2015-03-02 23:22:59 +0100276 bool sync_write:1; /* sync after verb write */
Takashi Iwai14752412015-04-14 12:15:47 +0200277 bool use_posbuf:1; /* use position buffer */
278 bool snoop:1; /* enable snooping */
279 bool align_bdle_4k:1; /* BDLE align 4K boundary */
280 bool reverse_assign:1; /* assign devices in reverse order */
281 bool corbrp_self_clear:1; /* CORBRP clears itself after reset */
282
283 int bdl_pos_adj; /* BDL position adjustment */
Takashi Iwaid068ebc2015-03-02 23:22:59 +0100284
285 /* locks */
Takashi Iwai14752412015-04-14 12:15:47 +0200286 spinlock_t reg_lock;
Takashi Iwaid068ebc2015-03-02 23:22:59 +0100287 struct mutex cmd_mutex;
288};
289
290int snd_hdac_bus_init(struct hdac_bus *bus, struct device *dev,
Takashi Iwai14752412015-04-14 12:15:47 +0200291 const struct hdac_bus_ops *ops,
292 const struct hdac_io_ops *io_ops);
Takashi Iwaid068ebc2015-03-02 23:22:59 +0100293void snd_hdac_bus_exit(struct hdac_bus *bus);
294int snd_hdac_bus_exec_verb(struct hdac_bus *bus, unsigned int addr,
295 unsigned int cmd, unsigned int *res);
296int snd_hdac_bus_exec_verb_unlocked(struct hdac_bus *bus, unsigned int addr,
297 unsigned int cmd, unsigned int *res);
298void snd_hdac_bus_queue_event(struct hdac_bus *bus, u32 res, u32 res_ex);
299
300int snd_hdac_bus_add_device(struct hdac_bus *bus, struct hdac_device *codec);
301void snd_hdac_bus_remove_device(struct hdac_bus *bus,
302 struct hdac_device *codec);
303
Takashi Iwai7639a062015-03-03 10:07:24 +0100304static inline void snd_hdac_codec_link_up(struct hdac_device *codec)
305{
306 set_bit(codec->addr, &codec->bus->codec_powered);
307}
308
309static inline void snd_hdac_codec_link_down(struct hdac_device *codec)
310{
311 clear_bit(codec->addr, &codec->bus->codec_powered);
312}
313
Takashi Iwai14752412015-04-14 12:15:47 +0200314int snd_hdac_bus_send_cmd(struct hdac_bus *bus, unsigned int val);
315int snd_hdac_bus_get_response(struct hdac_bus *bus, unsigned int addr,
316 unsigned int *res);
Mengdong Lina5e7e072015-04-29 17:43:20 +0800317int snd_hdac_link_power(struct hdac_device *codec, bool enable);
Takashi Iwai14752412015-04-14 12:15:47 +0200318
319bool snd_hdac_bus_init_chip(struct hdac_bus *bus, bool full_reset);
320void snd_hdac_bus_stop_chip(struct hdac_bus *bus);
321void snd_hdac_bus_init_cmd_io(struct hdac_bus *bus);
322void snd_hdac_bus_stop_cmd_io(struct hdac_bus *bus);
323void snd_hdac_bus_enter_link_reset(struct hdac_bus *bus);
324void snd_hdac_bus_exit_link_reset(struct hdac_bus *bus);
325
326void snd_hdac_bus_update_rirb(struct hdac_bus *bus);
327void snd_hdac_bus_handle_stream_irq(struct hdac_bus *bus, unsigned int status,
328 void (*ack)(struct hdac_bus *,
329 struct hdac_stream *));
330
Jeeja KP304dad32015-04-12 18:06:13 +0530331int snd_hdac_bus_alloc_stream_pages(struct hdac_bus *bus);
332void snd_hdac_bus_free_stream_pages(struct hdac_bus *bus);
333
Takashi Iwai14752412015-04-14 12:15:47 +0200334/*
335 * macros for easy use
336 */
337#define _snd_hdac_chip_write(type, chip, reg, value) \
338 ((chip)->io_ops->reg_write ## type(value, (chip)->remap_addr + (reg)))
339#define _snd_hdac_chip_read(type, chip, reg) \
340 ((chip)->io_ops->reg_read ## type((chip)->remap_addr + (reg)))
341
342/* read/write a register, pass without AZX_REG_ prefix */
343#define snd_hdac_chip_writel(chip, reg, value) \
344 _snd_hdac_chip_write(l, chip, AZX_REG_ ## reg, value)
345#define snd_hdac_chip_writew(chip, reg, value) \
346 _snd_hdac_chip_write(w, chip, AZX_REG_ ## reg, value)
347#define snd_hdac_chip_writeb(chip, reg, value) \
348 _snd_hdac_chip_write(b, chip, AZX_REG_ ## reg, value)
349#define snd_hdac_chip_readl(chip, reg) \
350 _snd_hdac_chip_read(l, chip, AZX_REG_ ## reg)
351#define snd_hdac_chip_readw(chip, reg) \
352 _snd_hdac_chip_read(w, chip, AZX_REG_ ## reg)
353#define snd_hdac_chip_readb(chip, reg) \
354 _snd_hdac_chip_read(b, chip, AZX_REG_ ## reg)
355
356/* update a register, pass without AZX_REG_ prefix */
357#define snd_hdac_chip_updatel(chip, reg, mask, val) \
358 snd_hdac_chip_writel(chip, reg, \
359 (snd_hdac_chip_readl(chip, reg) & ~(mask)) | (val))
360#define snd_hdac_chip_updatew(chip, reg, mask, val) \
361 snd_hdac_chip_writew(chip, reg, \
362 (snd_hdac_chip_readw(chip, reg) & ~(mask)) | (val))
363#define snd_hdac_chip_updateb(chip, reg, mask, val) \
364 snd_hdac_chip_writeb(chip, reg, \
365 (snd_hdac_chip_readb(chip, reg) & ~(mask)) | (val))
366
367/*
368 * HD-audio stream
369 */
370struct hdac_stream {
371 struct hdac_bus *bus;
372 struct snd_dma_buffer bdl; /* BDL buffer */
373 __le32 *posbuf; /* position buffer pointer */
374 int direction; /* playback / capture (SNDRV_PCM_STREAM_*) */
375
376 unsigned int bufsize; /* size of the play buffer in bytes */
377 unsigned int period_bytes; /* size of the period in bytes */
378 unsigned int frags; /* number for period in the play buffer */
379 unsigned int fifo_size; /* FIFO size */
380
381 void __iomem *sd_addr; /* stream descriptor pointer */
382
383 u32 sd_int_sta_mask; /* stream int status mask */
384
385 /* pcm support */
386 struct snd_pcm_substream *substream; /* assigned substream,
387 * set in PCM open
388 */
389 unsigned int format_val; /* format value to be set in the
390 * controller and the codec
391 */
392 unsigned char stream_tag; /* assigned stream */
393 unsigned char index; /* stream index */
394 int assigned_key; /* last device# key assigned to */
395
396 bool opened:1;
397 bool running:1;
Takashi Iwai6d23c8f2015-04-17 13:34:30 +0200398 bool prepared:1;
Takashi Iwai14752412015-04-14 12:15:47 +0200399 bool no_period_wakeup:1;
Takashi Iwai8f3f6002015-04-14 12:53:28 +0200400 bool locked:1;
Takashi Iwai14752412015-04-14 12:15:47 +0200401
402 /* timestamp */
403 unsigned long start_wallclk; /* start + minimum wallclk */
404 unsigned long period_wallclk; /* wallclk for period */
405 struct timecounter tc;
406 struct cyclecounter cc;
407 int delay_negative_threshold;
408
409 struct list_head list;
Takashi Iwai8f3f6002015-04-14 12:53:28 +0200410#ifdef CONFIG_SND_HDA_DSP_LOADER
411 /* DSP access mutex */
412 struct mutex dsp_mutex;
413#endif
Takashi Iwai14752412015-04-14 12:15:47 +0200414};
415
416void snd_hdac_stream_init(struct hdac_bus *bus, struct hdac_stream *azx_dev,
417 int idx, int direction, int tag);
418struct hdac_stream *snd_hdac_stream_assign(struct hdac_bus *bus,
419 struct snd_pcm_substream *substream);
420void snd_hdac_stream_release(struct hdac_stream *azx_dev);
421
422int snd_hdac_stream_setup(struct hdac_stream *azx_dev);
423void snd_hdac_stream_cleanup(struct hdac_stream *azx_dev);
424int snd_hdac_stream_setup_periods(struct hdac_stream *azx_dev);
Jeeja KP86f65012015-04-17 17:58:58 +0530425int snd_hdac_stream_set_params(struct hdac_stream *azx_dev,
426 unsigned int format_val);
Takashi Iwai14752412015-04-14 12:15:47 +0200427void snd_hdac_stream_start(struct hdac_stream *azx_dev, bool fresh_start);
428void snd_hdac_stream_clear(struct hdac_stream *azx_dev);
429void snd_hdac_stream_stop(struct hdac_stream *azx_dev);
430void snd_hdac_stream_reset(struct hdac_stream *azx_dev);
431void snd_hdac_stream_sync_trigger(struct hdac_stream *azx_dev, bool set,
432 unsigned int streams, unsigned int reg);
433void snd_hdac_stream_sync(struct hdac_stream *azx_dev, bool start,
434 unsigned int streams);
435void snd_hdac_stream_timecounter_init(struct hdac_stream *azx_dev,
436 unsigned int streams);
437/*
438 * macros for easy use
439 */
440#define _snd_hdac_stream_write(type, dev, reg, value) \
441 ((dev)->bus->io_ops->reg_write ## type(value, (dev)->sd_addr + (reg)))
442#define _snd_hdac_stream_read(type, dev, reg) \
443 ((dev)->bus->io_ops->reg_read ## type((dev)->sd_addr + (reg)))
444
445/* read/write a register, pass without AZX_REG_ prefix */
446#define snd_hdac_stream_writel(dev, reg, value) \
447 _snd_hdac_stream_write(l, dev, AZX_REG_ ## reg, value)
448#define snd_hdac_stream_writew(dev, reg, value) \
449 _snd_hdac_stream_write(w, dev, AZX_REG_ ## reg, value)
450#define snd_hdac_stream_writeb(dev, reg, value) \
451 _snd_hdac_stream_write(b, dev, AZX_REG_ ## reg, value)
452#define snd_hdac_stream_readl(dev, reg) \
453 _snd_hdac_stream_read(l, dev, AZX_REG_ ## reg)
454#define snd_hdac_stream_readw(dev, reg) \
455 _snd_hdac_stream_read(w, dev, AZX_REG_ ## reg)
456#define snd_hdac_stream_readb(dev, reg) \
457 _snd_hdac_stream_read(b, dev, AZX_REG_ ## reg)
458
459/* update a register, pass without AZX_REG_ prefix */
460#define snd_hdac_stream_updatel(dev, reg, mask, val) \
461 snd_hdac_stream_writel(dev, reg, \
462 (snd_hdac_stream_readl(dev, reg) & \
463 ~(mask)) | (val))
464#define snd_hdac_stream_updatew(dev, reg, mask, val) \
465 snd_hdac_stream_writew(dev, reg, \
466 (snd_hdac_stream_readw(dev, reg) & \
467 ~(mask)) | (val))
468#define snd_hdac_stream_updateb(dev, reg, mask, val) \
469 snd_hdac_stream_writeb(dev, reg, \
470 (snd_hdac_stream_readb(dev, reg) & \
471 ~(mask)) | (val))
472
Takashi Iwai8f3f6002015-04-14 12:53:28 +0200473#ifdef CONFIG_SND_HDA_DSP_LOADER
474/* DSP lock helpers */
475#define snd_hdac_dsp_lock_init(dev) mutex_init(&(dev)->dsp_mutex)
476#define snd_hdac_dsp_lock(dev) mutex_lock(&(dev)->dsp_mutex)
477#define snd_hdac_dsp_unlock(dev) mutex_unlock(&(dev)->dsp_mutex)
478#define snd_hdac_stream_is_locked(dev) ((dev)->locked)
479/* DSP loader helpers */
480int snd_hdac_dsp_prepare(struct hdac_stream *azx_dev, unsigned int format,
481 unsigned int byte_size, struct snd_dma_buffer *bufp);
482void snd_hdac_dsp_trigger(struct hdac_stream *azx_dev, bool start);
483void snd_hdac_dsp_cleanup(struct hdac_stream *azx_dev,
484 struct snd_dma_buffer *dmab);
485#else /* CONFIG_SND_HDA_DSP_LOADER */
486#define snd_hdac_dsp_lock_init(dev) do {} while (0)
487#define snd_hdac_dsp_lock(dev) do {} while (0)
488#define snd_hdac_dsp_unlock(dev) do {} while (0)
489#define snd_hdac_stream_is_locked(dev) 0
490
491static inline int
492snd_hdac_dsp_prepare(struct hdac_stream *azx_dev, unsigned int format,
493 unsigned int byte_size, struct snd_dma_buffer *bufp)
494{
495 return 0;
496}
497
498static inline void snd_hdac_dsp_trigger(struct hdac_stream *azx_dev, bool start)
499{
500}
501
502static inline void snd_hdac_dsp_cleanup(struct hdac_stream *azx_dev,
503 struct snd_dma_buffer *dmab)
504{
505}
506#endif /* CONFIG_SND_HDA_DSP_LOADER */
507
508
Takashi Iwai71fc4c72015-03-03 17:33:10 +0100509/*
510 * generic array helpers
511 */
512void *snd_array_new(struct snd_array *array);
513void snd_array_free(struct snd_array *array);
514static inline void snd_array_init(struct snd_array *array, unsigned int size,
515 unsigned int align)
516{
517 array->elem_size = size;
518 array->alloc_align = align;
519}
520
521static inline void *snd_array_elem(struct snd_array *array, unsigned int idx)
522{
523 return array->list + idx * array->elem_size;
524}
525
526static inline unsigned int snd_array_index(struct snd_array *array, void *ptr)
527{
528 return (unsigned long)(ptr - array->list) / array->elem_size;
529}
530
Takashi Iwaie3d280f2015-02-17 21:46:37 +0100531#endif /* __SOUND_HDAUDIO_H */