David Howells | b920de1 | 2008-02-08 04:19:31 -0800 | [diff] [blame] | 1 | /* MN10300 On-chip serial port driver definitions |
| 2 | * |
| 3 | * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved. |
| 4 | * Written by David Howells (dhowells@redhat.com) |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or |
| 7 | * modify it under the terms of the GNU General Public Licence |
| 8 | * as published by the Free Software Foundation; either version |
| 9 | * 2 of the Licence, or (at your option) any later version. |
| 10 | */ |
| 11 | #ifndef _MN10300_SERIAL_H |
| 12 | #define _MN10300_SERIAL_H |
| 13 | |
| 14 | #ifndef __ASSEMBLY__ |
| 15 | #include <linux/serial_core.h> |
| 16 | #include <linux/termios.h> |
| 17 | #endif |
| 18 | |
| 19 | #include <asm/page.h> |
| 20 | #include <asm/serial-regs.h> |
| 21 | |
| 22 | #define NR_PORTS 3 /* should be set 3 or 9 or 16 */ |
| 23 | |
| 24 | #define MNSC_BUFFER_SIZE +(PAGE_SIZE / 2) |
| 25 | |
| 26 | /* intr_flags bits */ |
| 27 | #define MNSCx_RX_AVAIL 0x01 |
| 28 | #define MNSCx_RX_OVERF 0x02 |
| 29 | #define MNSCx_TX_SPACE 0x04 |
| 30 | #define MNSCx_TX_EMPTY 0x08 |
| 31 | |
Mark Salter | 8f0bcbc | 2012-12-12 15:36:38 +0000 | [diff] [blame] | 32 | /* tx_flags bits */ |
| 33 | #define MNSCx_TX_BREAK 0x01 |
| 34 | #define MNSCx_TX_STOP 0x02 |
| 35 | |
David Howells | b920de1 | 2008-02-08 04:19:31 -0800 | [diff] [blame] | 36 | #ifndef __ASSEMBLY__ |
| 37 | |
| 38 | struct mn10300_serial_port { |
| 39 | char *rx_buffer; /* reception buffer base */ |
| 40 | unsigned rx_inp; /* pointer to rx input offset */ |
| 41 | unsigned rx_outp; /* pointer to rx output offset */ |
| 42 | u8 tx_xchar; /* high-priority XON/XOFF buffer */ |
Mark Salter | 8f0bcbc | 2012-12-12 15:36:38 +0000 | [diff] [blame] | 43 | u8 tx_flags; /* transmit break/stop request */ |
David Howells | b920de1 | 2008-02-08 04:19:31 -0800 | [diff] [blame] | 44 | u8 intr_flags; /* interrupt flags */ |
| 45 | volatile u16 *rx_icr; /* Rx interrupt control register */ |
| 46 | volatile u16 *tx_icr; /* Tx interrupt control register */ |
| 47 | int rx_irq; /* reception IRQ */ |
| 48 | int tx_irq; /* transmission IRQ */ |
| 49 | int tm_irq; /* timer IRQ */ |
| 50 | |
| 51 | const char *name; /* name of serial port */ |
| 52 | const char *rx_name; /* Rx interrupt handler name of serial port */ |
| 53 | const char *tx_name; /* Tx interrupt handler name of serial port */ |
| 54 | const char *tm_name; /* Timer interrupt handler name */ |
| 55 | unsigned short type; /* type of serial port */ |
| 56 | unsigned char isconsole; /* T if it's a console */ |
| 57 | volatile void *_iobase; /* pointer to base of I/O control regs */ |
| 58 | volatile u16 *_control; /* control register pointer */ |
| 59 | volatile u8 *_status; /* status register pointer */ |
| 60 | volatile u8 *_intr; /* interrupt register pointer */ |
Mark Salter | 97a70b1 | 2012-12-12 15:36:38 +0000 | [diff] [blame] | 61 | volatile u8 *_rxb; /* receive buffer register pointer */ |
| 62 | volatile u8 *_txb; /* transmit buffer register pointer */ |
David Howells | b920de1 | 2008-02-08 04:19:31 -0800 | [diff] [blame] | 63 | volatile u16 *_tmicr; /* timer interrupt control register */ |
| 64 | volatile u8 *_tmxmd; /* baud rate timer mode register */ |
| 65 | volatile u16 *_tmxbr; /* baud rate timer base register */ |
| 66 | |
| 67 | /* this must come down here so that assembly can use BSET to access the |
| 68 | * above fields */ |
| 69 | struct uart_port uart; |
| 70 | |
| 71 | unsigned short rx_brk; /* current break reception status */ |
| 72 | u16 tx_cts; /* current CTS status */ |
| 73 | int gdbstub; /* preemptively stolen by GDB stub */ |
| 74 | |
| 75 | u8 clock_src; /* clock source */ |
| 76 | #define MNSCx_CLOCK_SRC_IOCLK 0 |
| 77 | #define MNSCx_CLOCK_SRC_IOBCLK 1 |
| 78 | |
| 79 | u8 div_timer; /* timer used as divisor */ |
| 80 | #define MNSCx_DIV_TIMER_16BIT 0 |
| 81 | #define MNSCx_DIV_TIMER_8BIT 1 |
| 82 | |
| 83 | u16 options; /* options */ |
| 84 | #define MNSCx_OPT_CTS 0x0001 |
| 85 | |
| 86 | unsigned long ioclk; /* base clock rate */ |
| 87 | }; |
| 88 | |
| 89 | #ifdef CONFIG_MN10300_TTYSM0 |
| 90 | extern struct mn10300_serial_port mn10300_serial_port_sif0; |
| 91 | #endif |
| 92 | |
| 93 | #ifdef CONFIG_MN10300_TTYSM1 |
| 94 | extern struct mn10300_serial_port mn10300_serial_port_sif1; |
| 95 | #endif |
| 96 | |
| 97 | #ifdef CONFIG_MN10300_TTYSM2 |
| 98 | extern struct mn10300_serial_port mn10300_serial_port_sif2; |
| 99 | #endif |
| 100 | |
| 101 | extern struct mn10300_serial_port *mn10300_serial_ports[]; |
| 102 | |
| 103 | struct mn10300_serial_int { |
| 104 | struct mn10300_serial_port *port; |
| 105 | asmlinkage void (*vdma)(void); |
| 106 | }; |
| 107 | |
| 108 | extern struct mn10300_serial_int mn10300_serial_int_tbl[]; |
| 109 | |
| 110 | extern asmlinkage void mn10300_serial_vdma_interrupt(void); |
| 111 | extern asmlinkage void mn10300_serial_vdma_rx_handler(void); |
| 112 | extern asmlinkage void mn10300_serial_vdma_tx_handler(void); |
| 113 | |
| 114 | #endif /* __ASSEMBLY__ */ |
| 115 | |
| 116 | #if defined(CONFIG_GDBSTUB_ON_TTYSM0) |
| 117 | #define SCgSTR SC0STR |
| 118 | #define SCgRXB SC0RXB |
| 119 | #define SCgRXIRQ SC0RXIRQ |
| 120 | #elif defined(CONFIG_GDBSTUB_ON_TTYSM1) |
| 121 | #define SCgSTR SC1STR |
| 122 | #define SCgRXB SC1RXB |
| 123 | #define SCgRXIRQ SC1RXIRQ |
| 124 | #elif defined(CONFIG_GDBSTUB_ON_TTYSM2) |
| 125 | #define SCgSTR SC2STR |
| 126 | #define SCgRXB SC2RXB |
| 127 | #define SCgRXIRQ SC2RXIRQ |
| 128 | #endif |
| 129 | |
| 130 | #endif /* _MN10300_SERIAL_H */ |