Steve Lee | a6e3f4f | 2020-05-18 09:50:38 +0900 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| 2 | /* |
| 3 | * Copyright (c) 2020, Maxim Integrated. |
| 4 | */ |
| 5 | |
| 6 | #ifndef _MAX98390_H |
| 7 | #define _MAX98390_H |
| 8 | |
| 9 | /* MAX98390 Register Address */ |
| 10 | #define MAX98390_SOFTWARE_RESET 0x2000 |
| 11 | #define MAX98390_INT_RAW1 0x2002 |
| 12 | #define MAX98390_INT_RAW2 0x2003 |
| 13 | #define MAX98390_INT_RAW3 0x2004 |
| 14 | #define MAX98390_INT_STATE1 0x2005 |
| 15 | #define MAX98390_INT_STATE2 0x2006 |
| 16 | #define MAX98390_INT_STATE3 0x2007 |
| 17 | #define MAX98390_INT_FLAG1 0x2008 |
| 18 | #define MAX98390_INT_FLAG2 0x2009 |
| 19 | #define MAX98390_INT_FLAG3 0x200a |
| 20 | #define MAX98390_INT_EN1 0x200b |
| 21 | #define MAX98390_INT_EN2 0x200c |
| 22 | #define MAX98390_INT_EN3 0x200d |
| 23 | #define MAX98390_INT_FLAG_CLR1 0x200e |
| 24 | #define MAX98390_INT_FLAG_CLR2 0x200f |
| 25 | #define MAX98390_INT_FLAG_CLR3 0x2010 |
| 26 | #define MAX98390_IRQ_CTRL 0x2011 |
| 27 | #define MAX98390_CLK_MON 0x2012 |
| 28 | #define MAX98390_DAT_MON 0x2014 |
| 29 | #define MAX98390_WDOG_CTRL 0x2015 |
| 30 | #define MAX98390_WDOG_RST 0x2016 |
| 31 | #define MAX98390_MEAS_ADC_THERM_WARN_THRESH 0x2017 |
| 32 | #define MAX98390_MEAS_ADC_THERM_SHDN_THRESH 0x2018 |
| 33 | #define MAX98390_MEAS_ADC_THERM_HYSTERESIS 0x2019 |
| 34 | #define MAX98390_PIN_CFG 0x201a |
| 35 | #define MAX98390_PCM_RX_EN_A 0x201b |
| 36 | #define MAX98390_PCM_RX_EN_B 0x201c |
| 37 | #define MAX98390_PCM_TX_EN_A 0x201d |
| 38 | #define MAX98390_PCM_TX_EN_B 0x201e |
| 39 | #define MAX98390_PCM_TX_HIZ_CTRL_A 0x201f |
| 40 | #define MAX98390_PCM_TX_HIZ_CTRL_B 0x2020 |
| 41 | #define MAX98390_PCM_CH_SRC_1 0x2021 |
| 42 | #define MAX98390_PCM_CH_SRC_2 0x2022 |
| 43 | #define MAX98390_PCM_CH_SRC_3 0x2023 |
| 44 | #define MAX98390_PCM_MODE_CFG 0x2024 |
| 45 | #define MAX98390_PCM_MASTER_MODE 0x2025 |
| 46 | #define MAX98390_PCM_CLK_SETUP 0x2026 |
| 47 | #define MAX98390_PCM_SR_SETUP 0x2027 |
| 48 | #define MAX98390_ICC_RX_EN_A 0x202c |
| 49 | #define MAX98390_ICC_RX_EN_B 0x202d |
| 50 | #define MAX98390_ICC_TX_EN_A 0x202e |
| 51 | #define MAX98390_ICC_TX_EN_B 0x202f |
| 52 | #define MAX98390_ICC_HIZ_MANUAL_MODE 0x2030 |
| 53 | #define MAX98390_ICC_TX_HIZ_EN_A 0x2031 |
| 54 | #define MAX98390_ICC_TX_HIZ_EN_B 0x2032 |
| 55 | #define MAX98390_ICC_LNK_EN 0x2033 |
| 56 | #define MAX98390_R2039_AMP_DSP_CFG 0x2039 |
| 57 | #define MAX98390_R203A_AMP_EN 0x203a |
| 58 | #define MAX98390_TONE_GEN_DC_CFG 0x203b |
| 59 | #define MAX98390_SPK_SRC_SEL 0x203c |
| 60 | #define MAX98390_R203D_SPK_GAIN 0x203d |
| 61 | #define MAX98390_SSM_CFG 0x203e |
| 62 | #define MAX98390_MEAS_EN 0x203f |
| 63 | #define MAX98390_MEAS_DSP_CFG 0x2040 |
| 64 | #define MAX98390_BOOST_CTRL0 0x2041 |
| 65 | #define MAX98390_BOOST_CTRL3 0x2042 |
| 66 | #define MAX98390_BOOST_CTRL1 0x2043 |
| 67 | #define MAX98390_MEAS_ADC_CFG 0x2044 |
| 68 | #define MAX98390_MEAS_ADC_BASE_MSB 0x2045 |
| 69 | #define MAX98390_MEAS_ADC_BASE_LSB 0x2046 |
| 70 | #define MAX98390_ADC_CH0_DIVIDE 0x2047 |
| 71 | #define MAX98390_ADC_CH1_DIVIDE 0x2048 |
| 72 | #define MAX98390_ADC_CH2_DIVIDE 0x2049 |
| 73 | #define MAX98390_ADC_CH0_FILT_CFG 0x204a |
| 74 | #define MAX98390_ADC_CH1_FILT_CFG 0x204b |
| 75 | #define MAX98390_ADC_CH2_FILT_CFG 0x204c |
| 76 | #define MAX98390_MEAS_ADC_CH0_READ 0x204d |
| 77 | #define MAX98390_MEAS_ADC_CH1_READ 0x204e |
| 78 | #define MAX98390_MEAS_ADC_CH2_READ 0x204f |
| 79 | #define MAX98390_PWR_GATE_CTL 0x2050 |
| 80 | #define MAX98390_PWR_GATE_STATUS 0x2051 |
| 81 | #define MAX98390_VBAT_LOW_STATUS 0x2052 |
| 82 | #define MAX98390_PVDD_LOW_STATUS 0x2053 |
| 83 | #define MAX98390_BROWNOUT_STATUS 0x2054 |
| 84 | #define MAX98390_BROWNOUT_EN 0x2055 |
| 85 | #define MAX98390_BROWNOUT_INFINITE_HOLD 0x2056 |
| 86 | #define MAX98390_BROWNOUT_INFINITE_HOLD_CLR 0x2057 |
| 87 | #define MAX98390_BROWNOUT_LVL_HOLD 0x2058 |
| 88 | #define MAX98390_BROWNOUT_LVL1_THRESH 0x2059 |
| 89 | #define MAX98390_BROWNOUT_LVL2_THRESH 0x205a |
| 90 | #define MAX98390_BROWNOUT_LVL3_THRESH 0x205b |
| 91 | #define MAX98390_BROWNOUT_LVL4_THRESH 0x205c |
| 92 | #define MAX98390_BROWNOUT_THRESH_HYSTERYSIS 0x205d |
| 93 | #define MAX98390_BROWNOUT_AMP_LIMITER_ATK_REL 0x205e |
| 94 | #define MAX98390_BROWNOUT_AMP_GAIN_ATK_REL 0x205f |
| 95 | #define MAX98390_BROWNOUT_AMP1_CLIP_MODE 0x2060 |
| 96 | #define MAX98390_BROWNOUT_LVL1_CUR_LIMIT 0x2061 |
| 97 | #define MAX98390_BROWNOUT_LVL1_AMP1_CTRL1 0x2062 |
| 98 | #define MAX98390_BROWNOUT_LVL1_AMP1_CTRL2 0x2063 |
| 99 | #define MAX98390_BROWNOUT_LVL1_AMP1_CTRL3 0x2064 |
| 100 | #define MAX98390_BROWNOUT_LVL2_CUR_LIMIT 0x2065 |
| 101 | #define MAX98390_BROWNOUT_LVL2_AMP1_CTRL1 0x2066 |
| 102 | #define MAX98390_BROWNOUT_LVL2_AMP1_CTRL2 0x2067 |
| 103 | #define MAX98390_BROWNOUT_LVL2_AMP1_CTRL3 0x2068 |
| 104 | #define MAX98390_BROWNOUT_LVL3_CUR_LIMIT 0x2069 |
| 105 | #define MAX98390_BROWNOUT_LVL3_AMP1_CTRL1 0x206a |
| 106 | #define MAX98390_BROWNOUT_LVL3_AMP1_CTRL2 0x206b |
| 107 | #define MAX98390_BROWNOUT_LVL3_AMP1_CTRL3 0x206c |
| 108 | #define MAX98390_BROWNOUT_LVL4_CUR_LIMIT 0x206d |
| 109 | #define MAX98390_BROWNOUT_LVL4_AMP1_CTRL1 0x206e |
| 110 | #define MAX98390_BROWNOUT_LVL4_AMP1_CTRL2 0x206f |
| 111 | #define MAX98390_BROWNOUT_LVL4_AMP1_CTRL3 0x2070 |
| 112 | #define MAX98390_BROWNOUT_LOWEST_STATUS 0x2071 |
| 113 | #define MAX98390_BROWNOUT_ILIM_HLD 0x2072 |
| 114 | #define MAX98390_BROWNOUT_LIM_HLD 0x2073 |
| 115 | #define MAX98390_BROWNOUT_CLIP_HLD 0x2074 |
| 116 | #define MAX98390_BROWNOUT_GAIN_HLD 0x2075 |
| 117 | #define MAX98390_ENV_TRACK_VOUT_HEADROOM 0x2076 |
| 118 | #define MAX98390_ENV_TRACK_BOOST_VOUT_DELAY 0x2077 |
| 119 | #define MAX98390_ENV_TRACK_REL_RATE 0x2078 |
| 120 | #define MAX98390_ENV_TRACK_HOLD_RATE 0x2079 |
| 121 | #define MAX98390_ENV_TRACK_CTRL 0x207a |
| 122 | #define MAX98390_ENV_TRACK_BOOST_VOUT_READ 0x207b |
| 123 | #define MAX98390_BOOST_BYPASS1 0x207c |
| 124 | #define MAX98390_BOOST_BYPASS2 0x207d |
| 125 | #define MAX98390_BOOST_BYPASS3 0x207e |
| 126 | #define MAX98390_FET_SCALING1 0x207f |
| 127 | #define MAX98390_FET_SCALING2 0x2080 |
| 128 | #define MAX98390_FET_SCALING3 0x2081 |
| 129 | #define MAX98390_FET_SCALING4 0x2082 |
| 130 | #define MAX98390_SPK_SPEEDUP 0x2084 |
| 131 | |
| 132 | #define DSM_STBASS_HPF_B0_BYTE0 0x2101 |
| 133 | #define DSM_STBASS_HPF_B0_BYTE1 0x2102 |
| 134 | #define DSM_STBASS_HPF_B0_BYTE2 0x2103 |
| 135 | #define DSM_STBASS_HPF_B1_BYTE0 0x2105 |
| 136 | #define DSM_STBASS_HPF_B1_BYTE1 0x2106 |
| 137 | #define DSM_STBASS_HPF_B1_BYTE2 0x2107 |
| 138 | #define DSM_STBASS_HPF_B2_BYTE0 0x2109 |
| 139 | #define DSM_STBASS_HPF_B2_BYTE1 0x210a |
| 140 | #define DSM_STBASS_HPF_B2_BYTE2 0x210b |
| 141 | #define DSM_STBASS_HPF_A1_BYTE0 0x210d |
| 142 | #define DSM_STBASS_HPF_A1_BYTE1 0x210e |
| 143 | #define DSM_STBASS_HPF_A1_BYTE2 0x210f |
| 144 | #define DSM_STBASS_HPF_A2_BYTE0 0x2111 |
| 145 | #define DSM_STBASS_HPF_A2_BYTE1 0x2112 |
| 146 | #define DSM_STBASS_HPF_A2_BYTE2 0x2113 |
| 147 | #define DSM_STBASS_LPF_B0_BYTE0 0x2115 |
| 148 | #define DSM_STBASS_LPF_B0_BYTE1 0x2116 |
| 149 | #define DSM_STBASS_LPF_B0_BYTE2 0x2117 |
| 150 | #define DSM_STBASS_LPF_B1_BYTE0 0x2119 |
| 151 | #define DSM_STBASS_LPF_B1_BYTE1 0x211a |
| 152 | #define DSM_STBASS_LPF_B1_BYTE2 0x211b |
| 153 | #define DSM_STBASS_LPF_B2_BYTE0 0x211d |
| 154 | #define DSM_STBASS_LPF_B2_BYTE1 0x211e |
| 155 | #define DSM_STBASS_LPF_B2_BYTE2 0x211f |
| 156 | #define DSM_STBASS_LPF_A1_BYTE0 0x2121 |
| 157 | #define DSM_STBASS_LPF_A1_BYTE1 0x2122 |
| 158 | #define DSM_STBASS_LPF_A1_BYTE2 0x2123 |
| 159 | #define DSM_STBASS_LPF_A2_BYTE0 0x2125 |
| 160 | #define DSM_STBASS_LPF_A2_BYTE1 0x2126 |
| 161 | #define DSM_STBASS_LPF_A2_BYTE2 0x2127 |
| 162 | #define DSM_EQ_BQ1_B0_BYTE0 0x2129 |
| 163 | #define DSM_EQ_BQ1_B0_BYTE1 0x212a |
| 164 | #define DSM_EQ_BQ1_B0_BYTE2 0x212b |
| 165 | #define DSM_EQ_BQ1_B1_BYTE0 0x212d |
| 166 | #define DSM_EQ_BQ1_B1_BYTE1 0x212e |
| 167 | #define DSM_EQ_BQ1_B1_BYTE2 0x212f |
| 168 | #define DSM_EQ_BQ1_B2_BYTE0 0x2131 |
| 169 | #define DSM_EQ_BQ1_B2_BYTE1 0x2132 |
| 170 | #define DSM_EQ_BQ1_B2_BYTE2 0x2133 |
| 171 | #define DSM_EQ_BQ1_A1_BYTE0 0x2135 |
| 172 | #define DSM_EQ_BQ1_A1_BYTE1 0x2136 |
| 173 | #define DSM_EQ_BQ1_A1_BYTE2 0x2137 |
| 174 | #define DSM_EQ_BQ1_A2_BYTE0 0x2139 |
| 175 | #define DSM_EQ_BQ1_A2_BYTE1 0x213a |
| 176 | #define DSM_EQ_BQ1_A2_BYTE2 0x213b |
| 177 | #define DSM_EQ_BQ2_B0_BYTE0 0x213d |
| 178 | #define DSM_EQ_BQ2_B0_BYTE1 0x213e |
| 179 | #define DSM_EQ_BQ2_B0_BYTE2 0x213f |
| 180 | #define DSM_EQ_BQ2_B1_BYTE0 0x2141 |
| 181 | #define DSM_EQ_BQ2_B1_BYTE1 0x2142 |
| 182 | #define DSM_EQ_BQ2_B1_BYTE2 0x2143 |
| 183 | #define DSM_EQ_BQ2_B2_BYTE0 0x2145 |
| 184 | #define DSM_EQ_BQ2_B2_BYTE1 0x2146 |
| 185 | #define DSM_EQ_BQ2_B2_BYTE2 0x2147 |
| 186 | #define DSM_EQ_BQ2_A1_BYTE0 0x2149 |
| 187 | #define DSM_EQ_BQ2_A1_BYTE1 0x214a |
| 188 | #define DSM_EQ_BQ2_A1_BYTE2 0x214b |
| 189 | #define DSM_EQ_BQ2_A2_BYTE0 0x214d |
| 190 | #define DSM_EQ_BQ2_A2_BYTE1 0x214e |
| 191 | #define DSM_EQ_BQ2_A2_BYTE2 0x214f |
| 192 | #define DSM_EQ_BQ3_B0_BYTE0 0x2151 |
| 193 | #define DSM_EQ_BQ3_B0_BYTE1 0x2152 |
| 194 | #define DSM_EQ_BQ3_B0_BYTE2 0x2153 |
| 195 | #define DSM_EQ_BQ3_B1_BYTE0 0x2155 |
| 196 | #define DSM_EQ_BQ3_B1_BYTE1 0x2156 |
| 197 | #define DSM_EQ_BQ3_B1_BYTE2 0x2157 |
| 198 | #define DSM_EQ_BQ3_B2_BYTE0 0x2159 |
| 199 | #define DSM_EQ_BQ3_B2_BYTE1 0x215a |
| 200 | #define DSM_EQ_BQ3_B2_BYTE2 0x215b |
| 201 | #define DSM_EQ_BQ3_A1_BYTE0 0x215d |
| 202 | #define DSM_EQ_BQ3_A1_BYTE1 0x215e |
| 203 | #define DSM_EQ_BQ3_A1_BYTE2 0x215f |
| 204 | #define DSM_EQ_BQ3_A2_BYTE0 0x2161 |
| 205 | #define DSM_EQ_BQ3_A2_BYTE1 0x2162 |
| 206 | #define DSM_EQ_BQ3_A2_BYTE2 0x2163 |
| 207 | #define DSM_EQ_BQ4_B0_BYTE0 0x2165 |
| 208 | #define DSM_EQ_BQ4_B0_BYTE1 0x2166 |
| 209 | #define DSM_EQ_BQ4_B0_BYTE2 0x2167 |
| 210 | #define DSM_EQ_BQ4_B1_BYTE0 0x2169 |
| 211 | #define DSM_EQ_BQ4_B1_BYTE1 0x216a |
| 212 | #define DSM_EQ_BQ4_B1_BYTE2 0x216b |
| 213 | #define DSM_EQ_BQ4_B2_BYTE0 0x216d |
| 214 | #define DSM_EQ_BQ4_B2_BYTE1 0x216e |
| 215 | #define DSM_EQ_BQ4_B2_BYTE2 0x216f |
| 216 | #define DSM_EQ_BQ4_A1_BYTE0 0x2171 |
| 217 | #define DSM_EQ_BQ4_A1_BYTE1 0x2172 |
| 218 | #define DSM_EQ_BQ4_A1_BYTE2 0x2173 |
| 219 | #define DSM_EQ_BQ4_A2_BYTE0 0x2175 |
| 220 | #define DSM_EQ_BQ4_A2_BYTE1 0x2176 |
| 221 | #define DSM_EQ_BQ4_A2_BYTE2 0x2177 |
| 222 | #define DSM_EQ_BQ5_B0_BYTE0 0x2179 |
| 223 | #define DSM_EQ_BQ5_B0_BYTE1 0x217a |
| 224 | #define DSM_EQ_BQ5_B0_BYTE2 0x217b |
| 225 | #define DSM_EQ_BQ5_B1_BYTE0 0x217d |
| 226 | #define DSM_EQ_BQ5_B1_BYTE1 0x217e |
| 227 | #define DSM_EQ_BQ5_B1_BYTE2 0x217f |
| 228 | #define DSM_EQ_BQ5_B2_BYTE0 0x2181 |
| 229 | #define DSM_EQ_BQ5_B2_BYTE1 0x2182 |
| 230 | #define DSM_EQ_BQ5_B2_BYTE2 0x2183 |
| 231 | #define DSM_EQ_BQ5_A1_BYTE0 0x2185 |
| 232 | #define DSM_EQ_BQ5_A1_BYTE1 0x2186 |
| 233 | #define DSM_EQ_BQ5_A1_BYTE2 0x2187 |
| 234 | #define DSM_EQ_BQ5_A2_BYTE0 0x2189 |
| 235 | #define DSM_EQ_BQ5_A2_BYTE1 0x218a |
| 236 | #define DSM_EQ_BQ5_A2_BYTE2 0x218b |
| 237 | #define DSM_EQ_BQ6_B0_BYTE0 0x218d |
| 238 | #define DSM_EQ_BQ6_B0_BYTE1 0x218e |
| 239 | #define DSM_EQ_BQ6_B0_BYTE2 0x218f |
| 240 | #define DSM_EQ_BQ6_B1_BYTE0 0x2191 |
| 241 | #define DSM_EQ_BQ6_B1_BYTE1 0x2192 |
| 242 | #define DSM_EQ_BQ6_B1_BYTE2 0x2193 |
| 243 | #define DSM_EQ_BQ6_B2_BYTE0 0x2195 |
| 244 | #define DSM_EQ_BQ6_B2_BYTE1 0x2196 |
| 245 | #define DSM_EQ_BQ6_B2_BYTE2 0x2197 |
| 246 | #define DSM_EQ_BQ6_A1_BYTE0 0x2199 |
| 247 | #define DSM_EQ_BQ6_A1_BYTE1 0x219a |
| 248 | #define DSM_EQ_BQ6_A1_BYTE2 0x219b |
| 249 | #define DSM_EQ_BQ6_A2_BYTE0 0x219d |
| 250 | #define DSM_EQ_BQ6_A2_BYTE1 0x219e |
| 251 | #define DSM_EQ_BQ6_A2_BYTE2 0x219f |
| 252 | #define DSM_EQ_BQ7_B0_BYTE0 0x21a1 |
| 253 | #define DSM_EQ_BQ7_B0_BYTE1 0x21a2 |
| 254 | #define DSM_EQ_BQ7_B0_BYTE2 0x21a3 |
| 255 | #define DSM_EQ_BQ7_B1_BYTE0 0x21a5 |
| 256 | #define DSM_EQ_BQ7_B1_BYTE1 0x21a6 |
| 257 | #define DSM_EQ_BQ7_B1_BYTE2 0x21a7 |
| 258 | #define DSM_EQ_BQ7_B2_BYTE0 0x21a9 |
| 259 | #define DSM_EQ_BQ7_B2_BYTE1 0x21aa |
| 260 | #define DSM_EQ_BQ7_B2_BYTE2 0x21ab |
| 261 | #define DSM_EQ_BQ7_A1_BYTE0 0x21ad |
| 262 | #define DSM_EQ_BQ7_A1_BYTE1 0x21ae |
| 263 | #define DSM_EQ_BQ7_A1_BYTE2 0x21af |
| 264 | #define DSM_EQ_BQ7_A2_BYTE0 0x21b1 |
| 265 | #define DSM_EQ_BQ7_A2_BYTE1 0x21b2 |
| 266 | #define DSM_EQ_BQ7_A2_BYTE2 0x21b3 |
| 267 | #define DSM_EQ_BQ8_B0_BYTE0 0x21b5 |
| 268 | #define DSM_EQ_BQ8_B0_BYTE1 0x21b6 |
| 269 | #define DSM_EQ_BQ8_B0_BYTE2 0x21b7 |
| 270 | #define DSM_EQ_BQ8_B1_BYTE0 0x21b9 |
| 271 | #define DSM_EQ_BQ8_B1_BYTE1 0x21ba |
| 272 | #define DSM_EQ_BQ8_B1_BYTE2 0x21bb |
| 273 | #define DSM_EQ_BQ8_B2_BYTE0 0x21bd |
| 274 | #define DSM_EQ_BQ8_B2_BYTE1 0x21be |
| 275 | #define DSM_EQ_BQ8_B2_BYTE2 0x21bf |
| 276 | #define DSM_EQ_BQ8_A1_BYTE0 0x21c1 |
| 277 | #define DSM_EQ_BQ8_A1_BYTE1 0x21c2 |
| 278 | #define DSM_EQ_BQ8_A1_BYTE2 0x21c3 |
| 279 | #define DSM_EQ_BQ8_A2_BYTE0 0x21c5 |
| 280 | #define DSM_EQ_BQ8_A2_BYTE1 0x21c6 |
| 281 | #define DSM_EQ_BQ8_A2_BYTE2 0x21c7 |
| 282 | #define DSM_LFX_BQ_B0_BYTE0 0x21c9 |
| 283 | #define DSM_LFX_BQ_B0_BYTE1 0x21ca |
| 284 | #define DSM_LFX_BQ_B0_BYTE2 0x21cb |
| 285 | #define DSM_LFX_BQ_B1_BYTE0 0x21cd |
| 286 | #define DSM_LFX_BQ_B1_BYTE1 0x21ce |
| 287 | #define DSM_LFX_BQ_B1_BYTE2 0x21cf |
| 288 | #define DSM_LFX_BQ_B2_BYTE0 0x21d1 |
| 289 | #define DSM_LFX_BQ_B2_BYTE1 0x21d2 |
| 290 | #define DSM_LFX_BQ_B2_BYTE2 0x21d3 |
| 291 | #define DSM_LFX_BQ_A1_BYTE0 0x21d5 |
| 292 | #define DSM_LFX_BQ_A1_BYTE1 0x21d6 |
| 293 | #define DSM_LFX_BQ_A1_BYTE2 0x21d7 |
| 294 | #define DSM_LFX_BQ_A2_BYTE0 0x21d9 |
| 295 | #define DSM_LFX_BQ_A2_BYTE1 0x21da |
| 296 | #define DSM_LFX_BQ_A2_BYTE2 0x21db |
| 297 | #define DSM_PPR_HPF_B0_BYTE0 0x21dd |
| 298 | #define DSM_PPR_HPF_B0_BYTE1 0x21de |
| 299 | #define DSM_PPR_HPF_B0_BYTE2 0x21df |
| 300 | #define DSM_PPR_HPF_B1_BYTE0 0x21e1 |
| 301 | #define DSM_PPR_HPF_B1_BYTE1 0x21e2 |
| 302 | #define DSM_PPR_HPF_B1_BYTE2 0x21e3 |
| 303 | #define DSM_PPR_HPF_B2_BYTE0 0x21e5 |
| 304 | #define DSM_PPR_HPF_B2_BYTE1 0x21e6 |
| 305 | #define DSM_PPR_HPF_B2_BYTE2 0x21e7 |
| 306 | #define DSM_PPR_HPF_A1_BYTE0 0x21e9 |
| 307 | #define DSM_PPR_HPF_A1_BYTE1 0x21ea |
| 308 | #define DSM_PPR_HPF_A1_BYTE2 0x21eb |
| 309 | #define DSM_PPR_HPF_A2_BYTE0 0x21ed |
| 310 | #define DSM_PPR_HPF_A2_BYTE1 0x21ee |
| 311 | #define DSM_PPR_HPF_A2_BYTE2 0x21ef |
| 312 | #define DSM_PPR_LPF_B0_BYTE0 0x21f1 |
| 313 | #define DSM_PPR_LPF_B0_BYTE1 0x21f2 |
| 314 | #define DSM_PPR_LPF_B0_BYTE2 0x21f3 |
| 315 | #define DSM_PPR_LPF_B1_BYTE0 0x21f5 |
| 316 | #define DSM_PPR_LPF_B1_BYTE1 0x21f6 |
| 317 | #define DSM_PPR_LPF_B1_BYTE2 0x21f7 |
| 318 | #define DSM_PPR_LPF_B2_BYTE0 0x21f9 |
| 319 | #define DSM_PPR_LPF_B2_BYTE1 0x21fa |
| 320 | #define DSM_PPR_LPF_B2_BYTE2 0x21fb |
| 321 | #define DSM_PPR_LPF_A1_BYTE0 0x21fd |
| 322 | #define DSM_PPR_LPF_A1_BYTE1 0x21fe |
| 323 | #define DSM_PPR_LPF_A1_BYTE2 0x21ff |
| 324 | #define DSM_PPR_LPF_A2_BYTE0 0x2201 |
| 325 | #define DSM_PPR_LPF_A2_BYTE1 0x2202 |
| 326 | #define DSM_PPR_LPF_A2_BYTE2 0x2203 |
| 327 | #define DSM_SPL_BQ_B0_BYTE0 0x2205 |
| 328 | #define DSM_SPL_BQ_B0_BYTE1 0x2206 |
| 329 | #define DSM_SPL_BQ_B0_BYTE2 0x2207 |
| 330 | #define DSM_SPL_BQ_B1_BYTE0 0x2209 |
| 331 | #define DSM_SPL_BQ_B1_BYTE1 0x220a |
| 332 | #define DSM_SPL_BQ_B1_BYTE2 0x220b |
| 333 | #define DSM_SPL_BQ_B2_BYTE0 0x220d |
| 334 | #define DSM_SPL_BQ_B2_BYTE1 0x220e |
| 335 | #define DSM_SPL_BQ_B2_BYTE2 0x220f |
| 336 | #define DSM_SPL_BQ_A1_BYTE0 0x2211 |
| 337 | #define DSM_SPL_BQ_A1_BYTE1 0x2212 |
| 338 | #define DSM_SPL_BQ_A1_BYTE2 0x2213 |
| 339 | #define DSM_SPL_BQ_A2_BYTE0 0x2215 |
| 340 | #define DSM_SPL_BQ_A2_BYTE1 0x2216 |
| 341 | #define DSM_SPL_BQ_A2_BYTE2 0x2217 |
| 342 | #define DSM_EXCUR_BQ_B0_BYTE0 0x2219 |
| 343 | #define DSM_EXCUR_BQ_B0_BYTE1 0x221a |
| 344 | #define DSM_EXCUR_BQ_B0_BYTE2 0x221b |
| 345 | #define DSM_EXCUR_BQ_B1_BYTE0 0x221d |
| 346 | #define DSM_EXCUR_BQ_B1_BYTE1 0x221e |
| 347 | #define DSM_EXCUR_BQ_B1_BYTE2 0x221f |
| 348 | #define DSM_EXCUR_BQ_B2_BYTE0 0x2221 |
| 349 | #define DSM_EXCUR_BQ_B2_BYTE1 0x2222 |
| 350 | #define DSM_EXCUR_BQ_B2_BYTE2 0x2223 |
| 351 | #define DSM_EXCUR_BQ_A1_BYTE0 0x2225 |
| 352 | #define DSM_EXCUR_BQ_A1_BYTE1 0x2226 |
| 353 | #define DSM_EXCUR_BQ_A1_BYTE2 0x2227 |
| 354 | #define DSM_EXCUR_BQ_A2_BYTE0 0x2229 |
| 355 | #define DSM_EXCUR_BQ_A2_BYTE1 0x222a |
| 356 | #define DSM_EXCUR_BQ_A2_BYTE2 0x222b |
| 357 | #define DSM_EXCPROT_HPF1_B0_BYTE0 0x222d |
| 358 | #define DSM_EXCPROT_HPF1_B0_BYTE1 0x222e |
| 359 | #define DSM_EXCPROT_HPF1_B0_BYTE2 0x222f |
| 360 | #define DSM_EXCPROT_HPF1_B1_BYTE0 0x2231 |
| 361 | #define DSM_EXCPROT_HPF1_B1_BYTE1 0x2232 |
| 362 | #define DSM_EXCPROT_HPF1_B1_BYTE2 0x2233 |
| 363 | #define DSM_EXCPROT_HPF1_B2_BYTE0 0x2235 |
| 364 | #define DSM_EXCPROT_HPF1_B2_BYTE1 0x2236 |
| 365 | #define DSM_EXCPROT_HPF1_B2_BYTE2 0x2237 |
| 366 | #define DSM_EXCPROT_HPF1_A1_BYTE0 0x2239 |
| 367 | #define DSM_EXCPROT_HPF1_A1_BYTE1 0x223a |
| 368 | #define DSM_EXCPROT_HPF1_A1_BYTE2 0x223b |
| 369 | #define DSM_EXCPROT_HPF1_A2_BYTE0 0x223d |
| 370 | #define DSM_EXCPROT_HPF1_A2_BYTE1 0x223e |
| 371 | #define DSM_EXCPROT_HPF1_A2_BYTE2 0x223f |
| 372 | #define DSM_EXCPROT_HPF2_B0_BYTE0 0x2241 |
| 373 | #define DSM_EXCPROT_HPF2_B0_BYTE1 0x2242 |
| 374 | #define DSM_EXCPROT_HPF2_B0_BYTE2 0x2243 |
| 375 | #define DSM_EXCPROT_HPF2_B1_BYTE0 0x2245 |
| 376 | #define DSM_EXCPROT_HPF2_B1_BYTE1 0x2246 |
| 377 | #define DSM_EXCPROT_HPF2_B1_BYTE2 0x2247 |
| 378 | #define DSM_EXCPROT_HPF2_B2_BYTE0 0x2249 |
| 379 | #define DSM_EXCPROT_HPF2_B2_BYTE1 0x224a |
| 380 | #define DSM_EXCPROT_HPF2_B2_BYTE2 0x224b |
| 381 | #define DSM_EXCPROT_HPF2_A1_BYTE0 0x224d |
| 382 | #define DSM_EXCPROT_HPF2_A1_BYTE1 0x224e |
| 383 | #define DSM_EXCPROT_HPF2_A1_BYTE2 0x224f |
| 384 | #define DSM_EXCPROT_HPF2_A2_BYTE0 0x2251 |
| 385 | #define DSM_EXCPROT_HPF2_A2_BYTE1 0x2252 |
| 386 | #define DSM_EXCPROT_HPF2_A2_BYTE2 0x2253 |
| 387 | #define DSM_EXCPROT_HPF3_B0_BYTE0 0x2255 |
| 388 | #define DSM_EXCPROT_HPF3_B0_BYTE1 0x2256 |
| 389 | #define DSM_EXCPROT_HPF3_B0_BYTE2 0x2257 |
| 390 | #define DSM_EXCPROT_HPF3_B1_BYTE0 0x2259 |
| 391 | #define DSM_EXCPROT_HPF3_B1_BYTE1 0x225a |
| 392 | #define DSM_EXCPROT_HPF3_B1_BYTE2 0x225b |
| 393 | #define DSM_EXCPROT_HPF3_B2_BYTE0 0x225d |
| 394 | #define DSM_EXCPROT_HPF3_B2_BYTE1 0x225e |
| 395 | #define DSM_EXCPROT_HPF3_B2_BYTE2 0x225f |
| 396 | #define DSM_EXCPROT_HPF3_A1_BYTE0 0x2261 |
| 397 | #define DSM_EXCPROT_HPF3_A1_BYTE1 0x2262 |
| 398 | #define DSM_EXCPROT_HPF3_A1_BYTE2 0x2263 |
| 399 | #define DSM_EXCPROT_HPF3_A2_BYTE0 0x2265 |
| 400 | #define DSM_EXCPROT_HPF3_A2_BYTE1 0x2266 |
| 401 | #define DSM_EXCPROT_HPF3_A2_BYTE2 0x2267 |
| 402 | #define DSM_EXCPROT_HPF4_B0_BYTE0 0x2269 |
| 403 | #define DSM_EXCPROT_HPF4_B0_BYTE1 0x226a |
| 404 | #define DSM_EXCPROT_HPF4_B0_BYTE2 0x226b |
| 405 | #define DSM_EXCPROT_HPF4_B1_BYTE0 0x226d |
| 406 | #define DSM_EXCPROT_HPF4_B1_BYTE1 0x226e |
| 407 | #define DSM_EXCPROT_HPF4_B1_BYTE2 0x226f |
| 408 | #define DSM_EXCPROT_HPF4_B2_BYTE0 0x2271 |
| 409 | #define DSM_EXCPROT_HPF4_B2_BYTE1 0x2272 |
| 410 | #define DSM_EXCPROT_HPF4_B2_BYTE2 0x2273 |
| 411 | #define DSM_EXCPROT_HPF4_A1_BYTE0 0x2275 |
| 412 | #define DSM_EXCPROT_HPF4_A1_BYTE1 0x2276 |
| 413 | #define DSM_EXCPROT_HPF4_A1_BYTE2 0x2277 |
| 414 | #define DSM_EXCPROT_HPF4_A2_BYTE0 0x2279 |
| 415 | #define DSM_EXCPROT_HPF4_A2_BYTE1 0x227a |
| 416 | #define DSM_EXCPROT_HPF4_A2_BYTE2 0x227b |
| 417 | #define DSM_EXCPROT_HPF5_B0_BYTE0 0x227d |
| 418 | #define DSM_EXCPROT_HPF5_B0_BYTE1 0x227e |
| 419 | #define DSM_EXCPROT_HPF5_B0_BYTE2 0x227f |
| 420 | #define DSM_EXCPROT_HPF5_B1_BYTE0 0x2281 |
| 421 | #define DSM_EXCPROT_HPF5_B1_BYTE1 0x2282 |
| 422 | #define DSM_EXCPROT_HPF5_B1_BYTE2 0x2283 |
| 423 | #define DSM_EXCPROT_HPF5_B2_BYTE0 0x2285 |
| 424 | #define DSM_EXCPROT_HPF5_B2_BYTE1 0x2286 |
| 425 | #define DSM_EXCPROT_HPF5_B2_BYTE2 0x2287 |
| 426 | #define DSM_EXCPROT_HPF5_A1_BYTE0 0x2289 |
| 427 | #define DSM_EXCPROT_HPF5_A1_BYTE1 0x228a |
| 428 | #define DSM_EXCPROT_HPF5_A1_BYTE2 0x228b |
| 429 | #define DSM_EXCPROT_HPF5_A2_BYTE0 0x228d |
| 430 | #define DSM_EXCPROT_HPF5_A2_BYTE1 0x228e |
| 431 | #define DSM_EXCPROT_HPF5_A2_BYTE2 0x228f |
| 432 | #define DSM_DEBUZZ_BPF_B0_BYTE0 0x2291 |
| 433 | #define DSM_DEBUZZ_BPF_B0_BYTE1 0x2292 |
| 434 | #define DSM_DEBUZZ_BPF_B0_BYTE2 0x2293 |
| 435 | #define DSM_DEBUZZ_BPF_B1_BYTE0 0x2295 |
| 436 | #define DSM_DEBUZZ_BPF_B1_BYTE1 0x2296 |
| 437 | #define DSM_DEBUZZ_BPF_B1_BYTE2 0x2297 |
| 438 | #define DSM_DEBUZZ_BPF_B2_BYTE0 0x2299 |
| 439 | #define DSM_DEBUZZ_BPF_B2_BYTE1 0x229a |
| 440 | #define DSM_DEBUZZ_BPF_B2_BYTE2 0x229b |
| 441 | #define DSM_DEBUZZ_BPF_A1_BYTE0 0x229d |
| 442 | #define DSM_DEBUZZ_BPF_A1_BYTE1 0x229e |
| 443 | #define DSM_DEBUZZ_BPF_A1_BYTE2 0x229f |
| 444 | #define DSM_DEBUZZ_BPF_A2_BYTE0 0x22a1 |
| 445 | #define DSM_DEBUZZ_BPF_A2_BYTE1 0x22a2 |
| 446 | #define DSM_DEBUZZ_BPF_A2_BYTE2 0x22a3 |
| 447 | #define DSM_DEBUZZ_PORT_B0_BYTE0 0x22a5 |
| 448 | #define DSM_DEBUZZ_PORT_B0_BYTE1 0x22a6 |
| 449 | #define DSM_DEBUZZ_PORT_B0_BYTE2 0x22a7 |
| 450 | #define DSM_DEBUZZ_PORT_B1_BYTE0 0x22a9 |
| 451 | #define DSM_DEBUZZ_PORT_B1_BYTE1 0x22aa |
| 452 | #define DSM_DEBUZZ_PORT_B1_BYTE2 0x22ab |
| 453 | #define DSM_DEBUZZ_PORT_B2_BYTE0 0x22ad |
| 454 | #define DSM_DEBUZZ_PORT_B2_BYTE1 0x22ae |
| 455 | #define DSM_DEBUZZ_PORT_B2_BYTE2 0x22af |
| 456 | #define DSM_DEBUZZ_PORT_A1_BYTE0 0x22b1 |
| 457 | #define DSM_DEBUZZ_PORT_A1_BYTE1 0x22b2 |
| 458 | #define DSM_DEBUZZ_PORT_A1_BYTE2 0x22b3 |
| 459 | #define DSM_DEBUZZ_PORT_A2_BYTE0 0x22b5 |
| 460 | #define DSM_DEBUZZ_PORT_A2_BYTE1 0x22b6 |
| 461 | #define DSM_DEBUZZ_PORT_A2_BYTE2 0x22b7 |
| 462 | #define DSM_DEBUZZ_NOTCH_B0_BYTE0 0x22b9 |
| 463 | #define DSM_DEBUZZ_NOTCH_B0_BYTE1 0x22ba |
| 464 | #define DSM_DEBUZZ_NOTCH_B0_BYTE2 0x22bb |
| 465 | #define DSM_DEBUZZ_NOTCH_B1_BYTE0 0x22bd |
| 466 | #define DSM_DEBUZZ_NOTCH_B1_BYTE1 0x22be |
| 467 | #define DSM_DEBUZZ_NOTCH_B1_BYTE2 0x22bf |
| 468 | #define DSM_DEBUZZ_NOTCH_B2_BYTE0 0x22c1 |
| 469 | #define DSM_DEBUZZ_NOTCH_B2_BYTE1 0x22c2 |
| 470 | #define DSM_DEBUZZ_NOTCH_B2_BYTE2 0x22c3 |
| 471 | #define DSM_DEBUZZ_NOTCH_A1_BYTE0 0x22c5 |
| 472 | #define DSM_DEBUZZ_NOTCH_A1_BYTE1 0x22c6 |
| 473 | #define DSM_DEBUZZ_NOTCH_A1_BYTE2 0x22c7 |
| 474 | #define DSM_DEBUZZ_NOTCH_A2_BYTE0 0x22c9 |
| 475 | #define DSM_DEBUZZ_NOTCH_A2_BYTE1 0x22ca |
| 476 | #define DSM_DEBUZZ_NOTCH_A2_BYTE2 0x22cb |
| 477 | #define DSM_THERMAL_BQ_B0_BYTE0 0x22cd |
| 478 | #define DSM_THERMAL_BQ_B0_BYTE1 0x22ce |
| 479 | #define DSM_THERMAL_BQ_B0_BYTE2 0x22cf |
| 480 | #define DSM_THERMAL_BQ_B1_BYTE0 0x22d1 |
| 481 | #define DSM_THERMAL_BQ_B1_BYTE1 0x22d2 |
| 482 | #define DSM_THERMAL_BQ_B1_BYTE2 0x22d3 |
| 483 | #define DSM_THERMAL_BQ_B2_BYTE0 0x22d5 |
| 484 | #define DSM_THERMAL_BQ_B2_BYTE1 0x22d6 |
| 485 | #define DSM_THERMAL_BQ_B2_BYTE2 0x22d7 |
| 486 | #define DSM_THERMAL_BQ_A1_BYTE0 0x22d9 |
| 487 | #define DSM_THERMAL_BQ_A1_BYTE1 0x22da |
| 488 | #define DSM_THERMAL_BQ_A1_BYTE2 0x22db |
| 489 | #define DSM_THERMAL_BQ_A2_BYTE0 0x22dd |
| 490 | #define DSM_THERMAL_BQ_A2_BYTE1 0x22de |
| 491 | #define DSM_THERMAL_BQ_A2_BYTE2 0x22df |
| 492 | #define DSM_WBDRC_FILT1_B0_BYTE0 0x22e1 |
| 493 | #define DSM_WBDRC_FILT1_B0_BYTE1 0x22e2 |
| 494 | #define DSM_WBDRC_FILT1_B0_BYTE2 0x22e3 |
| 495 | #define DSM_WBDRC_FILT1_B1_BYTE0 0x22e5 |
| 496 | #define DSM_WBDRC_FILT1_B1_BYTE1 0x22e6 |
| 497 | #define DSM_WBDRC_FILT1_B1_BYTE2 0x22e7 |
| 498 | #define DSM_WBDRC_FILT1_B2_BYTE0 0x22e9 |
| 499 | #define DSM_WBDRC_FILT1_B2_BYTE1 0x22ea |
| 500 | #define DSM_WBDRC_FILT1_B2_BYTE2 0x22eb |
| 501 | #define DSM_WBDRC_FILT1_A1_BYTE0 0x22ed |
| 502 | #define DSM_WBDRC_FILT1_A1_BYTE1 0x22ee |
| 503 | #define DSM_WBDRC_FILT1_A1_BYTE2 0x22ef |
| 504 | #define DSM_WBDRC_FILT1_A2_BYTE0 0x22f1 |
| 505 | #define DSM_WBDRC_FILT1_A2_BYTE1 0x22f2 |
| 506 | #define DSM_WBDRC_FILT1_A2_BYTE2 0x22f3 |
| 507 | #define DSM_WBDRC_FILT2_B0_BYTE0 0x22f5 |
| 508 | #define DSM_WBDRC_FILT2_B0_BYTE1 0x22f6 |
| 509 | #define DSM_WBDRC_FILT2_B0_BYTE2 0x22f7 |
| 510 | #define DSM_WBDRC_FILT2_B1_BYTE0 0x22f9 |
| 511 | #define DSM_WBDRC_FILT2_B1_BYTE1 0x22fa |
| 512 | #define DSM_WBDRC_FILT2_B1_BYTE2 0x22fb |
| 513 | #define DSM_WBDRC_FILT2_B2_BYTE0 0x22fd |
| 514 | #define DSM_WBDRC_FILT2_B2_BYTE1 0x22fe |
| 515 | #define DSM_WBDRC_FILT2_B2_BYTE2 0x22ff |
| 516 | #define DSM_WBDRC_FILT2_A1_BYTE0 0x2301 |
| 517 | #define DSM_WBDRC_FILT2_A1_BYTE1 0x2302 |
| 518 | #define DSM_WBDRC_FILT2_A1_BYTE2 0x2303 |
| 519 | #define DSM_WBDRC_FILT2_A2_BYTE0 0x2305 |
| 520 | #define DSM_WBDRC_FILT2_A2_BYTE1 0x2306 |
| 521 | #define DSM_WBDRC_FILT2_A2_BYTE2 0x2307 |
| 522 | #define DSM_PPR_RELEASE_TIME_BYTE0 0x2309 |
| 523 | #define DSM_PPR_RELEASE_TIME_BYTE1 0x230a |
| 524 | #define DSM_PPR_RELEASE_TIME_BYTE2 0x230b |
| 525 | #define DSM_PPR_ATTACK_TIME_BYTE0 0x230d |
| 526 | #define DSM_PPR_ATTACK_TIME_BYTE1 0x230e |
| 527 | #define DSM_PPR_ATTACK_TIME_BYTE2 0x230f |
| 528 | #define DSM_DEBUZZER_RELEASE_TIME_BYTE0 0x2311 |
| 529 | #define DSM_DEBUZZER_RELEASE_TIME_BYTE1 0x2312 |
| 530 | #define DSM_DEBUZZER_RELEASE_TIME_BYTE2 0x2313 |
| 531 | #define DSM_DEBUZZER_ATTACK_TIME_BYTE0 0x2315 |
| 532 | #define DSM_DEBUZZER_ATTACK_TIME_BYTE1 0x2316 |
| 533 | #define DSM_DEBUZZER_ATTACK_TIME_BYTE2 0x2317 |
| 534 | |
| 535 | #define DSMIG_WB_DRC_RELEASE_TIME_1 0x2380 |
| 536 | #define DSMIG_WB_DRC_RELEASE_TIME_2 0x2381 |
| 537 | #define DSMIG_WB_DRC_ATTACK_TIME_1 0x2382 |
| 538 | #define DSMIG_WB_DRC_ATTACK_TIME_2 0x2383 |
| 539 | #define DSMIG_WB_DRC_COMPRESSION_RATIO 0x2384 |
| 540 | #define DSMIG_WB_DRC_COMPRESSION_THRESHOLD 0x2385 |
| 541 | #define DSMIG_WB_DRC_MAKEUPGAIN 0x2386 |
| 542 | #define DSMIG_WB_DRC_NOISE_GATE_THRESHOLD 0x2387 |
| 543 | #define DSMIG_WBDRC_HPF_ENABLE 0x2388 |
| 544 | #define DSMIG_WB_DRC_TEST_SMOOTHER_OUT_EN 0x2389 |
| 545 | #define DSMIG_PPR_THRESHOLD 0x238b |
| 546 | #define DSM_STEREO_BASS_CHANNEL_SELECT 0x238d |
| 547 | #define DSM_TPROT_THRESHOLD_BYTE0 0x238e |
| 548 | #define DSM_TPROT_THRESHOLD_BYTE1 0x238f |
| 549 | #define DSM_TPROT_ROOM_TEMPERATURE_BYTE0 0x2390 |
| 550 | #define DSM_TPROT_ROOM_TEMPERATURE_BYTE1 0x2391 |
| 551 | #define DSM_TPROT_RECIP_RDC_ROOM_BYTE0 0x2392 |
| 552 | #define DSM_TPROT_RECIP_RDC_ROOM_BYTE1 0x2393 |
| 553 | #define DSM_TPROT_RECIP_RDC_ROOM_BYTE2 0x2394 |
| 554 | #define DSM_TPROT_RECIP_TCONST_BYTE0 0x2395 |
| 555 | #define DSM_TPROT_RECIP_TCONST_BYTE1 0x2396 |
| 556 | #define DSM_TPROT_RECIP_TCONST_BYTE2 0x2397 |
| 557 | #define DSM_THERMAL_ATTENUATION_SETTINGS 0x2398 |
| 558 | #define DSM_THERMAL_PILOT_TONE_ATTENUATION 0x2399 |
| 559 | #define DSM_TPROT_PG_TEMP_THRESH_BYTE0 0x239a |
| 560 | #define DSM_TPROT_PG_TEMP_THRESH_BYTE1 0x239b |
| 561 | |
| 562 | #define THERMAL_RDC_RD_BACK_BYTE1 0x239c |
| 563 | #define THERMAL_RDC_RD_BACK_BYTE0 0x239d |
| 564 | #define THERMAL_COILTEMP_RD_BACK_BYTE1 0x239e |
| 565 | #define THERMAL_COILTEMP_RD_BACK_BYTE0 0x239f |
| 566 | |
| 567 | #define DSMIG_DEBUZZER_THRESHOLD 0x23b5 |
| 568 | #define DSMIG_DEBUZZER_ALPHA_COEF_TEST_ONLY 0x23b6 |
| 569 | #define DSM_VOL_ENA 0x23b9 |
| 570 | #define DSM_VOL_CTRL 0x23ba |
| 571 | |
| 572 | #define DSMIG_EN 0x23e0 |
| 573 | #define MAX98390_R23E1_DSP_GLOBAL_EN 0x23e1 |
| 574 | |
| 575 | #define DSM_THERMAL_GAIN 0x23f0 |
| 576 | #define DSM_PPR_GAIN 0x23f1 |
| 577 | #define DSM_DBZ_GAIN 0x23f2 |
| 578 | #define DSM_WBDRC_GAIN 0x23f3 |
| 579 | |
| 580 | #define MAX98390_R23FF_GLOBAL_EN 0x23FF |
| 581 | #define MAX98390_R24FF_REV_ID 0x24FF |
| 582 | |
| 583 | /* MAX98390_R2021_PCM_RX_SRC_1 */ |
| 584 | #define MAX98390_PCM_RX_CH_SRC_SHIFT (0) |
| 585 | #define MAX98390_PCM_RX_CH_SRC_BASS_SHIFT (4) |
| 586 | |
| 587 | /* MAX98390_R2022_PCM_TX_SRC_1 */ |
| 588 | #define MAX98390_PCM_TX_CH_SRC_A_V_SHIFT (0) |
| 589 | #define MAX98390_PCM_TX_CH_SRC_A_I_SHIFT (4) |
| 590 | |
| 591 | /* MAX98390_R2024_PCM_DATA_FMT_CFG */ |
| 592 | #define MAX98390_PCM_MODE_CFG_FORMAT_MASK (0x7 << 3) |
| 593 | #define MAX98390_PCM_MODE_CFG_FORMAT_SHIFT (3) |
| 594 | #define MAX98390_PCM_TX_CH_INTERLEAVE_MASK (0x1 << 2) |
| 595 | #define MAX98390_PCM_FORMAT_I2S (0x0 << 0) |
| 596 | #define MAX98390_PCM_FORMAT_LJ (0x1 << 0) |
| 597 | #define MAX98390_PCM_FORMAT_TDM_MODE0 (0x3 << 0) |
| 598 | #define MAX98390_PCM_FORMAT_TDM_MODE1 (0x4 << 0) |
| 599 | #define MAX98390_PCM_FORMAT_TDM_MODE2 (0x5 << 0) |
| 600 | #define MAX98390_PCM_MODE_CFG_CHANSZ_MASK (0x3 << 6) |
| 601 | #define MAX98390_PCM_MODE_CFG_CHANSZ_16 (0x1 << 6) |
| 602 | #define MAX98390_PCM_MODE_CFG_CHANSZ_24 (0x2 << 6) |
| 603 | #define MAX98390_PCM_MODE_CFG_CHANSZ_32 (0x3 << 6) |
| 604 | |
| 605 | /* MAX98390_R2039_AMP_DSP_CFG */ |
| 606 | #define MAX98390_AMP_DSP_CFG_RMP_UP_SHIFT (4) |
| 607 | #define MAX98390_AMP_DSP_CFG_RMP_DN_SHIFT (5) |
| 608 | |
| 609 | /* MAX98390_R203A_AMP_EN */ |
| 610 | #define MAX98390_R203A_AMP_EN_SHIFT (0) |
| 611 | |
| 612 | /* MAX98390_PCM_MASTER_MODE */ |
| 613 | #define MAX98390_PCM_MASTER_MODE_MASK (0x3 << 0) |
| 614 | #define MAX98390_PCM_MASTER_MODE_SLAVE (0x0 << 0) |
| 615 | #define MAX98390_PCM_MASTER_MODE_MASTER (0x3 << 0) |
| 616 | |
| 617 | #define MAX98390_PCM_MASTER_MODE_MCLK_MASK (0xF << 2) |
| 618 | #define MAX98390_PCM_MASTER_MODE_MCLK_RATE_SHIFT (2) |
| 619 | |
| 620 | /* PCM_CLK_SETUP */ |
| 621 | #define MAX98390_PCM_MODE_CFG_PCM_BCLKEDGE (0x1 << 2) |
| 622 | #define MAX98390_PCM_CLK_SETUP_BSEL_MASK (0xF << 0) |
| 623 | |
| 624 | /* PCM_SR_SETUP */ |
| 625 | #define MAX98390_PCM_SR_SET1_SR_MASK (0xF << 0) |
| 626 | #define MAX98390_PCM_SR_SET1_SR_8000 (0x0 << 0) |
| 627 | #define MAX98390_PCM_SR_SET1_SR_11025 (0x1 << 0) |
| 628 | #define MAX98390_PCM_SR_SET1_SR_12000 (0x2 << 0) |
| 629 | #define MAX98390_PCM_SR_SET1_SR_16000 (0x3 << 0) |
| 630 | #define MAX98390_PCM_SR_SET1_SR_22050 (0x4 << 0) |
| 631 | #define MAX98390_PCM_SR_SET1_SR_24000 (0x5 << 0) |
| 632 | #define MAX98390_PCM_SR_SET1_SR_32000 (0x6 << 0) |
| 633 | #define MAX98390_PCM_SR_SET1_SR_44100 (0x7 << 0) |
| 634 | #define MAX98390_PCM_SR_SET1_SR_48000 (0x8 << 0) |
| 635 | |
| 636 | /* PCM_TO_SPK_MONO_MIX_1 */ |
| 637 | #define MAX98390_PCM_TO_SPK_MONOMIX_CFG_MASK (0x3 << 6) |
| 638 | #define MAX98390_PCM_TO_SPK_MONOMIX_CFG_SHIFT (6) |
| 639 | #define MAX98390_PCM_TO_SPK_CH0_SRC_MASK (0xF << 0) |
| 640 | #define MAX98390_PCM_TO_SPK_CH1_SRC_MASK (0xF << 4) |
| 641 | |
| 642 | /* MAX98390_BOOST_CTRL3 */ |
| 643 | #define MAX98390_BOOST_CLK_PHASE_CFG_SHIFT (2) |
| 644 | |
| 645 | /* SOFT_RESET */ |
| 646 | #define MAX98390_SOFT_RESET_MASK (0x1 << 0) |
| 647 | |
| 648 | #define MAX98390_GLOBAL_EN_MASK (0x1 << 0) |
| 649 | #define MAX98390_AMP_EN_MASK (0x1 << 0) |
| 650 | |
| 651 | /* DSM register offset */ |
| 652 | #define MAX98390_DSM_PAYLOAD_OFFSET 16 |
Steve Lee | 62f2c77 | 2020-07-24 17:56:44 +0900 | [diff] [blame] | 653 | #define MAX98390_DSM_PARAM_MAX_SIZE 1024 |
Steve Lee | 97ed3e5 | 2020-06-04 14:47:31 +0900 | [diff] [blame] | 654 | #define MAX98390_DSM_PARAM_MIN_SIZE 670 |
Steve Lee | a6e3f4f | 2020-05-18 09:50:38 +0900 | [diff] [blame] | 655 | |
| 656 | struct max98390_priv { |
| 657 | struct regmap *regmap; |
| 658 | unsigned int sysclk; |
| 659 | unsigned int master; |
| 660 | unsigned int tdm_mode; |
| 661 | unsigned int ref_rdc_value; |
| 662 | unsigned int ambient_temp_value; |
| 663 | }; |
| 664 | #endif |