Thomas Gleixner | ec8f24b | 2019-05-19 13:07:45 +0100 | [diff] [blame] | 1 | # SPDX-License-Identifier: GPL-2.0-only |
Linus Walleij | 2744e8a | 2011-05-02 20:50:54 +0200 | [diff] [blame] | 2 | # |
| 3 | # PINCTRL infrastructure and drivers |
| 4 | # |
| 5 | |
Phil Reid | d219b92 | 2017-10-06 13:08:05 +0800 | [diff] [blame] | 6 | menuconfig PINCTRL |
| 7 | bool "Pin controllers" |
Linus Walleij | 2744e8a | 2011-05-02 20:50:54 +0200 | [diff] [blame] | 8 | |
Phil Reid | d219b92 | 2017-10-06 13:08:05 +0800 | [diff] [blame] | 9 | if PINCTRL |
Linus Walleij | 45f034e | 2011-11-05 21:28:46 +0100 | [diff] [blame] | 10 | |
Linus Walleij | c033a71 | 2016-12-30 15:04:43 +0100 | [diff] [blame] | 11 | config GENERIC_PINCTRL_GROUPS |
Tony Lindgren | c7059c5 | 2016-12-27 09:20:00 -0800 | [diff] [blame] | 12 | bool |
| 13 | |
Linus Walleij | 2744e8a | 2011-05-02 20:50:54 +0200 | [diff] [blame] | 14 | config PINMUX |
Uwe Kleine-König | 244e95a | 2014-06-03 10:02:36 +0200 | [diff] [blame] | 15 | bool "Support pin multiplexing controllers" if COMPILE_TEST |
Linus Walleij | ae6b4d8 | 2011-10-19 18:14:33 +0200 | [diff] [blame] | 16 | |
Tony Lindgren | a76edc8 | 2016-12-27 09:20:01 -0800 | [diff] [blame] | 17 | config GENERIC_PINMUX_FUNCTIONS |
| 18 | bool |
| 19 | select PINMUX |
| 20 | |
Linus Walleij | ae6b4d8 | 2011-10-19 18:14:33 +0200 | [diff] [blame] | 21 | config PINCONF |
Uwe Kleine-König | 244e95a | 2014-06-03 10:02:36 +0200 | [diff] [blame] | 22 | bool "Support pin configuration controllers" if COMPILE_TEST |
Linus Walleij | 2744e8a | 2011-05-02 20:50:54 +0200 | [diff] [blame] | 23 | |
Linus Walleij | 394349f | 2011-11-24 18:27:15 +0100 | [diff] [blame] | 24 | config GENERIC_PINCONF |
| 25 | bool |
| 26 | select PINCONF |
| 27 | |
Linus Walleij | 2744e8a | 2011-05-02 20:50:54 +0200 | [diff] [blame] | 28 | config DEBUG_PINCTRL |
| 29 | bool "Debug PINCTRL calls" |
| 30 | depends on DEBUG_KERNEL |
| 31 | help |
| 32 | Say Y here to add some extra checks and diagnostics to PINCTRL calls. |
| 33 | |
Andy Shevchenko | b124c8b | 2021-12-09 13:34:56 +0200 | [diff] [blame] | 34 | config PINCTRL_AMD |
| 35 | tristate "AMD GPIO pin control" |
| 36 | depends on HAS_IOMEM |
| 37 | depends on ACPI || COMPILE_TEST |
| 38 | select GPIOLIB |
| 39 | select GPIOLIB_IRQCHIP |
| 40 | select PINMUX |
| 41 | select PINCONF |
| 42 | select GENERIC_PINCONF |
| 43 | help |
| 44 | The driver for memory mapped GPIO functionality on AMD platforms |
| 45 | (x86 or arm). Most of the pins are usually muxed to some other |
| 46 | functionality by firmware, so only a small amount is available |
| 47 | for GPIO use. |
| 48 | |
| 49 | Requires ACPI/FDT device enumeration code to set up a platform |
| 50 | device. |
| 51 | |
Joey Gouly | a0f160f | 2021-10-26 18:58:14 +0100 | [diff] [blame] | 52 | config PINCTRL_APPLE_GPIO |
| 53 | tristate "Apple SoC GPIO pin controller driver" |
| 54 | depends on ARCH_APPLE |
| 55 | select PINMUX |
| 56 | select GPIOLIB |
| 57 | select GPIOLIB_IRQCHIP |
| 58 | select GENERIC_PINCTRL_GROUPS |
| 59 | select GENERIC_PINMUX_FUNCTIONS |
| 60 | select OF_GPIO |
| 61 | help |
| 62 | This is the driver for the GPIO controller found on Apple ARM SoCs, |
| 63 | including M1. |
| 64 | |
| 65 | This driver can also be built as a module. If so, the module |
| 66 | will be called pinctrl-apple-gpio. |
| 67 | |
Jesper Nilsson | 00df058 | 2017-04-03 14:47:04 +0200 | [diff] [blame] | 68 | config PINCTRL_ARTPEC6 |
Krzysztof Kozlowski | 2635adb | 2019-11-21 04:19:41 +0100 | [diff] [blame] | 69 | bool "Axis ARTPEC-6 pin controller driver" |
| 70 | depends on MACH_ARTPEC6 |
| 71 | select PINMUX |
| 72 | select GENERIC_PINCONF |
| 73 | help |
| 74 | This is the driver for the Axis ARTPEC-6 pin controller. This driver |
| 75 | supports pin function multiplexing as well as pin bias and drive |
| 76 | strength configuration. Device tree integration instructions can be |
| 77 | found in Documentation/devicetree/bindings/pinctrl/axis,artpec6-pinctrl.txt |
Jesper Nilsson | 00df058 | 2017-04-03 14:47:04 +0200 | [diff] [blame] | 78 | |
Laxman Dewangan | c8ce878 | 2013-10-02 21:20:29 +0530 | [diff] [blame] | 79 | config PINCTRL_AS3722 |
Paul Gortmaker | 9385f35 | 2016-06-13 17:10:22 -0400 | [diff] [blame] | 80 | tristate "Pinctrl and GPIO driver for ams AS3722 PMIC" |
Laxman Dewangan | c8ce878 | 2013-10-02 21:20:29 +0530 | [diff] [blame] | 81 | depends on MFD_AS3722 && GPIOLIB |
| 82 | select PINMUX |
| 83 | select GENERIC_PINCONF |
| 84 | help |
| 85 | AS3722 device supports the configuration of GPIO pins for different |
| 86 | functionality. This driver supports the pinmux, push-pull and |
| 87 | open drain configuration for the GPIO pins of AS3722 devices. It also |
| 88 | supports the GPIO functionality through gpiolib. |
| 89 | |
Jean-Christophe PLAGNIOL-VILLARD | 6732ae5 | 2012-07-12 23:35:02 +0800 | [diff] [blame] | 90 | config PINCTRL_AT91 |
| 91 | bool "AT91 pinctrl driver" |
| 92 | depends on OF |
| 93 | depends on ARCH_AT91 |
| 94 | select PINMUX |
| 95 | select PINCONF |
Alexander Stein | 80cc373 | 2014-04-15 22:09:41 +0200 | [diff] [blame] | 96 | select GPIOLIB |
| 97 | select OF_GPIO |
| 98 | select GPIOLIB_IRQCHIP |
Jean-Christophe PLAGNIOL-VILLARD | 6732ae5 | 2012-07-12 23:35:02 +0800 | [diff] [blame] | 99 | help |
| 100 | Say Y here to enable the at91 pinctrl driver |
| 101 | |
Ludovic Desroches | 7761808 | 2015-09-16 17:36:57 +0200 | [diff] [blame] | 102 | config PINCTRL_AT91PIO4 |
| 103 | bool "AT91 PIO4 pinctrl driver" |
| 104 | depends on OF |
Tiezhu Yang | 0a03658 | 2020-11-24 17:17:03 +0800 | [diff] [blame] | 105 | depends on HAS_IOMEM |
Tiezhu Yang | e682fcc | 2020-05-23 19:45:26 +0800 | [diff] [blame] | 106 | depends on ARCH_AT91 || COMPILE_TEST |
Ludovic Desroches | 7761808 | 2015-09-16 17:36:57 +0200 | [diff] [blame] | 107 | select PINMUX |
| 108 | select GENERIC_PINCONF |
| 109 | select GPIOLIB |
| 110 | select GPIOLIB_IRQCHIP |
| 111 | select OF_GPIO |
| 112 | help |
| 113 | Say Y here to enable the at91 pinctrl/gpio driver for Atmel PIO4 |
| 114 | controller available on sama5d2 SoC. |
| 115 | |
Andy Shevchenko | b124c8b | 2021-12-09 13:34:56 +0200 | [diff] [blame] | 116 | config PINCTRL_AXP209 |
| 117 | tristate "X-Powers AXP209 PMIC pinctrl and GPIO Support" |
| 118 | depends on MFD_AXP20X |
| 119 | depends on OF |
Petr Mladek | 83b31c2 | 2017-09-26 15:51:28 +0200 | [diff] [blame] | 120 | select PINMUX |
Ken Xue | dbad75d | 2015-03-10 15:02:19 +0800 | [diff] [blame] | 121 | select GENERIC_PINCONF |
Andy Shevchenko | b124c8b | 2021-12-09 13:34:56 +0200 | [diff] [blame] | 122 | select GPIOLIB |
Ken Xue | dbad75d | 2015-03-10 15:02:19 +0800 | [diff] [blame] | 123 | help |
Andy Shevchenko | b124c8b | 2021-12-09 13:34:56 +0200 | [diff] [blame] | 124 | AXP PMICs provides multiple GPIOs that can be muxed for different |
| 125 | functions. This driver bundles a pinctrl driver to select the function |
| 126 | muxing and a GPIO driver to handle the GPIO when the GPIO function is |
| 127 | selected. |
| 128 | Say Y to enable pinctrl and GPIO support for the AXP209 PMIC. |
Ken Xue | dbad75d | 2015-03-10 15:02:19 +0800 | [diff] [blame] | 129 | |
Manivannan Sadhasivam | 8f3f024 | 2019-04-24 17:32:23 +0530 | [diff] [blame] | 130 | config PINCTRL_BM1880 |
| 131 | bool "Bitmain BM1880 Pinctrl driver" |
Manivannan Sadhasivam | 8293b3c | 2019-04-25 14:02:24 +0530 | [diff] [blame] | 132 | depends on OF && (ARCH_BITMAIN || COMPILE_TEST) |
| 133 | default ARCH_BITMAIN |
Manivannan Sadhasivam | 8f3f024 | 2019-04-24 17:32:23 +0530 | [diff] [blame] | 134 | select PINMUX |
| 135 | help |
| 136 | Pinctrl driver for Bitmain BM1880 SoC. |
| 137 | |
David Lechner | 1ff91f0 | 2016-11-28 10:40:25 -0600 | [diff] [blame] | 138 | config PINCTRL_DA850_PUPD |
Andy Shevchenko | b124c8b | 2021-12-09 13:34:56 +0200 | [diff] [blame] | 139 | tristate "TI DA850/OMAP-L138/AM18XX pull-up and pull-down groups" |
David Lechner | 1ff91f0 | 2016-11-28 10:40:25 -0600 | [diff] [blame] | 140 | depends on OF && (ARCH_DAVINCI_DA850 || COMPILE_TEST) |
| 141 | select PINCONF |
| 142 | select GENERIC_PINCONF |
| 143 | help |
| 144 | Driver for TI DA850/OMAP-L138/AM18XX pinconf. Used to control |
Andy Shevchenko | b124c8b | 2021-12-09 13:34:56 +0200 | [diff] [blame] | 145 | pull-up and pull-down pin groups. |
David Lechner | 1ff91f0 | 2016-11-28 10:40:25 -0600 | [diff] [blame] | 146 | |
Marco Felsch | 56cc3af | 2020-01-08 11:47:46 +0100 | [diff] [blame] | 147 | config PINCTRL_DA9062 |
| 148 | tristate "Dialog Semiconductor DA9062 PMIC pinctrl and GPIO Support" |
| 149 | depends on MFD_DA9062 |
| 150 | select GPIOLIB |
| 151 | help |
| 152 | The Dialog DA9062 PMIC provides multiple GPIOs that can be muxed for |
| 153 | different functions. This driver bundles a pinctrl driver to select the |
| 154 | function muxing and a GPIO driver to handle the GPIO when the GPIO |
| 155 | function is selected. |
| 156 | |
Andy Shevchenko | b124c8b | 2021-12-09 13:34:56 +0200 | [diff] [blame] | 157 | Say Y to enable pinctrl and GPIO support for the DA9062 PMIC. |
Marco Felsch | 56cc3af | 2020-01-08 11:47:46 +0100 | [diff] [blame] | 158 | |
Baruch Siach | 38b0e50 | 2015-05-05 13:55:10 +0300 | [diff] [blame] | 159 | config PINCTRL_DIGICOLOR |
| 160 | bool |
| 161 | depends on OF && (ARCH_DIGICOLOR || COMPILE_TEST) |
| 162 | select PINMUX |
| 163 | select GENERIC_PINCONF |
| 164 | |
Andy Shevchenko | b124c8b | 2021-12-09 13:34:56 +0200 | [diff] [blame] | 165 | config PINCTRL_EQUILIBRIUM |
| 166 | tristate "Generic pinctrl and GPIO driver for Intel Lightning Mountain SoC" |
| 167 | depends on OF && HAS_IOMEM |
| 168 | depends on X86 || COMPILE_TEST |
| 169 | select PINMUX |
| 170 | select PINCONF |
| 171 | select GPIOLIB |
| 172 | select GPIO_GENERIC |
| 173 | select GPIOLIB_IRQCHIP |
| 174 | select GENERIC_PINCONF |
| 175 | select GENERIC_PINCTRL_GROUPS |
| 176 | select GENERIC_PINMUX_FUNCTIONS |
| 177 | help |
| 178 | Equilibrium driver is a pinctrl and GPIO driver for Intel Lightning |
| 179 | Mountain network processor SoC that supports both the GPIO and pin |
| 180 | control frameworks. It provides interfaces to setup pin muxing, assign |
| 181 | desired pin functions, configure GPIO attributes for LGM SoC pins. |
| 182 | Pin muxing and pin config settings are retrieved from device tree. |
| 183 | |
| 184 | config PINCTRL_GEMINI |
| 185 | bool |
| 186 | depends on ARCH_GEMINI |
| 187 | default ARCH_GEMINI |
| 188 | select PINMUX |
| 189 | select GENERIC_PINCONF |
| 190 | select MFD_SYSCON |
| 191 | |
| 192 | config PINCTRL_INGENIC |
| 193 | bool "Pinctrl driver for the Ingenic JZ47xx SoCs" |
| 194 | default MACH_INGENIC |
| 195 | depends on OF |
| 196 | depends on MIPS || COMPILE_TEST |
| 197 | select GENERIC_PINCONF |
| 198 | select GENERIC_PINCTRL_GROUPS |
| 199 | select GENERIC_PINMUX_FUNCTIONS |
| 200 | select GPIOLIB |
| 201 | select GPIOLIB_IRQCHIP |
| 202 | select REGMAP_MMIO |
| 203 | |
| 204 | config PINCTRL_K210 |
| 205 | bool "Pinctrl driver for the Canaan Kendryte K210 SoC" |
| 206 | depends on RISCV && SOC_CANAAN && OF |
| 207 | select GENERIC_PINMUX_FUNCTIONS |
| 208 | select GENERIC_PINCONF |
| 209 | select GPIOLIB |
| 210 | select OF_GPIO |
| 211 | select REGMAP_MMIO |
| 212 | default SOC_CANAAN |
| 213 | help |
| 214 | Add support for the Canaan Kendryte K210 RISC-V SOC Field |
| 215 | Programmable IO Array (FPIOA) controller. |
| 216 | |
| 217 | config PINCTRL_KEEMBAY |
| 218 | tristate "Pinctrl driver for Intel Keem Bay SoC" |
| 219 | depends on ARCH_KEEMBAY || (ARM64 && COMPILE_TEST) |
| 220 | depends on HAS_IOMEM |
| 221 | select PINMUX |
| 222 | select PINCONF |
| 223 | select GENERIC_PINCONF |
| 224 | select GENERIC_PINCTRL_GROUPS |
| 225 | select GENERIC_PINMUX_FUNCTIONS |
| 226 | select GPIOLIB |
| 227 | select GPIOLIB_IRQCHIP |
| 228 | select GPIO_GENERIC |
| 229 | help |
| 230 | This selects pin control driver for the Intel Keem Bay SoC. |
| 231 | It provides pin config functions such as pull-up, pull-down, |
| 232 | interrupt, drive strength, sec lock, Schmitt trigger, slew |
| 233 | rate control and direction control. This module will be |
| 234 | called as pinctrl-keembay. |
| 235 | |
John Crispin | 3f8c50c | 2012-08-28 12:44:59 +0200 | [diff] [blame] | 236 | config PINCTRL_LANTIQ |
| 237 | bool |
| 238 | depends on LANTIQ |
| 239 | select PINMUX |
| 240 | select PINCONF |
| 241 | |
Andy Shevchenko | b124c8b | 2021-12-09 13:34:56 +0200 | [diff] [blame] | 242 | config PINCTRL_FALCON |
| 243 | bool |
| 244 | depends on SOC_FALCON |
| 245 | depends on PINCTRL_LANTIQ |
| 246 | |
| 247 | config PINCTRL_XWAY |
| 248 | bool |
| 249 | depends on SOC_TYPE_XWAY |
| 250 | depends on PINCTRL_LANTIQ |
| 251 | |
Joachim Eastwood | 2f77ac9 | 2015-04-28 00:14:08 +0200 | [diff] [blame] | 252 | config PINCTRL_LPC18XX |
| 253 | bool "NXP LPC18XX/43XX SCU pinctrl driver" |
| 254 | depends on OF && (ARCH_LPC18XX || COMPILE_TEST) |
| 255 | default ARCH_LPC18XX |
| 256 | select PINMUX |
| 257 | select GENERIC_PINCONF |
| 258 | help |
| 259 | Pinctrl driver for NXP LPC18xx/43xx System Control Unit (SCU). |
| 260 | |
Andy Shevchenko | b124c8b | 2021-12-09 13:34:56 +0200 | [diff] [blame] | 261 | config PINCTRL_MAX77620 |
| 262 | tristate "MAX77620/MAX20024 Pincontrol support" |
| 263 | depends on MFD_MAX77620 && OF |
Linus Walleij | 06351d1 | 2017-08-05 23:04:08 +0200 | [diff] [blame] | 264 | select PINMUX |
Linus Walleij | 1c5b7f3 | 2017-10-28 15:37:18 +0200 | [diff] [blame] | 265 | select GENERIC_PINCONF |
Andy Shevchenko | b124c8b | 2021-12-09 13:34:56 +0200 | [diff] [blame] | 266 | help |
| 267 | Say Y here to enable Pin control support for Maxim MAX77620 PMIC. |
| 268 | This PMIC has 8 GPIO pins that work as GPIO as well as special |
| 269 | function in alternate mode. This driver also configure push-pull, |
| 270 | open drain, FPS slots etc. |
Linus Walleij | 06351d1 | 2017-08-05 23:04:08 +0200 | [diff] [blame] | 271 | |
Andy Shevchenko | 0f04a81 | 2020-04-07 20:38:49 +0300 | [diff] [blame] | 272 | config PINCTRL_MCP23S08_I2C |
| 273 | tristate |
| 274 | select REGMAP_I2C |
| 275 | |
| 276 | config PINCTRL_MCP23S08_SPI |
| 277 | tristate |
| 278 | select REGMAP_SPI |
| 279 | |
Sebastian Reichel | 64ac43e | 2017-05-15 11:24:25 +0200 | [diff] [blame] | 280 | config PINCTRL_MCP23S08 |
| 281 | tristate "Microchip MCP23xxx I/O expander" |
Sebastian Reichel | 64ac43e | 2017-05-15 11:24:25 +0200 | [diff] [blame] | 282 | depends on SPI_MASTER || I2C |
Linus Walleij | e2a021d | 2017-10-11 12:04:35 +0200 | [diff] [blame] | 283 | select GPIOLIB |
Sebastian Reichel | 64ac43e | 2017-05-15 11:24:25 +0200 | [diff] [blame] | 284 | select GPIOLIB_IRQCHIP |
Sebastian Reichel | 82039d2 | 2017-05-15 11:24:26 +0200 | [diff] [blame] | 285 | select GENERIC_PINCONF |
Andy Shevchenko | 0f04a81 | 2020-04-07 20:38:49 +0300 | [diff] [blame] | 286 | select PINCTRL_MCP23S08_I2C if I2C |
| 287 | select PINCTRL_MCP23S08_SPI if SPI_MASTER |
Sebastian Reichel | 64ac43e | 2017-05-15 11:24:25 +0200 | [diff] [blame] | 288 | help |
Jan Kundrát | 6ff4556 | 2018-02-15 15:56:03 +0100 | [diff] [blame] | 289 | SPI/I2C driver for Microchip MCP23S08 / MCP23S17 / MCP23S18 / |
| 290 | MCP23008 / MCP23017 / MCP23018 I/O expanders. |
| 291 | This provides a GPIO interface supporting inputs and outputs and a |
| 292 | corresponding interrupt-controller. |
Sebastian Reichel | 64ac43e | 2017-05-15 11:24:25 +0200 | [diff] [blame] | 293 | |
Andy Shevchenko | b124c8b | 2021-12-09 13:34:56 +0200 | [diff] [blame] | 294 | config PINCTRL_MICROCHIP_SGPIO |
| 295 | bool "Pinctrl driver for Microsemi/Microchip Serial GPIO" |
| 296 | depends on OF |
| 297 | depends on HAS_IOMEM |
| 298 | select GPIOLIB |
| 299 | select GPIOLIB_IRQCHIP |
| 300 | select GENERIC_PINCONF |
| 301 | select GENERIC_PINCTRL_GROUPS |
| 302 | select GENERIC_PINMUX_FUNCTIONS |
| 303 | select OF_GPIO |
| 304 | help |
| 305 | Support for the serial GPIO interface used on Microsemi and |
| 306 | Microchip SoCs. By using a serial interface, the SIO |
| 307 | controller significantly extends the number of available |
| 308 | GPIOs with a minimum number of additional pins on the |
| 309 | device. The primary purpose of the SIO controller is to |
| 310 | connect control signals from SFP modules and to act as an |
| 311 | LED controller. |
| 312 | |
| 313 | config PINCTRL_OCELOT |
| 314 | bool "Pinctrl driver for the Microsemi Ocelot and Jaguar2 SoCs" |
| 315 | depends on OF |
| 316 | depends on HAS_IOMEM |
| 317 | select GPIOLIB |
| 318 | select GPIOLIB_IRQCHIP |
| 319 | select GENERIC_PINCONF |
| 320 | select GENERIC_PINCTRL_GROUPS |
| 321 | select GENERIC_PINMUX_FUNCTIONS |
| 322 | select OF_GPIO |
| 323 | select REGMAP_MMIO |
| 324 | |
Neil Armstrong | 611dac1 | 2016-05-11 09:34:21 +0200 | [diff] [blame] | 325 | config PINCTRL_OXNAS |
| 326 | bool |
| 327 | depends on OF |
| 328 | select PINMUX |
| 329 | select PINCONF |
| 330 | select GENERIC_PINCONF |
| 331 | select GPIOLIB |
| 332 | select OF_GPIO |
| 333 | select GPIOLIB_IRQCHIP |
| 334 | select MFD_SYSCON |
| 335 | |
Laxman Dewangan | 0a8d3e2 | 2013-08-06 18:42:35 +0530 | [diff] [blame] | 336 | config PINCTRL_PALMAS |
Paul Gortmaker | 767b8ce | 2016-06-13 17:10:21 -0400 | [diff] [blame] | 337 | tristate "Pinctrl driver for the PALMAS Series MFD devices" |
Laxman Dewangan | 0a8d3e2 | 2013-08-06 18:42:35 +0530 | [diff] [blame] | 338 | depends on OF && MFD_PALMAS |
Axel Lin | 63ca8db | 2013-08-22 14:30:08 +0800 | [diff] [blame] | 339 | select PINMUX |
Laxman Dewangan | 0a8d3e2 | 2013-08-06 18:42:35 +0530 | [diff] [blame] | 340 | select GENERIC_PINCONF |
| 341 | help |
| 342 | Palmas device supports the configuration of pins for different |
| 343 | functionality. This driver supports the pinmux, push-pull and |
| 344 | open drain configuration for the Palmas series devices like |
| 345 | TPS65913, TPS80036 etc. |
| 346 | |
Joshua Henderson | 2ba384e | 2016-02-01 15:48:30 -0700 | [diff] [blame] | 347 | config PINCTRL_PIC32 |
| 348 | bool "Microchip PIC32 pin controller driver" |
| 349 | depends on OF |
| 350 | depends on MACH_PIC32 |
| 351 | select PINMUX |
| 352 | select GENERIC_PINCONF |
| 353 | select GPIOLIB_IRQCHIP |
| 354 | select OF_GPIO |
| 355 | help |
| 356 | This is the pin controller and gpio driver for Microchip PIC32 |
| 357 | microcontrollers. This option is selected automatically when specific |
| 358 | machine and arch are selected to build. |
| 359 | |
| 360 | config PINCTRL_PIC32MZDA |
| 361 | def_bool y if PIC32MZDA |
| 362 | select PINCTRL_PIC32 |
| 363 | |
Andy Shevchenko | b124c8b | 2021-12-09 13:34:56 +0200 | [diff] [blame] | 364 | config PINCTRL_PISTACHIO |
| 365 | bool "IMG Pistachio SoC pinctrl driver" |
| 366 | depends on OF && (MIPS || COMPILE_TEST) |
| 367 | depends on GPIOLIB |
| 368 | select PINMUX |
| 369 | select GENERIC_PINCONF |
| 370 | select GPIOLIB_IRQCHIP |
| 371 | select OF_GPIO |
| 372 | help |
| 373 | This support pinctrl and GPIO driver for IMG Pistachio SoC. |
| 374 | |
| 375 | config PINCTRL_RK805 |
| 376 | tristate "Pinctrl and GPIO driver for RK805 PMIC" |
| 377 | depends on MFD_RK808 |
| 378 | select GPIOLIB |
| 379 | select PINMUX |
| 380 | select GENERIC_PINCONF |
| 381 | help |
| 382 | This selects the pinctrl driver for RK805. |
| 383 | |
James Hogan | b58f027 | 2013-06-20 10:26:29 +0100 | [diff] [blame] | 384 | config PINCTRL_ROCKCHIP |
| 385 | tristate "Rockchip gpio and pinctrl driver" |
| 386 | depends on ARCH_ROCKCHIP || COMPILE_TEST |
| 387 | depends on OF |
| 388 | select GPIOLIB |
Linus Walleij | 3bece55 | 2011-12-18 23:44:26 +0100 | [diff] [blame] | 389 | select PINMUX |
| 390 | select GENERIC_PINCONF |
Linus Walleij | 98da352 | 2011-05-02 20:54:38 +0200 | [diff] [blame] | 391 | select GENERIC_IRQ_CHIP |
| 392 | select MFD_SYSCON |
Linus Walleij | dc0b1aa | 2011-11-16 21:58:10 +0100 | [diff] [blame] | 393 | select OF_GPIO |
Linus Walleij | 45f034e | 2011-11-05 21:28:46 +0100 | [diff] [blame] | 394 | default ARCH_ROCKCHIP |
Linus Walleij | ca402d3 | 2011-11-16 09:22:59 +0100 | [diff] [blame] | 395 | help |
Andy Shevchenko | b124c8b | 2021-12-09 13:34:56 +0200 | [diff] [blame] | 396 | This support pinctrl and GPIO driver for Rockchip SoCs. |
Thomas Abraham | f0b9a7e | 2012-10-10 09:41:12 +0900 | [diff] [blame] | 397 | |
Heiko Stuebner | af99a75 | 2013-05-21 00:56:13 +0900 | [diff] [blame] | 398 | config PINCTRL_SINGLE |
| 399 | tristate "One-register-per-pin type device tree based pinctrl driver" |
| 400 | depends on OF |
| 401 | depends on HAS_IOMEM |
| 402 | select GENERIC_PINCTRL_GROUPS |
Tomasz Figa | 61dd726 | 2013-03-18 22:31:55 +0100 | [diff] [blame] | 403 | select GENERIC_PINMUX_FUNCTIONS |
| 404 | select GENERIC_PINCONF |
| 405 | help |
| 406 | This selects the device tree based generic pinctrl driver. |
| 407 | |
Linus Walleij | ca402d3 | 2011-11-16 09:22:59 +0100 | [diff] [blame] | 408 | config PINCTRL_ST |
| 409 | bool |
| 410 | depends on OF |
| 411 | select PINMUX |
| 412 | select PINCONF |
Thomas Abraham | 30574f0 | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 413 | select GPIOLIB_IRQCHIP |
Arnd Bergmann | cbc351a | 2012-11-15 11:58:24 +0100 | [diff] [blame] | 414 | |
Emil Renner Berthing | ec648f6 | 2021-07-06 20:19:06 +0200 | [diff] [blame] | 415 | config PINCTRL_STARFIVE |
| 416 | tristate "Pinctrl and GPIO driver for the StarFive JH7100 SoC" |
| 417 | depends on SOC_STARFIVE || COMPILE_TEST |
| 418 | depends on OF |
| 419 | default SOC_STARFIVE |
| 420 | select GENERIC_PINCTRL_GROUPS |
| 421 | select GENERIC_PINMUX_FUNCTIONS |
| 422 | select GENERIC_PINCONF |
| 423 | select GPIOLIB |
| 424 | select GPIOLIB_IRQCHIP |
| 425 | select OF_GPIO |
| 426 | help |
| 427 | Say yes here to support pin control on the StarFive JH7100 SoC. |
| 428 | This also provides an interface to the GPIO pins not used by other |
| 429 | peripherals supporting inputs, outputs, configuring pull-up/pull-down |
| 430 | and interrupts on input changes. |
| 431 | |
Thomas Abraham | 30574f0 | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 432 | config PINCTRL_STMFX |
| 433 | tristate "STMicroelectronics STMFX GPIO expander pinctrl driver" |
Axel Lin | 924da31 | 2012-11-06 15:04:30 +0800 | [diff] [blame] | 434 | depends on I2C |
Thomas Abraham | 30574f0 | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 435 | depends on OF_GPIO |
| 436 | select GENERIC_PINCONF |
| 437 | select GPIOLIB_IRQCHIP |
Thomas Abraham | 43b169d | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 438 | select MFD_STMFX |
| 439 | help |
Axel Lin | 924da31 | 2012-11-06 15:04:30 +0800 | [diff] [blame] | 440 | Driver for STMicroelectronics Multi-Function eXpander (STMFX) |
Thomas Abraham | 43b169d | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 441 | GPIO expander. |
| 442 | This provides a GPIO interface supporting inputs and outputs, |
Thomas Petazzoni | 06763c7 | 2012-10-24 23:38:58 +0200 | [diff] [blame] | 443 | and configuring push-pull, open-drain, and can also be used as |
Thomas Petazzoni | 463e270 | 2012-09-13 17:41:47 +0200 | [diff] [blame] | 444 | interrupt-controller. |
Viresh Kumar | deda828 | 2012-03-28 22:27:07 +0530 | [diff] [blame] | 445 | |
Andy Shevchenko | b124c8b | 2021-12-09 13:34:56 +0200 | [diff] [blame] | 446 | config PINCTRL_SX150X |
| 447 | bool "Semtech SX150x I2C GPIO expander pinctrl driver" |
| 448 | depends on I2C=y |
Viresh Kumar | deda828 | 2012-03-28 22:27:07 +0530 | [diff] [blame] | 449 | select PINMUX |
Andy Shevchenko | b124c8b | 2021-12-09 13:34:56 +0200 | [diff] [blame] | 450 | select PINCONF |
Linus Walleij | 2744e8a | 2011-05-02 20:50:54 +0200 | [diff] [blame] | 451 | select GENERIC_PINCONF |
Andy Shevchenko | b124c8b | 2021-12-09 13:34:56 +0200 | [diff] [blame] | 452 | select GPIOLIB |
Masahiro Yamada | 485dba2 | 2015-11-30 16:57:35 +0900 | [diff] [blame] | 453 | select GPIOLIB_IRQCHIP |
Andy Shevchenko | b124c8b | 2021-12-09 13:34:56 +0200 | [diff] [blame] | 454 | select REGMAP |
Ray Jui | b17f2f9 | 2015-03-04 16:35:49 -0800 | [diff] [blame] | 455 | help |
Andy Shevchenko | b124c8b | 2021-12-09 13:34:56 +0200 | [diff] [blame] | 456 | Say Y here to provide support for Semtech SX150x-series I2C |
| 457 | GPIO expanders as pinctrl module. |
| 458 | Compatible models include: |
| 459 | - 8 bits: sx1508q, sx1502q |
| 460 | - 16 bits: sx1509q, sx1506q |
Linus Walleij | 2744e8a | 2011-05-02 20:50:54 +0200 | [diff] [blame] | 461 | |
Andy Shevchenko | b124c8b | 2021-12-09 13:34:56 +0200 | [diff] [blame] | 462 | config PINCTRL_TB10X |
| 463 | bool |
| 464 | depends on OF && ARC_PLAT_TB10X |
| 465 | select GPIOLIB |
| 466 | |
| 467 | config PINCTRL_THUNDERBAY |
| 468 | tristate "Generic pinctrl and GPIO driver for Intel Thunder Bay SoC" |
| 469 | depends on ARCH_THUNDERBAY || (ARM64 && COMPILE_TEST) |
| 470 | depends on HAS_IOMEM |
| 471 | select PINMUX |
| 472 | select PINCONF |
| 473 | select GENERIC_PINCONF |
| 474 | select GENERIC_PINCTRL_GROUPS |
| 475 | select GENERIC_PINMUX_FUNCTIONS |
| 476 | select GPIOLIB |
| 477 | select GPIOLIB_IRQCHIP |
| 478 | select GPIO_GENERIC |
| 479 | help |
| 480 | This selects pin control driver for the Intel Thunder Bay SoC. |
| 481 | It provides pin config functions such as pull-up, pull-down, |
| 482 | interrupt, drive strength, sec lock, Schmitt trigger, slew |
| 483 | rate control and direction control. This module will be |
| 484 | called as pinctrl-thunderbay. |
Sachin Kamat | ebe629a | 2014-07-10 17:33:27 +0530 | [diff] [blame] | 485 | |
Linus Walleij | 2744e8a | 2011-05-02 20:50:54 +0200 | [diff] [blame] | 486 | config PINCTRL_ZYNQ |
| 487 | bool "Pinctrl driver for Xilinx Zynq" |
Maxime Coquelin | aceb16d | 2016-01-14 13:16:30 +0100 | [diff] [blame] | 488 | depends on ARCH_ZYNQ |
Maxime Ripard | 5f91077 | 2014-04-18 18:53:02 +0200 | [diff] [blame] | 489 | select PINMUX |
Masahiro Yamada | 25cbac7 | 2016-01-24 00:30:08 +0900 | [diff] [blame] | 490 | select GENERIC_PINCONF |
Masahiro Yamada | 6e90889 | 2015-07-14 11:40:01 +0900 | [diff] [blame] | 491 | help |
Tony Prisk | 170c615 | 2013-02-20 09:32:19 +1300 | [diff] [blame] | 492 | This selects the pinctrl driver for Xilinx Zynq. |
Hongzhou Yang | a6df410 | 2015-01-21 13:28:15 +0800 | [diff] [blame] | 493 | |
Sai Krishna Potthuri | 8b242ca | 2021-04-22 14:00:02 +0530 | [diff] [blame] | 494 | config PINCTRL_ZYNQMP |
| 495 | tristate "Pinctrl driver for Xilinx ZynqMP" |
| 496 | depends on ZYNQMP_FIRMWARE |
| 497 | select PINMUX |
| 498 | select GENERIC_PINCONF |
| 499 | default ZYNQMP_FIRMWARE |
| 500 | help |
| 501 | This selects the pinctrl driver for Xilinx ZynqMP platform. |
| 502 | This driver will query the pin information from the firmware |
| 503 | and allow configuring the pins. |
| 504 | Configuration can include the mux function to select on those |
| 505 | pin(s)/group(s), and various pin configuration parameters |
| 506 | such as pull-up, slew rate, etc. |
Sai Krishna Potthuri | fa99e70 | 2021-06-21 16:30:14 +0530 | [diff] [blame] | 507 | This driver can also be built as a module. If so, the module |
| 508 | will be called pinctrl-zynqmp. |
Sai Krishna Potthuri | 8b242ca | 2021-04-22 14:00:02 +0530 | [diff] [blame] | 509 | |
Manivannan Sadhasivam | 2242ddf | 2018-04-04 22:52:52 +0530 | [diff] [blame] | 510 | source "drivers/pinctrl/actions/Kconfig" |
Andrew Jeffery | 4d3d0e42 | 2016-08-30 17:24:24 +0930 | [diff] [blame] | 511 | source "drivers/pinctrl/aspeed/Kconfig" |
Linus Walleij | 2744e8a | 2011-05-02 20:50:54 +0200 | [diff] [blame] | 512 | source "drivers/pinctrl/bcm/Kconfig" |
| 513 | source "drivers/pinctrl/berlin/Kconfig" |
Andy Shevchenko | b124c8b | 2021-12-09 13:34:56 +0200 | [diff] [blame] | 514 | source "drivers/pinctrl/cirrus/Kconfig" |
Linus Walleij | 2744e8a | 2011-05-02 20:50:54 +0200 | [diff] [blame] | 515 | source "drivers/pinctrl/freescale/Kconfig" |
| 516 | source "drivers/pinctrl/intel/Kconfig" |
Andy Shevchenko | b124c8b | 2021-12-09 13:34:56 +0200 | [diff] [blame] | 517 | source "drivers/pinctrl/mediatek/Kconfig" |
| 518 | source "drivers/pinctrl/meson/Kconfig" |
Linus Walleij | 2744e8a | 2011-05-02 20:50:54 +0200 | [diff] [blame] | 519 | source "drivers/pinctrl/mvebu/Kconfig" |
| 520 | source "drivers/pinctrl/nomadik/Kconfig" |
Tomer Maimon | 3b588e4 | 2018-08-08 12:25:26 +0300 | [diff] [blame] | 521 | source "drivers/pinctrl/nuvoton/Kconfig" |
Linus Walleij | 2744e8a | 2011-05-02 20:50:54 +0200 | [diff] [blame] | 522 | source "drivers/pinctrl/pxa/Kconfig" |
| 523 | source "drivers/pinctrl/qcom/Kconfig" |
Sergio Paracuellos | 518b466 | 2020-12-08 08:55:23 +0100 | [diff] [blame] | 524 | source "drivers/pinctrl/ralink/Kconfig" |
Geert Uytterhoeven | 077365a | 2020-09-09 15:15:33 +0200 | [diff] [blame] | 525 | source "drivers/pinctrl/renesas/Kconfig" |
Linus Walleij | 2744e8a | 2011-05-02 20:50:54 +0200 | [diff] [blame] | 526 | source "drivers/pinctrl/samsung/Kconfig" |
| 527 | source "drivers/pinctrl/spear/Kconfig" |
Baolin Wang | 41d32cf | 2017-08-17 14:50:38 +0800 | [diff] [blame] | 528 | source "drivers/pinctrl/sprd/Kconfig" |
Linus Walleij | 2744e8a | 2011-05-02 20:50:54 +0200 | [diff] [blame] | 529 | source "drivers/pinctrl/stm32/Kconfig" |
| 530 | source "drivers/pinctrl/sunxi/Kconfig" |
| 531 | source "drivers/pinctrl/tegra/Kconfig" |
Nishanth Menon | 003910e | 2017-01-05 10:54:14 -0800 | [diff] [blame] | 532 | source "drivers/pinctrl/ti/Kconfig" |
Linus Walleij | 2744e8a | 2011-05-02 20:50:54 +0200 | [diff] [blame] | 533 | source "drivers/pinctrl/uniphier/Kconfig" |
Nobuhiro Iwamatsu | a68a784 | 2020-09-10 05:43:30 +0900 | [diff] [blame] | 534 | source "drivers/pinctrl/visconti/Kconfig" |
Andy Shevchenko | b124c8b | 2021-12-09 13:34:56 +0200 | [diff] [blame] | 535 | source "drivers/pinctrl/vt8500/Kconfig" |
Rahul Tanwar | 1948d5c | 2019-11-15 17:25:07 +0800 | [diff] [blame] | 536 | |
Phil Reid | d219b92 | 2017-10-06 13:08:05 +0800 | [diff] [blame] | 537 | endif |