blob: aea803ba3a15209ee5f783c8d612dcbb8dd7e732 [file] [log] [blame]
Greg Kroah-Hartmanb2441312017-11-01 15:07:57 +01001/* SPDX-License-Identifier: GPL-2.0 */
Kumar Gala7d13d21a2006-01-13 11:19:58 -06002#ifndef __MPC83XX_H__
3#define __MPC83XX_H__
4
5#include <linux/init.h>
6#include <linux/device.h>
Kumar Gala7d52c7b2007-06-22 00:23:57 -05007#include <asm/pci-bridge.h>
Kumar Gala7d13d21a2006-01-13 11:19:58 -06008
Li Yangc1616982007-02-07 13:47:56 +08009/* System Clock Control Register */
10#define MPC83XX_SCCR_OFFS 0xA08
Li Yange5a94af2007-07-03 17:43:16 +080011#define MPC83XX_SCCR_USB_MASK 0x00f00000
Li Yangc1616982007-02-07 13:47:56 +080012#define MPC83XX_SCCR_USB_MPHCM_11 0x00c00000
13#define MPC83XX_SCCR_USB_MPHCM_01 0x00400000
14#define MPC83XX_SCCR_USB_MPHCM_10 0x00800000
15#define MPC83XX_SCCR_USB_DRCM_11 0x00300000
16#define MPC83XX_SCCR_USB_DRCM_01 0x00100000
17#define MPC83XX_SCCR_USB_DRCM_10 0x00200000
Kim Phillipsb74a7e52008-01-30 12:46:19 -060018#define MPC8315_SCCR_USB_MASK 0x00c00000
19#define MPC8315_SCCR_USB_DRCM_11 0x00c00000
Anton Vorontsov1a9ebc02008-04-09 17:59:25 +040020#define MPC8315_SCCR_USB_DRCM_01 0x00400000
Li Yange10241d2008-01-08 15:18:45 +080021#define MPC837X_SCCR_USB_DRCM_11 0x00c00000
Li Yangc1616982007-02-07 13:47:56 +080022
23/* system i/o configuration register low */
24#define MPC83XX_SICRL_OFFS 0x114
Li Yange5a94af2007-07-03 17:43:16 +080025#define MPC834X_SICRL_USB_MASK 0x60000000
Peter Korsgaardb7d66c82009-06-09 13:43:32 +020026#define MPC834X_SICRL_USB0 0x20000000
27#define MPC834X_SICRL_USB1 0x40000000
Li Yange5a94af2007-07-03 17:43:16 +080028#define MPC831X_SICRL_USB_MASK 0x00000c00
29#define MPC831X_SICRL_USB_ULPI 0x00000800
Anton Vorontsovc0a20152008-07-08 21:36:32 +040030#define MPC8315_SICRL_USB_MASK 0x000000fc
31#define MPC8315_SICRL_USB_ULPI 0x00000054
Li Yange10241d2008-01-08 15:18:45 +080032#define MPC837X_SICRL_USB_MASK 0xf0000000
33#define MPC837X_SICRL_USB_ULPI 0x50000000
Anton Vorontsov89f37292009-07-25 01:42:30 +040034#define MPC837X_SICRL_USBB_MASK 0x30000000
35#define MPC837X_SICRL_SD 0x20000000
Li Yangc1616982007-02-07 13:47:56 +080036
37/* system i/o configuration register high */
38#define MPC83XX_SICRH_OFFS 0x118
Ilya Yanokfd066e82010-10-27 02:02:36 +020039#define MPC8308_SICRH_USB_MASK 0x000c0000
40#define MPC8308_SICRH_USB_ULPI 0x00040000
Li Yange5a94af2007-07-03 17:43:16 +080041#define MPC834X_SICRH_USB_UTMI 0x00020000
42#define MPC831X_SICRH_USB_MASK 0x000000e0
43#define MPC831X_SICRH_USB_ULPI 0x000000a0
Anton Vorontsovc0a20152008-07-08 21:36:32 +040044#define MPC8315_SICRH_USB_MASK 0x0000ff00
45#define MPC8315_SICRH_USB_ULPI 0x00000000
Anton Vorontsov89f37292009-07-25 01:42:30 +040046#define MPC837X_SICRH_SPI_MASK 0x00000003
47#define MPC837X_SICRH_SD 0x00000001
Li Yange5a94af2007-07-03 17:43:16 +080048
49/* USB Control Register */
50#define FSL_USB2_CONTROL_OFFS 0x500
51#define CONTROL_UTMI_PHY_EN 0x00000200
Anton Vorontsov1a9ebc02008-04-09 17:59:25 +040052#define CONTROL_REFSEL_24MHZ 0x00000040
Li Yange5a94af2007-07-03 17:43:16 +080053#define CONTROL_REFSEL_48MHZ 0x00000080
54#define CONTROL_PHY_CLK_SEL_ULPI 0x00000400
55#define CONTROL_OTG_PORT 0x00000020
56
57/* USB PORTSC Registers */
58#define FSL_USB2_PORTSC1_OFFS 0x184
59#define FSL_USB2_PORTSC2_OFFS 0x188
60#define PORTSCX_PTW_16BIT 0x10000000
61#define PORTSCX_PTS_UTMI 0x00000000
62#define PORTSCX_PTS_ULPI 0x80000000
Li Yangc1616982007-02-07 13:47:56 +080063
Kumar Gala7d13d21a2006-01-13 11:19:58 -060064/*
65 * Declaration for the various functions exported by the
66 * mpc83xx_* files. Mostly for use by mpc83xx_setup
67 */
68
Daniel Axtens95ec77c2016-07-12 10:54:52 +100069extern void __noreturn mpc83xx_restart(char *cmd);
Kumar Gala30f59332006-02-02 13:50:44 -060070extern long mpc83xx_time_init(void);
Nick Childf4a88b02021-12-16 17:00:32 -050071int __init mpc837x_usb_cfg(void);
72int __init mpc834x_usb_cfg(void);
73int __init mpc831x_usb_cfg(void);
Dmitry Eremin-Solenikovd4fb5eb2011-07-22 23:55:42 +040074extern void mpc83xx_ipic_init_IRQ(void);
Dmitry Eremin-Solenikovd4fb5eb2011-07-22 23:55:42 +040075
Dmitry Eremin-Solenikovbede4802011-11-17 18:48:48 +040076#ifdef CONFIG_PCI
77extern void mpc83xx_setup_pci(void);
78#else
Michael Ellerman5c47c442021-02-11 00:08:02 +110079#define mpc83xx_setup_pci NULL
Dmitry Eremin-Solenikovbede4802011-11-17 18:48:48 +040080#endif
81
Dmitry Eremin-Solenikov7669d582011-11-17 18:48:47 +040082extern int mpc83xx_declare_of_platform_devices(void);
Kevin Haofff69fd2016-08-23 10:06:58 +080083extern void mpc83xx_setup_arch(void);
Kumar Gala7d13d21a2006-01-13 11:19:58 -060084
Kumar Galae060e082006-02-02 13:51:10 -060085#endif /* __MPC83XX_H__ */