blob: 6e04e3848261ce57e3f276ad6dea1496129001d8 [file] [log] [blame]
Anson Huang178984d2020-08-18 11:34:45 +08001# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/serial/fsl-lpuart.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Freescale low power universal asynchronous receiver/transmitter (lpuart)
8
9maintainers:
10 - Fugang Duan <fugang.duan@nxp.com>
11
12allOf:
13 - $ref: "rs485.yaml"
14
15properties:
16 compatible:
Krzysztof Kozlowskicc4521c2020-09-04 17:23:54 +020017 oneOf:
18 - enum:
19 - fsl,vf610-lpuart
20 - fsl,ls1021a-lpuart
21 - fsl,ls1028a-lpuart
22 - fsl,imx7ulp-lpuart
23 - fsl,imx8qm-lpuart
Jesse Taube9629eeb2021-12-15 17:05:35 -050024 - fsl,imxrt1050-lpuart
Krzysztof Kozlowskicc4521c2020-09-04 17:23:54 +020025 - items:
Jacky Baib88fea52021-11-20 19:34:48 +080026 - enum:
27 - fsl,imx8qxp-lpuart
28 - fsl,imx8ulp-lpuart
Krzysztof Kozlowskicc4521c2020-09-04 17:23:54 +020029 - const: fsl,imx7ulp-lpuart
Abel Vesae5ce1272021-12-16 20:48:05 +020030 - items:
31 - const: fsl,imx8qm-lpuart
32 - const: fsl,imx8qxp-lpuart
Anson Huang178984d2020-08-18 11:34:45 +080033
34 reg:
35 maxItems: 1
36
37 interrupts:
38 maxItems: 1
39
40 clocks:
41 items:
42 - description: ipg clock
43 - description: baud clock
44 minItems: 1
Anson Huang178984d2020-08-18 11:34:45 +080045
46 clock-names:
47 items:
48 - const: ipg
49 - const: baud
50 minItems: 1
Anson Huang178984d2020-08-18 11:34:45 +080051
52 dmas:
53 items:
54 - description: DMA controller phandle and request line for RX
55 - description: DMA controller phandle and request line for TX
56
57 dma-names:
58 items:
59 - const: rx
60 - const: tx
61
62 rs485-rts-active-low: true
63 linux,rs485-enabled-at-boot-time: true
64
65required:
66 - compatible
67 - reg
68 - interrupts
69 - clocks
70 - clock-names
71
72unevaluatedProperties: false
73
74examples:
75 - |
76 #include <dt-bindings/clock/vf610-clock.h>
77
78 serial@40027000 {
79 compatible = "fsl,vf610-lpuart";
80 reg = <0x40027000 0x1000>;
81 interrupts = <0 61 0x00>;
82 clocks = <&clks VF610_CLK_UART0>;
83 clock-names = "ipg";
84 dmas = <&edma0 0 2>, <&edma0 0 3>;
85 dma-names = "rx","tx";
86 };