Anson Huang | 364efd0 | 2020-01-15 09:39:06 +0800 | [diff] [blame] | 1 | # SPDX-License-Identifier: GPL-2.0 |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/pinctrl/fsl,imx8mp-pinctrl.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: Freescale IMX8MP IOMUX Controller |
| 8 | |
| 9 | maintainers: |
| 10 | - Anson Huang <Anson.Huang@nxp.com> |
| 11 | |
| 12 | description: |
| 13 | Please refer to fsl,imx-pinctrl.txt and pinctrl-bindings.txt in this directory |
| 14 | for common binding part and usage. |
| 15 | |
| 16 | properties: |
| 17 | compatible: |
| 18 | const: fsl,imx8mp-iomuxc |
| 19 | |
| 20 | reg: |
| 21 | maxItems: 1 |
| 22 | |
| 23 | # Client device subnode's properties |
| 24 | patternProperties: |
| 25 | 'grp$': |
| 26 | type: object |
| 27 | description: |
| 28 | Pinctrl node's client devices use subnodes for desired pin configuration. |
| 29 | Client device subnodes use below standard properties. |
| 30 | |
| 31 | properties: |
| 32 | fsl,pins: |
Anson Huang | 364efd0 | 2020-01-15 09:39:06 +0800 | [diff] [blame] | 33 | description: |
| 34 | each entry consists of 6 integers and represents the mux and config |
| 35 | setting for one pin. The first 5 integers <mux_reg conf_reg input_reg |
| 36 | mux_val input_val> are specified using a PIN_FUNC_ID macro, which can |
| 37 | be found in <arch/arm64/boot/dts/freescale/imx8mp-pinfunc.h>. The last |
| 38 | integer CONFIG is the pad setting value like pull-up on this pin. Please |
| 39 | refer to i.MX8M Plus Reference Manual for detailed CONFIG settings. |
Rob Herring | 3d21a46 | 2020-04-15 19:55:49 -0500 | [diff] [blame] | 40 | $ref: /schemas/types.yaml#/definitions/uint32-matrix |
| 41 | items: |
| 42 | items: |
| 43 | - description: | |
| 44 | "mux_reg" indicates the offset of mux register. |
| 45 | - description: | |
| 46 | "conf_reg" indicates the offset of pad configuration register. |
| 47 | - description: | |
| 48 | "input_reg" indicates the offset of select input register. |
| 49 | - description: | |
| 50 | "mux_val" indicates the mux value to be applied. |
| 51 | - description: | |
| 52 | "input_val" indicates the select input value to be applied. |
| 53 | - description: | |
| 54 | "pad_setting" indicates the pad configuration value to be applied. |
Anson Huang | 364efd0 | 2020-01-15 09:39:06 +0800 | [diff] [blame] | 55 | |
| 56 | required: |
| 57 | - fsl,pins |
| 58 | |
| 59 | additionalProperties: false |
| 60 | |
Rafał Miłecki | c09acbc | 2021-12-02 07:32:16 +0100 | [diff] [blame] | 61 | allOf: |
| 62 | - $ref: "pinctrl.yaml#" |
| 63 | |
Anson Huang | 364efd0 | 2020-01-15 09:39:06 +0800 | [diff] [blame] | 64 | required: |
| 65 | - compatible |
| 66 | - reg |
| 67 | |
| 68 | additionalProperties: false |
| 69 | |
| 70 | examples: |
| 71 | # Pinmux controller node |
| 72 | - | |
| 73 | iomuxc: pinctrl@30330000 { |
| 74 | compatible = "fsl,imx8mp-iomuxc"; |
| 75 | reg = <0x30330000 0x10000>; |
| 76 | |
| 77 | pinctrl_uart2: uart2grp { |
Anson Huang | 61bccd9 | 2020-02-18 15:51:40 +0800 | [diff] [blame] | 78 | fsl,pins = |
| 79 | <0x228 0x488 0x5F0 0x0 0x6 0x49>, |
| 80 | <0x228 0x488 0x000 0x0 0x0 0x49>; |
Anson Huang | 364efd0 | 2020-01-15 09:39:06 +0800 | [diff] [blame] | 81 | }; |
| 82 | }; |
| 83 | |
| 84 | ... |