Dinh Nguyen | 53126a2 | 2013-09-16 15:57:48 -0500 | [diff] [blame] | 1 | * Samsung Exynos specific extensions to the Synopsys Designware Mobile |
Thomas Abraham | c366500 | 2012-09-17 18:16:43 +0000 | [diff] [blame] | 2 | Storage Host Controller |
| 3 | |
Dinh Nguyen | 53126a2 | 2013-09-16 15:57:48 -0500 | [diff] [blame] | 4 | The Synopsys designware mobile storage host controller is used to interface |
Thomas Abraham | c366500 | 2012-09-17 18:16:43 +0000 | [diff] [blame] | 5 | a SoC with storage medium such as eMMC or SD/MMC cards. This file documents |
Dinh Nguyen | 53126a2 | 2013-09-16 15:57:48 -0500 | [diff] [blame] | 6 | differences between the core Synopsys dw mshc controller properties described |
| 7 | by synopsys-dw-mshc.txt and the properties used by the Samsung Exynos specific |
| 8 | extensions to the Synopsys Designware Mobile Storage Host Controller. |
Thomas Abraham | c366500 | 2012-09-17 18:16:43 +0000 | [diff] [blame] | 9 | |
| 10 | Required Properties: |
| 11 | |
| 12 | * compatible: should be |
| 13 | - "samsung,exynos4210-dw-mshc": for controllers with Samsung Exynos4210 |
Masanari Iida | f21ccfa | 2013-01-14 15:14:56 +0900 | [diff] [blame] | 14 | specific extensions. |
Thomas Abraham | c366500 | 2012-09-17 18:16:43 +0000 | [diff] [blame] | 15 | - "samsung,exynos4412-dw-mshc": for controllers with Samsung Exynos4412 |
Masanari Iida | f21ccfa | 2013-01-14 15:14:56 +0900 | [diff] [blame] | 16 | specific extensions. |
Thomas Abraham | c366500 | 2012-09-17 18:16:43 +0000 | [diff] [blame] | 17 | - "samsung,exynos5250-dw-mshc": for controllers with Samsung Exynos5250 |
Masanari Iida | f21ccfa | 2013-01-14 15:14:56 +0900 | [diff] [blame] | 18 | specific extensions. |
Yuvaraj Kumar C D | 0e2c591 | 2013-10-21 05:57:00 +0900 | [diff] [blame] | 19 | - "samsung,exynos5420-dw-mshc": for controllers with Samsung Exynos5420 |
| 20 | specific extensions. |
Abhilash Kesavan | 89ad2be | 2014-08-28 18:48:53 +0530 | [diff] [blame] | 21 | - "samsung,exynos7-dw-mshc": for controllers with Samsung Exynos7 |
| 22 | specific extensions. |
| 23 | - "samsung,exynos7-dw-mshc-smu": for controllers with Samsung Exynos7 |
| 24 | specific extensions having an SMU. |
MÃ¥rten Lindahl | d7d8748 | 2021-12-20 12:30:23 +0100 | [diff] [blame] | 25 | - "axis,artpec8-dw-mshc": for controllers with ARTPEC-8 specific |
| 26 | extensions. |
Thomas Abraham | c366500 | 2012-09-17 18:16:43 +0000 | [diff] [blame] | 27 | |
| 28 | * samsung,dw-mshc-ciu-div: Specifies the divider value for the card interface |
| 29 | unit (ciu) clock. This property is applicable only for Exynos5 SoC's and |
| 30 | ignored for Exynos4 SoC's. The valid range of divider value is 0 to 7. |
| 31 | |
| 32 | * samsung,dw-mshc-sdr-timing: Specifies the value of CIU clock phase shift value |
| 33 | in transmit mode and CIU clock phase shift value in receive mode for single |
| 34 | data rate mode operation. Refer notes below for the order of the cells and the |
| 35 | valid values. |
| 36 | |
| 37 | * samsung,dw-mshc-ddr-timing: Specifies the value of CUI clock phase shift value |
| 38 | in transmit mode and CIU clock phase shift value in receive mode for double |
| 39 | data rate mode operation. Refer notes below for the order of the cells and the |
| 40 | valid values. |
Seungwon Jeon | 8011313 | 2015-01-29 08:11:57 +0530 | [diff] [blame] | 41 | * samsung,dw-mshc-hs400-timing: Specifies the value of CIU TX and RX clock phase |
| 42 | shift value for hs400 mode operation. |
Thomas Abraham | c366500 | 2012-09-17 18:16:43 +0000 | [diff] [blame] | 43 | |
| 44 | Notes for the sdr-timing and ddr-timing values: |
| 45 | |
| 46 | The order of the cells should be |
| 47 | - First Cell: CIU clock phase shift value for tx mode. |
| 48 | - Second Cell: CIU clock phase shift value for rx mode. |
| 49 | |
| 50 | Valid values for SDR and DDR CIU clock timing for Exynos5250: |
| 51 | - valid value for tx phase shift and rx phase shift is 0 to 7. |
| 52 | - when CIU clock divider value is set to 3, all possible 8 phase shift |
| 53 | values can be used. |
| 54 | - if CIU clock divider value is 0 (that is divide by 1), both tx and rx |
| 55 | phase shift clocks should be 0. |
| 56 | |
Seungwon Jeon | 8011313 | 2015-01-29 08:11:57 +0530 | [diff] [blame] | 57 | * samsung,read-strobe-delay: RCLK (Data strobe) delay to control HS400 mode |
| 58 | (Latency value for delay line in Read path) |
| 59 | |
Jaehoon Chung | c83c873 | 2014-08-07 16:37:59 +0900 | [diff] [blame] | 60 | Required properties for a slot (Deprecated - Recommend to use one slot per host): |
Thomas Abraham | c366500 | 2012-09-17 18:16:43 +0000 | [diff] [blame] | 61 | |
| 62 | * gpios: specifies a list of gpios used for command, clock and data bus. The |
| 63 | first gpio is the command line and the second gpio is the clock line. The |
| 64 | rest of the gpios (depending on the bus-width property) are the data lines in |
| 65 | no particular order. The format of the gpio specifier depends on the gpio |
| 66 | controller. |
Mauro Carvalho Chehab | 34962fb | 2018-05-08 15:14:57 -0300 | [diff] [blame] | 67 | (Deprecated - Refer to Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt) |
Thomas Abraham | c366500 | 2012-09-17 18:16:43 +0000 | [diff] [blame] | 68 | |
| 69 | Example: |
| 70 | |
| 71 | The MSHC controller node can be split into two portions, SoC specific and |
| 72 | board specific portions as listed below. |
| 73 | |
| 74 | dwmmc0@12200000 { |
| 75 | compatible = "samsung,exynos5250-dw-mshc"; |
| 76 | reg = <0x12200000 0x1000>; |
| 77 | interrupts = <0 75 0>; |
| 78 | #address-cells = <1>; |
| 79 | #size-cells = <0>; |
| 80 | }; |
| 81 | |
| 82 | dwmmc0@12200000 { |
Jaehoon Chung | c83c873 | 2014-08-07 16:37:59 +0900 | [diff] [blame] | 83 | cap-mmc-highspeed; |
| 84 | cap-sd-highspeed; |
Thomas Abraham | c366500 | 2012-09-17 18:16:43 +0000 | [diff] [blame] | 85 | broken-cd; |
| 86 | fifo-depth = <0x80>; |
| 87 | card-detect-delay = <200>; |
| 88 | samsung,dw-mshc-ciu-div = <3>; |
| 89 | samsung,dw-mshc-sdr-timing = <2 3>; |
| 90 | samsung,dw-mshc-ddr-timing = <1 2>; |
Seungwon Jeon | 8011313 | 2015-01-29 08:11:57 +0530 | [diff] [blame] | 91 | samsung,dw-mshc-hs400-timing = <0 2>; |
| 92 | samsung,read-strobe-delay = <90>; |
Jaehoon Chung | c83c873 | 2014-08-07 16:37:59 +0900 | [diff] [blame] | 93 | bus-width = <8>; |
Thomas Abraham | c366500 | 2012-09-17 18:16:43 +0000 | [diff] [blame] | 94 | }; |