Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
Russell King | 0ddbccd | 2008-09-25 15:59:19 +0100 | [diff] [blame] | 2 | * linux/arch/arm/mm/dma-mapping.c |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3 | * |
| 4 | * Copyright (C) 2000-2004 Russell King |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License version 2 as |
| 8 | * published by the Free Software Foundation. |
| 9 | * |
| 10 | * DMA uncached mapping support. |
| 11 | */ |
| 12 | #include <linux/module.h> |
| 13 | #include <linux/mm.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 14 | #include <linux/gfp.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 15 | #include <linux/errno.h> |
| 16 | #include <linux/list.h> |
| 17 | #include <linux/init.h> |
| 18 | #include <linux/device.h> |
| 19 | #include <linux/dma-mapping.h> |
Nicolas Pitre | 39af22a | 2010-12-15 15:14:45 -0500 | [diff] [blame] | 20 | #include <linux/highmem.h> |
Jon Medhurst | 99d1717 | 2011-08-02 17:28:27 +0100 | [diff] [blame] | 21 | #include <linux/slab.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 22 | |
Lennert Buytenhek | 23759dc | 2006-04-02 00:07:39 +0100 | [diff] [blame] | 23 | #include <asm/memory.h> |
Nicolas Pitre | 4337745 | 2009-03-12 22:52:09 -0400 | [diff] [blame] | 24 | #include <asm/highmem.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 25 | #include <asm/cacheflush.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 26 | #include <asm/tlbflush.h> |
Kevin Hilman | 37134cd | 2006-01-12 16:12:21 +0000 | [diff] [blame] | 27 | #include <asm/sizes.h> |
Jon Medhurst | 99d1717 | 2011-08-02 17:28:27 +0100 | [diff] [blame] | 28 | #include <asm/mach/arch.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 29 | |
Russell King | 022ae53 | 2011-07-08 21:26:59 +0100 | [diff] [blame] | 30 | #include "mm.h" |
| 31 | |
Catalin Marinas | ab6494f | 2009-07-24 12:35:02 +0100 | [diff] [blame] | 32 | static u64 get_coherent_dma_mask(struct device *dev) |
| 33 | { |
Russell King | 022ae53 | 2011-07-08 21:26:59 +0100 | [diff] [blame] | 34 | u64 mask = (u64)arm_dma_limit; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 35 | |
Catalin Marinas | ab6494f | 2009-07-24 12:35:02 +0100 | [diff] [blame] | 36 | if (dev) { |
| 37 | mask = dev->coherent_dma_mask; |
| 38 | |
| 39 | /* |
| 40 | * Sanity check the DMA mask - it must be non-zero, and |
| 41 | * must be able to be satisfied by a DMA allocation. |
| 42 | */ |
| 43 | if (mask == 0) { |
| 44 | dev_warn(dev, "coherent DMA mask is unset\n"); |
| 45 | return 0; |
| 46 | } |
| 47 | |
Russell King | 022ae53 | 2011-07-08 21:26:59 +0100 | [diff] [blame] | 48 | if ((~mask) & (u64)arm_dma_limit) { |
Catalin Marinas | ab6494f | 2009-07-24 12:35:02 +0100 | [diff] [blame] | 49 | dev_warn(dev, "coherent DMA mask %#llx is smaller " |
| 50 | "than system GFP_DMA mask %#llx\n", |
Russell King | 022ae53 | 2011-07-08 21:26:59 +0100 | [diff] [blame] | 51 | mask, (u64)arm_dma_limit); |
Catalin Marinas | ab6494f | 2009-07-24 12:35:02 +0100 | [diff] [blame] | 52 | return 0; |
| 53 | } |
| 54 | } |
| 55 | |
| 56 | return mask; |
| 57 | } |
| 58 | |
Russell King | 7a9a32a | 2009-11-19 15:31:07 +0000 | [diff] [blame] | 59 | /* |
| 60 | * Allocate a DMA buffer for 'dev' of size 'size' using the |
| 61 | * specified gfp mask. Note that 'size' must be page aligned. |
| 62 | */ |
| 63 | static struct page *__dma_alloc_buffer(struct device *dev, size_t size, gfp_t gfp) |
| 64 | { |
| 65 | unsigned long order = get_order(size); |
| 66 | struct page *page, *p, *e; |
| 67 | void *ptr; |
| 68 | u64 mask = get_coherent_dma_mask(dev); |
| 69 | |
| 70 | #ifdef CONFIG_DMA_API_DEBUG |
| 71 | u64 limit = (mask + 1) & ~mask; |
| 72 | if (limit && size >= limit) { |
| 73 | dev_warn(dev, "coherent allocation too big (requested %#x mask %#llx)\n", |
| 74 | size, mask); |
| 75 | return NULL; |
| 76 | } |
| 77 | #endif |
| 78 | |
| 79 | if (!mask) |
| 80 | return NULL; |
| 81 | |
| 82 | if (mask < 0xffffffffULL) |
| 83 | gfp |= GFP_DMA; |
| 84 | |
| 85 | page = alloc_pages(gfp, order); |
| 86 | if (!page) |
| 87 | return NULL; |
| 88 | |
| 89 | /* |
| 90 | * Now split the huge page and free the excess pages |
| 91 | */ |
| 92 | split_page(page, order); |
| 93 | for (p = page + (size >> PAGE_SHIFT), e = page + (1 << order); p < e; p++) |
| 94 | __free_page(p); |
| 95 | |
| 96 | /* |
| 97 | * Ensure that the allocated pages are zeroed, and that any data |
| 98 | * lurking in the kernel direct-mapped region is invalidated. |
| 99 | */ |
| 100 | ptr = page_address(page); |
| 101 | memset(ptr, 0, size); |
| 102 | dmac_flush_range(ptr, ptr + size); |
| 103 | outer_flush_range(__pa(ptr), __pa(ptr) + size); |
| 104 | |
| 105 | return page; |
| 106 | } |
| 107 | |
| 108 | /* |
| 109 | * Free a DMA buffer. 'size' must be page aligned. |
| 110 | */ |
| 111 | static void __dma_free_buffer(struct page *page, size_t size) |
| 112 | { |
| 113 | struct page *e = page + (size >> PAGE_SHIFT); |
| 114 | |
| 115 | while (page < e) { |
| 116 | __free_page(page); |
| 117 | page++; |
| 118 | } |
| 119 | } |
| 120 | |
Catalin Marinas | ab6494f | 2009-07-24 12:35:02 +0100 | [diff] [blame] | 121 | #ifdef CONFIG_MMU |
Catalin Marinas | a5e9d38 | 2010-06-21 15:09:06 +0100 | [diff] [blame] | 122 | |
Jon Medhurst | 99d1717 | 2011-08-02 17:28:27 +0100 | [diff] [blame] | 123 | #define CONSISTENT_OFFSET(x) (((unsigned long)(x) - consistent_base) >> PAGE_SHIFT) |
Linus Torvalds | 1fdb24e | 2011-10-28 12:02:27 -0700 | [diff] [blame] | 124 | #define CONSISTENT_PTE_INDEX(x) (((unsigned long)(x) - consistent_base) >> PMD_SHIFT) |
Catalin Marinas | a5e9d38 | 2010-06-21 15:09:06 +0100 | [diff] [blame] | 125 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 126 | /* |
Kevin Hilman | 37134cd | 2006-01-12 16:12:21 +0000 | [diff] [blame] | 127 | * These are the page tables (2MB each) covering uncached, DMA consistent allocations |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 128 | */ |
Jon Medhurst | 99d1717 | 2011-08-02 17:28:27 +0100 | [diff] [blame] | 129 | static pte_t **consistent_pte; |
| 130 | |
Jon Medhurst | 99d1717 | 2011-08-02 17:28:27 +0100 | [diff] [blame] | 131 | #define DEFAULT_CONSISTENT_DMA_SIZE SZ_2M |
Jon Medhurst | 99d1717 | 2011-08-02 17:28:27 +0100 | [diff] [blame] | 132 | |
| 133 | unsigned long consistent_base = CONSISTENT_END - DEFAULT_CONSISTENT_DMA_SIZE; |
| 134 | |
| 135 | void __init init_consistent_dma_size(unsigned long size) |
| 136 | { |
| 137 | unsigned long base = CONSISTENT_END - ALIGN(size, SZ_2M); |
| 138 | |
| 139 | BUG_ON(consistent_pte); /* Check we're called before DMA region init */ |
| 140 | BUG_ON(base < VMALLOC_END); |
| 141 | |
| 142 | /* Grow region to accommodate specified size */ |
| 143 | if (base < consistent_base) |
| 144 | consistent_base = base; |
| 145 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 146 | |
Russell King | 13ccf3a | 2009-11-19 15:07:04 +0000 | [diff] [blame] | 147 | #include "vmregion.h" |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 148 | |
Russell King | 13ccf3a | 2009-11-19 15:07:04 +0000 | [diff] [blame] | 149 | static struct arm_vmregion_head consistent_head = { |
| 150 | .vm_lock = __SPIN_LOCK_UNLOCKED(&consistent_head.vm_lock), |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 151 | .vm_list = LIST_HEAD_INIT(consistent_head.vm_list), |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 152 | .vm_end = CONSISTENT_END, |
| 153 | }; |
| 154 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 155 | #ifdef CONFIG_HUGETLB_PAGE |
| 156 | #error ARM Coherent DMA allocator does not (yet) support huge TLB |
| 157 | #endif |
| 158 | |
Russell King | 88c58f3 | 2009-11-19 16:46:02 +0000 | [diff] [blame] | 159 | /* |
| 160 | * Initialise the consistent memory allocation. |
| 161 | */ |
| 162 | static int __init consistent_init(void) |
| 163 | { |
| 164 | int ret = 0; |
| 165 | pgd_t *pgd; |
Russell King | 516295e | 2010-11-21 16:27:49 +0000 | [diff] [blame] | 166 | pud_t *pud; |
Russell King | 88c58f3 | 2009-11-19 16:46:02 +0000 | [diff] [blame] | 167 | pmd_t *pmd; |
| 168 | pte_t *pte; |
| 169 | int i = 0; |
Jon Medhurst | 99d1717 | 2011-08-02 17:28:27 +0100 | [diff] [blame] | 170 | unsigned long base = consistent_base; |
Catalin Marinas | 53cbcbc | 2011-11-17 13:11:21 +0100 | [diff] [blame] | 171 | unsigned long num_ptes = (CONSISTENT_END - base) >> PMD_SHIFT; |
Jon Medhurst | 99d1717 | 2011-08-02 17:28:27 +0100 | [diff] [blame] | 172 | |
| 173 | consistent_pte = kmalloc(num_ptes * sizeof(pte_t), GFP_KERNEL); |
| 174 | if (!consistent_pte) { |
| 175 | pr_err("%s: no memory\n", __func__); |
| 176 | return -ENOMEM; |
| 177 | } |
| 178 | |
| 179 | pr_debug("DMA memory: 0x%08lx - 0x%08lx:\n", base, CONSISTENT_END); |
| 180 | consistent_head.vm_start = base; |
Russell King | 88c58f3 | 2009-11-19 16:46:02 +0000 | [diff] [blame] | 181 | |
| 182 | do { |
| 183 | pgd = pgd_offset(&init_mm, base); |
Russell King | 516295e | 2010-11-21 16:27:49 +0000 | [diff] [blame] | 184 | |
| 185 | pud = pud_alloc(&init_mm, pgd, base); |
| 186 | if (!pud) { |
Marek Szyprowski | 6b6f770 | 2012-02-28 10:19:14 +0100 | [diff] [blame] | 187 | pr_err("%s: no pud tables\n", __func__); |
Russell King | 516295e | 2010-11-21 16:27:49 +0000 | [diff] [blame] | 188 | ret = -ENOMEM; |
| 189 | break; |
| 190 | } |
| 191 | |
| 192 | pmd = pmd_alloc(&init_mm, pud, base); |
Russell King | 88c58f3 | 2009-11-19 16:46:02 +0000 | [diff] [blame] | 193 | if (!pmd) { |
Marek Szyprowski | 6b6f770 | 2012-02-28 10:19:14 +0100 | [diff] [blame] | 194 | pr_err("%s: no pmd tables\n", __func__); |
Russell King | 88c58f3 | 2009-11-19 16:46:02 +0000 | [diff] [blame] | 195 | ret = -ENOMEM; |
| 196 | break; |
| 197 | } |
| 198 | WARN_ON(!pmd_none(*pmd)); |
| 199 | |
| 200 | pte = pte_alloc_kernel(pmd, base); |
| 201 | if (!pte) { |
Marek Szyprowski | 6b6f770 | 2012-02-28 10:19:14 +0100 | [diff] [blame] | 202 | pr_err("%s: no pte tables\n", __func__); |
Russell King | 88c58f3 | 2009-11-19 16:46:02 +0000 | [diff] [blame] | 203 | ret = -ENOMEM; |
| 204 | break; |
| 205 | } |
| 206 | |
| 207 | consistent_pte[i++] = pte; |
Catalin Marinas | e73fc88 | 2011-08-23 14:07:23 +0100 | [diff] [blame] | 208 | base += PMD_SIZE; |
Russell King | 88c58f3 | 2009-11-19 16:46:02 +0000 | [diff] [blame] | 209 | } while (base < CONSISTENT_END); |
| 210 | |
| 211 | return ret; |
| 212 | } |
| 213 | |
| 214 | core_initcall(consistent_init); |
| 215 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 216 | static void * |
Russell King | 45cd529 | 2012-01-12 23:08:07 +0000 | [diff] [blame] | 217 | __dma_alloc_remap(struct page *page, size_t size, gfp_t gfp, pgprot_t prot, |
| 218 | const void *caller) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 219 | { |
Russell King | 13ccf3a | 2009-11-19 15:07:04 +0000 | [diff] [blame] | 220 | struct arm_vmregion *c; |
Russell King | 5bc23d3 | 2010-07-25 08:57:02 +0100 | [diff] [blame] | 221 | size_t align; |
| 222 | int bit; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 223 | |
Jon Medhurst | 99d1717 | 2011-08-02 17:28:27 +0100 | [diff] [blame] | 224 | if (!consistent_pte) { |
Marek Szyprowski | 6b6f770 | 2012-02-28 10:19:14 +0100 | [diff] [blame] | 225 | pr_err("%s: not initialised\n", __func__); |
Russell King | ebd7a84 | 2009-11-19 20:58:31 +0000 | [diff] [blame] | 226 | dump_stack(); |
Russell King | ebd7a84 | 2009-11-19 20:58:31 +0000 | [diff] [blame] | 227 | return NULL; |
| 228 | } |
| 229 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 230 | /* |
Russell King | 5bc23d3 | 2010-07-25 08:57:02 +0100 | [diff] [blame] | 231 | * Align the virtual region allocation - maximum alignment is |
| 232 | * a section size, minimum is a page size. This helps reduce |
| 233 | * fragmentation of the DMA space, and also prevents allocations |
| 234 | * smaller than a section from crossing a section boundary. |
| 235 | */ |
Russell King | c947f69 | 2010-11-03 16:00:15 +0000 | [diff] [blame] | 236 | bit = fls(size - 1); |
Russell King | 5bc23d3 | 2010-07-25 08:57:02 +0100 | [diff] [blame] | 237 | if (bit > SECTION_SHIFT) |
| 238 | bit = SECTION_SHIFT; |
| 239 | align = 1 << bit; |
| 240 | |
| 241 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 242 | * Allocate a virtual address in the consistent mapping region. |
| 243 | */ |
Russell King | 5bc23d3 | 2010-07-25 08:57:02 +0100 | [diff] [blame] | 244 | c = arm_vmregion_alloc(&consistent_head, align, size, |
Russell King | 45cd529 | 2012-01-12 23:08:07 +0000 | [diff] [blame] | 245 | gfp & ~(__GFP_DMA | __GFP_HIGHMEM), caller); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 246 | if (c) { |
Kevin Hilman | 37134cd | 2006-01-12 16:12:21 +0000 | [diff] [blame] | 247 | pte_t *pte; |
Kevin Hilman | 37134cd | 2006-01-12 16:12:21 +0000 | [diff] [blame] | 248 | int idx = CONSISTENT_PTE_INDEX(c->vm_start); |
| 249 | u32 off = CONSISTENT_OFFSET(c->vm_start) & (PTRS_PER_PTE-1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 250 | |
Kevin Hilman | 37134cd | 2006-01-12 16:12:21 +0000 | [diff] [blame] | 251 | pte = consistent_pte[idx] + off; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 252 | c->vm_pages = page; |
| 253 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 254 | do { |
| 255 | BUG_ON(!pte_none(*pte)); |
| 256 | |
Russell King | ad1ae2f | 2006-12-13 14:34:43 +0000 | [diff] [blame] | 257 | set_pte_ext(pte, mk_pte(page, prot), 0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 258 | page++; |
| 259 | pte++; |
Kevin Hilman | 37134cd | 2006-01-12 16:12:21 +0000 | [diff] [blame] | 260 | off++; |
| 261 | if (off >= PTRS_PER_PTE) { |
| 262 | off = 0; |
| 263 | pte = consistent_pte[++idx]; |
| 264 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 265 | } while (size -= PAGE_SIZE); |
| 266 | |
Russell King | 2be23c4 | 2010-09-08 16:27:56 +0100 | [diff] [blame] | 267 | dsb(); |
| 268 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 269 | return (void *)c->vm_start; |
| 270 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 271 | return NULL; |
| 272 | } |
Russell King | 695ae0a | 2009-11-19 16:31:39 +0000 | [diff] [blame] | 273 | |
| 274 | static void __dma_free_remap(void *cpu_addr, size_t size) |
| 275 | { |
| 276 | struct arm_vmregion *c; |
| 277 | unsigned long addr; |
| 278 | pte_t *ptep; |
| 279 | int idx; |
| 280 | u32 off; |
| 281 | |
| 282 | c = arm_vmregion_find_remove(&consistent_head, (unsigned long)cpu_addr); |
| 283 | if (!c) { |
Marek Szyprowski | 6b6f770 | 2012-02-28 10:19:14 +0100 | [diff] [blame] | 284 | pr_err("%s: trying to free invalid coherent area: %p\n", |
Russell King | 695ae0a | 2009-11-19 16:31:39 +0000 | [diff] [blame] | 285 | __func__, cpu_addr); |
| 286 | dump_stack(); |
| 287 | return; |
| 288 | } |
| 289 | |
| 290 | if ((c->vm_end - c->vm_start) != size) { |
Marek Szyprowski | 6b6f770 | 2012-02-28 10:19:14 +0100 | [diff] [blame] | 291 | pr_err("%s: freeing wrong coherent size (%ld != %d)\n", |
Russell King | 695ae0a | 2009-11-19 16:31:39 +0000 | [diff] [blame] | 292 | __func__, c->vm_end - c->vm_start, size); |
| 293 | dump_stack(); |
| 294 | size = c->vm_end - c->vm_start; |
| 295 | } |
| 296 | |
| 297 | idx = CONSISTENT_PTE_INDEX(c->vm_start); |
| 298 | off = CONSISTENT_OFFSET(c->vm_start) & (PTRS_PER_PTE-1); |
| 299 | ptep = consistent_pte[idx] + off; |
| 300 | addr = c->vm_start; |
| 301 | do { |
| 302 | pte_t pte = ptep_get_and_clear(&init_mm, addr, ptep); |
Russell King | 695ae0a | 2009-11-19 16:31:39 +0000 | [diff] [blame] | 303 | |
| 304 | ptep++; |
| 305 | addr += PAGE_SIZE; |
| 306 | off++; |
| 307 | if (off >= PTRS_PER_PTE) { |
| 308 | off = 0; |
| 309 | ptep = consistent_pte[++idx]; |
| 310 | } |
| 311 | |
Russell King | acaac25 | 2009-11-20 18:19:52 +0000 | [diff] [blame] | 312 | if (pte_none(pte) || !pte_present(pte)) |
Marek Szyprowski | 6b6f770 | 2012-02-28 10:19:14 +0100 | [diff] [blame] | 313 | pr_crit("%s: bad page in kernel page table\n", |
| 314 | __func__); |
Russell King | 695ae0a | 2009-11-19 16:31:39 +0000 | [diff] [blame] | 315 | } while (size -= PAGE_SIZE); |
| 316 | |
| 317 | flush_tlb_kernel_range(c->vm_start, c->vm_end); |
| 318 | |
| 319 | arm_vmregion_free(&consistent_head, c); |
| 320 | } |
| 321 | |
Catalin Marinas | ab6494f | 2009-07-24 12:35:02 +0100 | [diff] [blame] | 322 | #else /* !CONFIG_MMU */ |
Russell King | 695ae0a | 2009-11-19 16:31:39 +0000 | [diff] [blame] | 323 | |
Russell King | 45cd529 | 2012-01-12 23:08:07 +0000 | [diff] [blame] | 324 | #define __dma_alloc_remap(page, size, gfp, prot, c) page_address(page) |
Russell King | 31ebf94 | 2009-11-19 21:12:17 +0000 | [diff] [blame] | 325 | #define __dma_free_remap(addr, size) do { } while (0) |
| 326 | |
| 327 | #endif /* CONFIG_MMU */ |
| 328 | |
Catalin Marinas | ab6494f | 2009-07-24 12:35:02 +0100 | [diff] [blame] | 329 | static void * |
| 330 | __dma_alloc(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp, |
Russell King | 45cd529 | 2012-01-12 23:08:07 +0000 | [diff] [blame] | 331 | pgprot_t prot, const void *caller) |
Catalin Marinas | ab6494f | 2009-07-24 12:35:02 +0100 | [diff] [blame] | 332 | { |
Russell King | 04da569 | 2009-11-19 15:54:45 +0000 | [diff] [blame] | 333 | struct page *page; |
Russell King | 31ebf94 | 2009-11-19 21:12:17 +0000 | [diff] [blame] | 334 | void *addr; |
Catalin Marinas | ab6494f | 2009-07-24 12:35:02 +0100 | [diff] [blame] | 335 | |
Sumit Bhattacharya | ea2e705 | 2011-11-24 00:47:12 +0100 | [diff] [blame] | 336 | /* |
| 337 | * Following is a work-around (a.k.a. hack) to prevent pages |
| 338 | * with __GFP_COMP being passed to split_page() which cannot |
| 339 | * handle them. The real problem is that this flag probably |
| 340 | * should be 0 on ARM as it is not supported on this |
| 341 | * platform; see CONFIG_HUGETLBFS. |
| 342 | */ |
| 343 | gfp &= ~(__GFP_COMP); |
| 344 | |
Marek Szyprowski | 553ac78 | 2012-02-29 14:45:28 +0100 | [diff] [blame] | 345 | *handle = DMA_ERROR_CODE; |
Russell King | 04da569 | 2009-11-19 15:54:45 +0000 | [diff] [blame] | 346 | size = PAGE_ALIGN(size); |
| 347 | |
| 348 | page = __dma_alloc_buffer(dev, size, gfp); |
| 349 | if (!page) |
| 350 | return NULL; |
| 351 | |
Russell King | 31ebf94 | 2009-11-19 21:12:17 +0000 | [diff] [blame] | 352 | if (!arch_is_coherent()) |
Russell King | 45cd529 | 2012-01-12 23:08:07 +0000 | [diff] [blame] | 353 | addr = __dma_alloc_remap(page, size, gfp, prot, caller); |
Russell King | 31ebf94 | 2009-11-19 21:12:17 +0000 | [diff] [blame] | 354 | else |
| 355 | addr = page_address(page); |
| 356 | |
| 357 | if (addr) |
Russell King | 9eedd96 | 2011-01-03 00:00:17 +0000 | [diff] [blame] | 358 | *handle = pfn_to_dma(dev, page_to_pfn(page)); |
Russell King | d8e89b4 | 2011-09-22 10:32:25 +0100 | [diff] [blame] | 359 | else |
| 360 | __dma_free_buffer(page, size); |
Russell King | 31ebf94 | 2009-11-19 21:12:17 +0000 | [diff] [blame] | 361 | |
| 362 | return addr; |
Catalin Marinas | ab6494f | 2009-07-24 12:35:02 +0100 | [diff] [blame] | 363 | } |
Russell King | 695ae0a | 2009-11-19 16:31:39 +0000 | [diff] [blame] | 364 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 365 | /* |
| 366 | * Allocate DMA-coherent memory space and return both the kernel remapped |
| 367 | * virtual and bus address for that space. |
| 368 | */ |
| 369 | void * |
Al Viro | f9e3214 | 2005-10-21 03:20:58 -0400 | [diff] [blame] | 370 | dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 371 | { |
Dmitry Baryshkov | 1fe5326 | 2008-07-18 13:30:14 +0400 | [diff] [blame] | 372 | void *memory; |
| 373 | |
| 374 | if (dma_alloc_from_coherent(dev, size, handle, &memory)) |
| 375 | return memory; |
| 376 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 377 | return __dma_alloc(dev, size, handle, gfp, |
Russell King | 45cd529 | 2012-01-12 23:08:07 +0000 | [diff] [blame] | 378 | pgprot_dmacoherent(pgprot_kernel), |
| 379 | __builtin_return_address(0)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 380 | } |
| 381 | EXPORT_SYMBOL(dma_alloc_coherent); |
| 382 | |
| 383 | /* |
| 384 | * Allocate a writecombining region, in much the same way as |
| 385 | * dma_alloc_coherent above. |
| 386 | */ |
| 387 | void * |
Al Viro | f9e3214 | 2005-10-21 03:20:58 -0400 | [diff] [blame] | 388 | dma_alloc_writecombine(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 389 | { |
| 390 | return __dma_alloc(dev, size, handle, gfp, |
Russell King | 45cd529 | 2012-01-12 23:08:07 +0000 | [diff] [blame] | 391 | pgprot_writecombine(pgprot_kernel), |
| 392 | __builtin_return_address(0)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 393 | } |
| 394 | EXPORT_SYMBOL(dma_alloc_writecombine); |
| 395 | |
| 396 | static int dma_mmap(struct device *dev, struct vm_area_struct *vma, |
| 397 | void *cpu_addr, dma_addr_t dma_addr, size_t size) |
| 398 | { |
Catalin Marinas | ab6494f | 2009-07-24 12:35:02 +0100 | [diff] [blame] | 399 | int ret = -ENXIO; |
| 400 | #ifdef CONFIG_MMU |
Russell King | 13ccf3a | 2009-11-19 15:07:04 +0000 | [diff] [blame] | 401 | unsigned long user_size, kern_size; |
| 402 | struct arm_vmregion *c; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 403 | |
Marek Szyprowski | 47142f0 | 2012-05-15 19:04:13 +0200 | [diff] [blame] | 404 | if (dma_mmap_from_coherent(dev, vma, cpu_addr, size, &ret)) |
| 405 | return ret; |
| 406 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 407 | user_size = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT; |
| 408 | |
Russell King | 13ccf3a | 2009-11-19 15:07:04 +0000 | [diff] [blame] | 409 | c = arm_vmregion_find(&consistent_head, (unsigned long)cpu_addr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 410 | if (c) { |
| 411 | unsigned long off = vma->vm_pgoff; |
| 412 | |
| 413 | kern_size = (c->vm_end - c->vm_start) >> PAGE_SHIFT; |
| 414 | |
| 415 | if (off < kern_size && |
| 416 | user_size <= (kern_size - off)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 417 | ret = remap_pfn_range(vma, vma->vm_start, |
| 418 | page_to_pfn(c->vm_pages) + off, |
| 419 | user_size << PAGE_SHIFT, |
| 420 | vma->vm_page_prot); |
| 421 | } |
| 422 | } |
Catalin Marinas | ab6494f | 2009-07-24 12:35:02 +0100 | [diff] [blame] | 423 | #endif /* CONFIG_MMU */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 424 | |
| 425 | return ret; |
| 426 | } |
| 427 | |
| 428 | int dma_mmap_coherent(struct device *dev, struct vm_area_struct *vma, |
| 429 | void *cpu_addr, dma_addr_t dma_addr, size_t size) |
| 430 | { |
Russell King | 26a26d3 | 2009-11-20 21:06:43 +0000 | [diff] [blame] | 431 | vma->vm_page_prot = pgprot_dmacoherent(vma->vm_page_prot); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 432 | return dma_mmap(dev, vma, cpu_addr, dma_addr, size); |
| 433 | } |
| 434 | EXPORT_SYMBOL(dma_mmap_coherent); |
| 435 | |
| 436 | int dma_mmap_writecombine(struct device *dev, struct vm_area_struct *vma, |
| 437 | void *cpu_addr, dma_addr_t dma_addr, size_t size) |
| 438 | { |
| 439 | vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot); |
| 440 | return dma_mmap(dev, vma, cpu_addr, dma_addr, size); |
| 441 | } |
| 442 | EXPORT_SYMBOL(dma_mmap_writecombine); |
| 443 | |
| 444 | /* |
| 445 | * free a page as defined by the above mapping. |
Russell King | 5edf71a | 2005-11-25 15:52:51 +0000 | [diff] [blame] | 446 | * Must not be called with IRQs disabled. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 447 | */ |
| 448 | void dma_free_coherent(struct device *dev, size_t size, void *cpu_addr, dma_addr_t handle) |
| 449 | { |
Russell King | 5edf71a | 2005-11-25 15:52:51 +0000 | [diff] [blame] | 450 | WARN_ON(irqs_disabled()); |
| 451 | |
Dmitry Baryshkov | 1fe5326 | 2008-07-18 13:30:14 +0400 | [diff] [blame] | 452 | if (dma_release_from_coherent(dev, get_order(size), cpu_addr)) |
| 453 | return; |
| 454 | |
Russell King | 3e82d01 | 2009-11-19 15:38:12 +0000 | [diff] [blame] | 455 | size = PAGE_ALIGN(size); |
| 456 | |
Russell King | 695ae0a | 2009-11-19 16:31:39 +0000 | [diff] [blame] | 457 | if (!arch_is_coherent()) |
| 458 | __dma_free_remap(cpu_addr, size); |
Russell King | 7a9a32a | 2009-11-19 15:31:07 +0000 | [diff] [blame] | 459 | |
Russell King | 9eedd96 | 2011-01-03 00:00:17 +0000 | [diff] [blame] | 460 | __dma_free_buffer(pfn_to_page(dma_to_pfn(dev, handle)), size); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 461 | } |
| 462 | EXPORT_SYMBOL(dma_free_coherent); |
| 463 | |
| 464 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 465 | * Make an area consistent for devices. |
Dan Williams | 105ef9a | 2006-11-21 22:57:23 +0100 | [diff] [blame] | 466 | * Note: Drivers should NOT use this function directly, as it will break |
| 467 | * platforms with CONFIG_DMABOUNCE. |
| 468 | * Use the driver DMA support - see dma-mapping.h (dma_sync_*) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 469 | */ |
Russell King | 4ea0d73 | 2009-11-24 16:27:17 +0000 | [diff] [blame] | 470 | void ___dma_single_cpu_to_dev(const void *kaddr, size_t size, |
| 471 | enum dma_data_direction dir) |
| 472 | { |
Russell King | 2ffe2da | 2009-10-31 16:52:16 +0000 | [diff] [blame] | 473 | unsigned long paddr; |
| 474 | |
Russell King | a9c9147 | 2009-11-26 16:19:58 +0000 | [diff] [blame] | 475 | BUG_ON(!virt_addr_valid(kaddr) || !virt_addr_valid(kaddr + size - 1)); |
| 476 | |
| 477 | dmac_map_area(kaddr, size, dir); |
Russell King | 2ffe2da | 2009-10-31 16:52:16 +0000 | [diff] [blame] | 478 | |
| 479 | paddr = __pa(kaddr); |
| 480 | if (dir == DMA_FROM_DEVICE) { |
| 481 | outer_inv_range(paddr, paddr + size); |
| 482 | } else { |
| 483 | outer_clean_range(paddr, paddr + size); |
| 484 | } |
| 485 | /* FIXME: non-speculating: flush on bidirectional mappings? */ |
Russell King | 4ea0d73 | 2009-11-24 16:27:17 +0000 | [diff] [blame] | 486 | } |
| 487 | EXPORT_SYMBOL(___dma_single_cpu_to_dev); |
| 488 | |
| 489 | void ___dma_single_dev_to_cpu(const void *kaddr, size_t size, |
| 490 | enum dma_data_direction dir) |
| 491 | { |
Russell King | a9c9147 | 2009-11-26 16:19:58 +0000 | [diff] [blame] | 492 | BUG_ON(!virt_addr_valid(kaddr) || !virt_addr_valid(kaddr + size - 1)); |
| 493 | |
Russell King | 2ffe2da | 2009-10-31 16:52:16 +0000 | [diff] [blame] | 494 | /* FIXME: non-speculating: not required */ |
| 495 | /* don't bother invalidating if DMA to device */ |
| 496 | if (dir != DMA_TO_DEVICE) { |
| 497 | unsigned long paddr = __pa(kaddr); |
| 498 | outer_inv_range(paddr, paddr + size); |
| 499 | } |
| 500 | |
Russell King | a9c9147 | 2009-11-26 16:19:58 +0000 | [diff] [blame] | 501 | dmac_unmap_area(kaddr, size, dir); |
Russell King | 4ea0d73 | 2009-11-24 16:27:17 +0000 | [diff] [blame] | 502 | } |
| 503 | EXPORT_SYMBOL(___dma_single_dev_to_cpu); |
Russell King | afd1a32 | 2008-09-25 16:30:57 +0100 | [diff] [blame] | 504 | |
Russell King | 65af191 | 2009-11-24 17:53:33 +0000 | [diff] [blame] | 505 | static void dma_cache_maint_page(struct page *page, unsigned long offset, |
Russell King | a9c9147 | 2009-11-26 16:19:58 +0000 | [diff] [blame] | 506 | size_t size, enum dma_data_direction dir, |
| 507 | void (*op)(const void *, size_t, int)) |
Russell King | 65af191 | 2009-11-24 17:53:33 +0000 | [diff] [blame] | 508 | { |
| 509 | /* |
| 510 | * A single sg entry may refer to multiple physically contiguous |
| 511 | * pages. But we still need to process highmem pages individually. |
| 512 | * If highmem is not configured then the bulk of this loop gets |
| 513 | * optimized out. |
| 514 | */ |
| 515 | size_t left = size; |
| 516 | do { |
| 517 | size_t len = left; |
Russell King | 93f1d62 | 2009-11-24 14:41:01 +0000 | [diff] [blame] | 518 | void *vaddr; |
| 519 | |
| 520 | if (PageHighMem(page)) { |
| 521 | if (len + offset > PAGE_SIZE) { |
| 522 | if (offset >= PAGE_SIZE) { |
| 523 | page += offset / PAGE_SIZE; |
| 524 | offset %= PAGE_SIZE; |
| 525 | } |
| 526 | len = PAGE_SIZE - offset; |
Russell King | 65af191 | 2009-11-24 17:53:33 +0000 | [diff] [blame] | 527 | } |
Russell King | 93f1d62 | 2009-11-24 14:41:01 +0000 | [diff] [blame] | 528 | vaddr = kmap_high_get(page); |
| 529 | if (vaddr) { |
| 530 | vaddr += offset; |
Russell King | a9c9147 | 2009-11-26 16:19:58 +0000 | [diff] [blame] | 531 | op(vaddr, len, dir); |
Russell King | 93f1d62 | 2009-11-24 14:41:01 +0000 | [diff] [blame] | 532 | kunmap_high(page); |
Nicolas Pitre | 7e5a69e | 2010-03-29 21:46:02 +0100 | [diff] [blame] | 533 | } else if (cache_is_vipt()) { |
Nicolas Pitre | 39af22a | 2010-12-15 15:14:45 -0500 | [diff] [blame] | 534 | /* unmapped pages might still be cached */ |
| 535 | vaddr = kmap_atomic(page); |
Nicolas Pitre | 7e5a69e | 2010-03-29 21:46:02 +0100 | [diff] [blame] | 536 | op(vaddr + offset, len, dir); |
Nicolas Pitre | 39af22a | 2010-12-15 15:14:45 -0500 | [diff] [blame] | 537 | kunmap_atomic(vaddr); |
Russell King | 93f1d62 | 2009-11-24 14:41:01 +0000 | [diff] [blame] | 538 | } |
| 539 | } else { |
| 540 | vaddr = page_address(page) + offset; |
Russell King | a9c9147 | 2009-11-26 16:19:58 +0000 | [diff] [blame] | 541 | op(vaddr, len, dir); |
Russell King | 65af191 | 2009-11-24 17:53:33 +0000 | [diff] [blame] | 542 | } |
Russell King | 65af191 | 2009-11-24 17:53:33 +0000 | [diff] [blame] | 543 | offset = 0; |
| 544 | page++; |
| 545 | left -= len; |
| 546 | } while (left); |
| 547 | } |
| 548 | |
| 549 | void ___dma_page_cpu_to_dev(struct page *page, unsigned long off, |
| 550 | size_t size, enum dma_data_direction dir) |
| 551 | { |
Nicolas Pitre | 4337745 | 2009-03-12 22:52:09 -0400 | [diff] [blame] | 552 | unsigned long paddr; |
Nicolas Pitre | 4337745 | 2009-03-12 22:52:09 -0400 | [diff] [blame] | 553 | |
Russell King | a9c9147 | 2009-11-26 16:19:58 +0000 | [diff] [blame] | 554 | dma_cache_maint_page(page, off, size, dir, dmac_map_area); |
Nicolas Pitre | 4337745 | 2009-03-12 22:52:09 -0400 | [diff] [blame] | 555 | |
Russell King | 65af191 | 2009-11-24 17:53:33 +0000 | [diff] [blame] | 556 | paddr = page_to_phys(page) + off; |
Russell King | 2ffe2da | 2009-10-31 16:52:16 +0000 | [diff] [blame] | 557 | if (dir == DMA_FROM_DEVICE) { |
| 558 | outer_inv_range(paddr, paddr + size); |
| 559 | } else { |
| 560 | outer_clean_range(paddr, paddr + size); |
| 561 | } |
| 562 | /* FIXME: non-speculating: flush on bidirectional mappings? */ |
Nicolas Pitre | 4337745 | 2009-03-12 22:52:09 -0400 | [diff] [blame] | 563 | } |
Russell King | 4ea0d73 | 2009-11-24 16:27:17 +0000 | [diff] [blame] | 564 | EXPORT_SYMBOL(___dma_page_cpu_to_dev); |
| 565 | |
| 566 | void ___dma_page_dev_to_cpu(struct page *page, unsigned long off, |
| 567 | size_t size, enum dma_data_direction dir) |
| 568 | { |
Russell King | 2ffe2da | 2009-10-31 16:52:16 +0000 | [diff] [blame] | 569 | unsigned long paddr = page_to_phys(page) + off; |
| 570 | |
| 571 | /* FIXME: non-speculating: not required */ |
| 572 | /* don't bother invalidating if DMA to device */ |
| 573 | if (dir != DMA_TO_DEVICE) |
| 574 | outer_inv_range(paddr, paddr + size); |
| 575 | |
Russell King | a9c9147 | 2009-11-26 16:19:58 +0000 | [diff] [blame] | 576 | dma_cache_maint_page(page, off, size, dir, dmac_unmap_area); |
Catalin Marinas | c017780 | 2010-09-13 15:57:36 +0100 | [diff] [blame] | 577 | |
| 578 | /* |
| 579 | * Mark the D-cache clean for this page to avoid extra flushing. |
| 580 | */ |
| 581 | if (dir != DMA_TO_DEVICE && off == 0 && size >= PAGE_SIZE) |
| 582 | set_bit(PG_dcache_clean, &page->flags); |
Russell King | 4ea0d73 | 2009-11-24 16:27:17 +0000 | [diff] [blame] | 583 | } |
| 584 | EXPORT_SYMBOL(___dma_page_dev_to_cpu); |
Nicolas Pitre | 4337745 | 2009-03-12 22:52:09 -0400 | [diff] [blame] | 585 | |
Russell King | afd1a32 | 2008-09-25 16:30:57 +0100 | [diff] [blame] | 586 | /** |
| 587 | * dma_map_sg - map a set of SG buffers for streaming mode DMA |
| 588 | * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices |
| 589 | * @sg: list of buffers |
| 590 | * @nents: number of buffers to map |
| 591 | * @dir: DMA transfer direction |
| 592 | * |
| 593 | * Map a set of buffers described by scatterlist in streaming mode for DMA. |
| 594 | * This is the scatter-gather version of the dma_map_single interface. |
| 595 | * Here the scatter gather list elements are each tagged with the |
| 596 | * appropriate dma address and length. They are obtained via |
| 597 | * sg_dma_{address,length}. |
| 598 | * |
| 599 | * Device ownership issues as mentioned for dma_map_single are the same |
| 600 | * here. |
| 601 | */ |
| 602 | int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents, |
| 603 | enum dma_data_direction dir) |
| 604 | { |
| 605 | struct scatterlist *s; |
Russell King | 01135d92 | 2008-09-25 21:05:02 +0100 | [diff] [blame] | 606 | int i, j; |
Russell King | afd1a32 | 2008-09-25 16:30:57 +0100 | [diff] [blame] | 607 | |
Russell King | 24056f5 | 2011-01-03 11:29:28 +0000 | [diff] [blame] | 608 | BUG_ON(!valid_dma_direction(dir)); |
| 609 | |
Russell King | afd1a32 | 2008-09-25 16:30:57 +0100 | [diff] [blame] | 610 | for_each_sg(sg, s, nents, i) { |
Russell King | 24056f5 | 2011-01-03 11:29:28 +0000 | [diff] [blame] | 611 | s->dma_address = __dma_map_page(dev, sg_page(s), s->offset, |
Russell King | 01135d92 | 2008-09-25 21:05:02 +0100 | [diff] [blame] | 612 | s->length, dir); |
| 613 | if (dma_mapping_error(dev, s->dma_address)) |
| 614 | goto bad_mapping; |
Russell King | afd1a32 | 2008-09-25 16:30:57 +0100 | [diff] [blame] | 615 | } |
Russell King | 24056f5 | 2011-01-03 11:29:28 +0000 | [diff] [blame] | 616 | debug_dma_map_sg(dev, sg, nents, nents, dir); |
Russell King | afd1a32 | 2008-09-25 16:30:57 +0100 | [diff] [blame] | 617 | return nents; |
Russell King | 01135d92 | 2008-09-25 21:05:02 +0100 | [diff] [blame] | 618 | |
| 619 | bad_mapping: |
| 620 | for_each_sg(sg, s, i, j) |
Russell King | 24056f5 | 2011-01-03 11:29:28 +0000 | [diff] [blame] | 621 | __dma_unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir); |
Russell King | 01135d92 | 2008-09-25 21:05:02 +0100 | [diff] [blame] | 622 | return 0; |
Russell King | afd1a32 | 2008-09-25 16:30:57 +0100 | [diff] [blame] | 623 | } |
| 624 | EXPORT_SYMBOL(dma_map_sg); |
| 625 | |
| 626 | /** |
| 627 | * dma_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg |
| 628 | * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices |
| 629 | * @sg: list of buffers |
Linus Walleij | 0adfca6 | 2011-01-12 18:50:37 +0100 | [diff] [blame] | 630 | * @nents: number of buffers to unmap (same as was passed to dma_map_sg) |
Russell King | afd1a32 | 2008-09-25 16:30:57 +0100 | [diff] [blame] | 631 | * @dir: DMA transfer direction (same as was passed to dma_map_sg) |
| 632 | * |
| 633 | * Unmap a set of streaming mode DMA translations. Again, CPU access |
| 634 | * rules concerning calls here are the same as for dma_unmap_single(). |
| 635 | */ |
| 636 | void dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nents, |
| 637 | enum dma_data_direction dir) |
| 638 | { |
Russell King | 01135d92 | 2008-09-25 21:05:02 +0100 | [diff] [blame] | 639 | struct scatterlist *s; |
| 640 | int i; |
| 641 | |
Russell King | 24056f5 | 2011-01-03 11:29:28 +0000 | [diff] [blame] | 642 | debug_dma_unmap_sg(dev, sg, nents, dir); |
| 643 | |
Russell King | 01135d92 | 2008-09-25 21:05:02 +0100 | [diff] [blame] | 644 | for_each_sg(sg, s, nents, i) |
Russell King | 24056f5 | 2011-01-03 11:29:28 +0000 | [diff] [blame] | 645 | __dma_unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir); |
Russell King | afd1a32 | 2008-09-25 16:30:57 +0100 | [diff] [blame] | 646 | } |
| 647 | EXPORT_SYMBOL(dma_unmap_sg); |
| 648 | |
| 649 | /** |
| 650 | * dma_sync_sg_for_cpu |
| 651 | * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices |
| 652 | * @sg: list of buffers |
| 653 | * @nents: number of buffers to map (returned from dma_map_sg) |
| 654 | * @dir: DMA transfer direction (same as was passed to dma_map_sg) |
| 655 | */ |
| 656 | void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, |
| 657 | int nents, enum dma_data_direction dir) |
| 658 | { |
| 659 | struct scatterlist *s; |
| 660 | int i; |
| 661 | |
| 662 | for_each_sg(sg, s, nents, i) { |
Marek Szyprowski | a227fb9 | 2012-02-10 19:55:20 +0100 | [diff] [blame^] | 663 | if (!dmabounce_sync_for_cpu(dev, sg_dma_address(s), |
Russell King | 18eabe2 | 2009-10-31 16:52:16 +0000 | [diff] [blame] | 664 | sg_dma_len(s), dir)) |
| 665 | continue; |
| 666 | |
| 667 | __dma_page_dev_to_cpu(sg_page(s), s->offset, |
| 668 | s->length, dir); |
Russell King | afd1a32 | 2008-09-25 16:30:57 +0100 | [diff] [blame] | 669 | } |
Russell King | 24056f5 | 2011-01-03 11:29:28 +0000 | [diff] [blame] | 670 | |
| 671 | debug_dma_sync_sg_for_cpu(dev, sg, nents, dir); |
Russell King | afd1a32 | 2008-09-25 16:30:57 +0100 | [diff] [blame] | 672 | } |
| 673 | EXPORT_SYMBOL(dma_sync_sg_for_cpu); |
| 674 | |
| 675 | /** |
| 676 | * dma_sync_sg_for_device |
| 677 | * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices |
| 678 | * @sg: list of buffers |
| 679 | * @nents: number of buffers to map (returned from dma_map_sg) |
| 680 | * @dir: DMA transfer direction (same as was passed to dma_map_sg) |
| 681 | */ |
| 682 | void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, |
| 683 | int nents, enum dma_data_direction dir) |
| 684 | { |
| 685 | struct scatterlist *s; |
| 686 | int i; |
| 687 | |
| 688 | for_each_sg(sg, s, nents, i) { |
Marek Szyprowski | a227fb9 | 2012-02-10 19:55:20 +0100 | [diff] [blame^] | 689 | if (!dmabounce_sync_for_device(dev, sg_dma_address(s), |
Russell King | 2638b4d | 2008-09-25 21:38:41 +0100 | [diff] [blame] | 690 | sg_dma_len(s), dir)) |
| 691 | continue; |
| 692 | |
Russell King | 18eabe2 | 2009-10-31 16:52:16 +0000 | [diff] [blame] | 693 | __dma_page_cpu_to_dev(sg_page(s), s->offset, |
| 694 | s->length, dir); |
Russell King | afd1a32 | 2008-09-25 16:30:57 +0100 | [diff] [blame] | 695 | } |
Russell King | 24056f5 | 2011-01-03 11:29:28 +0000 | [diff] [blame] | 696 | |
| 697 | debug_dma_sync_sg_for_device(dev, sg, nents, dir); |
Russell King | afd1a32 | 2008-09-25 16:30:57 +0100 | [diff] [blame] | 698 | } |
| 699 | EXPORT_SYMBOL(dma_sync_sg_for_device); |
Russell King | 24056f5 | 2011-01-03 11:29:28 +0000 | [diff] [blame] | 700 | |
Russell King | 022ae53 | 2011-07-08 21:26:59 +0100 | [diff] [blame] | 701 | /* |
| 702 | * Return whether the given device DMA address mask can be supported |
| 703 | * properly. For example, if your device can only drive the low 24-bits |
| 704 | * during bus mastering, then you would pass 0x00ffffff as the mask |
| 705 | * to this function. |
| 706 | */ |
| 707 | int dma_supported(struct device *dev, u64 mask) |
| 708 | { |
| 709 | if (mask < (u64)arm_dma_limit) |
| 710 | return 0; |
| 711 | return 1; |
| 712 | } |
| 713 | EXPORT_SYMBOL(dma_supported); |
| 714 | |
| 715 | int dma_set_mask(struct device *dev, u64 dma_mask) |
| 716 | { |
| 717 | if (!dev->dma_mask || !dma_supported(dev, dma_mask)) |
| 718 | return -EIO; |
| 719 | |
| 720 | #ifndef CONFIG_DMABOUNCE |
| 721 | *dev->dma_mask = dma_mask; |
| 722 | #endif |
| 723 | |
| 724 | return 0; |
| 725 | } |
| 726 | EXPORT_SYMBOL(dma_set_mask); |
| 727 | |
Russell King | 24056f5 | 2011-01-03 11:29:28 +0000 | [diff] [blame] | 728 | #define PREALLOC_DMA_DEBUG_ENTRIES 4096 |
| 729 | |
| 730 | static int __init dma_debug_do_init(void) |
| 731 | { |
Russell King | 45cd529 | 2012-01-12 23:08:07 +0000 | [diff] [blame] | 732 | #ifdef CONFIG_MMU |
| 733 | arm_vmregion_create_proc("dma-mappings", &consistent_head); |
| 734 | #endif |
Russell King | 24056f5 | 2011-01-03 11:29:28 +0000 | [diff] [blame] | 735 | dma_debug_init(PREALLOC_DMA_DEBUG_ENTRIES); |
| 736 | return 0; |
| 737 | } |
| 738 | fs_initcall(dma_debug_do_init); |