| Maxime Ripard | b2ac5d7 | 2012-11-12 15:07:50 +0100 | [diff] [blame] | 1 | Allwinner A1X SoCs Timer Controller |
| 2 | |||||
| 3 | Required properties: | ||||
| 4 | |||||
| 5 | - compatible : should be "allwinner,sunxi-timer" | ||||
| 6 | - reg : Specifies base physical address and size of the registers. | ||||
| 7 | - interrupts : The interrupt of the first timer | ||||
| 8 | - clocks: phandle to the source clock (usually a 24 MHz fixed clock) | ||||
| 9 | |||||
| 10 | Example: | ||||
| 11 | |||||
| 12 | timer { | ||||
| 13 | compatible = "allwinner,sunxi-timer"; | ||||
| 14 | reg = <0x01c20c00 0x400>; | ||||
| 15 | interrupts = <22>; | ||||
| 16 | clocks = <&osc>; | ||||
| 17 | }; | ||||