Thomas Gleixner | 35728b8 | 2018-10-31 19:21:09 +0100 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
Russell King | 112f38a4 | 2010-12-15 19:23:07 +0000 | [diff] [blame] | 2 | /* |
Thomas Gleixner | 58c5fc2 | 2018-10-31 19:21:08 +0100 | [diff] [blame] | 3 | * Generic sched_clock() support, to extend low level hardware time |
| 4 | * counters to full 64-bit ns values. |
Russell King | 112f38a4 | 2010-12-15 19:23:07 +0000 | [diff] [blame] | 5 | */ |
| 6 | #include <linux/clocksource.h> |
| 7 | #include <linux/init.h> |
| 8 | #include <linux/jiffies.h> |
Stephen Boyd | a08ca5d | 2013-07-18 16:21:16 -0700 | [diff] [blame] | 9 | #include <linux/ktime.h> |
Russell King | 112f38a4 | 2010-12-15 19:23:07 +0000 | [diff] [blame] | 10 | #include <linux/kernel.h> |
Russell King | a42c362 | 2012-09-09 18:39:28 +0100 | [diff] [blame] | 11 | #include <linux/moduleparam.h> |
Russell King | 112f38a4 | 2010-12-15 19:23:07 +0000 | [diff] [blame] | 12 | #include <linux/sched.h> |
Ingo Molnar | e601757 | 2017-02-01 16:36:40 +0100 | [diff] [blame] | 13 | #include <linux/sched/clock.h> |
Russell King | f153d01 | 2012-02-04 12:31:27 +0000 | [diff] [blame] | 14 | #include <linux/syscore_ops.h> |
Stephen Boyd | a08ca5d | 2013-07-18 16:21:16 -0700 | [diff] [blame] | 15 | #include <linux/hrtimer.h> |
Stephen Boyd | 38ff87f | 2013-06-01 23:39:40 -0700 | [diff] [blame] | 16 | #include <linux/sched_clock.h> |
Stephen Boyd | 85c3d2d | 2013-07-18 16:21:15 -0700 | [diff] [blame] | 17 | #include <linux/seqlock.h> |
Stephen Boyd | e7e3ff1 | 2013-07-18 16:21:17 -0700 | [diff] [blame] | 18 | #include <linux/bitops.h> |
Russell King | 112f38a4 | 2010-12-15 19:23:07 +0000 | [diff] [blame] | 19 | |
Ben Dooks (Codethink) | 086ee46 | 2019-10-22 14:12:26 +0100 | [diff] [blame] | 20 | #include "timekeeping.h" |
| 21 | |
Daniel Thompson | cf7c9c1 | 2015-03-26 12:23:23 -0700 | [diff] [blame] | 22 | /** |
Ingo Molnar | 32fea56 | 2015-03-27 07:08:06 +0100 | [diff] [blame] | 23 | * struct clock_data - all data needed for sched_clock() (including |
Daniel Thompson | cf7c9c1 | 2015-03-26 12:23:23 -0700 | [diff] [blame] | 24 | * registration of a new clock source) |
| 25 | * |
Daniel Thompson | 1809bfa | 2015-03-26 12:23:26 -0700 | [diff] [blame] | 26 | * @seq: Sequence counter for protecting updates. The lowest |
| 27 | * bit is the index for @read_data. |
Daniel Thompson | cf7c9c1 | 2015-03-26 12:23:23 -0700 | [diff] [blame] | 28 | * @read_data: Data required to read from sched_clock. |
Ingo Molnar | 32fea56 | 2015-03-27 07:08:06 +0100 | [diff] [blame] | 29 | * @wrap_kt: Duration for which clock can run before wrapping. |
| 30 | * @rate: Tick rate of the registered clock. |
| 31 | * @actual_read_sched_clock: Registered hardware level clock read function. |
Daniel Thompson | cf7c9c1 | 2015-03-26 12:23:23 -0700 | [diff] [blame] | 32 | * |
| 33 | * The ordering of this structure has been chosen to optimize cache |
Ingo Molnar | 32fea56 | 2015-03-27 07:08:06 +0100 | [diff] [blame] | 34 | * performance. In particular 'seq' and 'read_data[0]' (combined) should fit |
| 35 | * into a single 64-byte cache line. |
Daniel Thompson | cf7c9c1 | 2015-03-26 12:23:23 -0700 | [diff] [blame] | 36 | */ |
| 37 | struct clock_data { |
Ahmed S. Darwish | a690ed0 | 2020-08-27 13:40:40 +0200 | [diff] [blame] | 38 | seqcount_latch_t seq; |
Ingo Molnar | 32fea56 | 2015-03-27 07:08:06 +0100 | [diff] [blame] | 39 | struct clock_read_data read_data[2]; |
| 40 | ktime_t wrap_kt; |
| 41 | unsigned long rate; |
| 42 | |
Daniel Thompson | 13dbeb3 | 2015-03-26 12:23:24 -0700 | [diff] [blame] | 43 | u64 (*actual_read_sched_clock)(void); |
Daniel Thompson | cf7c9c1 | 2015-03-26 12:23:23 -0700 | [diff] [blame] | 44 | }; |
| 45 | |
Stephen Boyd | a08ca5d | 2013-07-18 16:21:16 -0700 | [diff] [blame] | 46 | static struct hrtimer sched_clock_timer; |
Russell King | a42c362 | 2012-09-09 18:39:28 +0100 | [diff] [blame] | 47 | static int irqtime = -1; |
| 48 | |
| 49 | core_param(irqtime, irqtime, int, 0400); |
Marc Zyngier | 2f0778af | 2011-12-15 12:19:23 +0100 | [diff] [blame] | 50 | |
Stephen Boyd | e7e3ff1 | 2013-07-18 16:21:17 -0700 | [diff] [blame] | 51 | static u64 notrace jiffy_sched_clock_read(void) |
Marc Zyngier | 2f0778af | 2011-12-15 12:19:23 +0100 | [diff] [blame] | 52 | { |
Stephen Boyd | e7e3ff1 | 2013-07-18 16:21:17 -0700 | [diff] [blame] | 53 | /* |
| 54 | * We don't need to use get_jiffies_64 on 32-bit arches here |
| 55 | * because we register with BITS_PER_LONG |
| 56 | */ |
| 57 | return (u64)(jiffies - INITIAL_JIFFIES); |
Marc Zyngier | 2f0778af | 2011-12-15 12:19:23 +0100 | [diff] [blame] | 58 | } |
| 59 | |
Daniel Thompson | cf7c9c1 | 2015-03-26 12:23:23 -0700 | [diff] [blame] | 60 | static struct clock_data cd ____cacheline_aligned = { |
Daniel Thompson | 1809bfa | 2015-03-26 12:23:26 -0700 | [diff] [blame] | 61 | .read_data[0] = { .mult = NSEC_PER_SEC / HZ, |
| 62 | .read_sched_clock = jiffy_sched_clock_read, }, |
Daniel Thompson | 13dbeb3 | 2015-03-26 12:23:24 -0700 | [diff] [blame] | 63 | .actual_read_sched_clock = jiffy_sched_clock_read, |
Daniel Thompson | cf7c9c1 | 2015-03-26 12:23:23 -0700 | [diff] [blame] | 64 | }; |
Marc Zyngier | 2f0778af | 2011-12-15 12:19:23 +0100 | [diff] [blame] | 65 | |
Stephen Boyd | cea1509 | 2013-04-18 17:33:40 +0100 | [diff] [blame] | 66 | static inline u64 notrace cyc_to_ns(u64 cyc, u32 mult, u32 shift) |
Marc Zyngier | 2f0778af | 2011-12-15 12:19:23 +0100 | [diff] [blame] | 67 | { |
| 68 | return (cyc * mult) >> shift; |
| 69 | } |
| 70 | |
Quanyang Wang | 4cd2bb1 | 2020-09-29 16:20:27 +0800 | [diff] [blame] | 71 | notrace struct clock_read_data *sched_clock_read_begin(unsigned int *seq) |
Peter Zijlstra | 1b86abc1 | 2020-07-16 13:11:24 +0800 | [diff] [blame] | 72 | { |
Ahmed S. Darwish | aadd6e5 | 2020-07-16 13:11:25 +0800 | [diff] [blame] | 73 | *seq = raw_read_seqcount_latch(&cd.seq); |
Peter Zijlstra | 1b86abc1 | 2020-07-16 13:11:24 +0800 | [diff] [blame] | 74 | return cd.read_data + (*seq & 1); |
| 75 | } |
| 76 | |
Quanyang Wang | 4cd2bb1 | 2020-09-29 16:20:27 +0800 | [diff] [blame] | 77 | notrace int sched_clock_read_retry(unsigned int seq) |
Peter Zijlstra | 1b86abc1 | 2020-07-16 13:11:24 +0800 | [diff] [blame] | 78 | { |
Ahmed S. Darwish | a690ed0 | 2020-08-27 13:40:40 +0200 | [diff] [blame] | 79 | return read_seqcount_latch_retry(&cd.seq, seq); |
Peter Zijlstra | 1b86abc1 | 2020-07-16 13:11:24 +0800 | [diff] [blame] | 80 | } |
| 81 | |
Stephen Boyd | b4042ce | 2013-07-18 16:21:19 -0700 | [diff] [blame] | 82 | unsigned long long notrace sched_clock(void) |
Marc Zyngier | 2f0778af | 2011-12-15 12:19:23 +0100 | [diff] [blame] | 83 | { |
Daniel Thompson | 8710e91 | 2015-03-26 12:23:22 -0700 | [diff] [blame] | 84 | u64 cyc, res; |
Rasmus Villemoes | e1e41b6 | 2019-03-18 20:55:56 +0100 | [diff] [blame] | 85 | unsigned int seq; |
Daniel Thompson | 1809bfa | 2015-03-26 12:23:26 -0700 | [diff] [blame] | 86 | struct clock_read_data *rd; |
Stephen Boyd | 336ae11 | 2013-06-17 15:40:58 -0700 | [diff] [blame] | 87 | |
Marc Zyngier | 2f0778af | 2011-12-15 12:19:23 +0100 | [diff] [blame] | 88 | do { |
Peter Zijlstra | 1b86abc1 | 2020-07-16 13:11:24 +0800 | [diff] [blame] | 89 | rd = sched_clock_read_begin(&seq); |
Daniel Thompson | 8710e91 | 2015-03-26 12:23:22 -0700 | [diff] [blame] | 90 | |
Daniel Thompson | 13dbeb3 | 2015-03-26 12:23:24 -0700 | [diff] [blame] | 91 | cyc = (rd->read_sched_clock() - rd->epoch_cyc) & |
| 92 | rd->sched_clock_mask; |
| 93 | res = rd->epoch_ns + cyc_to_ns(cyc, rd->mult, rd->shift); |
Peter Zijlstra | 1b86abc1 | 2020-07-16 13:11:24 +0800 | [diff] [blame] | 94 | } while (sched_clock_read_retry(seq)); |
Marc Zyngier | 2f0778af | 2011-12-15 12:19:23 +0100 | [diff] [blame] | 95 | |
Daniel Thompson | 8710e91 | 2015-03-26 12:23:22 -0700 | [diff] [blame] | 96 | return res; |
Marc Zyngier | 2f0778af | 2011-12-15 12:19:23 +0100 | [diff] [blame] | 97 | } |
| 98 | |
| 99 | /* |
Daniel Thompson | 1809bfa | 2015-03-26 12:23:26 -0700 | [diff] [blame] | 100 | * Updating the data required to read the clock. |
| 101 | * |
Ingo Molnar | 32fea56 | 2015-03-27 07:08:06 +0100 | [diff] [blame] | 102 | * sched_clock() will never observe mis-matched data even if called from |
Daniel Thompson | 1809bfa | 2015-03-26 12:23:26 -0700 | [diff] [blame] | 103 | * an NMI. We do this by maintaining an odd/even copy of the data and |
Ingo Molnar | 32fea56 | 2015-03-27 07:08:06 +0100 | [diff] [blame] | 104 | * steering sched_clock() to one or the other using a sequence counter. |
| 105 | * In order to preserve the data cache profile of sched_clock() as much |
Daniel Thompson | 1809bfa | 2015-03-26 12:23:26 -0700 | [diff] [blame] | 106 | * as possible the system reverts back to the even copy when the update |
| 107 | * completes; the odd copy is used *only* during an update. |
| 108 | */ |
| 109 | static void update_clock_read_data(struct clock_read_data *rd) |
| 110 | { |
| 111 | /* update the backup (odd) copy with the new data */ |
| 112 | cd.read_data[1] = *rd; |
| 113 | |
| 114 | /* steer readers towards the odd copy */ |
| 115 | raw_write_seqcount_latch(&cd.seq); |
| 116 | |
| 117 | /* now its safe for us to update the normal (even) copy */ |
| 118 | cd.read_data[0] = *rd; |
| 119 | |
| 120 | /* switch readers back to the even copy */ |
| 121 | raw_write_seqcount_latch(&cd.seq); |
| 122 | } |
| 123 | |
| 124 | /* |
Ingo Molnar | 32fea56 | 2015-03-27 07:08:06 +0100 | [diff] [blame] | 125 | * Atomically update the sched_clock() epoch. |
Marc Zyngier | 2f0778af | 2011-12-15 12:19:23 +0100 | [diff] [blame] | 126 | */ |
Daniel Thompson | 9fee69a | 2015-03-26 12:23:25 -0700 | [diff] [blame] | 127 | static void update_sched_clock(void) |
Marc Zyngier | 2f0778af | 2011-12-15 12:19:23 +0100 | [diff] [blame] | 128 | { |
Stephen Boyd | e7e3ff1 | 2013-07-18 16:21:17 -0700 | [diff] [blame] | 129 | u64 cyc; |
Marc Zyngier | 2f0778af | 2011-12-15 12:19:23 +0100 | [diff] [blame] | 130 | u64 ns; |
Daniel Thompson | 1809bfa | 2015-03-26 12:23:26 -0700 | [diff] [blame] | 131 | struct clock_read_data rd; |
| 132 | |
| 133 | rd = cd.read_data[0]; |
Marc Zyngier | 2f0778af | 2011-12-15 12:19:23 +0100 | [diff] [blame] | 134 | |
Daniel Thompson | 13dbeb3 | 2015-03-26 12:23:24 -0700 | [diff] [blame] | 135 | cyc = cd.actual_read_sched_clock(); |
Ingo Molnar | 32fea56 | 2015-03-27 07:08:06 +0100 | [diff] [blame] | 136 | ns = rd.epoch_ns + cyc_to_ns((cyc - rd.epoch_cyc) & rd.sched_clock_mask, rd.mult, rd.shift); |
Stephen Boyd | 85c3d2d | 2013-07-18 16:21:15 -0700 | [diff] [blame] | 137 | |
Daniel Thompson | 1809bfa | 2015-03-26 12:23:26 -0700 | [diff] [blame] | 138 | rd.epoch_ns = ns; |
| 139 | rd.epoch_cyc = cyc; |
| 140 | |
| 141 | update_clock_read_data(&rd); |
Marc Zyngier | 2f0778af | 2011-12-15 12:19:23 +0100 | [diff] [blame] | 142 | } |
Russell King | 112f38a4 | 2010-12-15 19:23:07 +0000 | [diff] [blame] | 143 | |
Stephen Boyd | a08ca5d | 2013-07-18 16:21:16 -0700 | [diff] [blame] | 144 | static enum hrtimer_restart sched_clock_poll(struct hrtimer *hrt) |
Russell King | 112f38a4 | 2010-12-15 19:23:07 +0000 | [diff] [blame] | 145 | { |
Marc Zyngier | 2f0778af | 2011-12-15 12:19:23 +0100 | [diff] [blame] | 146 | update_sched_clock(); |
Stephen Boyd | a08ca5d | 2013-07-18 16:21:16 -0700 | [diff] [blame] | 147 | hrtimer_forward_now(hrt, cd.wrap_kt); |
Ingo Molnar | 32fea56 | 2015-03-27 07:08:06 +0100 | [diff] [blame] | 148 | |
Stephen Boyd | a08ca5d | 2013-07-18 16:21:16 -0700 | [diff] [blame] | 149 | return HRTIMER_RESTART; |
Russell King | 112f38a4 | 2010-12-15 19:23:07 +0000 | [diff] [blame] | 150 | } |
| 151 | |
Ingo Molnar | 32fea56 | 2015-03-27 07:08:06 +0100 | [diff] [blame] | 152 | void __init |
| 153 | sched_clock_register(u64 (*read)(void), int bits, unsigned long rate) |
Russell King | 112f38a4 | 2010-12-15 19:23:07 +0000 | [diff] [blame] | 154 | { |
Stephen Boyd | 5ae8aab | 2014-02-17 10:45:36 -0800 | [diff] [blame] | 155 | u64 res, wrap, new_mask, new_epoch, cyc, ns; |
| 156 | u32 new_mult, new_shift; |
Paul Cercueil | 2707745 | 2020-01-07 02:06:29 +0100 | [diff] [blame] | 157 | unsigned long r, flags; |
Russell King | 112f38a4 | 2010-12-15 19:23:07 +0000 | [diff] [blame] | 158 | char r_unit; |
Daniel Thompson | 1809bfa | 2015-03-26 12:23:26 -0700 | [diff] [blame] | 159 | struct clock_read_data rd; |
Russell King | 112f38a4 | 2010-12-15 19:23:07 +0000 | [diff] [blame] | 160 | |
Rob Herring | c115739 | 2013-02-08 16:14:59 -0600 | [diff] [blame] | 161 | if (cd.rate > rate) |
| 162 | return; |
| 163 | |
Paul Cercueil | 2707745 | 2020-01-07 02:06:29 +0100 | [diff] [blame] | 164 | /* Cannot register a sched_clock with interrupts on */ |
| 165 | local_irq_save(flags); |
Russell King | 112f38a4 | 2010-12-15 19:23:07 +0000 | [diff] [blame] | 166 | |
Ingo Molnar | 32fea56 | 2015-03-27 07:08:06 +0100 | [diff] [blame] | 167 | /* Calculate the mult/shift to convert counter ticks to ns. */ |
Stephen Boyd | 5ae8aab | 2014-02-17 10:45:36 -0800 | [diff] [blame] | 168 | clocks_calc_mult_shift(&new_mult, &new_shift, rate, NSEC_PER_SEC, 3600); |
| 169 | |
| 170 | new_mask = CLOCKSOURCE_MASK(bits); |
Daniel Thompson | 8710e91 | 2015-03-26 12:23:22 -0700 | [diff] [blame] | 171 | cd.rate = rate; |
Stephen Boyd | 5ae8aab | 2014-02-17 10:45:36 -0800 | [diff] [blame] | 172 | |
Ingo Molnar | 32fea56 | 2015-03-27 07:08:06 +0100 | [diff] [blame] | 173 | /* Calculate how many nanosecs until we risk wrapping */ |
John Stultz | fb82fe2 | 2015-03-11 21:16:31 -0700 | [diff] [blame] | 174 | wrap = clocks_calc_max_nsecs(new_mult, new_shift, 0, new_mask, NULL); |
Daniel Thompson | 8710e91 | 2015-03-26 12:23:22 -0700 | [diff] [blame] | 175 | cd.wrap_kt = ns_to_ktime(wrap); |
Stephen Boyd | 5ae8aab | 2014-02-17 10:45:36 -0800 | [diff] [blame] | 176 | |
Daniel Thompson | 1809bfa | 2015-03-26 12:23:26 -0700 | [diff] [blame] | 177 | rd = cd.read_data[0]; |
| 178 | |
Ingo Molnar | 32fea56 | 2015-03-27 07:08:06 +0100 | [diff] [blame] | 179 | /* Update epoch for new counter and update 'epoch_ns' from old counter*/ |
Stephen Boyd | 5ae8aab | 2014-02-17 10:45:36 -0800 | [diff] [blame] | 180 | new_epoch = read(); |
Daniel Thompson | 13dbeb3 | 2015-03-26 12:23:24 -0700 | [diff] [blame] | 181 | cyc = cd.actual_read_sched_clock(); |
Ingo Molnar | 32fea56 | 2015-03-27 07:08:06 +0100 | [diff] [blame] | 182 | ns = rd.epoch_ns + cyc_to_ns((cyc - rd.epoch_cyc) & rd.sched_clock_mask, rd.mult, rd.shift); |
Daniel Thompson | 13dbeb3 | 2015-03-26 12:23:24 -0700 | [diff] [blame] | 183 | cd.actual_read_sched_clock = read; |
Stephen Boyd | 5ae8aab | 2014-02-17 10:45:36 -0800 | [diff] [blame] | 184 | |
Ingo Molnar | 32fea56 | 2015-03-27 07:08:06 +0100 | [diff] [blame] | 185 | rd.read_sched_clock = read; |
| 186 | rd.sched_clock_mask = new_mask; |
| 187 | rd.mult = new_mult; |
| 188 | rd.shift = new_shift; |
| 189 | rd.epoch_cyc = new_epoch; |
| 190 | rd.epoch_ns = ns; |
| 191 | |
Daniel Thompson | 1809bfa | 2015-03-26 12:23:26 -0700 | [diff] [blame] | 192 | update_clock_read_data(&rd); |
Russell King | 112f38a4 | 2010-12-15 19:23:07 +0000 | [diff] [blame] | 193 | |
David Engraf | 1b8955b | 2017-02-17 08:51:03 +0100 | [diff] [blame] | 194 | if (sched_clock_timer.function != NULL) { |
| 195 | /* update timeout for clock wrap */ |
Ahmed S. Darwish | 2c8bd58 | 2020-03-09 18:15:29 +0000 | [diff] [blame] | 196 | hrtimer_start(&sched_clock_timer, cd.wrap_kt, |
| 197 | HRTIMER_MODE_REL_HARD); |
David Engraf | 1b8955b | 2017-02-17 08:51:03 +0100 | [diff] [blame] | 198 | } |
| 199 | |
Russell King | 112f38a4 | 2010-12-15 19:23:07 +0000 | [diff] [blame] | 200 | r = rate; |
| 201 | if (r >= 4000000) { |
| 202 | r /= 1000000; |
| 203 | r_unit = 'M'; |
Ingo Molnar | 32fea56 | 2015-03-27 07:08:06 +0100 | [diff] [blame] | 204 | } else { |
| 205 | if (r >= 1000) { |
| 206 | r /= 1000; |
| 207 | r_unit = 'k'; |
| 208 | } else { |
| 209 | r_unit = ' '; |
| 210 | } |
| 211 | } |
Russell King | 112f38a4 | 2010-12-15 19:23:07 +0000 | [diff] [blame] | 212 | |
Ingo Molnar | 32fea56 | 2015-03-27 07:08:06 +0100 | [diff] [blame] | 213 | /* Calculate the ns resolution of this counter */ |
Stephen Boyd | 5ae8aab | 2014-02-17 10:45:36 -0800 | [diff] [blame] | 214 | res = cyc_to_ns(1ULL, new_mult, new_shift); |
| 215 | |
Stephen Boyd | a08ca5d | 2013-07-18 16:21:16 -0700 | [diff] [blame] | 216 | pr_info("sched_clock: %u bits at %lu%cHz, resolution %lluns, wraps every %lluns\n", |
| 217 | bits, r, r_unit, res, wrap); |
Russell King | 112f38a4 | 2010-12-15 19:23:07 +0000 | [diff] [blame] | 218 | |
Ingo Molnar | 32fea56 | 2015-03-27 07:08:06 +0100 | [diff] [blame] | 219 | /* Enable IRQ time accounting if we have a fast enough sched_clock() */ |
Russell King | a42c362 | 2012-09-09 18:39:28 +0100 | [diff] [blame] | 220 | if (irqtime > 0 || (irqtime == -1 && rate >= 1000000)) |
| 221 | enable_sched_clock_irqtime(); |
| 222 | |
Paul Cercueil | 2707745 | 2020-01-07 02:06:29 +0100 | [diff] [blame] | 223 | local_irq_restore(flags); |
| 224 | |
Sakari Ailus | d75f773 | 2019-03-25 21:32:28 +0200 | [diff] [blame] | 225 | pr_debug("Registered %pS as sched_clock source\n", read); |
Marc Zyngier | 2f0778af | 2011-12-15 12:19:23 +0100 | [diff] [blame] | 226 | } |
| 227 | |
Pavel Tatashin | 5d2a4e9 | 2018-07-19 16:55:41 -0400 | [diff] [blame] | 228 | void __init generic_sched_clock_init(void) |
Russell King | 211baa70 | 2011-01-11 16:23:04 +0000 | [diff] [blame] | 229 | { |
Marc Zyngier | 2f0778af | 2011-12-15 12:19:23 +0100 | [diff] [blame] | 230 | /* |
Ingo Molnar | 32fea56 | 2015-03-27 07:08:06 +0100 | [diff] [blame] | 231 | * If no sched_clock() function has been provided at that point, |
Randy Dunlap | b0294f3 | 2020-08-06 20:32:48 -0700 | [diff] [blame] | 232 | * make it the final one. |
Marc Zyngier | 2f0778af | 2011-12-15 12:19:23 +0100 | [diff] [blame] | 233 | */ |
Daniel Thompson | 13dbeb3 | 2015-03-26 12:23:24 -0700 | [diff] [blame] | 234 | if (cd.actual_read_sched_clock == jiffy_sched_clock_read) |
Stephen Boyd | e7e3ff1 | 2013-07-18 16:21:17 -0700 | [diff] [blame] | 235 | sched_clock_register(jiffy_sched_clock_read, BITS_PER_LONG, HZ); |
Marc Zyngier | 2f0778af | 2011-12-15 12:19:23 +0100 | [diff] [blame] | 236 | |
Stephen Boyd | a08ca5d | 2013-07-18 16:21:16 -0700 | [diff] [blame] | 237 | update_sched_clock(); |
| 238 | |
| 239 | /* |
| 240 | * Start the timer to keep sched_clock() properly updated and |
| 241 | * sets the initial epoch. |
| 242 | */ |
Ahmed S. Darwish | 2c8bd58 | 2020-03-09 18:15:29 +0000 | [diff] [blame] | 243 | hrtimer_init(&sched_clock_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL_HARD); |
Stephen Boyd | a08ca5d | 2013-07-18 16:21:16 -0700 | [diff] [blame] | 244 | sched_clock_timer.function = sched_clock_poll; |
Ahmed S. Darwish | 2c8bd58 | 2020-03-09 18:15:29 +0000 | [diff] [blame] | 245 | hrtimer_start(&sched_clock_timer, cd.wrap_kt, HRTIMER_MODE_REL_HARD); |
Russell King | 211baa70 | 2011-01-11 16:23:04 +0000 | [diff] [blame] | 246 | } |
Russell King | f153d01 | 2012-02-04 12:31:27 +0000 | [diff] [blame] | 247 | |
Daniel Thompson | 13dbeb3 | 2015-03-26 12:23:24 -0700 | [diff] [blame] | 248 | /* |
| 249 | * Clock read function for use when the clock is suspended. |
| 250 | * |
| 251 | * This function makes it appear to sched_clock() as if the clock |
| 252 | * stopped counting at its last update. |
Daniel Thompson | 1809bfa | 2015-03-26 12:23:26 -0700 | [diff] [blame] | 253 | * |
| 254 | * This function must only be called from the critical |
| 255 | * section in sched_clock(). It relies on the read_seqcount_retry() |
| 256 | * at the end of the critical section to be sure we observe the |
Ingo Molnar | 32fea56 | 2015-03-27 07:08:06 +0100 | [diff] [blame] | 257 | * correct copy of 'epoch_cyc'. |
Daniel Thompson | 13dbeb3 | 2015-03-26 12:23:24 -0700 | [diff] [blame] | 258 | */ |
| 259 | static u64 notrace suspended_sched_clock_read(void) |
| 260 | { |
Ahmed S. Darwish | 58faf20 | 2020-08-27 13:40:37 +0200 | [diff] [blame] | 261 | unsigned int seq = raw_read_seqcount_latch(&cd.seq); |
Daniel Thompson | 1809bfa | 2015-03-26 12:23:26 -0700 | [diff] [blame] | 262 | |
| 263 | return cd.read_data[seq & 1].epoch_cyc; |
Daniel Thompson | 13dbeb3 | 2015-03-26 12:23:24 -0700 | [diff] [blame] | 264 | } |
| 265 | |
Chang-An Chen | 3f2552f | 2019-03-29 10:59:09 +0800 | [diff] [blame] | 266 | int sched_clock_suspend(void) |
Russell King | f153d01 | 2012-02-04 12:31:27 +0000 | [diff] [blame] | 267 | { |
Daniel Thompson | 1809bfa | 2015-03-26 12:23:26 -0700 | [diff] [blame] | 268 | struct clock_read_data *rd = &cd.read_data[0]; |
Daniel Thompson | cf7c9c1 | 2015-03-26 12:23:23 -0700 | [diff] [blame] | 269 | |
Stephen Boyd | f723aa1 | 2014-07-23 21:03:50 -0700 | [diff] [blame] | 270 | update_sched_clock(); |
| 271 | hrtimer_cancel(&sched_clock_timer); |
Daniel Thompson | 13dbeb3 | 2015-03-26 12:23:24 -0700 | [diff] [blame] | 272 | rd->read_sched_clock = suspended_sched_clock_read; |
Ingo Molnar | 32fea56 | 2015-03-27 07:08:06 +0100 | [diff] [blame] | 273 | |
Russell King | f153d01 | 2012-02-04 12:31:27 +0000 | [diff] [blame] | 274 | return 0; |
| 275 | } |
| 276 | |
Chang-An Chen | 3f2552f | 2019-03-29 10:59:09 +0800 | [diff] [blame] | 277 | void sched_clock_resume(void) |
Colin Cross | 237ec6f | 2012-08-07 19:05:10 +0100 | [diff] [blame] | 278 | { |
Daniel Thompson | 1809bfa | 2015-03-26 12:23:26 -0700 | [diff] [blame] | 279 | struct clock_read_data *rd = &cd.read_data[0]; |
Daniel Thompson | cf7c9c1 | 2015-03-26 12:23:23 -0700 | [diff] [blame] | 280 | |
Daniel Thompson | 13dbeb3 | 2015-03-26 12:23:24 -0700 | [diff] [blame] | 281 | rd->epoch_cyc = cd.actual_read_sched_clock(); |
Ahmed S. Darwish | 2c8bd58 | 2020-03-09 18:15:29 +0000 | [diff] [blame] | 282 | hrtimer_start(&sched_clock_timer, cd.wrap_kt, HRTIMER_MODE_REL_HARD); |
Daniel Thompson | 13dbeb3 | 2015-03-26 12:23:24 -0700 | [diff] [blame] | 283 | rd->read_sched_clock = cd.actual_read_sched_clock; |
Colin Cross | 237ec6f | 2012-08-07 19:05:10 +0100 | [diff] [blame] | 284 | } |
| 285 | |
Russell King | f153d01 | 2012-02-04 12:31:27 +0000 | [diff] [blame] | 286 | static struct syscore_ops sched_clock_ops = { |
Ingo Molnar | 32fea56 | 2015-03-27 07:08:06 +0100 | [diff] [blame] | 287 | .suspend = sched_clock_suspend, |
| 288 | .resume = sched_clock_resume, |
Russell King | f153d01 | 2012-02-04 12:31:27 +0000 | [diff] [blame] | 289 | }; |
| 290 | |
| 291 | static int __init sched_clock_syscore_init(void) |
| 292 | { |
| 293 | register_syscore_ops(&sched_clock_ops); |
Ingo Molnar | 32fea56 | 2015-03-27 07:08:06 +0100 | [diff] [blame] | 294 | |
Russell King | f153d01 | 2012-02-04 12:31:27 +0000 | [diff] [blame] | 295 | return 0; |
| 296 | } |
| 297 | device_initcall(sched_clock_syscore_init); |