Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 1 | /* |
| 2 | * OMAP mailbox driver |
| 3 | * |
Hiroshi DOYU | f48cca8 | 2009-03-23 18:07:24 -0700 | [diff] [blame] | 4 | * Copyright (C) 2006-2009 Nokia Corporation. All rights reserved. |
Suman Anna | 4899f78a | 2016-04-06 12:37:37 -0500 | [diff] [blame] | 5 | * Copyright (C) 2013-2016 Texas Instruments Incorporated - http://www.ti.com |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 6 | * |
Hiroshi DOYU | f48cca8 | 2009-03-23 18:07:24 -0700 | [diff] [blame] | 7 | * Contact: Hiroshi DOYU <Hiroshi.DOYU@nokia.com> |
Suman Anna | 5040f53 | 2014-06-24 19:43:41 -0500 | [diff] [blame] | 8 | * Suman Anna <s-anna@ti.com> |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 9 | * |
| 10 | * This program is free software; you can redistribute it and/or |
| 11 | * modify it under the terms of the GNU General Public License |
| 12 | * version 2 as published by the Free Software Foundation. |
| 13 | * |
| 14 | * This program is distributed in the hope that it will be useful, but |
| 15 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 17 | * General Public License for more details. |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 18 | */ |
| 19 | |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 20 | #include <linux/interrupt.h> |
Felipe Contreras | b3e6914 | 2010-06-11 15:51:49 +0000 | [diff] [blame] | 21 | #include <linux/spinlock.h> |
| 22 | #include <linux/mutex.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 23 | #include <linux/slab.h> |
Ohad Ben-Cohen | b5bebe4 | 2010-05-05 15:33:09 +0000 | [diff] [blame] | 24 | #include <linux/kfifo.h> |
| 25 | #include <linux/err.h> |
Paul Gortmaker | 73017a5 | 2011-07-31 16:14:14 -0400 | [diff] [blame] | 26 | #include <linux/module.h> |
Suman Anna | 75288cc | 2014-09-10 14:20:59 -0500 | [diff] [blame] | 27 | #include <linux/of_device.h> |
Suman Anna | 5040f53 | 2014-06-24 19:43:41 -0500 | [diff] [blame] | 28 | #include <linux/platform_device.h> |
| 29 | #include <linux/pm_runtime.h> |
Suman Anna | 5040f53 | 2014-06-24 19:43:41 -0500 | [diff] [blame] | 30 | #include <linux/omap-mailbox.h> |
Suman Anna | 8841a66 | 2014-11-03 17:05:50 -0600 | [diff] [blame] | 31 | #include <linux/mailbox_controller.h> |
| 32 | #include <linux/mailbox_client.h> |
Hiroshi DOYU | 8dff0fa | 2009-03-23 18:07:32 -0700 | [diff] [blame] | 33 | |
Dave Gerlach | 8e3c595 | 2015-09-22 19:14:52 -0500 | [diff] [blame] | 34 | #include "mailbox.h" |
| 35 | |
Suman Anna | 5040f53 | 2014-06-24 19:43:41 -0500 | [diff] [blame] | 36 | #define MAILBOX_REVISION 0x000 |
| 37 | #define MAILBOX_MESSAGE(m) (0x040 + 4 * (m)) |
| 38 | #define MAILBOX_FIFOSTATUS(m) (0x080 + 4 * (m)) |
| 39 | #define MAILBOX_MSGSTATUS(m) (0x0c0 + 4 * (m)) |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 40 | |
Suman Anna | 5040f53 | 2014-06-24 19:43:41 -0500 | [diff] [blame] | 41 | #define OMAP2_MAILBOX_IRQSTATUS(u) (0x100 + 8 * (u)) |
| 42 | #define OMAP2_MAILBOX_IRQENABLE(u) (0x104 + 8 * (u)) |
| 43 | |
| 44 | #define OMAP4_MAILBOX_IRQSTATUS(u) (0x104 + 0x10 * (u)) |
| 45 | #define OMAP4_MAILBOX_IRQENABLE(u) (0x108 + 0x10 * (u)) |
| 46 | #define OMAP4_MAILBOX_IRQENABLE_CLR(u) (0x10c + 0x10 * (u)) |
| 47 | |
| 48 | #define MAILBOX_IRQSTATUS(type, u) (type ? OMAP4_MAILBOX_IRQSTATUS(u) : \ |
| 49 | OMAP2_MAILBOX_IRQSTATUS(u)) |
| 50 | #define MAILBOX_IRQENABLE(type, u) (type ? OMAP4_MAILBOX_IRQENABLE(u) : \ |
| 51 | OMAP2_MAILBOX_IRQENABLE(u)) |
| 52 | #define MAILBOX_IRQDISABLE(type, u) (type ? OMAP4_MAILBOX_IRQENABLE_CLR(u) \ |
| 53 | : OMAP2_MAILBOX_IRQENABLE(u)) |
| 54 | |
| 55 | #define MAILBOX_IRQ_NEWMSG(m) (1 << (2 * (m))) |
| 56 | #define MAILBOX_IRQ_NOTFULL(m) (1 << (2 * (m) + 1)) |
| 57 | |
| 58 | #define MBOX_REG_SIZE 0x120 |
| 59 | |
| 60 | #define OMAP4_MBOX_REG_SIZE 0x130 |
| 61 | |
| 62 | #define MBOX_NR_REGS (MBOX_REG_SIZE / sizeof(u32)) |
| 63 | #define OMAP4_MBOX_NR_REGS (OMAP4_MBOX_REG_SIZE / sizeof(u32)) |
| 64 | |
Suman Anna | 4899f78a | 2016-04-06 12:37:37 -0500 | [diff] [blame] | 65 | /* Interrupt register configuration types */ |
| 66 | #define MBOX_INTR_CFG_TYPE1 0 |
| 67 | #define MBOX_INTR_CFG_TYPE2 1 |
| 68 | |
Suman Anna | 5040f53 | 2014-06-24 19:43:41 -0500 | [diff] [blame] | 69 | struct omap_mbox_fifo { |
| 70 | unsigned long msg; |
| 71 | unsigned long fifo_stat; |
| 72 | unsigned long msg_stat; |
Suman Anna | 5040f53 | 2014-06-24 19:43:41 -0500 | [diff] [blame] | 73 | unsigned long irqenable; |
| 74 | unsigned long irqstatus; |
Suman Anna | 5040f53 | 2014-06-24 19:43:41 -0500 | [diff] [blame] | 75 | unsigned long irqdisable; |
Suman Anna | be3322e | 2014-06-24 19:43:42 -0500 | [diff] [blame] | 76 | u32 intr_bit; |
Suman Anna | 5040f53 | 2014-06-24 19:43:41 -0500 | [diff] [blame] | 77 | }; |
| 78 | |
| 79 | struct omap_mbox_queue { |
| 80 | spinlock_t lock; |
| 81 | struct kfifo fifo; |
| 82 | struct work_struct work; |
Suman Anna | 5040f53 | 2014-06-24 19:43:41 -0500 | [diff] [blame] | 83 | struct omap_mbox *mbox; |
| 84 | bool full; |
| 85 | }; |
| 86 | |
Suman Anna | 72c1c81 | 2014-06-24 19:43:43 -0500 | [diff] [blame] | 87 | struct omap_mbox_device { |
| 88 | struct device *dev; |
| 89 | struct mutex cfg_lock; |
| 90 | void __iomem *mbox_base; |
Suman Anna | af1d2f5 | 2016-04-06 18:37:18 -0500 | [diff] [blame] | 91 | u32 *irq_ctx; |
Suman Anna | 72c1c81 | 2014-06-24 19:43:43 -0500 | [diff] [blame] | 92 | u32 num_users; |
| 93 | u32 num_fifos; |
Suman Anna | 2240f8a | 2016-04-06 18:37:17 -0500 | [diff] [blame] | 94 | u32 intr_type; |
Suman Anna | 72c1c81 | 2014-06-24 19:43:43 -0500 | [diff] [blame] | 95 | struct omap_mbox **mboxes; |
Suman Anna | 8841a66 | 2014-11-03 17:05:50 -0600 | [diff] [blame] | 96 | struct mbox_controller controller; |
Suman Anna | 72c1c81 | 2014-06-24 19:43:43 -0500 | [diff] [blame] | 97 | struct list_head elem; |
| 98 | }; |
| 99 | |
Suman Anna | 75288cc | 2014-09-10 14:20:59 -0500 | [diff] [blame] | 100 | struct omap_mbox_fifo_info { |
| 101 | int tx_id; |
| 102 | int tx_usr; |
| 103 | int tx_irq; |
| 104 | |
| 105 | int rx_id; |
| 106 | int rx_usr; |
| 107 | int rx_irq; |
| 108 | |
| 109 | const char *name; |
Dave Gerlach | 8e3c595 | 2015-09-22 19:14:52 -0500 | [diff] [blame] | 110 | bool send_no_irq; |
Suman Anna | 75288cc | 2014-09-10 14:20:59 -0500 | [diff] [blame] | 111 | }; |
| 112 | |
Suman Anna | 5040f53 | 2014-06-24 19:43:41 -0500 | [diff] [blame] | 113 | struct omap_mbox { |
| 114 | const char *name; |
| 115 | int irq; |
Suman Anna | 8841a66 | 2014-11-03 17:05:50 -0600 | [diff] [blame] | 116 | struct omap_mbox_queue *rxq; |
Suman Anna | 5040f53 | 2014-06-24 19:43:41 -0500 | [diff] [blame] | 117 | struct device *dev; |
Suman Anna | 72c1c81 | 2014-06-24 19:43:43 -0500 | [diff] [blame] | 118 | struct omap_mbox_device *parent; |
Suman Anna | be3322e | 2014-06-24 19:43:42 -0500 | [diff] [blame] | 119 | struct omap_mbox_fifo tx_fifo; |
| 120 | struct omap_mbox_fifo rx_fifo; |
| 121 | u32 ctx[OMAP4_MBOX_NR_REGS]; |
| 122 | u32 intr_type; |
Suman Anna | 8841a66 | 2014-11-03 17:05:50 -0600 | [diff] [blame] | 123 | struct mbox_chan *chan; |
Dave Gerlach | 8e3c595 | 2015-09-22 19:14:52 -0500 | [diff] [blame] | 124 | bool send_no_irq; |
Suman Anna | 5040f53 | 2014-06-24 19:43:41 -0500 | [diff] [blame] | 125 | }; |
| 126 | |
Suman Anna | 72c1c81 | 2014-06-24 19:43:43 -0500 | [diff] [blame] | 127 | /* global variables for the mailbox devices */ |
| 128 | static DEFINE_MUTEX(omap_mbox_devices_lock); |
| 129 | static LIST_HEAD(omap_mbox_devices); |
C A Subramaniam | 5f00ec6 | 2009-11-22 10:11:22 -0800 | [diff] [blame] | 130 | |
Ohad Ben-Cohen | b5bebe4 | 2010-05-05 15:33:09 +0000 | [diff] [blame] | 131 | static unsigned int mbox_kfifo_size = CONFIG_OMAP_MBOX_KFIFO_SIZE; |
| 132 | module_param(mbox_kfifo_size, uint, S_IRUGO); |
| 133 | MODULE_PARM_DESC(mbox_kfifo_size, "Size of omap's mailbox kfifo (bytes)"); |
| 134 | |
Suman Anna | 8841a66 | 2014-11-03 17:05:50 -0600 | [diff] [blame] | 135 | static struct omap_mbox *mbox_chan_to_omap_mbox(struct mbox_chan *chan) |
| 136 | { |
| 137 | if (!chan || !chan->con_priv) |
| 138 | return NULL; |
| 139 | |
| 140 | return (struct omap_mbox *)chan->con_priv; |
| 141 | } |
| 142 | |
Suman Anna | 72c1c81 | 2014-06-24 19:43:43 -0500 | [diff] [blame] | 143 | static inline |
| 144 | unsigned int mbox_read_reg(struct omap_mbox_device *mdev, size_t ofs) |
Suman Anna | 5040f53 | 2014-06-24 19:43:41 -0500 | [diff] [blame] | 145 | { |
Suman Anna | 72c1c81 | 2014-06-24 19:43:43 -0500 | [diff] [blame] | 146 | return __raw_readl(mdev->mbox_base + ofs); |
Suman Anna | 5040f53 | 2014-06-24 19:43:41 -0500 | [diff] [blame] | 147 | } |
| 148 | |
Suman Anna | 72c1c81 | 2014-06-24 19:43:43 -0500 | [diff] [blame] | 149 | static inline |
| 150 | void mbox_write_reg(struct omap_mbox_device *mdev, u32 val, size_t ofs) |
Suman Anna | 5040f53 | 2014-06-24 19:43:41 -0500 | [diff] [blame] | 151 | { |
Suman Anna | 72c1c81 | 2014-06-24 19:43:43 -0500 | [diff] [blame] | 152 | __raw_writel(val, mdev->mbox_base + ofs); |
Suman Anna | 5040f53 | 2014-06-24 19:43:41 -0500 | [diff] [blame] | 153 | } |
| 154 | |
Hiroshi DOYU | 9ae0ee0 | 2009-03-23 18:07:26 -0700 | [diff] [blame] | 155 | /* Mailbox FIFO handle functions */ |
Suman Anna | 5040f53 | 2014-06-24 19:43:41 -0500 | [diff] [blame] | 156 | static mbox_msg_t mbox_fifo_read(struct omap_mbox *mbox) |
Hiroshi DOYU | 9ae0ee0 | 2009-03-23 18:07:26 -0700 | [diff] [blame] | 157 | { |
Suman Anna | be3322e | 2014-06-24 19:43:42 -0500 | [diff] [blame] | 158 | struct omap_mbox_fifo *fifo = &mbox->rx_fifo; |
Suman Anna | 2665a4c | 2016-04-06 12:37:40 -0500 | [diff] [blame] | 159 | |
| 160 | return (mbox_msg_t)mbox_read_reg(mbox->parent, fifo->msg); |
Hiroshi DOYU | 9ae0ee0 | 2009-03-23 18:07:26 -0700 | [diff] [blame] | 161 | } |
Suman Anna | 5040f53 | 2014-06-24 19:43:41 -0500 | [diff] [blame] | 162 | |
| 163 | static void mbox_fifo_write(struct omap_mbox *mbox, mbox_msg_t msg) |
Hiroshi DOYU | 9ae0ee0 | 2009-03-23 18:07:26 -0700 | [diff] [blame] | 164 | { |
Suman Anna | be3322e | 2014-06-24 19:43:42 -0500 | [diff] [blame] | 165 | struct omap_mbox_fifo *fifo = &mbox->tx_fifo; |
Suman Anna | 2665a4c | 2016-04-06 12:37:40 -0500 | [diff] [blame] | 166 | |
Suman Anna | 72c1c81 | 2014-06-24 19:43:43 -0500 | [diff] [blame] | 167 | mbox_write_reg(mbox->parent, msg, fifo->msg); |
Hiroshi DOYU | 9ae0ee0 | 2009-03-23 18:07:26 -0700 | [diff] [blame] | 168 | } |
Suman Anna | 5040f53 | 2014-06-24 19:43:41 -0500 | [diff] [blame] | 169 | |
| 170 | static int mbox_fifo_empty(struct omap_mbox *mbox) |
Hiroshi DOYU | 9ae0ee0 | 2009-03-23 18:07:26 -0700 | [diff] [blame] | 171 | { |
Suman Anna | be3322e | 2014-06-24 19:43:42 -0500 | [diff] [blame] | 172 | struct omap_mbox_fifo *fifo = &mbox->rx_fifo; |
Suman Anna | 2665a4c | 2016-04-06 12:37:40 -0500 | [diff] [blame] | 173 | |
Suman Anna | 72c1c81 | 2014-06-24 19:43:43 -0500 | [diff] [blame] | 174 | return (mbox_read_reg(mbox->parent, fifo->msg_stat) == 0); |
Hiroshi DOYU | 9ae0ee0 | 2009-03-23 18:07:26 -0700 | [diff] [blame] | 175 | } |
Suman Anna | 5040f53 | 2014-06-24 19:43:41 -0500 | [diff] [blame] | 176 | |
| 177 | static int mbox_fifo_full(struct omap_mbox *mbox) |
Hiroshi DOYU | 9ae0ee0 | 2009-03-23 18:07:26 -0700 | [diff] [blame] | 178 | { |
Suman Anna | be3322e | 2014-06-24 19:43:42 -0500 | [diff] [blame] | 179 | struct omap_mbox_fifo *fifo = &mbox->tx_fifo; |
Suman Anna | 2665a4c | 2016-04-06 12:37:40 -0500 | [diff] [blame] | 180 | |
Suman Anna | 72c1c81 | 2014-06-24 19:43:43 -0500 | [diff] [blame] | 181 | return mbox_read_reg(mbox->parent, fifo->fifo_stat); |
Hiroshi DOYU | 9ae0ee0 | 2009-03-23 18:07:26 -0700 | [diff] [blame] | 182 | } |
| 183 | |
| 184 | /* Mailbox IRQ handle functions */ |
Suman Anna | 5040f53 | 2014-06-24 19:43:41 -0500 | [diff] [blame] | 185 | static void ack_mbox_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq) |
Hiroshi DOYU | 9ae0ee0 | 2009-03-23 18:07:26 -0700 | [diff] [blame] | 186 | { |
Suman Anna | be3322e | 2014-06-24 19:43:42 -0500 | [diff] [blame] | 187 | struct omap_mbox_fifo *fifo = (irq == IRQ_TX) ? |
| 188 | &mbox->tx_fifo : &mbox->rx_fifo; |
| 189 | u32 bit = fifo->intr_bit; |
| 190 | u32 irqstatus = fifo->irqstatus; |
Suman Anna | 5040f53 | 2014-06-24 19:43:41 -0500 | [diff] [blame] | 191 | |
Suman Anna | 72c1c81 | 2014-06-24 19:43:43 -0500 | [diff] [blame] | 192 | mbox_write_reg(mbox->parent, bit, irqstatus); |
Suman Anna | 5040f53 | 2014-06-24 19:43:41 -0500 | [diff] [blame] | 193 | |
| 194 | /* Flush posted write for irq status to avoid spurious interrupts */ |
Suman Anna | 72c1c81 | 2014-06-24 19:43:43 -0500 | [diff] [blame] | 195 | mbox_read_reg(mbox->parent, irqstatus); |
Hiroshi DOYU | 9ae0ee0 | 2009-03-23 18:07:26 -0700 | [diff] [blame] | 196 | } |
Suman Anna | 5040f53 | 2014-06-24 19:43:41 -0500 | [diff] [blame] | 197 | |
| 198 | static int is_mbox_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq) |
Hiroshi DOYU | 9ae0ee0 | 2009-03-23 18:07:26 -0700 | [diff] [blame] | 199 | { |
Suman Anna | be3322e | 2014-06-24 19:43:42 -0500 | [diff] [blame] | 200 | struct omap_mbox_fifo *fifo = (irq == IRQ_TX) ? |
| 201 | &mbox->tx_fifo : &mbox->rx_fifo; |
| 202 | u32 bit = fifo->intr_bit; |
| 203 | u32 irqenable = fifo->irqenable; |
| 204 | u32 irqstatus = fifo->irqstatus; |
| 205 | |
Suman Anna | 72c1c81 | 2014-06-24 19:43:43 -0500 | [diff] [blame] | 206 | u32 enable = mbox_read_reg(mbox->parent, irqenable); |
| 207 | u32 status = mbox_read_reg(mbox->parent, irqstatus); |
Suman Anna | 5040f53 | 2014-06-24 19:43:41 -0500 | [diff] [blame] | 208 | |
| 209 | return (int)(enable & status & bit); |
Hiroshi DOYU | 9ae0ee0 | 2009-03-23 18:07:26 -0700 | [diff] [blame] | 210 | } |
| 211 | |
Suman Anna | 8841a66 | 2014-11-03 17:05:50 -0600 | [diff] [blame] | 212 | void omap_mbox_save_ctx(struct mbox_chan *chan) |
Suman Anna | c869c75 | 2013-03-12 17:55:29 -0500 | [diff] [blame] | 213 | { |
Suman Anna | 5040f53 | 2014-06-24 19:43:41 -0500 | [diff] [blame] | 214 | int i; |
Suman Anna | 5040f53 | 2014-06-24 19:43:41 -0500 | [diff] [blame] | 215 | int nr_regs; |
Suman Anna | 8841a66 | 2014-11-03 17:05:50 -0600 | [diff] [blame] | 216 | struct omap_mbox *mbox = mbox_chan_to_omap_mbox(chan); |
| 217 | |
| 218 | if (WARN_ON(!mbox)) |
| 219 | return; |
Suman Anna | c869c75 | 2013-03-12 17:55:29 -0500 | [diff] [blame] | 220 | |
Suman Anna | be3322e | 2014-06-24 19:43:42 -0500 | [diff] [blame] | 221 | if (mbox->intr_type) |
Suman Anna | 5040f53 | 2014-06-24 19:43:41 -0500 | [diff] [blame] | 222 | nr_regs = OMAP4_MBOX_NR_REGS; |
| 223 | else |
| 224 | nr_regs = MBOX_NR_REGS; |
| 225 | for (i = 0; i < nr_regs; i++) { |
Suman Anna | 72c1c81 | 2014-06-24 19:43:43 -0500 | [diff] [blame] | 226 | mbox->ctx[i] = mbox_read_reg(mbox->parent, i * sizeof(u32)); |
Suman Anna | 5040f53 | 2014-06-24 19:43:41 -0500 | [diff] [blame] | 227 | |
| 228 | dev_dbg(mbox->dev, "%s: [%02x] %08x\n", __func__, |
Suman Anna | be3322e | 2014-06-24 19:43:42 -0500 | [diff] [blame] | 229 | i, mbox->ctx[i]); |
Suman Anna | 5040f53 | 2014-06-24 19:43:41 -0500 | [diff] [blame] | 230 | } |
Suman Anna | c869c75 | 2013-03-12 17:55:29 -0500 | [diff] [blame] | 231 | } |
| 232 | EXPORT_SYMBOL(omap_mbox_save_ctx); |
| 233 | |
Suman Anna | 8841a66 | 2014-11-03 17:05:50 -0600 | [diff] [blame] | 234 | void omap_mbox_restore_ctx(struct mbox_chan *chan) |
Suman Anna | c869c75 | 2013-03-12 17:55:29 -0500 | [diff] [blame] | 235 | { |
Suman Anna | 5040f53 | 2014-06-24 19:43:41 -0500 | [diff] [blame] | 236 | int i; |
Suman Anna | 5040f53 | 2014-06-24 19:43:41 -0500 | [diff] [blame] | 237 | int nr_regs; |
Suman Anna | 8841a66 | 2014-11-03 17:05:50 -0600 | [diff] [blame] | 238 | struct omap_mbox *mbox = mbox_chan_to_omap_mbox(chan); |
| 239 | |
| 240 | if (WARN_ON(!mbox)) |
| 241 | return; |
Suman Anna | c869c75 | 2013-03-12 17:55:29 -0500 | [diff] [blame] | 242 | |
Suman Anna | be3322e | 2014-06-24 19:43:42 -0500 | [diff] [blame] | 243 | if (mbox->intr_type) |
Suman Anna | 5040f53 | 2014-06-24 19:43:41 -0500 | [diff] [blame] | 244 | nr_regs = OMAP4_MBOX_NR_REGS; |
| 245 | else |
| 246 | nr_regs = MBOX_NR_REGS; |
| 247 | for (i = 0; i < nr_regs; i++) { |
Suman Anna | 72c1c81 | 2014-06-24 19:43:43 -0500 | [diff] [blame] | 248 | mbox_write_reg(mbox->parent, mbox->ctx[i], i * sizeof(u32)); |
Suman Anna | 5040f53 | 2014-06-24 19:43:41 -0500 | [diff] [blame] | 249 | dev_dbg(mbox->dev, "%s: [%02x] %08x\n", __func__, |
Suman Anna | be3322e | 2014-06-24 19:43:42 -0500 | [diff] [blame] | 250 | i, mbox->ctx[i]); |
Suman Anna | 5040f53 | 2014-06-24 19:43:41 -0500 | [diff] [blame] | 251 | } |
Suman Anna | c869c75 | 2013-03-12 17:55:29 -0500 | [diff] [blame] | 252 | } |
| 253 | EXPORT_SYMBOL(omap_mbox_restore_ctx); |
| 254 | |
Suman Anna | 8841a66 | 2014-11-03 17:05:50 -0600 | [diff] [blame] | 255 | static void _omap_mbox_enable_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq) |
Suman Anna | c869c75 | 2013-03-12 17:55:29 -0500 | [diff] [blame] | 256 | { |
Suman Anna | be3322e | 2014-06-24 19:43:42 -0500 | [diff] [blame] | 257 | u32 l; |
| 258 | struct omap_mbox_fifo *fifo = (irq == IRQ_TX) ? |
| 259 | &mbox->tx_fifo : &mbox->rx_fifo; |
| 260 | u32 bit = fifo->intr_bit; |
| 261 | u32 irqenable = fifo->irqenable; |
Suman Anna | 5040f53 | 2014-06-24 19:43:41 -0500 | [diff] [blame] | 262 | |
Suman Anna | 72c1c81 | 2014-06-24 19:43:43 -0500 | [diff] [blame] | 263 | l = mbox_read_reg(mbox->parent, irqenable); |
Suman Anna | 5040f53 | 2014-06-24 19:43:41 -0500 | [diff] [blame] | 264 | l |= bit; |
Suman Anna | 72c1c81 | 2014-06-24 19:43:43 -0500 | [diff] [blame] | 265 | mbox_write_reg(mbox->parent, l, irqenable); |
Suman Anna | c869c75 | 2013-03-12 17:55:29 -0500 | [diff] [blame] | 266 | } |
Suman Anna | c869c75 | 2013-03-12 17:55:29 -0500 | [diff] [blame] | 267 | |
Suman Anna | 8841a66 | 2014-11-03 17:05:50 -0600 | [diff] [blame] | 268 | static void _omap_mbox_disable_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq) |
Suman Anna | c869c75 | 2013-03-12 17:55:29 -0500 | [diff] [blame] | 269 | { |
Suman Anna | be3322e | 2014-06-24 19:43:42 -0500 | [diff] [blame] | 270 | struct omap_mbox_fifo *fifo = (irq == IRQ_TX) ? |
| 271 | &mbox->tx_fifo : &mbox->rx_fifo; |
| 272 | u32 bit = fifo->intr_bit; |
| 273 | u32 irqdisable = fifo->irqdisable; |
Suman Anna | 5040f53 | 2014-06-24 19:43:41 -0500 | [diff] [blame] | 274 | |
| 275 | /* |
| 276 | * Read and update the interrupt configuration register for pre-OMAP4. |
| 277 | * OMAP4 and later SoCs have a dedicated interrupt disabling register. |
| 278 | */ |
Suman Anna | be3322e | 2014-06-24 19:43:42 -0500 | [diff] [blame] | 279 | if (!mbox->intr_type) |
Suman Anna | 72c1c81 | 2014-06-24 19:43:43 -0500 | [diff] [blame] | 280 | bit = mbox_read_reg(mbox->parent, irqdisable) & ~bit; |
Suman Anna | 5040f53 | 2014-06-24 19:43:41 -0500 | [diff] [blame] | 281 | |
Suman Anna | 72c1c81 | 2014-06-24 19:43:43 -0500 | [diff] [blame] | 282 | mbox_write_reg(mbox->parent, bit, irqdisable); |
Suman Anna | c869c75 | 2013-03-12 17:55:29 -0500 | [diff] [blame] | 283 | } |
Suman Anna | c869c75 | 2013-03-12 17:55:29 -0500 | [diff] [blame] | 284 | |
Suman Anna | 8841a66 | 2014-11-03 17:05:50 -0600 | [diff] [blame] | 285 | void omap_mbox_enable_irq(struct mbox_chan *chan, omap_mbox_irq_t irq) |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 286 | { |
Suman Anna | 8841a66 | 2014-11-03 17:05:50 -0600 | [diff] [blame] | 287 | struct omap_mbox *mbox = mbox_chan_to_omap_mbox(chan); |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 288 | |
Suman Anna | 8841a66 | 2014-11-03 17:05:50 -0600 | [diff] [blame] | 289 | if (WARN_ON(!mbox)) |
| 290 | return; |
Ohad Ben-Cohen | b5bebe4 | 2010-05-05 15:33:09 +0000 | [diff] [blame] | 291 | |
Suman Anna | 8841a66 | 2014-11-03 17:05:50 -0600 | [diff] [blame] | 292 | _omap_mbox_enable_irq(mbox, irq); |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 293 | } |
Suman Anna | 8841a66 | 2014-11-03 17:05:50 -0600 | [diff] [blame] | 294 | EXPORT_SYMBOL(omap_mbox_enable_irq); |
| 295 | |
| 296 | void omap_mbox_disable_irq(struct mbox_chan *chan, omap_mbox_irq_t irq) |
| 297 | { |
| 298 | struct omap_mbox *mbox = mbox_chan_to_omap_mbox(chan); |
| 299 | |
| 300 | if (WARN_ON(!mbox)) |
| 301 | return; |
| 302 | |
| 303 | _omap_mbox_disable_irq(mbox, irq); |
| 304 | } |
| 305 | EXPORT_SYMBOL(omap_mbox_disable_irq); |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 306 | |
| 307 | /* |
| 308 | * Message receiver(workqueue) |
| 309 | */ |
| 310 | static void mbox_rx_work(struct work_struct *work) |
| 311 | { |
| 312 | struct omap_mbox_queue *mq = |
| 313 | container_of(work, struct omap_mbox_queue, work); |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 314 | mbox_msg_t msg; |
Ohad Ben-Cohen | b5bebe4 | 2010-05-05 15:33:09 +0000 | [diff] [blame] | 315 | int len; |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 316 | |
Ohad Ben-Cohen | b5bebe4 | 2010-05-05 15:33:09 +0000 | [diff] [blame] | 317 | while (kfifo_len(&mq->fifo) >= sizeof(msg)) { |
| 318 | len = kfifo_out(&mq->fifo, (unsigned char *)&msg, sizeof(msg)); |
| 319 | WARN_ON(len != sizeof(msg)); |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 320 | |
Suman Anna | 8841a66 | 2014-11-03 17:05:50 -0600 | [diff] [blame] | 321 | mbox_chan_received_data(mq->mbox->chan, (void *)msg); |
Fernando Guzman Lugo | d229504 | 2010-11-29 20:24:11 +0000 | [diff] [blame] | 322 | spin_lock_irq(&mq->lock); |
| 323 | if (mq->full) { |
| 324 | mq->full = false; |
Suman Anna | 8841a66 | 2014-11-03 17:05:50 -0600 | [diff] [blame] | 325 | _omap_mbox_enable_irq(mq->mbox, IRQ_RX); |
Fernando Guzman Lugo | d229504 | 2010-11-29 20:24:11 +0000 | [diff] [blame] | 326 | } |
| 327 | spin_unlock_irq(&mq->lock); |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 328 | } |
| 329 | } |
| 330 | |
| 331 | /* |
| 332 | * Mailbox interrupt handler |
| 333 | */ |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 334 | static void __mbox_tx_interrupt(struct omap_mbox *mbox) |
| 335 | { |
Suman Anna | 8841a66 | 2014-11-03 17:05:50 -0600 | [diff] [blame] | 336 | _omap_mbox_disable_irq(mbox, IRQ_TX); |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 337 | ack_mbox_irq(mbox, IRQ_TX); |
Suman Anna | 8841a66 | 2014-11-03 17:05:50 -0600 | [diff] [blame] | 338 | mbox_chan_txdone(mbox->chan, 0); |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 339 | } |
| 340 | |
| 341 | static void __mbox_rx_interrupt(struct omap_mbox *mbox) |
| 342 | { |
Ohad Ben-Cohen | b5bebe4 | 2010-05-05 15:33:09 +0000 | [diff] [blame] | 343 | struct omap_mbox_queue *mq = mbox->rxq; |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 344 | mbox_msg_t msg; |
Ohad Ben-Cohen | b5bebe4 | 2010-05-05 15:33:09 +0000 | [diff] [blame] | 345 | int len; |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 346 | |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 347 | while (!mbox_fifo_empty(mbox)) { |
Ohad Ben-Cohen | b5bebe4 | 2010-05-05 15:33:09 +0000 | [diff] [blame] | 348 | if (unlikely(kfifo_avail(&mq->fifo) < sizeof(msg))) { |
Suman Anna | 8841a66 | 2014-11-03 17:05:50 -0600 | [diff] [blame] | 349 | _omap_mbox_disable_irq(mbox, IRQ_RX); |
Fernando Guzman Lugo | d229504 | 2010-11-29 20:24:11 +0000 | [diff] [blame] | 350 | mq->full = true; |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 351 | goto nomem; |
Fernando Guzman Lugo | 1ea5d6d | 2010-02-08 13:35:40 -0600 | [diff] [blame] | 352 | } |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 353 | |
| 354 | msg = mbox_fifo_read(mbox); |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 355 | |
Ohad Ben-Cohen | b5bebe4 | 2010-05-05 15:33:09 +0000 | [diff] [blame] | 356 | len = kfifo_in(&mq->fifo, (unsigned char *)&msg, sizeof(msg)); |
| 357 | WARN_ON(len != sizeof(msg)); |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 358 | } |
| 359 | |
| 360 | /* no more messages in the fifo. clear IRQ source. */ |
| 361 | ack_mbox_irq(mbox, IRQ_RX); |
Hiroshi DOYU | f48cca8 | 2009-03-23 18:07:24 -0700 | [diff] [blame] | 362 | nomem: |
Tejun Heo | c487300 | 2011-01-26 12:12:50 +0100 | [diff] [blame] | 363 | schedule_work(&mbox->rxq->work); |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 364 | } |
| 365 | |
| 366 | static irqreturn_t mbox_interrupt(int irq, void *p) |
| 367 | { |
Jeff Garzik | 2a7057e | 2007-10-26 05:40:22 -0400 | [diff] [blame] | 368 | struct omap_mbox *mbox = p; |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 369 | |
| 370 | if (is_mbox_irq(mbox, IRQ_TX)) |
| 371 | __mbox_tx_interrupt(mbox); |
| 372 | |
| 373 | if (is_mbox_irq(mbox, IRQ_RX)) |
| 374 | __mbox_rx_interrupt(mbox); |
| 375 | |
| 376 | return IRQ_HANDLED; |
| 377 | } |
| 378 | |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 379 | static struct omap_mbox_queue *mbox_queue_alloc(struct omap_mbox *mbox, |
Suman Anna | 8841a66 | 2014-11-03 17:05:50 -0600 | [diff] [blame] | 380 | void (*work)(struct work_struct *)) |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 381 | { |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 382 | struct omap_mbox_queue *mq; |
| 383 | |
Suman Anna | 8841a66 | 2014-11-03 17:05:50 -0600 | [diff] [blame] | 384 | if (!work) |
| 385 | return NULL; |
| 386 | |
Suman Anna | 86f6f5e | 2016-04-06 12:37:38 -0500 | [diff] [blame] | 387 | mq = kzalloc(sizeof(*mq), GFP_KERNEL); |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 388 | if (!mq) |
| 389 | return NULL; |
| 390 | |
| 391 | spin_lock_init(&mq->lock); |
| 392 | |
Ohad Ben-Cohen | b5bebe4 | 2010-05-05 15:33:09 +0000 | [diff] [blame] | 393 | if (kfifo_alloc(&mq->fifo, mbox_kfifo_size, GFP_KERNEL)) |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 394 | goto error; |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 395 | |
Suman Anna | 8841a66 | 2014-11-03 17:05:50 -0600 | [diff] [blame] | 396 | INIT_WORK(&mq->work, work); |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 397 | return mq; |
Suman Anna | 8841a66 | 2014-11-03 17:05:50 -0600 | [diff] [blame] | 398 | |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 399 | error: |
| 400 | kfree(mq); |
| 401 | return NULL; |
| 402 | } |
| 403 | |
| 404 | static void mbox_queue_free(struct omap_mbox_queue *q) |
| 405 | { |
Ohad Ben-Cohen | b5bebe4 | 2010-05-05 15:33:09 +0000 | [diff] [blame] | 406 | kfifo_free(&q->fifo); |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 407 | kfree(q); |
| 408 | } |
| 409 | |
Hiroshi DOYU | c7c158e | 2009-11-22 10:11:19 -0800 | [diff] [blame] | 410 | static int omap_mbox_startup(struct omap_mbox *mbox) |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 411 | { |
C A Subramaniam | 5f00ec6 | 2009-11-22 10:11:22 -0800 | [diff] [blame] | 412 | int ret = 0; |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 413 | struct omap_mbox_queue *mq; |
| 414 | |
Suman Anna | 8841a66 | 2014-11-03 17:05:50 -0600 | [diff] [blame] | 415 | mq = mbox_queue_alloc(mbox, mbox_rx_work); |
| 416 | if (!mq) |
| 417 | return -ENOMEM; |
| 418 | mbox->rxq = mq; |
| 419 | mq->mbox = mbox; |
C A Subramaniam | 5f00ec6 | 2009-11-22 10:11:22 -0800 | [diff] [blame] | 420 | |
Suman Anna | 8841a66 | 2014-11-03 17:05:50 -0600 | [diff] [blame] | 421 | ret = request_irq(mbox->irq, mbox_interrupt, IRQF_SHARED, |
| 422 | mbox->name, mbox); |
| 423 | if (unlikely(ret)) { |
| 424 | pr_err("failed to register mailbox interrupt:%d\n", ret); |
| 425 | goto fail_request_irq; |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 426 | } |
Suman Anna | 8841a66 | 2014-11-03 17:05:50 -0600 | [diff] [blame] | 427 | |
Dave Gerlach | 8e3c595 | 2015-09-22 19:14:52 -0500 | [diff] [blame] | 428 | if (mbox->send_no_irq) |
| 429 | mbox->chan->txdone_method = TXDONE_BY_ACK; |
| 430 | |
Suman Anna | 8841a66 | 2014-11-03 17:05:50 -0600 | [diff] [blame] | 431 | _omap_mbox_enable_irq(mbox, IRQ_RX); |
| 432 | |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 433 | return 0; |
| 434 | |
Suman Anna | ecf305c | 2013-02-01 20:37:06 -0600 | [diff] [blame] | 435 | fail_request_irq: |
| 436 | mbox_queue_free(mbox->rxq); |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 437 | return ret; |
| 438 | } |
| 439 | |
| 440 | static void omap_mbox_fini(struct omap_mbox *mbox) |
| 441 | { |
Suman Anna | 8841a66 | 2014-11-03 17:05:50 -0600 | [diff] [blame] | 442 | _omap_mbox_disable_irq(mbox, IRQ_RX); |
| 443 | free_irq(mbox->irq, mbox); |
| 444 | flush_work(&mbox->rxq->work); |
| 445 | mbox_queue_free(mbox->rxq); |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 446 | } |
| 447 | |
Suman Anna | 72c1c81 | 2014-06-24 19:43:43 -0500 | [diff] [blame] | 448 | static struct omap_mbox *omap_mbox_device_find(struct omap_mbox_device *mdev, |
| 449 | const char *mbox_name) |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 450 | { |
Kevin Hilman | c037732 | 2011-02-11 19:56:43 +0000 | [diff] [blame] | 451 | struct omap_mbox *_mbox, *mbox = NULL; |
Suman Anna | 72c1c81 | 2014-06-24 19:43:43 -0500 | [diff] [blame] | 452 | struct omap_mbox **mboxes = mdev->mboxes; |
| 453 | int i; |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 454 | |
Felipe Contreras | 9c80c8c | 2010-06-11 15:51:46 +0000 | [diff] [blame] | 455 | if (!mboxes) |
Suman Anna | 72c1c81 | 2014-06-24 19:43:43 -0500 | [diff] [blame] | 456 | return NULL; |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 457 | |
Kevin Hilman | c037732 | 2011-02-11 19:56:43 +0000 | [diff] [blame] | 458 | for (i = 0; (_mbox = mboxes[i]); i++) { |
Suman Anna | 72c1c81 | 2014-06-24 19:43:43 -0500 | [diff] [blame] | 459 | if (!strcmp(_mbox->name, mbox_name)) { |
Kevin Hilman | c037732 | 2011-02-11 19:56:43 +0000 | [diff] [blame] | 460 | mbox = _mbox; |
Felipe Contreras | 9c80c8c | 2010-06-11 15:51:46 +0000 | [diff] [blame] | 461 | break; |
Kevin Hilman | c037732 | 2011-02-11 19:56:43 +0000 | [diff] [blame] | 462 | } |
| 463 | } |
Suman Anna | 72c1c81 | 2014-06-24 19:43:43 -0500 | [diff] [blame] | 464 | return mbox; |
| 465 | } |
| 466 | |
Suman Anna | 8841a66 | 2014-11-03 17:05:50 -0600 | [diff] [blame] | 467 | struct mbox_chan *omap_mbox_request_channel(struct mbox_client *cl, |
| 468 | const char *chan_name) |
Suman Anna | 72c1c81 | 2014-06-24 19:43:43 -0500 | [diff] [blame] | 469 | { |
Suman Anna | 8841a66 | 2014-11-03 17:05:50 -0600 | [diff] [blame] | 470 | struct device *dev = cl->dev; |
Suman Anna | 72c1c81 | 2014-06-24 19:43:43 -0500 | [diff] [blame] | 471 | struct omap_mbox *mbox = NULL; |
| 472 | struct omap_mbox_device *mdev; |
Suman Anna | 8841a66 | 2014-11-03 17:05:50 -0600 | [diff] [blame] | 473 | struct mbox_chan *chan; |
| 474 | unsigned long flags; |
Suman Anna | 72c1c81 | 2014-06-24 19:43:43 -0500 | [diff] [blame] | 475 | int ret; |
| 476 | |
Suman Anna | 8841a66 | 2014-11-03 17:05:50 -0600 | [diff] [blame] | 477 | if (!dev) |
| 478 | return ERR_PTR(-ENODEV); |
| 479 | |
| 480 | if (dev->of_node) { |
| 481 | pr_err("%s: please use mbox_request_channel(), this API is supported only for OMAP non-DT usage\n", |
| 482 | __func__); |
| 483 | return ERR_PTR(-ENODEV); |
| 484 | } |
| 485 | |
Suman Anna | 72c1c81 | 2014-06-24 19:43:43 -0500 | [diff] [blame] | 486 | mutex_lock(&omap_mbox_devices_lock); |
| 487 | list_for_each_entry(mdev, &omap_mbox_devices, elem) { |
Suman Anna | 8841a66 | 2014-11-03 17:05:50 -0600 | [diff] [blame] | 488 | mbox = omap_mbox_device_find(mdev, chan_name); |
Suman Anna | 72c1c81 | 2014-06-24 19:43:43 -0500 | [diff] [blame] | 489 | if (mbox) |
| 490 | break; |
| 491 | } |
| 492 | mutex_unlock(&omap_mbox_devices_lock); |
Felipe Contreras | 9c80c8c | 2010-06-11 15:51:46 +0000 | [diff] [blame] | 493 | |
Suman Anna | 8841a66 | 2014-11-03 17:05:50 -0600 | [diff] [blame] | 494 | if (!mbox || !mbox->chan) |
Felipe Contreras | 9c80c8c | 2010-06-11 15:51:46 +0000 | [diff] [blame] | 495 | return ERR_PTR(-ENOENT); |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 496 | |
Suman Anna | 8841a66 | 2014-11-03 17:05:50 -0600 | [diff] [blame] | 497 | chan = mbox->chan; |
| 498 | spin_lock_irqsave(&chan->lock, flags); |
| 499 | chan->msg_free = 0; |
| 500 | chan->msg_count = 0; |
| 501 | chan->active_req = NULL; |
| 502 | chan->cl = cl; |
| 503 | init_completion(&chan->tx_complete); |
| 504 | spin_unlock_irqrestore(&chan->lock, flags); |
Kanigeri, Hari | 5825630 | 2010-11-29 20:24:14 +0000 | [diff] [blame] | 505 | |
Suman Anna | 8841a66 | 2014-11-03 17:05:50 -0600 | [diff] [blame] | 506 | ret = chan->mbox->ops->startup(chan); |
Juan Gutierrez | 1d8a0e9 | 2012-05-13 15:33:04 +0300 | [diff] [blame] | 507 | if (ret) { |
Suman Anna | 8841a66 | 2014-11-03 17:05:50 -0600 | [diff] [blame] | 508 | pr_err("Unable to startup the chan (%d)\n", ret); |
| 509 | mbox_free_channel(chan); |
| 510 | chan = ERR_PTR(ret); |
Juan Gutierrez | 1d8a0e9 | 2012-05-13 15:33:04 +0300 | [diff] [blame] | 511 | } |
| 512 | |
Suman Anna | 8841a66 | 2014-11-03 17:05:50 -0600 | [diff] [blame] | 513 | return chan; |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 514 | } |
Suman Anna | 8841a66 | 2014-11-03 17:05:50 -0600 | [diff] [blame] | 515 | EXPORT_SYMBOL(omap_mbox_request_channel); |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 516 | |
Hiroshi DOYU | 6b23398 | 2010-05-18 16:15:32 +0300 | [diff] [blame] | 517 | static struct class omap_mbox_class = { .name = "mbox", }; |
| 518 | |
Suman Anna | 72c1c81 | 2014-06-24 19:43:43 -0500 | [diff] [blame] | 519 | static int omap_mbox_register(struct omap_mbox_device *mdev) |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 520 | { |
Felipe Contreras | 9c80c8c | 2010-06-11 15:51:46 +0000 | [diff] [blame] | 521 | int ret; |
| 522 | int i; |
Suman Anna | 72c1c81 | 2014-06-24 19:43:43 -0500 | [diff] [blame] | 523 | struct omap_mbox **mboxes; |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 524 | |
Suman Anna | 72c1c81 | 2014-06-24 19:43:43 -0500 | [diff] [blame] | 525 | if (!mdev || !mdev->mboxes) |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 526 | return -EINVAL; |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 527 | |
Suman Anna | 72c1c81 | 2014-06-24 19:43:43 -0500 | [diff] [blame] | 528 | mboxes = mdev->mboxes; |
Felipe Contreras | 9c80c8c | 2010-06-11 15:51:46 +0000 | [diff] [blame] | 529 | for (i = 0; mboxes[i]; i++) { |
| 530 | struct omap_mbox *mbox = mboxes[i]; |
Suman Anna | 2665a4c | 2016-04-06 12:37:40 -0500 | [diff] [blame] | 531 | |
Suman Anna | 8841a66 | 2014-11-03 17:05:50 -0600 | [diff] [blame] | 532 | mbox->dev = device_create(&omap_mbox_class, mdev->dev, |
| 533 | 0, mbox, "%s", mbox->name); |
Felipe Contreras | 9c80c8c | 2010-06-11 15:51:46 +0000 | [diff] [blame] | 534 | if (IS_ERR(mbox->dev)) { |
| 535 | ret = PTR_ERR(mbox->dev); |
| 536 | goto err_out; |
| 537 | } |
Hiroshi DOYU | f48cca8 | 2009-03-23 18:07:24 -0700 | [diff] [blame] | 538 | } |
Suman Anna | 72c1c81 | 2014-06-24 19:43:43 -0500 | [diff] [blame] | 539 | |
| 540 | mutex_lock(&omap_mbox_devices_lock); |
| 541 | list_add(&mdev->elem, &omap_mbox_devices); |
| 542 | mutex_unlock(&omap_mbox_devices_lock); |
| 543 | |
Suman Anna | 8841a66 | 2014-11-03 17:05:50 -0600 | [diff] [blame] | 544 | ret = mbox_controller_register(&mdev->controller); |
Hiroshi DOYU | f48cca8 | 2009-03-23 18:07:24 -0700 | [diff] [blame] | 545 | |
Felipe Contreras | 9c80c8c | 2010-06-11 15:51:46 +0000 | [diff] [blame] | 546 | err_out: |
Suman Anna | 8841a66 | 2014-11-03 17:05:50 -0600 | [diff] [blame] | 547 | if (ret) { |
| 548 | while (i--) |
| 549 | device_unregister(mboxes[i]->dev); |
| 550 | } |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 551 | return ret; |
| 552 | } |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 553 | |
Suman Anna | 72c1c81 | 2014-06-24 19:43:43 -0500 | [diff] [blame] | 554 | static int omap_mbox_unregister(struct omap_mbox_device *mdev) |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 555 | { |
Felipe Contreras | 9c80c8c | 2010-06-11 15:51:46 +0000 | [diff] [blame] | 556 | int i; |
Suman Anna | 72c1c81 | 2014-06-24 19:43:43 -0500 | [diff] [blame] | 557 | struct omap_mbox **mboxes; |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 558 | |
Suman Anna | 72c1c81 | 2014-06-24 19:43:43 -0500 | [diff] [blame] | 559 | if (!mdev || !mdev->mboxes) |
Felipe Contreras | 9c80c8c | 2010-06-11 15:51:46 +0000 | [diff] [blame] | 560 | return -EINVAL; |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 561 | |
Suman Anna | 72c1c81 | 2014-06-24 19:43:43 -0500 | [diff] [blame] | 562 | mutex_lock(&omap_mbox_devices_lock); |
| 563 | list_del(&mdev->elem); |
| 564 | mutex_unlock(&omap_mbox_devices_lock); |
| 565 | |
Suman Anna | 8841a66 | 2014-11-03 17:05:50 -0600 | [diff] [blame] | 566 | mbox_controller_unregister(&mdev->controller); |
| 567 | |
Suman Anna | 72c1c81 | 2014-06-24 19:43:43 -0500 | [diff] [blame] | 568 | mboxes = mdev->mboxes; |
Felipe Contreras | 9c80c8c | 2010-06-11 15:51:46 +0000 | [diff] [blame] | 569 | for (i = 0; mboxes[i]; i++) |
| 570 | device_unregister(mboxes[i]->dev); |
Felipe Contreras | 9c80c8c | 2010-06-11 15:51:46 +0000 | [diff] [blame] | 571 | return 0; |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 572 | } |
Suman Anna | 5040f53 | 2014-06-24 19:43:41 -0500 | [diff] [blame] | 573 | |
Suman Anna | 8841a66 | 2014-11-03 17:05:50 -0600 | [diff] [blame] | 574 | static int omap_mbox_chan_startup(struct mbox_chan *chan) |
| 575 | { |
| 576 | struct omap_mbox *mbox = mbox_chan_to_omap_mbox(chan); |
| 577 | struct omap_mbox_device *mdev = mbox->parent; |
| 578 | int ret = 0; |
| 579 | |
| 580 | mutex_lock(&mdev->cfg_lock); |
| 581 | pm_runtime_get_sync(mdev->dev); |
| 582 | ret = omap_mbox_startup(mbox); |
| 583 | if (ret) |
| 584 | pm_runtime_put_sync(mdev->dev); |
| 585 | mutex_unlock(&mdev->cfg_lock); |
| 586 | return ret; |
| 587 | } |
| 588 | |
| 589 | static void omap_mbox_chan_shutdown(struct mbox_chan *chan) |
| 590 | { |
| 591 | struct omap_mbox *mbox = mbox_chan_to_omap_mbox(chan); |
| 592 | struct omap_mbox_device *mdev = mbox->parent; |
| 593 | |
| 594 | mutex_lock(&mdev->cfg_lock); |
| 595 | omap_mbox_fini(mbox); |
| 596 | pm_runtime_put_sync(mdev->dev); |
| 597 | mutex_unlock(&mdev->cfg_lock); |
| 598 | } |
| 599 | |
Dave Gerlach | 8e3c595 | 2015-09-22 19:14:52 -0500 | [diff] [blame] | 600 | static int omap_mbox_chan_send_noirq(struct omap_mbox *mbox, void *data) |
Suman Anna | 8841a66 | 2014-11-03 17:05:50 -0600 | [diff] [blame] | 601 | { |
Suman Anna | 8841a66 | 2014-11-03 17:05:50 -0600 | [diff] [blame] | 602 | int ret = -EBUSY; |
| 603 | |
Dave Gerlach | 8e3c595 | 2015-09-22 19:14:52 -0500 | [diff] [blame] | 604 | if (!mbox_fifo_full(mbox)) { |
| 605 | _omap_mbox_enable_irq(mbox, IRQ_RX); |
| 606 | mbox_fifo_write(mbox, (mbox_msg_t)data); |
| 607 | ret = 0; |
| 608 | _omap_mbox_disable_irq(mbox, IRQ_RX); |
| 609 | |
| 610 | /* we must read and ack the interrupt directly from here */ |
| 611 | mbox_fifo_read(mbox); |
| 612 | ack_mbox_irq(mbox, IRQ_RX); |
| 613 | } |
| 614 | |
| 615 | return ret; |
| 616 | } |
| 617 | |
| 618 | static int omap_mbox_chan_send(struct omap_mbox *mbox, void *data) |
| 619 | { |
| 620 | int ret = -EBUSY; |
Suman Anna | 8841a66 | 2014-11-03 17:05:50 -0600 | [diff] [blame] | 621 | |
| 622 | if (!mbox_fifo_full(mbox)) { |
| 623 | mbox_fifo_write(mbox, (mbox_msg_t)data); |
| 624 | ret = 0; |
| 625 | } |
| 626 | |
| 627 | /* always enable the interrupt */ |
| 628 | _omap_mbox_enable_irq(mbox, IRQ_TX); |
| 629 | return ret; |
| 630 | } |
| 631 | |
Dave Gerlach | 8e3c595 | 2015-09-22 19:14:52 -0500 | [diff] [blame] | 632 | static int omap_mbox_chan_send_data(struct mbox_chan *chan, void *data) |
| 633 | { |
| 634 | struct omap_mbox *mbox = mbox_chan_to_omap_mbox(chan); |
| 635 | int ret; |
| 636 | |
| 637 | if (!mbox) |
| 638 | return -EINVAL; |
| 639 | |
| 640 | if (mbox->send_no_irq) |
| 641 | ret = omap_mbox_chan_send_noirq(mbox, data); |
| 642 | else |
| 643 | ret = omap_mbox_chan_send(mbox, data); |
| 644 | |
| 645 | return ret; |
| 646 | } |
| 647 | |
Andrew Bresticker | 05ae797 | 2015-05-04 10:36:35 -0700 | [diff] [blame] | 648 | static const struct mbox_chan_ops omap_mbox_chan_ops = { |
Suman Anna | 8841a66 | 2014-11-03 17:05:50 -0600 | [diff] [blame] | 649 | .startup = omap_mbox_chan_startup, |
| 650 | .send_data = omap_mbox_chan_send_data, |
| 651 | .shutdown = omap_mbox_chan_shutdown, |
| 652 | }; |
| 653 | |
Suman Anna | af1d2f5 | 2016-04-06 18:37:18 -0500 | [diff] [blame] | 654 | #ifdef CONFIG_PM_SLEEP |
| 655 | static int omap_mbox_suspend(struct device *dev) |
| 656 | { |
| 657 | struct omap_mbox_device *mdev = dev_get_drvdata(dev); |
Suman Anna | 9f0cee98 | 2016-04-06 18:37:19 -0500 | [diff] [blame^] | 658 | u32 usr, fifo, reg; |
Suman Anna | af1d2f5 | 2016-04-06 18:37:18 -0500 | [diff] [blame] | 659 | |
| 660 | if (pm_runtime_status_suspended(dev)) |
| 661 | return 0; |
| 662 | |
Suman Anna | 9f0cee98 | 2016-04-06 18:37:19 -0500 | [diff] [blame^] | 663 | for (fifo = 0; fifo < mdev->num_fifos; fifo++) { |
| 664 | if (mbox_read_reg(mdev, MAILBOX_MSGSTATUS(fifo))) { |
| 665 | dev_err(mdev->dev, "fifo %d has unexpected unread messages\n", |
| 666 | fifo); |
| 667 | return -EBUSY; |
| 668 | } |
| 669 | } |
| 670 | |
Suman Anna | af1d2f5 | 2016-04-06 18:37:18 -0500 | [diff] [blame] | 671 | for (usr = 0; usr < mdev->num_users; usr++) { |
| 672 | reg = MAILBOX_IRQENABLE(mdev->intr_type, usr); |
| 673 | mdev->irq_ctx[usr] = mbox_read_reg(mdev, reg); |
| 674 | } |
| 675 | |
| 676 | return 0; |
| 677 | } |
| 678 | |
| 679 | static int omap_mbox_resume(struct device *dev) |
| 680 | { |
| 681 | struct omap_mbox_device *mdev = dev_get_drvdata(dev); |
| 682 | u32 usr, reg; |
| 683 | |
| 684 | if (pm_runtime_status_suspended(dev)) |
| 685 | return 0; |
| 686 | |
| 687 | for (usr = 0; usr < mdev->num_users; usr++) { |
| 688 | reg = MAILBOX_IRQENABLE(mdev->intr_type, usr); |
| 689 | mbox_write_reg(mdev, mdev->irq_ctx[usr], reg); |
| 690 | } |
| 691 | |
| 692 | return 0; |
| 693 | } |
| 694 | #endif |
| 695 | |
| 696 | static const struct dev_pm_ops omap_mbox_pm_ops = { |
| 697 | SET_SYSTEM_SLEEP_PM_OPS(omap_mbox_suspend, omap_mbox_resume) |
| 698 | }; |
| 699 | |
Suman Anna | 75288cc | 2014-09-10 14:20:59 -0500 | [diff] [blame] | 700 | static const struct of_device_id omap_mailbox_of_match[] = { |
| 701 | { |
| 702 | .compatible = "ti,omap2-mailbox", |
| 703 | .data = (void *)MBOX_INTR_CFG_TYPE1, |
| 704 | }, |
| 705 | { |
| 706 | .compatible = "ti,omap3-mailbox", |
| 707 | .data = (void *)MBOX_INTR_CFG_TYPE1, |
| 708 | }, |
| 709 | { |
| 710 | .compatible = "ti,omap4-mailbox", |
| 711 | .data = (void *)MBOX_INTR_CFG_TYPE2, |
| 712 | }, |
| 713 | { |
| 714 | /* end */ |
| 715 | }, |
| 716 | }; |
| 717 | MODULE_DEVICE_TABLE(of, omap_mailbox_of_match); |
| 718 | |
Suman Anna | 8841a66 | 2014-11-03 17:05:50 -0600 | [diff] [blame] | 719 | static struct mbox_chan *omap_mbox_of_xlate(struct mbox_controller *controller, |
| 720 | const struct of_phandle_args *sp) |
| 721 | { |
| 722 | phandle phandle = sp->args[0]; |
| 723 | struct device_node *node; |
| 724 | struct omap_mbox_device *mdev; |
| 725 | struct omap_mbox *mbox; |
| 726 | |
| 727 | mdev = container_of(controller, struct omap_mbox_device, controller); |
| 728 | if (WARN_ON(!mdev)) |
Benson Leung | 2d805fc | 2015-05-04 10:36:36 -0700 | [diff] [blame] | 729 | return ERR_PTR(-EINVAL); |
Suman Anna | 8841a66 | 2014-11-03 17:05:50 -0600 | [diff] [blame] | 730 | |
| 731 | node = of_find_node_by_phandle(phandle); |
| 732 | if (!node) { |
| 733 | pr_err("%s: could not find node phandle 0x%x\n", |
| 734 | __func__, phandle); |
Benson Leung | 2d805fc | 2015-05-04 10:36:36 -0700 | [diff] [blame] | 735 | return ERR_PTR(-ENODEV); |
Suman Anna | 8841a66 | 2014-11-03 17:05:50 -0600 | [diff] [blame] | 736 | } |
| 737 | |
| 738 | mbox = omap_mbox_device_find(mdev, node->name); |
| 739 | of_node_put(node); |
Benson Leung | 2d805fc | 2015-05-04 10:36:36 -0700 | [diff] [blame] | 740 | return mbox ? mbox->chan : ERR_PTR(-ENOENT); |
Suman Anna | 8841a66 | 2014-11-03 17:05:50 -0600 | [diff] [blame] | 741 | } |
| 742 | |
Suman Anna | 5040f53 | 2014-06-24 19:43:41 -0500 | [diff] [blame] | 743 | static int omap_mbox_probe(struct platform_device *pdev) |
| 744 | { |
| 745 | struct resource *mem; |
| 746 | int ret; |
Suman Anna | 8841a66 | 2014-11-03 17:05:50 -0600 | [diff] [blame] | 747 | struct mbox_chan *chnls; |
Suman Anna | 5040f53 | 2014-06-24 19:43:41 -0500 | [diff] [blame] | 748 | struct omap_mbox **list, *mbox, *mboxblk; |
Suman Anna | 75288cc | 2014-09-10 14:20:59 -0500 | [diff] [blame] | 749 | struct omap_mbox_fifo_info *finfo, *finfoblk; |
Suman Anna | 72c1c81 | 2014-06-24 19:43:43 -0500 | [diff] [blame] | 750 | struct omap_mbox_device *mdev; |
Suman Anna | be3322e | 2014-06-24 19:43:42 -0500 | [diff] [blame] | 751 | struct omap_mbox_fifo *fifo; |
Suman Anna | 75288cc | 2014-09-10 14:20:59 -0500 | [diff] [blame] | 752 | struct device_node *node = pdev->dev.of_node; |
| 753 | struct device_node *child; |
| 754 | const struct of_device_id *match; |
| 755 | u32 intr_type, info_count; |
| 756 | u32 num_users, num_fifos; |
| 757 | u32 tmp[3]; |
Suman Anna | 5040f53 | 2014-06-24 19:43:41 -0500 | [diff] [blame] | 758 | u32 l; |
| 759 | int i; |
| 760 | |
Suman Anna | 4899f78a | 2016-04-06 12:37:37 -0500 | [diff] [blame] | 761 | if (!node) { |
| 762 | pr_err("%s: only DT-based devices are supported\n", __func__); |
Suman Anna | 5040f53 | 2014-06-24 19:43:41 -0500 | [diff] [blame] | 763 | return -ENODEV; |
| 764 | } |
| 765 | |
Suman Anna | 4899f78a | 2016-04-06 12:37:37 -0500 | [diff] [blame] | 766 | match = of_match_device(omap_mailbox_of_match, &pdev->dev); |
| 767 | if (!match) |
| 768 | return -ENODEV; |
| 769 | intr_type = (u32)match->data; |
Suman Anna | 75288cc | 2014-09-10 14:20:59 -0500 | [diff] [blame] | 770 | |
Suman Anna | 4899f78a | 2016-04-06 12:37:37 -0500 | [diff] [blame] | 771 | if (of_property_read_u32(node, "ti,mbox-num-users", &num_users)) |
| 772 | return -ENODEV; |
Suman Anna | 75288cc | 2014-09-10 14:20:59 -0500 | [diff] [blame] | 773 | |
Suman Anna | 4899f78a | 2016-04-06 12:37:37 -0500 | [diff] [blame] | 774 | if (of_property_read_u32(node, "ti,mbox-num-fifos", &num_fifos)) |
| 775 | return -ENODEV; |
Suman Anna | 75288cc | 2014-09-10 14:20:59 -0500 | [diff] [blame] | 776 | |
Suman Anna | 4899f78a | 2016-04-06 12:37:37 -0500 | [diff] [blame] | 777 | info_count = of_get_available_child_count(node); |
| 778 | if (!info_count) { |
| 779 | dev_err(&pdev->dev, "no available mbox devices found\n"); |
| 780 | return -ENODEV; |
Suman Anna | 75288cc | 2014-09-10 14:20:59 -0500 | [diff] [blame] | 781 | } |
| 782 | |
| 783 | finfoblk = devm_kzalloc(&pdev->dev, info_count * sizeof(*finfoblk), |
| 784 | GFP_KERNEL); |
| 785 | if (!finfoblk) |
| 786 | return -ENOMEM; |
| 787 | |
| 788 | finfo = finfoblk; |
| 789 | child = NULL; |
| 790 | for (i = 0; i < info_count; i++, finfo++) { |
Suman Anna | 4899f78a | 2016-04-06 12:37:37 -0500 | [diff] [blame] | 791 | child = of_get_next_available_child(node, child); |
| 792 | ret = of_property_read_u32_array(child, "ti,mbox-tx", tmp, |
| 793 | ARRAY_SIZE(tmp)); |
| 794 | if (ret) |
| 795 | return ret; |
| 796 | finfo->tx_id = tmp[0]; |
| 797 | finfo->tx_irq = tmp[1]; |
| 798 | finfo->tx_usr = tmp[2]; |
Suman Anna | 75288cc | 2014-09-10 14:20:59 -0500 | [diff] [blame] | 799 | |
Suman Anna | 4899f78a | 2016-04-06 12:37:37 -0500 | [diff] [blame] | 800 | ret = of_property_read_u32_array(child, "ti,mbox-rx", tmp, |
| 801 | ARRAY_SIZE(tmp)); |
| 802 | if (ret) |
| 803 | return ret; |
| 804 | finfo->rx_id = tmp[0]; |
| 805 | finfo->rx_irq = tmp[1]; |
| 806 | finfo->rx_usr = tmp[2]; |
Suman Anna | 75288cc | 2014-09-10 14:20:59 -0500 | [diff] [blame] | 807 | |
Suman Anna | 4899f78a | 2016-04-06 12:37:37 -0500 | [diff] [blame] | 808 | finfo->name = child->name; |
Dave Gerlach | 8e3c595 | 2015-09-22 19:14:52 -0500 | [diff] [blame] | 809 | |
Suman Anna | 4899f78a | 2016-04-06 12:37:37 -0500 | [diff] [blame] | 810 | if (of_find_property(child, "ti,mbox-send-noirq", NULL)) |
| 811 | finfo->send_no_irq = true; |
| 812 | |
Suman Anna | 75288cc | 2014-09-10 14:20:59 -0500 | [diff] [blame] | 813 | if (finfo->tx_id >= num_fifos || finfo->rx_id >= num_fifos || |
| 814 | finfo->tx_usr >= num_users || finfo->rx_usr >= num_users) |
| 815 | return -EINVAL; |
| 816 | } |
| 817 | |
Suman Anna | 72c1c81 | 2014-06-24 19:43:43 -0500 | [diff] [blame] | 818 | mdev = devm_kzalloc(&pdev->dev, sizeof(*mdev), GFP_KERNEL); |
| 819 | if (!mdev) |
| 820 | return -ENOMEM; |
| 821 | |
| 822 | mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 823 | mdev->mbox_base = devm_ioremap_resource(&pdev->dev, mem); |
| 824 | if (IS_ERR(mdev->mbox_base)) |
| 825 | return PTR_ERR(mdev->mbox_base); |
| 826 | |
Suman Anna | af1d2f5 | 2016-04-06 18:37:18 -0500 | [diff] [blame] | 827 | mdev->irq_ctx = devm_kzalloc(&pdev->dev, num_users * sizeof(u32), |
| 828 | GFP_KERNEL); |
| 829 | if (!mdev->irq_ctx) |
| 830 | return -ENOMEM; |
| 831 | |
Suman Anna | 5040f53 | 2014-06-24 19:43:41 -0500 | [diff] [blame] | 832 | /* allocate one extra for marking end of list */ |
Suman Anna | 75288cc | 2014-09-10 14:20:59 -0500 | [diff] [blame] | 833 | list = devm_kzalloc(&pdev->dev, (info_count + 1) * sizeof(*list), |
Suman Anna | 5040f53 | 2014-06-24 19:43:41 -0500 | [diff] [blame] | 834 | GFP_KERNEL); |
| 835 | if (!list) |
| 836 | return -ENOMEM; |
| 837 | |
Suman Anna | 8841a66 | 2014-11-03 17:05:50 -0600 | [diff] [blame] | 838 | chnls = devm_kzalloc(&pdev->dev, (info_count + 1) * sizeof(*chnls), |
| 839 | GFP_KERNEL); |
| 840 | if (!chnls) |
| 841 | return -ENOMEM; |
| 842 | |
Suman Anna | 75288cc | 2014-09-10 14:20:59 -0500 | [diff] [blame] | 843 | mboxblk = devm_kzalloc(&pdev->dev, info_count * sizeof(*mbox), |
Suman Anna | 5040f53 | 2014-06-24 19:43:41 -0500 | [diff] [blame] | 844 | GFP_KERNEL); |
| 845 | if (!mboxblk) |
| 846 | return -ENOMEM; |
| 847 | |
Suman Anna | 5040f53 | 2014-06-24 19:43:41 -0500 | [diff] [blame] | 848 | mbox = mboxblk; |
Suman Anna | 75288cc | 2014-09-10 14:20:59 -0500 | [diff] [blame] | 849 | finfo = finfoblk; |
| 850 | for (i = 0; i < info_count; i++, finfo++) { |
Suman Anna | be3322e | 2014-06-24 19:43:42 -0500 | [diff] [blame] | 851 | fifo = &mbox->tx_fifo; |
Suman Anna | 75288cc | 2014-09-10 14:20:59 -0500 | [diff] [blame] | 852 | fifo->msg = MAILBOX_MESSAGE(finfo->tx_id); |
| 853 | fifo->fifo_stat = MAILBOX_FIFOSTATUS(finfo->tx_id); |
| 854 | fifo->intr_bit = MAILBOX_IRQ_NOTFULL(finfo->tx_id); |
| 855 | fifo->irqenable = MAILBOX_IRQENABLE(intr_type, finfo->tx_usr); |
| 856 | fifo->irqstatus = MAILBOX_IRQSTATUS(intr_type, finfo->tx_usr); |
| 857 | fifo->irqdisable = MAILBOX_IRQDISABLE(intr_type, finfo->tx_usr); |
Suman Anna | 5040f53 | 2014-06-24 19:43:41 -0500 | [diff] [blame] | 858 | |
Suman Anna | be3322e | 2014-06-24 19:43:42 -0500 | [diff] [blame] | 859 | fifo = &mbox->rx_fifo; |
Suman Anna | 75288cc | 2014-09-10 14:20:59 -0500 | [diff] [blame] | 860 | fifo->msg = MAILBOX_MESSAGE(finfo->rx_id); |
| 861 | fifo->msg_stat = MAILBOX_MSGSTATUS(finfo->rx_id); |
| 862 | fifo->intr_bit = MAILBOX_IRQ_NEWMSG(finfo->rx_id); |
| 863 | fifo->irqenable = MAILBOX_IRQENABLE(intr_type, finfo->rx_usr); |
| 864 | fifo->irqstatus = MAILBOX_IRQSTATUS(intr_type, finfo->rx_usr); |
| 865 | fifo->irqdisable = MAILBOX_IRQDISABLE(intr_type, finfo->rx_usr); |
Suman Anna | be3322e | 2014-06-24 19:43:42 -0500 | [diff] [blame] | 866 | |
Dave Gerlach | 8e3c595 | 2015-09-22 19:14:52 -0500 | [diff] [blame] | 867 | mbox->send_no_irq = finfo->send_no_irq; |
Suman Anna | be3322e | 2014-06-24 19:43:42 -0500 | [diff] [blame] | 868 | mbox->intr_type = intr_type; |
| 869 | |
Suman Anna | 72c1c81 | 2014-06-24 19:43:43 -0500 | [diff] [blame] | 870 | mbox->parent = mdev; |
Suman Anna | 75288cc | 2014-09-10 14:20:59 -0500 | [diff] [blame] | 871 | mbox->name = finfo->name; |
| 872 | mbox->irq = platform_get_irq(pdev, finfo->tx_irq); |
Suman Anna | 5040f53 | 2014-06-24 19:43:41 -0500 | [diff] [blame] | 873 | if (mbox->irq < 0) |
| 874 | return mbox->irq; |
Suman Anna | 8841a66 | 2014-11-03 17:05:50 -0600 | [diff] [blame] | 875 | mbox->chan = &chnls[i]; |
| 876 | chnls[i].con_priv = mbox; |
Suman Anna | 5040f53 | 2014-06-24 19:43:41 -0500 | [diff] [blame] | 877 | list[i] = mbox++; |
| 878 | } |
| 879 | |
Suman Anna | 72c1c81 | 2014-06-24 19:43:43 -0500 | [diff] [blame] | 880 | mutex_init(&mdev->cfg_lock); |
| 881 | mdev->dev = &pdev->dev; |
Suman Anna | 75288cc | 2014-09-10 14:20:59 -0500 | [diff] [blame] | 882 | mdev->num_users = num_users; |
| 883 | mdev->num_fifos = num_fifos; |
Suman Anna | 2240f8a | 2016-04-06 18:37:17 -0500 | [diff] [blame] | 884 | mdev->intr_type = intr_type; |
Suman Anna | 72c1c81 | 2014-06-24 19:43:43 -0500 | [diff] [blame] | 885 | mdev->mboxes = list; |
Suman Anna | 8841a66 | 2014-11-03 17:05:50 -0600 | [diff] [blame] | 886 | |
| 887 | /* OMAP does not have a Tx-Done IRQ, but rather a Tx-Ready IRQ */ |
| 888 | mdev->controller.txdone_irq = true; |
| 889 | mdev->controller.dev = mdev->dev; |
| 890 | mdev->controller.ops = &omap_mbox_chan_ops; |
| 891 | mdev->controller.chans = chnls; |
| 892 | mdev->controller.num_chans = info_count; |
| 893 | mdev->controller.of_xlate = omap_mbox_of_xlate; |
Suman Anna | 72c1c81 | 2014-06-24 19:43:43 -0500 | [diff] [blame] | 894 | ret = omap_mbox_register(mdev); |
Suman Anna | 5040f53 | 2014-06-24 19:43:41 -0500 | [diff] [blame] | 895 | if (ret) |
| 896 | return ret; |
| 897 | |
Suman Anna | 72c1c81 | 2014-06-24 19:43:43 -0500 | [diff] [blame] | 898 | platform_set_drvdata(pdev, mdev); |
| 899 | pm_runtime_enable(mdev->dev); |
Suman Anna | 5040f53 | 2014-06-24 19:43:41 -0500 | [diff] [blame] | 900 | |
Suman Anna | 72c1c81 | 2014-06-24 19:43:43 -0500 | [diff] [blame] | 901 | ret = pm_runtime_get_sync(mdev->dev); |
Suman Anna | 5040f53 | 2014-06-24 19:43:41 -0500 | [diff] [blame] | 902 | if (ret < 0) { |
Suman Anna | 72c1c81 | 2014-06-24 19:43:43 -0500 | [diff] [blame] | 903 | pm_runtime_put_noidle(mdev->dev); |
Suman Anna | 5040f53 | 2014-06-24 19:43:41 -0500 | [diff] [blame] | 904 | goto unregister; |
| 905 | } |
| 906 | |
| 907 | /* |
| 908 | * just print the raw revision register, the format is not |
| 909 | * uniform across all SoCs |
| 910 | */ |
Suman Anna | 72c1c81 | 2014-06-24 19:43:43 -0500 | [diff] [blame] | 911 | l = mbox_read_reg(mdev, MAILBOX_REVISION); |
| 912 | dev_info(mdev->dev, "omap mailbox rev 0x%x\n", l); |
Suman Anna | 5040f53 | 2014-06-24 19:43:41 -0500 | [diff] [blame] | 913 | |
Suman Anna | 72c1c81 | 2014-06-24 19:43:43 -0500 | [diff] [blame] | 914 | ret = pm_runtime_put_sync(mdev->dev); |
Suman Anna | 5040f53 | 2014-06-24 19:43:41 -0500 | [diff] [blame] | 915 | if (ret < 0) |
| 916 | goto unregister; |
| 917 | |
Suman Anna | 75288cc | 2014-09-10 14:20:59 -0500 | [diff] [blame] | 918 | devm_kfree(&pdev->dev, finfoblk); |
Suman Anna | 5040f53 | 2014-06-24 19:43:41 -0500 | [diff] [blame] | 919 | return 0; |
| 920 | |
| 921 | unregister: |
Suman Anna | 72c1c81 | 2014-06-24 19:43:43 -0500 | [diff] [blame] | 922 | pm_runtime_disable(mdev->dev); |
| 923 | omap_mbox_unregister(mdev); |
Suman Anna | 5040f53 | 2014-06-24 19:43:41 -0500 | [diff] [blame] | 924 | return ret; |
| 925 | } |
| 926 | |
| 927 | static int omap_mbox_remove(struct platform_device *pdev) |
| 928 | { |
Suman Anna | 72c1c81 | 2014-06-24 19:43:43 -0500 | [diff] [blame] | 929 | struct omap_mbox_device *mdev = platform_get_drvdata(pdev); |
| 930 | |
| 931 | pm_runtime_disable(mdev->dev); |
| 932 | omap_mbox_unregister(mdev); |
Suman Anna | 5040f53 | 2014-06-24 19:43:41 -0500 | [diff] [blame] | 933 | |
| 934 | return 0; |
| 935 | } |
| 936 | |
| 937 | static struct platform_driver omap_mbox_driver = { |
| 938 | .probe = omap_mbox_probe, |
| 939 | .remove = omap_mbox_remove, |
| 940 | .driver = { |
| 941 | .name = "omap-mailbox", |
Suman Anna | af1d2f5 | 2016-04-06 18:37:18 -0500 | [diff] [blame] | 942 | .pm = &omap_mbox_pm_ops, |
Suman Anna | 75288cc | 2014-09-10 14:20:59 -0500 | [diff] [blame] | 943 | .of_match_table = of_match_ptr(omap_mailbox_of_match), |
Suman Anna | 5040f53 | 2014-06-24 19:43:41 -0500 | [diff] [blame] | 944 | }, |
| 945 | }; |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 946 | |
Hiroshi DOYU | c7c158e | 2009-11-22 10:11:19 -0800 | [diff] [blame] | 947 | static int __init omap_mbox_init(void) |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 948 | { |
Hiroshi DOYU | 6b23398 | 2010-05-18 16:15:32 +0300 | [diff] [blame] | 949 | int err; |
| 950 | |
| 951 | err = class_register(&omap_mbox_class); |
| 952 | if (err) |
| 953 | return err; |
| 954 | |
Ohad Ben-Cohen | b5bebe4 | 2010-05-05 15:33:09 +0000 | [diff] [blame] | 955 | /* kfifo size sanity check: alignment and minimal size */ |
| 956 | mbox_kfifo_size = ALIGN(mbox_kfifo_size, sizeof(mbox_msg_t)); |
Kanigeri, Hari | ab66ac3 | 2010-11-29 20:24:12 +0000 | [diff] [blame] | 957 | mbox_kfifo_size = max_t(unsigned int, mbox_kfifo_size, |
| 958 | sizeof(mbox_msg_t)); |
Ohad Ben-Cohen | b5bebe4 | 2010-05-05 15:33:09 +0000 | [diff] [blame] | 959 | |
Suman Anna | 5040f53 | 2014-06-24 19:43:41 -0500 | [diff] [blame] | 960 | return platform_driver_register(&omap_mbox_driver); |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 961 | } |
Hiroshi DOYU | 6b23398 | 2010-05-18 16:15:32 +0300 | [diff] [blame] | 962 | subsys_initcall(omap_mbox_init); |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 963 | |
Hiroshi DOYU | c7c158e | 2009-11-22 10:11:19 -0800 | [diff] [blame] | 964 | static void __exit omap_mbox_exit(void) |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 965 | { |
Suman Anna | 5040f53 | 2014-06-24 19:43:41 -0500 | [diff] [blame] | 966 | platform_driver_unregister(&omap_mbox_driver); |
Hiroshi DOYU | 6b23398 | 2010-05-18 16:15:32 +0300 | [diff] [blame] | 967 | class_unregister(&omap_mbox_class); |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 968 | } |
Hiroshi DOYU | c7c158e | 2009-11-22 10:11:19 -0800 | [diff] [blame] | 969 | module_exit(omap_mbox_exit); |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 970 | |
Hiroshi DOYU | f48cca8 | 2009-03-23 18:07:24 -0700 | [diff] [blame] | 971 | MODULE_LICENSE("GPL v2"); |
| 972 | MODULE_DESCRIPTION("omap mailbox: interrupt driven messaging"); |
Ohad Ben-Cohen | f375325 | 2010-05-05 15:33:07 +0000 | [diff] [blame] | 973 | MODULE_AUTHOR("Toshihiro Kobayashi"); |
| 974 | MODULE_AUTHOR("Hiroshi DOYU"); |