blob: 8ef48c00f98d4ef63428a3712e222c4b822750f1 [file] [log] [blame]
Thomas Gleixnerd2912cb2019-06-04 10:11:33 +02001// SPDX-License-Identifier: GPL-2.0-only
Tony Lindgren73db9e02015-07-23 22:33:18 -07002/dts-v1/;
3
4#include "dm814x.dtsi"
Roger Quadros0c3e1922016-03-01 15:44:47 +02005#include <dt-bindings/interrupt-controller/irq.h>
Tony Lindgren73db9e02015-07-23 22:33:18 -07006
7/ {
8 model = "DM8148 EVM";
Graeme Smecher647efef2018-05-02 17:32:36 -07009 compatible = "ti,dm8148-evm", "ti,dm8148", "ti,dm814";
Tony Lindgren73db9e02015-07-23 22:33:18 -070010
Javier Martinez Canillasc5ee1b42016-08-31 12:35:34 +020011 memory@80000000 {
Tony Lindgren73db9e02015-07-23 22:33:18 -070012 device_type = "memory";
13 reg = <0x80000000 0x40000000>; /* 1 GB */
14 };
Tony Lindgren67b5e9e2015-12-22 16:00:51 -080015
16 /* MIC94060YC6 controlled by SD1_POW pin */
Javier Martinez Canillas0b0d9122016-08-01 12:46:59 -040017 vmmcsd_fixed: fixedregulator0 {
Tony Lindgren67b5e9e2015-12-22 16:00:51 -080018 compatible = "regulator-fixed";
19 regulator-name = "vmmcsd_fixed";
20 regulator-min-microvolt = <3300000>;
21 regulator-max-microvolt = <3300000>;
22 };
Tony Lindgren73db9e02015-07-23 22:33:18 -070023};
24
25&cpsw_emac0 {
Grygorii Strashkoabf878d2018-09-10 17:57:53 -050026 phy-handle = <&ethphy0>;
Tony Lindgrenb46b2b72020-03-03 13:18:36 -080027 phy-mode = "rgmii-id";
Tony Lindgren73db9e02015-07-23 22:33:18 -070028};
29
30&cpsw_emac1 {
Grygorii Strashkoabf878d2018-09-10 17:57:53 -050031 phy-handle = <&ethphy1>;
Tony Lindgrenb46b2b72020-03-03 13:18:36 -080032 phy-mode = "rgmii-id";
Tony Lindgren73db9e02015-07-23 22:33:18 -070033};
Tony Lindgren67b5e9e2015-12-22 16:00:51 -080034
Grygorii Strashkoabf878d2018-09-10 17:57:53 -050035&davinci_mdio {
36 ethphy0: ethernet-phy@0 {
37 reg = <0>;
38 };
39
40 ethphy1: ethernet-phy@1 {
41 reg = <1>;
42 };
43};
44
Tony Lindgren0589df62016-02-12 13:25:14 -080045&gpmc {
46 ranges = <0 0 0x04000000 0x01000000>; /* CS0: 16MB for NAND */
47
48 nand@0,0 {
Roger Quadros0c3e1922016-03-01 15:44:47 +020049 compatible = "ti,omap2-nand";
Tony Lindgren0589df62016-02-12 13:25:14 -080050 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
Roger Quadros0c3e1922016-03-01 15:44:47 +020051 interrupt-parent = <&gpmc>;
52 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
53 <1 IRQ_TYPE_NONE>; /* termcount */
54 linux,mtd-name= "micron,mt29f2g16aadwp";
Tony Lindgren0589df62016-02-12 13:25:14 -080055 #address-cells = <1>;
56 #size-cells = <1>;
57 ti,nand-ecc-opt = "bch8";
58 nand-bus-width = <16>;
59 gpmc,device-width = <2>;
60 gpmc,sync-clk-ps = <0>;
61 gpmc,cs-on-ns = <0>;
62 gpmc,cs-rd-off-ns = <44>;
63 gpmc,cs-wr-off-ns = <44>;
64 gpmc,adv-on-ns = <6>;
65 gpmc,adv-rd-off-ns = <34>;
66 gpmc,adv-wr-off-ns = <44>;
67 gpmc,we-on-ns = <0>;
68 gpmc,we-off-ns = <40>;
69 gpmc,oe-on-ns = <0>;
70 gpmc,oe-off-ns = <54>;
71 gpmc,access-ns = <64>;
72 gpmc,rd-cycle-ns = <82>;
73 gpmc,wr-cycle-ns = <82>;
Tony Lindgren0589df62016-02-12 13:25:14 -080074 gpmc,bus-turnaround-ns = <0>;
75 gpmc,cycle2cycle-delay-ns = <0>;
76 gpmc,clk-activation-ns = <0>;
Tony Lindgren0589df62016-02-12 13:25:14 -080077 gpmc,wr-access-ns = <40>;
78 gpmc,wr-data-mux-bus-ns = <0>;
79 partition@0 {
80 label = "X-Loader";
81 reg = <0 0x80000>;
82 };
Rob Herring9e62ec02021-08-23 11:51:26 -050083 partition@80000 {
Tony Lindgren0589df62016-02-12 13:25:14 -080084 label = "U-Boot";
85 reg = <0x80000 0x1c0000>;
86 };
Rob Herring9e62ec02021-08-23 11:51:26 -050087 partition@1c0000 {
Tony Lindgren0589df62016-02-12 13:25:14 -080088 label = "Environment";
89 reg = <0x240000 0x40000>;
90 };
Rob Herring9e62ec02021-08-23 11:51:26 -050091 partition@280000 {
Tony Lindgren0589df62016-02-12 13:25:14 -080092 label = "Kernel";
93 reg = <0x280000 0x500000>;
94 };
Rob Herring9e62ec02021-08-23 11:51:26 -050095 partition@780000 {
Tony Lindgren0589df62016-02-12 13:25:14 -080096 label = "Filesystem";
97 reg = <0x780000 0xf880000>;
98 };
99 };
100};
101
Nicolas Chauvet1ddbef42016-05-10 12:14:58 +0200102&mmc1 {
103 status = "disabled";
104};
105
Tony Lindgren67b5e9e2015-12-22 16:00:51 -0800106&mmc2 {
107 pinctrl-names = "default";
108 pinctrl-0 = <&sd1_pins>;
109 vmmc-supply = <&vmmcsd_fixed>;
110 bus-width = <4>;
111 cd-gpios = <&gpio2 6 GPIO_ACTIVE_LOW>;
112};
113
Nicolas Chauvet1ddbef42016-05-10 12:14:58 +0200114&mmc3 {
115 status = "disabled";
116};
117
Tony Lindgren67b5e9e2015-12-22 16:00:51 -0800118&pincntl {
119 sd1_pins: pinmux_sd1_pins {
120 pinctrl-single,pins = <
121 DM814X_IOPAD(0x0800, PIN_INPUT | 0x1) /* SD1_CLK */
122 DM814X_IOPAD(0x0804, PIN_INPUT_PULLUP | 0x1) /* SD1_CMD */
123 DM814X_IOPAD(0x0808, PIN_INPUT_PULLUP | 0x1) /* SD1_DAT[0] */
124 DM814X_IOPAD(0x080c, PIN_INPUT_PULLUP | 0x1) /* SD1_DAT[1] */
125 DM814X_IOPAD(0x0810, PIN_INPUT_PULLUP | 0x1) /* SD1_DAT[2] */
126 DM814X_IOPAD(0x0814, PIN_INPUT_PULLUP | 0x1) /* SD1_DAT[3] */
127 DM814X_IOPAD(0x0924, PIN_OUTPUT | 0x40) /* SD1_POW */
128 DM814X_IOPAD(0x093C, PIN_INPUT_PULLUP | 0x80) /* GP1[6] */
129 >;
130 };
Tony Lindgrene0320132015-12-22 16:01:16 -0800131
132 usb0_pins: pinmux_usb0_pins {
133 pinctrl-single,pins = <
134 DM814X_IOPAD(0x0c34, PIN_OUTPUT | 0x1) /* USB0_DRVVBUS */
135 >;
136 };
137
138 usb1_pins: pinmux_usb1_pins {
139 pinctrl-single,pins = <
140 DM814X_IOPAD(0x0834, PIN_OUTPUT | 0x80) /* USB1_DRVVBUS */
141 >;
142 };
143};
144
145&usb0 {
146 pinctrl-names = "default";
147 pinctrl-0 = <&usb0_pins>;
148 dr_mode = "host";
149};
150
151&usb1 {
152 pinctrl-names = "default";
153 pinctrl-0 = <&usb1_pins>;
154 dr_mode = "host";
Tony Lindgren67b5e9e2015-12-22 16:00:51 -0800155};