blob: f8d8650383e0e6ecb09dd6d36a9ff42df69e3731 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * linux/arch/m32r/kernel/irq.c
3 *
4 * Copyright (c) 2003, 2004 Hitoshi Yamamoto
5 * Copyright (c) 2004 Hirokazu Takata <takata at linux-m32r.org>
6 */
7
8/*
9 * linux/arch/i386/kernel/irq.c
10 *
11 * Copyright (C) 1992, 1998 Linus Torvalds, Ingo Molnar
12 *
13 * This file contains the lowest level m32r-specific interrupt
14 * entry and irq statistics code. All the remaining irq logic is
15 * done by the generic kernel/irq/ code and in the
16 * m32r-specific irq controller code.
17 */
18
19#include <linux/kernel_stat.h>
20#include <linux/interrupt.h>
21#include <linux/seq_file.h>
22#include <linux/module.h>
23#include <asm/uaccess.h>
24
25atomic_t irq_err_count;
26atomic_t irq_mis_count;
27
28/*
29 * Generic, controller-independent functions:
30 */
31
32int show_interrupts(struct seq_file *p, void *v)
33{
34 int i = *(loff_t *) v, j;
35 struct irqaction * action;
36 unsigned long flags;
37
38 if (i == 0) {
39 seq_printf(p, " ");
Andrew Morton394e3902006-03-23 03:01:05 -080040 for_each_online_cpu(j)
41 seq_printf(p, "CPU%d ",j);
Linus Torvalds1da177e2005-04-16 15:20:36 -070042 seq_putc(p, '\n');
43 }
44
45 if (i < NR_IRQS) {
46 spin_lock_irqsave(&irq_desc[i].lock, flags);
47 action = irq_desc[i].action;
48 if (!action)
49 goto skip;
50 seq_printf(p, "%3d: ",i);
51#ifndef CONFIG_SMP
52 seq_printf(p, "%10u ", kstat_irqs(i));
53#else
Andrew Morton394e3902006-03-23 03:01:05 -080054 for_each_online_cpu(j)
55 seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
Linus Torvalds1da177e2005-04-16 15:20:36 -070056#endif
Ingo Molnard1bef4e2006-06-29 02:24:36 -070057 seq_printf(p, " %14s", irq_desc[i].chip->typename);
Linus Torvalds1da177e2005-04-16 15:20:36 -070058 seq_printf(p, " %s", action->name);
59
60 for (action=action->next; action; action = action->next)
61 seq_printf(p, ", %s", action->name);
62
63 seq_putc(p, '\n');
64skip:
65 spin_unlock_irqrestore(&irq_desc[i].lock, flags);
66 } else if (i == NR_IRQS) {
67 seq_printf(p, "ERR: %10u\n", atomic_read(&irq_err_count));
68 seq_printf(p, "MIS: %10u\n", atomic_read(&irq_mis_count));
69 }
70 return 0;
71}
72
73/*
74 * do_IRQ handles all normal device IRQ's (the special
75 * SMP cross-CPU interrupts have their own specific
76 * handlers).
77 */
78asmlinkage unsigned int do_IRQ(int irq, struct pt_regs *regs)
79{
Al Viro9c8e7f52006-10-07 16:29:18 +010080 struct pt_regs *old_regs;
81 old_regs = set_irq_regs(regs);
Linus Torvalds1da177e2005-04-16 15:20:36 -070082 irq_enter();
83
84#ifdef CONFIG_DEBUG_STACKOVERFLOW
85 /* FIXME M32R */
86#endif
Al Viro9c8e7f52006-10-07 16:29:18 +010087 __do_IRQ(irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -070088 irq_exit();
Al Viro9c8e7f52006-10-07 16:29:18 +010089 set_irq_regs(old_regs);
Linus Torvalds1da177e2005-04-16 15:20:36 -070090
91 return 1;
92}