Andi Kleen | 0b00de8 | 2017-10-13 14:56:42 -0700 | [diff] [blame] | 1 | /* Declare dependencies between CPUIDs */ |
| 2 | #include <linux/kernel.h> |
| 3 | #include <linux/init.h> |
| 4 | #include <linux/module.h> |
| 5 | #include <asm/cpufeature.h> |
| 6 | |
| 7 | struct cpuid_dep { |
| 8 | unsigned int feature; |
| 9 | unsigned int depends; |
| 10 | }; |
| 11 | |
| 12 | /* |
| 13 | * Table of CPUID features that depend on others. |
| 14 | * |
| 15 | * This only includes dependencies that can be usefully disabled, not |
| 16 | * features part of the base set (like FPU). |
| 17 | * |
| 18 | * Note this all is not __init / __initdata because it can be |
| 19 | * called from cpu hotplug. It shouldn't do anything in this case, |
| 20 | * but it's difficult to tell that to the init reference checker. |
| 21 | */ |
Ralf Ramsauer | 52586b0 | 2018-03-07 17:07:34 +0100 | [diff] [blame] | 22 | static const struct cpuid_dep cpuid_deps[] = { |
Sebastian Andrzej Siewior | 9838e3b | 2019-07-03 10:32:47 +0200 | [diff] [blame] | 23 | { X86_FEATURE_FXSR, X86_FEATURE_FPU }, |
Andi Kleen | 0b00de8 | 2017-10-13 14:56:42 -0700 | [diff] [blame] | 24 | { X86_FEATURE_XSAVEOPT, X86_FEATURE_XSAVE }, |
| 25 | { X86_FEATURE_XSAVEC, X86_FEATURE_XSAVE }, |
| 26 | { X86_FEATURE_XSAVES, X86_FEATURE_XSAVE }, |
| 27 | { X86_FEATURE_AVX, X86_FEATURE_XSAVE }, |
| 28 | { X86_FEATURE_PKU, X86_FEATURE_XSAVE }, |
| 29 | { X86_FEATURE_MPX, X86_FEATURE_XSAVE }, |
| 30 | { X86_FEATURE_XGETBV1, X86_FEATURE_XSAVE }, |
Sebastian Andrzej Siewior | 9838e3b | 2019-07-03 10:32:47 +0200 | [diff] [blame] | 31 | { X86_FEATURE_CMOV, X86_FEATURE_FXSR }, |
| 32 | { X86_FEATURE_MMX, X86_FEATURE_FXSR }, |
| 33 | { X86_FEATURE_MMXEXT, X86_FEATURE_MMX }, |
Andi Kleen | 0b00de8 | 2017-10-13 14:56:42 -0700 | [diff] [blame] | 34 | { X86_FEATURE_FXSR_OPT, X86_FEATURE_FXSR }, |
Sebastian Andrzej Siewior | 9838e3b | 2019-07-03 10:32:47 +0200 | [diff] [blame] | 35 | { X86_FEATURE_XSAVE, X86_FEATURE_FXSR }, |
Andi Kleen | 0b00de8 | 2017-10-13 14:56:42 -0700 | [diff] [blame] | 36 | { X86_FEATURE_XMM, X86_FEATURE_FXSR }, |
| 37 | { X86_FEATURE_XMM2, X86_FEATURE_XMM }, |
| 38 | { X86_FEATURE_XMM3, X86_FEATURE_XMM2 }, |
| 39 | { X86_FEATURE_XMM4_1, X86_FEATURE_XMM2 }, |
| 40 | { X86_FEATURE_XMM4_2, X86_FEATURE_XMM2 }, |
| 41 | { X86_FEATURE_XMM3, X86_FEATURE_XMM2 }, |
| 42 | { X86_FEATURE_PCLMULQDQ, X86_FEATURE_XMM2 }, |
| 43 | { X86_FEATURE_SSSE3, X86_FEATURE_XMM2, }, |
| 44 | { X86_FEATURE_F16C, X86_FEATURE_XMM2, }, |
| 45 | { X86_FEATURE_AES, X86_FEATURE_XMM2 }, |
| 46 | { X86_FEATURE_SHA_NI, X86_FEATURE_XMM2 }, |
| 47 | { X86_FEATURE_FMA, X86_FEATURE_AVX }, |
| 48 | { X86_FEATURE_AVX2, X86_FEATURE_AVX, }, |
| 49 | { X86_FEATURE_AVX512F, X86_FEATURE_AVX, }, |
| 50 | { X86_FEATURE_AVX512IFMA, X86_FEATURE_AVX512F }, |
| 51 | { X86_FEATURE_AVX512PF, X86_FEATURE_AVX512F }, |
| 52 | { X86_FEATURE_AVX512ER, X86_FEATURE_AVX512F }, |
| 53 | { X86_FEATURE_AVX512CD, X86_FEATURE_AVX512F }, |
| 54 | { X86_FEATURE_AVX512DQ, X86_FEATURE_AVX512F }, |
| 55 | { X86_FEATURE_AVX512BW, X86_FEATURE_AVX512F }, |
| 56 | { X86_FEATURE_AVX512VL, X86_FEATURE_AVX512F }, |
| 57 | { X86_FEATURE_AVX512VBMI, X86_FEATURE_AVX512F }, |
Gayatri Kammela | c128dbf | 2017-10-30 18:20:29 -0700 | [diff] [blame] | 58 | { X86_FEATURE_AVX512_VBMI2, X86_FEATURE_AVX512VL }, |
| 59 | { X86_FEATURE_GFNI, X86_FEATURE_AVX512VL }, |
| 60 | { X86_FEATURE_VAES, X86_FEATURE_AVX512VL }, |
| 61 | { X86_FEATURE_VPCLMULQDQ, X86_FEATURE_AVX512VL }, |
| 62 | { X86_FEATURE_AVX512_VNNI, X86_FEATURE_AVX512VL }, |
| 63 | { X86_FEATURE_AVX512_BITALG, X86_FEATURE_AVX512VL }, |
Andi Kleen | 0b00de8 | 2017-10-13 14:56:42 -0700 | [diff] [blame] | 64 | { X86_FEATURE_AVX512_4VNNIW, X86_FEATURE_AVX512F }, |
| 65 | { X86_FEATURE_AVX512_4FMAPS, X86_FEATURE_AVX512F }, |
| 66 | { X86_FEATURE_AVX512_VPOPCNTDQ, X86_FEATURE_AVX512F }, |
Fenghua Yu | acec0ce | 2019-06-19 18:51:09 +0200 | [diff] [blame] | 67 | { X86_FEATURE_CQM_OCCUP_LLC, X86_FEATURE_CQM_LLC }, |
| 68 | { X86_FEATURE_CQM_MBM_TOTAL, X86_FEATURE_CQM_LLC }, |
| 69 | { X86_FEATURE_CQM_MBM_LOCAL, X86_FEATURE_CQM_LLC }, |
Fenghua Yu | b302e4b | 2019-06-17 11:00:16 -0700 | [diff] [blame] | 70 | { X86_FEATURE_AVX512_BF16, X86_FEATURE_AVX512VL }, |
Andi Kleen | 0b00de8 | 2017-10-13 14:56:42 -0700 | [diff] [blame] | 71 | {} |
| 72 | }; |
| 73 | |
Andi Kleen | 0b00de8 | 2017-10-13 14:56:42 -0700 | [diff] [blame] | 74 | static inline void clear_feature(struct cpuinfo_x86 *c, unsigned int feature) |
| 75 | { |
Thomas Gleixner | 06dd688 | 2017-11-02 13:22:35 +0100 | [diff] [blame] | 76 | /* |
| 77 | * Note: This could use the non atomic __*_bit() variants, but the |
| 78 | * rest of the cpufeature code uses atomics as well, so keep it for |
| 79 | * consistency. Cleanup all of it separately. |
| 80 | */ |
| 81 | if (!c) { |
| 82 | clear_cpu_cap(&boot_cpu_data, feature); |
| 83 | set_bit(feature, (unsigned long *)cpu_caps_cleared); |
| 84 | } else { |
| 85 | clear_bit(feature, (unsigned long *)c->x86_capability); |
| 86 | } |
Andi Kleen | 0b00de8 | 2017-10-13 14:56:42 -0700 | [diff] [blame] | 87 | } |
| 88 | |
Thomas Gleixner | 57b8b1a | 2017-10-18 19:39:35 +0200 | [diff] [blame] | 89 | /* Take the capabilities and the BUG bits into account */ |
| 90 | #define MAX_FEATURE_BITS ((NCAPINTS + NBUGINTS) * sizeof(u32) * 8) |
| 91 | |
Andi Kleen | 0b00de8 | 2017-10-13 14:56:42 -0700 | [diff] [blame] | 92 | static void do_clear_cpu_cap(struct cpuinfo_x86 *c, unsigned int feature) |
| 93 | { |
Thomas Gleixner | 57b8b1a | 2017-10-18 19:39:35 +0200 | [diff] [blame] | 94 | DECLARE_BITMAP(disable, MAX_FEATURE_BITS); |
Andi Kleen | 0b00de8 | 2017-10-13 14:56:42 -0700 | [diff] [blame] | 95 | const struct cpuid_dep *d; |
Thomas Gleixner | 57b8b1a | 2017-10-18 19:39:35 +0200 | [diff] [blame] | 96 | bool changed; |
| 97 | |
| 98 | if (WARN_ON(feature >= MAX_FEATURE_BITS)) |
| 99 | return; |
Andi Kleen | 0b00de8 | 2017-10-13 14:56:42 -0700 | [diff] [blame] | 100 | |
| 101 | clear_feature(c, feature); |
| 102 | |
| 103 | /* Collect all features to disable, handling dependencies */ |
| 104 | memset(disable, 0, sizeof(disable)); |
| 105 | __set_bit(feature, disable); |
| 106 | |
| 107 | /* Loop until we get a stable state. */ |
| 108 | do { |
| 109 | changed = false; |
| 110 | for (d = cpuid_deps; d->feature; d++) { |
| 111 | if (!test_bit(d->depends, disable)) |
| 112 | continue; |
| 113 | if (__test_and_set_bit(d->feature, disable)) |
| 114 | continue; |
| 115 | |
| 116 | changed = true; |
| 117 | clear_feature(c, d->feature); |
| 118 | } |
| 119 | } while (changed); |
| 120 | } |
| 121 | |
| 122 | void clear_cpu_cap(struct cpuinfo_x86 *c, unsigned int feature) |
| 123 | { |
| 124 | do_clear_cpu_cap(c, feature); |
| 125 | } |
| 126 | |
| 127 | void setup_clear_cpu_cap(unsigned int feature) |
| 128 | { |
| 129 | do_clear_cpu_cap(NULL, feature); |
| 130 | } |