Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 1 | /* |
| 2 | * Ethernet on Serial Communications Controller (SCC) driver for Motorola MPC8xx and MPC82xx. |
| 3 | * |
| 4 | * Copyright (c) 2003 Intracom S.A. |
| 5 | * by Pantelis Antoniou <panto@intracom.gr> |
| 6 | * |
| 7 | * 2005 (c) MontaVista Software, Inc. |
| 8 | * Vitaly Bordug <vbordug@ru.mvista.com> |
| 9 | * |
| 10 | * This file is licensed under the terms of the GNU General Public License |
| 11 | * version 2. This program is licensed "as is" without any warranty of any |
| 12 | * kind, whether express or implied. |
| 13 | */ |
| 14 | |
| 15 | #include <linux/config.h> |
| 16 | #include <linux/module.h> |
| 17 | #include <linux/kernel.h> |
| 18 | #include <linux/types.h> |
| 19 | #include <linux/sched.h> |
| 20 | #include <linux/string.h> |
| 21 | #include <linux/ptrace.h> |
| 22 | #include <linux/errno.h> |
| 23 | #include <linux/ioport.h> |
| 24 | #include <linux/slab.h> |
| 25 | #include <linux/interrupt.h> |
| 26 | #include <linux/pci.h> |
| 27 | #include <linux/init.h> |
| 28 | #include <linux/delay.h> |
| 29 | #include <linux/netdevice.h> |
| 30 | #include <linux/etherdevice.h> |
| 31 | #include <linux/skbuff.h> |
| 32 | #include <linux/spinlock.h> |
| 33 | #include <linux/mii.h> |
| 34 | #include <linux/ethtool.h> |
| 35 | #include <linux/bitops.h> |
| 36 | #include <linux/fs.h> |
Marcelo Tosatti | f7b9996 | 2005-11-09 11:00:16 -0200 | [diff] [blame] | 37 | #include <linux/platform_device.h> |
Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 38 | |
| 39 | #include <asm/irq.h> |
| 40 | #include <asm/uaccess.h> |
| 41 | |
| 42 | #ifdef CONFIG_8xx |
| 43 | #include <asm/8xx_immap.h> |
| 44 | #include <asm/pgtable.h> |
| 45 | #include <asm/mpc8xx.h> |
| 46 | #include <asm/commproc.h> |
| 47 | #endif |
| 48 | |
| 49 | #include "fs_enet.h" |
| 50 | |
| 51 | /*************************************************/ |
| 52 | |
| 53 | #if defined(CONFIG_CPM1) |
| 54 | /* for a 8xx __raw_xxx's are sufficient */ |
| 55 | #define __fs_out32(addr, x) __raw_writel(x, addr) |
| 56 | #define __fs_out16(addr, x) __raw_writew(x, addr) |
| 57 | #define __fs_out8(addr, x) __raw_writeb(x, addr) |
| 58 | #define __fs_in32(addr) __raw_readl(addr) |
| 59 | #define __fs_in16(addr) __raw_readw(addr) |
| 60 | #define __fs_in8(addr) __raw_readb(addr) |
| 61 | #else |
| 62 | /* for others play it safe */ |
| 63 | #define __fs_out32(addr, x) out_be32(addr, x) |
| 64 | #define __fs_out16(addr, x) out_be16(addr, x) |
| 65 | #define __fs_in32(addr) in_be32(addr) |
| 66 | #define __fs_in16(addr) in_be16(addr) |
| 67 | #endif |
| 68 | |
| 69 | /* write, read, set bits, clear bits */ |
| 70 | #define W32(_p, _m, _v) __fs_out32(&(_p)->_m, (_v)) |
| 71 | #define R32(_p, _m) __fs_in32(&(_p)->_m) |
| 72 | #define S32(_p, _m, _v) W32(_p, _m, R32(_p, _m) | (_v)) |
| 73 | #define C32(_p, _m, _v) W32(_p, _m, R32(_p, _m) & ~(_v)) |
| 74 | |
| 75 | #define W16(_p, _m, _v) __fs_out16(&(_p)->_m, (_v)) |
| 76 | #define R16(_p, _m) __fs_in16(&(_p)->_m) |
| 77 | #define S16(_p, _m, _v) W16(_p, _m, R16(_p, _m) | (_v)) |
| 78 | #define C16(_p, _m, _v) W16(_p, _m, R16(_p, _m) & ~(_v)) |
| 79 | |
| 80 | #define W8(_p, _m, _v) __fs_out8(&(_p)->_m, (_v)) |
| 81 | #define R8(_p, _m) __fs_in8(&(_p)->_m) |
| 82 | #define S8(_p, _m, _v) W8(_p, _m, R8(_p, _m) | (_v)) |
| 83 | #define C8(_p, _m, _v) W8(_p, _m, R8(_p, _m) & ~(_v)) |
| 84 | |
| 85 | #define SCC_MAX_MULTICAST_ADDRS 64 |
| 86 | |
| 87 | /* |
| 88 | * Delay to wait for SCC reset command to complete (in us) |
| 89 | */ |
| 90 | #define SCC_RESET_DELAY 50 |
| 91 | #define MAX_CR_CMD_LOOPS 10000 |
| 92 | |
| 93 | static inline int scc_cr_cmd(struct fs_enet_private *fep, u32 op) |
| 94 | { |
| 95 | cpm8xx_t *cpmp = &((immap_t *)fs_enet_immap)->im_cpm; |
| 96 | u32 v, ch; |
| 97 | int i = 0; |
| 98 | |
| 99 | ch = fep->scc.idx << 2; |
| 100 | v = mk_cr_cmd(ch, op); |
| 101 | W16(cpmp, cp_cpcr, v | CPM_CR_FLG); |
| 102 | for (i = 0; i < MAX_CR_CMD_LOOPS; i++) |
| 103 | if ((R16(cpmp, cp_cpcr) & CPM_CR_FLG) == 0) |
| 104 | break; |
| 105 | |
| 106 | if (i >= MAX_CR_CMD_LOOPS) { |
| 107 | printk(KERN_ERR "%s(): Not able to issue CPM command\n", |
| 108 | __FUNCTION__); |
| 109 | return 1; |
| 110 | } |
| 111 | return 0; |
| 112 | } |
| 113 | |
| 114 | static int do_pd_setup(struct fs_enet_private *fep) |
| 115 | { |
| 116 | struct platform_device *pdev = to_platform_device(fep->dev); |
| 117 | struct resource *r; |
| 118 | |
| 119 | /* Fill out IRQ field */ |
| 120 | fep->interrupt = platform_get_irq_byname(pdev, "interrupt"); |
| 121 | |
| 122 | r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "regs"); |
| 123 | fep->scc.sccp = (void *)r->start; |
| 124 | |
| 125 | if (fep->scc.sccp == NULL) |
| 126 | return -EINVAL; |
| 127 | |
| 128 | r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "pram"); |
| 129 | fep->scc.ep = (void *)r->start; |
| 130 | |
| 131 | if (fep->scc.ep == NULL) |
| 132 | return -EINVAL; |
| 133 | |
| 134 | return 0; |
| 135 | } |
| 136 | |
| 137 | #define SCC_NAPI_RX_EVENT_MSK (SCCE_ENET_RXF | SCCE_ENET_RXB) |
| 138 | #define SCC_RX_EVENT (SCCE_ENET_RXF) |
| 139 | #define SCC_TX_EVENT (SCCE_ENET_TXB) |
| 140 | #define SCC_ERR_EVENT_MSK (SCCE_ENET_TXE | SCCE_ENET_BSY) |
| 141 | |
| 142 | static int setup_data(struct net_device *dev) |
| 143 | { |
| 144 | struct fs_enet_private *fep = netdev_priv(dev); |
| 145 | const struct fs_platform_info *fpi = fep->fpi; |
| 146 | |
| 147 | fep->scc.idx = fs_get_scc_index(fpi->fs_no); |
| 148 | if ((unsigned int)fep->fcc.idx > 4) /* max 4 SCCs */ |
| 149 | return -EINVAL; |
| 150 | |
| 151 | do_pd_setup(fep); |
| 152 | |
| 153 | fep->scc.hthi = 0; |
| 154 | fep->scc.htlo = 0; |
| 155 | |
| 156 | fep->ev_napi_rx = SCC_NAPI_RX_EVENT_MSK; |
| 157 | fep->ev_rx = SCC_RX_EVENT; |
| 158 | fep->ev_tx = SCC_TX_EVENT; |
| 159 | fep->ev_err = SCC_ERR_EVENT_MSK; |
| 160 | |
| 161 | return 0; |
| 162 | } |
| 163 | |
| 164 | static int allocate_bd(struct net_device *dev) |
| 165 | { |
| 166 | struct fs_enet_private *fep = netdev_priv(dev); |
| 167 | const struct fs_platform_info *fpi = fep->fpi; |
| 168 | |
| 169 | fep->ring_mem_addr = cpm_dpalloc((fpi->tx_ring + fpi->rx_ring) * |
| 170 | sizeof(cbd_t), 8); |
| 171 | if (IS_DPERR(fep->ring_mem_addr)) |
| 172 | return -ENOMEM; |
| 173 | |
| 174 | fep->ring_base = cpm_dpram_addr(fep->ring_mem_addr); |
| 175 | |
| 176 | return 0; |
| 177 | } |
| 178 | |
| 179 | static void free_bd(struct net_device *dev) |
| 180 | { |
| 181 | struct fs_enet_private *fep = netdev_priv(dev); |
| 182 | |
| 183 | if (fep->ring_base) |
| 184 | cpm_dpfree(fep->ring_mem_addr); |
| 185 | } |
| 186 | |
| 187 | static void cleanup_data(struct net_device *dev) |
| 188 | { |
| 189 | /* nothing */ |
| 190 | } |
| 191 | |
| 192 | static void set_promiscuous_mode(struct net_device *dev) |
| 193 | { |
| 194 | struct fs_enet_private *fep = netdev_priv(dev); |
| 195 | scc_t *sccp = fep->scc.sccp; |
| 196 | |
| 197 | S16(sccp, scc_psmr, SCC_PSMR_PRO); |
| 198 | } |
| 199 | |
| 200 | static void set_multicast_start(struct net_device *dev) |
| 201 | { |
| 202 | struct fs_enet_private *fep = netdev_priv(dev); |
| 203 | scc_enet_t *ep = fep->scc.ep; |
| 204 | |
| 205 | W16(ep, sen_gaddr1, 0); |
| 206 | W16(ep, sen_gaddr2, 0); |
| 207 | W16(ep, sen_gaddr3, 0); |
| 208 | W16(ep, sen_gaddr4, 0); |
| 209 | } |
| 210 | |
| 211 | static void set_multicast_one(struct net_device *dev, const u8 * mac) |
| 212 | { |
| 213 | struct fs_enet_private *fep = netdev_priv(dev); |
| 214 | scc_enet_t *ep = fep->scc.ep; |
| 215 | u16 taddrh, taddrm, taddrl; |
| 216 | |
| 217 | taddrh = ((u16) mac[5] << 8) | mac[4]; |
| 218 | taddrm = ((u16) mac[3] << 8) | mac[2]; |
| 219 | taddrl = ((u16) mac[1] << 8) | mac[0]; |
| 220 | |
| 221 | W16(ep, sen_taddrh, taddrh); |
| 222 | W16(ep, sen_taddrm, taddrm); |
| 223 | W16(ep, sen_taddrl, taddrl); |
| 224 | scc_cr_cmd(fep, CPM_CR_SET_GADDR); |
| 225 | } |
| 226 | |
| 227 | static void set_multicast_finish(struct net_device *dev) |
| 228 | { |
| 229 | struct fs_enet_private *fep = netdev_priv(dev); |
| 230 | scc_t *sccp = fep->scc.sccp; |
| 231 | scc_enet_t *ep = fep->scc.ep; |
| 232 | |
| 233 | /* clear promiscuous always */ |
| 234 | C16(sccp, scc_psmr, SCC_PSMR_PRO); |
| 235 | |
| 236 | /* if all multi or too many multicasts; just enable all */ |
| 237 | if ((dev->flags & IFF_ALLMULTI) != 0 || |
| 238 | dev->mc_count > SCC_MAX_MULTICAST_ADDRS) { |
| 239 | |
| 240 | W16(ep, sen_gaddr1, 0xffff); |
| 241 | W16(ep, sen_gaddr2, 0xffff); |
| 242 | W16(ep, sen_gaddr3, 0xffff); |
| 243 | W16(ep, sen_gaddr4, 0xffff); |
| 244 | } |
| 245 | } |
| 246 | |
| 247 | static void set_multicast_list(struct net_device *dev) |
| 248 | { |
| 249 | struct dev_mc_list *pmc; |
| 250 | |
| 251 | if ((dev->flags & IFF_PROMISC) == 0) { |
| 252 | set_multicast_start(dev); |
| 253 | for (pmc = dev->mc_list; pmc != NULL; pmc = pmc->next) |
| 254 | set_multicast_one(dev, pmc->dmi_addr); |
| 255 | set_multicast_finish(dev); |
| 256 | } else |
| 257 | set_promiscuous_mode(dev); |
| 258 | } |
| 259 | |
| 260 | /* |
| 261 | * This function is called to start or restart the FEC during a link |
| 262 | * change. This only happens when switching between half and full |
| 263 | * duplex. |
| 264 | */ |
| 265 | static void restart(struct net_device *dev) |
| 266 | { |
| 267 | struct fs_enet_private *fep = netdev_priv(dev); |
| 268 | scc_t *sccp = fep->scc.sccp; |
| 269 | scc_enet_t *ep = fep->scc.ep; |
| 270 | const struct fs_platform_info *fpi = fep->fpi; |
| 271 | u16 paddrh, paddrm, paddrl; |
| 272 | const unsigned char *mac; |
| 273 | int i; |
| 274 | |
| 275 | C32(sccp, scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT); |
| 276 | |
| 277 | /* clear everything (slow & steady does it) */ |
| 278 | for (i = 0; i < sizeof(*ep); i++) |
| 279 | __fs_out8((char *)ep + i, 0); |
| 280 | |
| 281 | /* point to bds */ |
| 282 | W16(ep, sen_genscc.scc_rbase, fep->ring_mem_addr); |
| 283 | W16(ep, sen_genscc.scc_tbase, |
| 284 | fep->ring_mem_addr + sizeof(cbd_t) * fpi->rx_ring); |
| 285 | |
| 286 | /* Initialize function code registers for big-endian. |
| 287 | */ |
| 288 | W8(ep, sen_genscc.scc_rfcr, SCC_EB); |
| 289 | W8(ep, sen_genscc.scc_tfcr, SCC_EB); |
| 290 | |
| 291 | /* Set maximum bytes per receive buffer. |
| 292 | * This appears to be an Ethernet frame size, not the buffer |
| 293 | * fragment size. It must be a multiple of four. |
| 294 | */ |
| 295 | W16(ep, sen_genscc.scc_mrblr, 0x5f0); |
| 296 | |
| 297 | /* Set CRC preset and mask. |
| 298 | */ |
| 299 | W32(ep, sen_cpres, 0xffffffff); |
| 300 | W32(ep, sen_cmask, 0xdebb20e3); |
| 301 | |
| 302 | W32(ep, sen_crcec, 0); /* CRC Error counter */ |
| 303 | W32(ep, sen_alec, 0); /* alignment error counter */ |
| 304 | W32(ep, sen_disfc, 0); /* discard frame counter */ |
| 305 | |
| 306 | W16(ep, sen_pads, 0x8888); /* Tx short frame pad character */ |
| 307 | W16(ep, sen_retlim, 15); /* Retry limit threshold */ |
| 308 | |
| 309 | W16(ep, sen_maxflr, 0x5ee); /* maximum frame length register */ |
| 310 | |
| 311 | W16(ep, sen_minflr, PKT_MINBUF_SIZE); /* minimum frame length register */ |
| 312 | |
| 313 | W16(ep, sen_maxd1, 0x000005f0); /* maximum DMA1 length */ |
| 314 | W16(ep, sen_maxd2, 0x000005f0); /* maximum DMA2 length */ |
| 315 | |
| 316 | /* Clear hash tables. |
| 317 | */ |
| 318 | W16(ep, sen_gaddr1, 0); |
| 319 | W16(ep, sen_gaddr2, 0); |
| 320 | W16(ep, sen_gaddr3, 0); |
| 321 | W16(ep, sen_gaddr4, 0); |
| 322 | W16(ep, sen_iaddr1, 0); |
| 323 | W16(ep, sen_iaddr2, 0); |
| 324 | W16(ep, sen_iaddr3, 0); |
| 325 | W16(ep, sen_iaddr4, 0); |
| 326 | |
| 327 | /* set address |
| 328 | */ |
| 329 | mac = dev->dev_addr; |
| 330 | paddrh = ((u16) mac[5] << 8) | mac[4]; |
| 331 | paddrm = ((u16) mac[3] << 8) | mac[2]; |
| 332 | paddrl = ((u16) mac[1] << 8) | mac[0]; |
| 333 | |
| 334 | W16(ep, sen_paddrh, paddrh); |
| 335 | W16(ep, sen_paddrm, paddrm); |
| 336 | W16(ep, sen_paddrl, paddrl); |
| 337 | |
| 338 | W16(ep, sen_pper, 0); |
| 339 | W16(ep, sen_taddrl, 0); |
| 340 | W16(ep, sen_taddrm, 0); |
| 341 | W16(ep, sen_taddrh, 0); |
| 342 | |
| 343 | fs_init_bds(dev); |
| 344 | |
| 345 | scc_cr_cmd(fep, CPM_CR_INIT_TRX); |
| 346 | |
| 347 | W16(sccp, scc_scce, 0xffff); |
| 348 | |
| 349 | /* Enable interrupts we wish to service. |
| 350 | */ |
| 351 | W16(sccp, scc_sccm, SCCE_ENET_TXE | SCCE_ENET_RXF | SCCE_ENET_TXB); |
| 352 | |
| 353 | /* Set GSMR_H to enable all normal operating modes. |
| 354 | * Set GSMR_L to enable Ethernet to MC68160. |
| 355 | */ |
| 356 | W32(sccp, scc_gsmrh, 0); |
| 357 | W32(sccp, scc_gsmrl, |
| 358 | SCC_GSMRL_TCI | SCC_GSMRL_TPL_48 | SCC_GSMRL_TPP_10 | |
| 359 | SCC_GSMRL_MODE_ENET); |
| 360 | |
| 361 | /* Set sync/delimiters. |
| 362 | */ |
| 363 | W16(sccp, scc_dsr, 0xd555); |
| 364 | |
| 365 | /* Set processing mode. Use Ethernet CRC, catch broadcast, and |
| 366 | * start frame search 22 bit times after RENA. |
| 367 | */ |
| 368 | W16(sccp, scc_psmr, SCC_PSMR_ENCRC | SCC_PSMR_NIB22); |
| 369 | |
| 370 | /* Set full duplex mode if needed */ |
| 371 | if (fep->duplex) |
| 372 | S16(sccp, scc_psmr, SCC_PSMR_LPB | SCC_PSMR_FDE); |
| 373 | |
| 374 | S32(sccp, scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT); |
| 375 | } |
| 376 | |
| 377 | static void stop(struct net_device *dev) |
| 378 | { |
| 379 | struct fs_enet_private *fep = netdev_priv(dev); |
| 380 | scc_t *sccp = fep->scc.sccp; |
| 381 | int i; |
| 382 | |
| 383 | for (i = 0; (R16(sccp, scc_sccm) == 0) && i < SCC_RESET_DELAY; i++) |
| 384 | udelay(1); |
| 385 | |
| 386 | if (i == SCC_RESET_DELAY) |
| 387 | printk(KERN_WARNING DRV_MODULE_NAME |
| 388 | ": %s SCC timeout on graceful transmit stop\n", |
| 389 | dev->name); |
| 390 | |
| 391 | W16(sccp, scc_sccm, 0); |
| 392 | C32(sccp, scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT); |
| 393 | |
| 394 | fs_cleanup_bds(dev); |
| 395 | } |
| 396 | |
| 397 | static void pre_request_irq(struct net_device *dev, int irq) |
| 398 | { |
| 399 | immap_t *immap = fs_enet_immap; |
| 400 | u32 siel; |
| 401 | |
| 402 | /* SIU interrupt */ |
| 403 | if (irq >= SIU_IRQ0 && irq < SIU_LEVEL7) { |
| 404 | |
| 405 | siel = in_be32(&immap->im_siu_conf.sc_siel); |
| 406 | if ((irq & 1) == 0) |
| 407 | siel |= (0x80000000 >> irq); |
| 408 | else |
| 409 | siel &= ~(0x80000000 >> (irq & ~1)); |
| 410 | out_be32(&immap->im_siu_conf.sc_siel, siel); |
| 411 | } |
| 412 | } |
| 413 | |
| 414 | static void post_free_irq(struct net_device *dev, int irq) |
| 415 | { |
| 416 | /* nothing */ |
| 417 | } |
| 418 | |
| 419 | static void napi_clear_rx_event(struct net_device *dev) |
| 420 | { |
| 421 | struct fs_enet_private *fep = netdev_priv(dev); |
| 422 | scc_t *sccp = fep->scc.sccp; |
| 423 | |
| 424 | W16(sccp, scc_scce, SCC_NAPI_RX_EVENT_MSK); |
| 425 | } |
| 426 | |
| 427 | static void napi_enable_rx(struct net_device *dev) |
| 428 | { |
| 429 | struct fs_enet_private *fep = netdev_priv(dev); |
| 430 | scc_t *sccp = fep->scc.sccp; |
| 431 | |
| 432 | S16(sccp, scc_sccm, SCC_NAPI_RX_EVENT_MSK); |
| 433 | } |
| 434 | |
| 435 | static void napi_disable_rx(struct net_device *dev) |
| 436 | { |
| 437 | struct fs_enet_private *fep = netdev_priv(dev); |
| 438 | scc_t *sccp = fep->scc.sccp; |
| 439 | |
| 440 | C16(sccp, scc_sccm, SCC_NAPI_RX_EVENT_MSK); |
| 441 | } |
| 442 | |
| 443 | static void rx_bd_done(struct net_device *dev) |
| 444 | { |
| 445 | /* nothing */ |
| 446 | } |
| 447 | |
| 448 | static void tx_kickstart(struct net_device *dev) |
| 449 | { |
| 450 | /* nothing */ |
| 451 | } |
| 452 | |
| 453 | static u32 get_int_events(struct net_device *dev) |
| 454 | { |
| 455 | struct fs_enet_private *fep = netdev_priv(dev); |
| 456 | scc_t *sccp = fep->scc.sccp; |
| 457 | |
| 458 | return (u32) R16(sccp, scc_scce); |
| 459 | } |
| 460 | |
| 461 | static void clear_int_events(struct net_device *dev, u32 int_events) |
| 462 | { |
| 463 | struct fs_enet_private *fep = netdev_priv(dev); |
| 464 | scc_t *sccp = fep->scc.sccp; |
| 465 | |
| 466 | W16(sccp, scc_scce, int_events & 0xffff); |
| 467 | } |
| 468 | |
| 469 | static void ev_error(struct net_device *dev, u32 int_events) |
| 470 | { |
| 471 | printk(KERN_WARNING DRV_MODULE_NAME |
| 472 | ": %s SCC ERROR(s) 0x%x\n", dev->name, int_events); |
| 473 | } |
| 474 | |
| 475 | static int get_regs(struct net_device *dev, void *p, int *sizep) |
| 476 | { |
| 477 | struct fs_enet_private *fep = netdev_priv(dev); |
| 478 | |
| 479 | if (*sizep < sizeof(scc_t) + sizeof(scc_enet_t)) |
| 480 | return -EINVAL; |
| 481 | |
| 482 | memcpy_fromio(p, fep->scc.sccp, sizeof(scc_t)); |
| 483 | p = (char *)p + sizeof(scc_t); |
| 484 | |
| 485 | memcpy_fromio(p, fep->scc.ep, sizeof(scc_enet_t)); |
| 486 | |
| 487 | return 0; |
| 488 | } |
| 489 | |
| 490 | static int get_regs_len(struct net_device *dev) |
| 491 | { |
| 492 | return sizeof(scc_t) + sizeof(scc_enet_t); |
| 493 | } |
| 494 | |
| 495 | static void tx_restart(struct net_device *dev) |
| 496 | { |
| 497 | struct fs_enet_private *fep = netdev_priv(dev); |
| 498 | |
| 499 | scc_cr_cmd(fep, CPM_CR_RESTART_TX); |
| 500 | } |
| 501 | |
| 502 | /*************************************************************************/ |
| 503 | |
| 504 | const struct fs_ops fs_scc_ops = { |
| 505 | .setup_data = setup_data, |
| 506 | .cleanup_data = cleanup_data, |
| 507 | .set_multicast_list = set_multicast_list, |
| 508 | .restart = restart, |
| 509 | .stop = stop, |
| 510 | .pre_request_irq = pre_request_irq, |
| 511 | .post_free_irq = post_free_irq, |
| 512 | .napi_clear_rx_event = napi_clear_rx_event, |
| 513 | .napi_enable_rx = napi_enable_rx, |
| 514 | .napi_disable_rx = napi_disable_rx, |
| 515 | .rx_bd_done = rx_bd_done, |
| 516 | .tx_kickstart = tx_kickstart, |
| 517 | .get_int_events = get_int_events, |
| 518 | .clear_int_events = clear_int_events, |
| 519 | .ev_error = ev_error, |
| 520 | .get_regs = get_regs, |
| 521 | .get_regs_len = get_regs_len, |
| 522 | .tx_restart = tx_restart, |
| 523 | .allocate_bd = allocate_bd, |
| 524 | .free_bd = free_bd, |
| 525 | }; |