blob: b8265c1ea0d33fc5857f237fbadc433fbc298187 [file] [log] [blame]
Andi Kleendfa46982006-09-26 10:52:30 +02001/* Various workarounds for chipset bugs.
2 This code runs very early and can't use the regular PCI subsystem
3 The entries are keyed to PCI bridges which usually identify chipsets
4 uniquely.
5 This is only for whole classes of chipsets with specific problems which
6 need early invasive action (e.g. before the timers are initialized).
7 Most PCI device specific workarounds can be done later and should be
8 in standard PCI quirks
9 Mainboard specific bugs should be handled by DMI entries.
10 CPU specific bugs in setup.c */
11
12#include <linux/pci.h>
13#include <linux/acpi.h>
14#include <linux/pci_ids.h>
15#include <asm/pci-direct.h>
Andi Kleendfa46982006-09-26 10:52:30 +020016#include <asm/dma.h>
Andi Kleen54ef3402007-10-19 20:35:03 +020017#include <asm/io_apic.h>
18#include <asm/apic.h>
19
Joerg Roedel966396d2007-10-24 12:49:48 +020020#ifdef CONFIG_GART_IOMMU
Joerg Roedel395624f2007-10-24 12:49:47 +020021#include <asm/gart.h>
Andi Kleen54ef3402007-10-19 20:35:03 +020022#endif
Andi Kleendfa46982006-09-26 10:52:30 +020023
Sam Ravnborg43999d92007-03-16 21:07:36 +010024static void __init via_bugs(void)
Andi Kleendfa46982006-09-26 10:52:30 +020025{
Joerg Roedel966396d2007-10-24 12:49:48 +020026#ifdef CONFIG_GART_IOMMU
Andi Kleendfa46982006-09-26 10:52:30 +020027 if ((end_pfn > MAX_DMA32_PFN || force_iommu) &&
28 !iommu_aperture_allowed) {
29 printk(KERN_INFO
Andi Kleen54ef3402007-10-19 20:35:03 +020030 "Looks like a VIA chipset. Disabling IOMMU."
31 " Override with iommu=allowed\n");
Andi Kleendfa46982006-09-26 10:52:30 +020032 iommu_aperture_disabled = 1;
33 }
34#endif
35}
36
37#ifdef CONFIG_ACPI
Jeff Garzik03d0d202007-10-27 20:57:43 +020038#ifdef CONFIG_X86_IO_APIC
Andi Kleendfa46982006-09-26 10:52:30 +020039
Alexey Starikovskiy15a58ed2007-02-02 19:48:22 +030040static int __init nvidia_hpet_check(struct acpi_table_header *header)
Andi Kleendfa46982006-09-26 10:52:30 +020041{
Andi Kleendfa46982006-09-26 10:52:30 +020042 return 0;
43}
Jeff Garzik03d0d202007-10-27 20:57:43 +020044#endif /* CONFIG_X86_IO_APIC */
45#endif /* CONFIG_ACPI */
Andi Kleendfa46982006-09-26 10:52:30 +020046
Sam Ravnborg43999d92007-03-16 21:07:36 +010047static void __init nvidia_bugs(void)
Andi Kleendfa46982006-09-26 10:52:30 +020048{
49#ifdef CONFIG_ACPI
Andi Kleen54ef3402007-10-19 20:35:03 +020050#ifdef CONFIG_X86_IO_APIC
Andi Kleendfa46982006-09-26 10:52:30 +020051 /*
52 * All timer overrides on Nvidia are
53 * wrong unless HPET is enabled.
Andi Kleenfa18f472006-11-14 16:57:46 +010054 * Unfortunately that's not true on many Asus boards.
55 * We don't know yet how to detect this automatically, but
56 * at least allow a command line override.
Andi Kleendfa46982006-09-26 10:52:30 +020057 */
Andi Kleenfa18f472006-11-14 16:57:46 +010058 if (acpi_use_timer_override)
59 return;
60
Len Brownfe699332007-03-08 18:28:32 -050061 if (acpi_table_parse(ACPI_SIG_HPET, nvidia_hpet_check)) {
Andi Kleendfa46982006-09-26 10:52:30 +020062 acpi_skip_timer_override = 1;
63 printk(KERN_INFO "Nvidia board "
64 "detected. Ignoring ACPI "
65 "timer override.\n");
Andi Kleenfa18f472006-11-14 16:57:46 +010066 printk(KERN_INFO "If you got timer trouble "
67 "try acpi_use_timer_override\n");
Andi Kleendfa46982006-09-26 10:52:30 +020068 }
69#endif
Andi Kleen54ef3402007-10-19 20:35:03 +020070#endif
Andi Kleendfa46982006-09-26 10:52:30 +020071 /* RED-PEN skip them on mptables too? */
72
73}
74
Sam Ravnborg43999d92007-03-16 21:07:36 +010075static void __init ati_bugs(void)
Andi Kleendfa46982006-09-26 10:52:30 +020076{
Andi Kleen54ef3402007-10-19 20:35:03 +020077#ifdef CONFIG_X86_IO_APIC
Linus Torvaldsfea5f1e2007-01-08 15:04:46 -080078 if (timer_over_8254 == 1) {
79 timer_over_8254 = 0;
80 printk(KERN_INFO
Andi Kleen54ef3402007-10-19 20:35:03 +020081 "ATI board detected. Disabling timer routing over 8254.\n");
Linus Torvaldsfea5f1e2007-01-08 15:04:46 -080082 }
Andi Kleen54ef3402007-10-19 20:35:03 +020083#endif
Andi Kleendfa46982006-09-26 10:52:30 +020084}
85
86struct chipset {
87 u16 vendor;
88 void (*f)(void);
89};
90
Andrew Mortonc993c732007-04-08 16:04:03 -070091static struct chipset early_qrk[] __initdata = {
Andi Kleendfa46982006-09-26 10:52:30 +020092 { PCI_VENDOR_ID_NVIDIA, nvidia_bugs },
93 { PCI_VENDOR_ID_VIA, via_bugs },
94 { PCI_VENDOR_ID_ATI, ati_bugs },
95 {}
96};
97
98void __init early_quirks(void)
99{
100 int num, slot, func;
Andi Kleen0637a702006-09-26 10:52:41 +0200101
102 if (!early_pci_allowed())
103 return;
104
Andi Kleendfa46982006-09-26 10:52:30 +0200105 /* Poor man's PCI discovery */
106 for (num = 0; num < 32; num++) {
107 for (slot = 0; slot < 32; slot++) {
108 for (func = 0; func < 8; func++) {
109 u32 class;
110 u32 vendor;
111 u8 type;
112 int i;
113 class = read_pci_config(num,slot,func,
114 PCI_CLASS_REVISION);
115 if (class == 0xffffffff)
116 break;
117
Andi Kleen54ef3402007-10-19 20:35:03 +0200118 if ((class >> 16) != PCI_CLASS_BRIDGE_PCI)
Andi Kleendfa46982006-09-26 10:52:30 +0200119 continue;
120
121 vendor = read_pci_config(num, slot, func,
122 PCI_VENDOR_ID);
123 vendor &= 0xffff;
124
125 for (i = 0; early_qrk[i].f; i++)
126 if (early_qrk[i].vendor == vendor) {
127 early_qrk[i].f();
128 return;
129 }
130
131 type = read_pci_config_byte(num, slot, func,
132 PCI_HEADER_TYPE);
133 if (!(type & 0x80))
134 break;
135 }
136 }
137 }
138}