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Greg Kroah-Hartmanb2441312017-11-01 15:07:57 +01001/* SPDX-License-Identifier: GPL-2.0 */
Catalin Marinas8c2c3df2012-04-20 14:45:54 +01002/*
3 * ld script to make ARM Linux kernel
4 * taken from the i386 version by Russell King
5 * Written by Martin Mares <mj@atrey.karlin.mff.cuni.cz>
6 */
7
Kees Cook19f6bc32019-10-29 14:13:40 -07008#define RO_EXCEPTION_TABLE_ALIGN 8
9
Catalin Marinas8c2c3df2012-04-20 14:45:54 +010010#include <asm-generic/vmlinux.lds.h>
Ard Biesheuvel98fb7542015-12-01 13:20:40 +010011#include <asm/cache.h>
Suzuki K. Poulose87d15872015-10-19 14:19:27 +010012#include <asm/kernel-pgtable.h>
Catalin Marinas8c2c3df2012-04-20 14:45:54 +010013#include <asm/thread_info.h>
14#include <asm/memory.h>
15#include <asm/page.h>
Laura Abbottda141702015-01-21 17:36:06 -080016#include <asm/pgtable.h>
Catalin Marinas8c2c3df2012-04-20 14:45:54 +010017
Mark Rutlanda2c1d732014-06-24 16:51:36 +010018#include "image.h"
19
Will Deacon07c802b2014-11-25 15:26:13 +000020/* .exit.text needed in case of alternative patching */
21#define ARM_EXIT_KEEP(x) x
22#define ARM_EXIT_DISCARD(x)
Catalin Marinas8c2c3df2012-04-20 14:45:54 +010023
24OUTPUT_ARCH(aarch64)
Geoff Levandaf885f42014-05-16 18:26:01 +010025ENTRY(_text)
Catalin Marinas8c2c3df2012-04-20 14:45:54 +010026
27jiffies = jiffies_64;
28
Marc Zyngier2240bbb2012-12-07 18:40:43 +000029#define HYPERVISOR_TEXT \
30 /* \
Ard Biesheuvel06f75a12015-03-19 16:42:26 +000031 * Align to 4 KB so that \
32 * a) the HYP vector table is at its minimum \
33 * alignment of 2048 bytes \
34 * b) the HYP init code will not cross a page \
35 * boundary if its size does not exceed \
36 * 4 KB (see related ASSERT() below) \
Marc Zyngier2240bbb2012-12-07 18:40:43 +000037 */ \
Ard Biesheuvel06f75a12015-03-19 16:42:26 +000038 . = ALIGN(SZ_4K); \
Masahiro Yamada5c636aa2018-05-09 16:46:26 +090039 __hyp_idmap_text_start = .; \
Marc Zyngier2240bbb2012-12-07 18:40:43 +000040 *(.hyp.idmap.text) \
Masahiro Yamada5c636aa2018-05-09 16:46:26 +090041 __hyp_idmap_text_end = .; \
42 __hyp_text_start = .; \
Marc Zyngier2240bbb2012-12-07 18:40:43 +000043 *(.hyp.text) \
Masahiro Yamada5c636aa2018-05-09 16:46:26 +090044 __hyp_text_end = .;
Marc Zyngier2240bbb2012-12-07 18:40:43 +000045
Ard Biesheuvel5dfe9d72015-06-01 13:40:33 +020046#define IDMAP_TEXT \
47 . = ALIGN(SZ_4K); \
Masahiro Yamada5c636aa2018-05-09 16:46:26 +090048 __idmap_text_start = .; \
Ard Biesheuvel5dfe9d72015-06-01 13:40:33 +020049 *(.idmap.text) \
Masahiro Yamada5c636aa2018-05-09 16:46:26 +090050 __idmap_text_end = .;
Ard Biesheuvel5dfe9d72015-06-01 13:40:33 +020051
James Morse82869ac2016-04-27 17:47:12 +010052#ifdef CONFIG_HIBERNATION
53#define HIBERNATE_TEXT \
54 . = ALIGN(SZ_4K); \
Masahiro Yamada5c636aa2018-05-09 16:46:26 +090055 __hibernate_exit_text_start = .; \
James Morse82869ac2016-04-27 17:47:12 +010056 *(.hibernate_exit.text) \
Masahiro Yamada5c636aa2018-05-09 16:46:26 +090057 __hibernate_exit_text_end = .;
James Morse82869ac2016-04-27 17:47:12 +010058#else
59#define HIBERNATE_TEXT
60#endif
61
Will Deaconc7b9ada2017-11-14 14:07:40 +000062#ifdef CONFIG_UNMAP_KERNEL_AT_EL0
63#define TRAMP_TEXT \
64 . = ALIGN(PAGE_SIZE); \
Masahiro Yamada5c636aa2018-05-09 16:46:26 +090065 __entry_tramp_text_start = .; \
Will Deaconc7b9ada2017-11-14 14:07:40 +000066 *(.entry.tramp.text) \
67 . = ALIGN(PAGE_SIZE); \
Masahiro Yamada5c636aa2018-05-09 16:46:26 +090068 __entry_tramp_text_end = .;
Will Deaconc7b9ada2017-11-14 14:07:40 +000069#else
70#define TRAMP_TEXT
71#endif
72
Ard Biesheuvela352ea32014-10-10 18:42:55 +020073/*
74 * The size of the PE/COFF section that covers the kernel image, which
75 * runs from stext to _edata, must be a round multiple of the PE/COFF
76 * FileAlignment, which we set to its minimum value of 0x200. 'stext'
77 * itself is 4 KB aligned, so padding out _edata to a 0x200 aligned
78 * boundary should be sufficient.
79 */
80PECOFF_FILE_ALIGNMENT = 0x200;
81
82#ifdef CONFIG_EFI
83#define PECOFF_EDATA_PADDING \
84 .pecoff_edata_padding : { BYTE(0); . = ALIGN(PECOFF_FILE_ALIGNMENT); }
85#else
86#define PECOFF_EDATA_PADDING
87#endif
88
Catalin Marinas8c2c3df2012-04-20 14:45:54 +010089SECTIONS
90{
91 /*
92 * XXX: The linker does not define how output sections are
93 * assigned to input sections when there are multiple statements
94 * matching the same input section name. There is no documented
95 * order of matching.
96 */
97 /DISCARD/ : {
98 ARM_EXIT_DISCARD(EXIT_TEXT)
99 ARM_EXIT_DISCARD(EXIT_DATA)
100 EXIT_CALL
101 *(.discard)
102 *(.discard.*)
Ard Biesheuvel1e48ef72016-01-26 09:13:44 +0100103 *(.interp .dynamic)
Ard Biesheuvel3bbd3db2018-12-03 20:58:05 +0100104 *(.dynsym .dynstr .hash .gnu.hash)
105 *(.eh_frame)
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100106 }
107
Ard Biesheuvelab893fb2016-02-16 13:52:36 +0100108 . = KIMAGE_VADDR + TEXT_OFFSET;
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100109
110 .head.text : {
111 _text = .;
112 HEAD_TEXT
113 }
114 .text : { /* Real text segment */
115 _stext = .; /* Text and read-only data */
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100116 IRQENTRY_TEXT
Alexander Potapenkobe7635e2016-03-25 14:22:05 -0700117 SOFTIRQENTRY_TEXT
Pratyush Anand888b3c82016-07-08 12:35:50 -0400118 ENTRY_TEXT
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100119 TEXT_TEXT
120 SCHED_TEXT
Chris Metcalf6727ad92016-10-07 17:02:55 -0700121 CPUIDLE_TEXT
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100122 LOCK_TEXT
Sandeepa Prabhu2dd0e8d2016-07-08 12:35:48 -0400123 KPROBES_TEXT
Marc Zyngier2240bbb2012-12-07 18:40:43 +0000124 HYPERVISOR_TEXT
Ard Biesheuvel5dfe9d72015-06-01 13:40:33 +0200125 IDMAP_TEXT
James Morse82869ac2016-04-27 17:47:12 +0100126 HIBERNATE_TEXT
Will Deaconc7b9ada2017-11-14 14:07:40 +0000127 TRAMP_TEXT
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100128 *(.fixup)
129 *(.gnu.warning)
130 . = ALIGN(16);
131 *(.got) /* Global offset table */
132 }
133
Ard Biesheuvel97740052016-03-30 17:43:09 +0200134 . = ALIGN(SEGMENT_ALIGN);
Ard Biesheuvel9fdc14c52016-06-23 15:53:17 +0200135 _etext = .; /* End of text section */
136
Kees Cook19f6bc32019-10-29 14:13:40 -0700137 /* everything from this point to __init_begin will be marked RO NX */
138 RO_DATA(PAGE_SIZE)
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100139
Jun Yao8eb7e282018-09-24 17:56:18 +0100140 idmap_pg_dir = .;
141 . += IDMAP_DIR_SIZE;
142
143#ifdef CONFIG_UNMAP_KERNEL_AT_EL0
144 tramp_pg_dir = .;
145 . += PAGE_SIZE;
146#endif
147
148#ifdef CONFIG_ARM64_SW_TTBR0_PAN
149 reserved_ttbr0 = .;
150 . += RESERVED_TTBR0_SIZE;
151#endif
152 swapper_pg_dir = .;
153 . += PAGE_SIZE;
154 swapper_pg_end = .;
155
Ard Biesheuvel97740052016-03-30 17:43:09 +0200156 . = ALIGN(SEGMENT_ALIGN);
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100157 __init_begin = .;
Ard Biesheuvel2ebe088b2017-03-09 21:52:03 +0100158 __inittext_begin = .;
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100159
160 INIT_TEXT_SECTION(8)
Mark Rutlandca2ef4f2019-12-02 16:11:07 +0000161
162 __exittext_begin = .;
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100163 .exit.text : {
164 ARM_EXIT_KEEP(EXIT_TEXT)
165 }
Mark Rutlandca2ef4f2019-12-02 16:11:07 +0000166 __exittext_end = .;
Laura Abbottda141702015-01-21 17:36:06 -0800167
Ard Biesheuvel2ebe088b2017-03-09 21:52:03 +0100168 . = ALIGN(4);
169 .altinstructions : {
170 __alt_instructions = .;
171 *(.altinstructions)
172 __alt_instructions_end = .;
173 }
174 .altinstr_replacement : {
175 *(.altinstr_replacement)
176 }
177
178 . = ALIGN(PAGE_SIZE);
179 __inittext_end = .;
180 __initdata_begin = .;
181
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100182 .init.data : {
183 INIT_DATA
184 INIT_SETUP(16)
185 INIT_CALLS
186 CON_INITCALL
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100187 INIT_RAM_FS
Ard Biesheuvel1ce99bf2016-02-17 12:35:58 +0000188 *(.init.rodata.* .init.bss) /* from the EFI stub */
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100189 }
190 .exit.data : {
191 ARM_EXIT_KEEP(EXIT_DATA)
192 }
193
Ard Biesheuvel98fb7542015-12-01 13:20:40 +0100194 PERCPU_SECTION(L1_CACHE_BYTES)
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100195
Ard Biesheuvel3bbd3db2018-12-03 20:58:05 +0100196 .rela.dyn : ALIGN(8) {
Ard Biesheuvel1e48ef72016-01-26 09:13:44 +0100197 *(.rela .rela*)
Ard Biesheuvel1e48ef72016-01-26 09:13:44 +0100198 }
Andre Przywarae039ee42014-11-14 15:54:08 +0000199
Ard Biesheuvel3bbd3db2018-12-03 20:58:05 +0100200 __rela_offset = ABSOLUTE(ADDR(.rela.dyn) - KIMAGE_VADDR);
201 __rela_size = SIZEOF(.rela.dyn);
Ard Biesheuvel0cd3def2016-04-18 17:09:43 +0200202
Peter Collingbourne5cf896f2019-07-31 18:18:42 -0700203#ifdef CONFIG_RELR
204 .relr.dyn : ALIGN(8) {
205 *(.relr.dyn)
206 }
207
208 __relr_offset = ABSOLUTE(ADDR(.relr.dyn) - KIMAGE_VADDR);
209 __relr_size = SIZEOF(.relr.dyn);
210#endif
211
Ard Biesheuvel97740052016-03-30 17:43:09 +0200212 . = ALIGN(SEGMENT_ALIGN);
Ard Biesheuvel2ebe088b2017-03-09 21:52:03 +0100213 __initdata_end = .;
Mark Rutland9aa4ec152015-12-09 12:44:38 +0000214 __init_end = .;
215
Mark Salter3c620622013-11-04 16:38:47 +0000216 _data = .;
Mark Salter3c620622013-11-04 16:38:47 +0000217 _sdata = .;
Kees Cookc9174042019-10-29 14:13:35 -0700218 RW_DATA(L1_CACHE_BYTES, PAGE_SIZE, THREAD_ALIGN)
James Morseb6113032016-08-24 18:27:29 +0100219
220 /*
221 * Data written with the MMU off but read with the MMU on requires
222 * cache lines to be invalidated, discarding up to a Cache Writeback
223 * Granule (CWG) of data from the cache. Keep the section that
224 * requires this type of maintenance to be in its own Cache Writeback
225 * Granule (CWG) area so the cache maintenance operations don't
226 * interfere with adjacent data.
227 */
228 .mmuoff.data.write : ALIGN(SZ_2K) {
229 __mmuoff_data_start = .;
230 *(.mmuoff.data.write)
231 }
232 . = ALIGN(SZ_2K);
233 .mmuoff.data.read : {
234 *(.mmuoff.data.read)
235 __mmuoff_data_end = .;
236 }
237
Ard Biesheuvela352ea32014-10-10 18:42:55 +0200238 PECOFF_EDATA_PADDING
Ard Biesheuvelcad27ef2017-03-23 19:00:51 +0000239 __pecoff_data_rawsize = ABSOLUTE(. - __initdata_begin);
Mark Salter3c620622013-11-04 16:38:47 +0000240 _edata = .;
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100241
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100242 BSS_SECTION(0, 0, 0)
Mark Rutlandbd00cd5f2014-06-24 16:51:35 +0100243
244 . = ALIGN(PAGE_SIZE);
Jun Yao2b5548b2018-09-24 15:47:49 +0100245 init_pg_dir = .;
246 . += INIT_DIR_SIZE;
247 init_pg_end = .;
248
Ard Biesheuvelcad27ef2017-03-23 19:00:51 +0000249 __pecoff_data_size = ABSOLUTE(. - __initdata_begin);
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100250 _end = .;
251
252 STABS_DEBUG
Mark Rutlanda2c1d732014-06-24 16:51:36 +0100253
254 HEAD_SYMBOLS
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100255}
Marc Zyngier2240bbb2012-12-07 18:40:43 +0000256
Kees Cook90776dd2019-08-13 16:04:50 -0700257#include "image-vars.h"
258
Marc Zyngier2240bbb2012-12-07 18:40:43 +0000259/*
Ard Biesheuvel5dfe9d72015-06-01 13:40:33 +0200260 * The HYP init code and ID map text can't be longer than a page each,
Ard Biesheuvel06f75a12015-03-19 16:42:26 +0000261 * and should not cross a page boundary.
Marc Zyngier2240bbb2012-12-07 18:40:43 +0000262 */
Ard Biesheuvel06f75a12015-03-19 16:42:26 +0000263ASSERT(__hyp_idmap_text_end - (__hyp_idmap_text_start & ~(SZ_4K - 1)) <= SZ_4K,
264 "HYP init code too big or misaligned")
Ard Biesheuvel5dfe9d72015-06-01 13:40:33 +0200265ASSERT(__idmap_text_end - (__idmap_text_start & ~(SZ_4K - 1)) <= SZ_4K,
266 "ID map text too big or misaligned")
James Morse82869ac2016-04-27 17:47:12 +0100267#ifdef CONFIG_HIBERNATION
268ASSERT(__hibernate_exit_text_end - (__hibernate_exit_text_start & ~(SZ_4K - 1))
269 <= SZ_4K, "Hibernate exit text too big or misaligned")
270#endif
Will Deacon6c27c402017-12-06 11:24:02 +0000271#ifdef CONFIG_UNMAP_KERNEL_AT_EL0
272ASSERT((__entry_tramp_text_end - __entry_tramp_text_start) == PAGE_SIZE,
273 "Entry trampoline text too big")
274#endif
Mark Rutlandda57a362014-06-24 16:51:37 +0100275/*
276 * If padding is applied before .head.text, virt<->phys conversions will fail.
277 */
Ard Biesheuvelab893fb2016-02-16 13:52:36 +0100278ASSERT(_text == (KIMAGE_VADDR + TEXT_OFFSET), "HEAD is misaligned")