Thomas Gleixner | d2912cb | 2019-06-04 10:11:33 +0200 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0-only |
Quentin Schulz | 0e34d5d | 2017-04-04 08:34:41 +0200 | [diff] [blame] | 2 | /* ADC driver for AXP20X and AXP22X PMICs |
| 3 | * |
| 4 | * Copyright (c) 2016 Free Electrons NextThing Co. |
| 5 | * Quentin Schulz <quentin.schulz@free-electrons.com> |
Quentin Schulz | 0e34d5d | 2017-04-04 08:34:41 +0200 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | #include <linux/completion.h> |
| 9 | #include <linux/interrupt.h> |
| 10 | #include <linux/io.h> |
| 11 | #include <linux/module.h> |
Jonathan Cameron | 81f434f | 2020-08-09 15:13:05 +0100 | [diff] [blame] | 12 | #include <linux/mod_devicetable.h> |
Quentin Schulz | 0e34d5d | 2017-04-04 08:34:41 +0200 | [diff] [blame] | 13 | #include <linux/platform_device.h> |
| 14 | #include <linux/pm_runtime.h> |
Jonathan Cameron | 81f434f | 2020-08-09 15:13:05 +0100 | [diff] [blame] | 15 | #include <linux/property.h> |
Quentin Schulz | 0e34d5d | 2017-04-04 08:34:41 +0200 | [diff] [blame] | 16 | #include <linux/regmap.h> |
| 17 | #include <linux/thermal.h> |
| 18 | |
| 19 | #include <linux/iio/iio.h> |
| 20 | #include <linux/iio/driver.h> |
| 21 | #include <linux/iio/machine.h> |
| 22 | #include <linux/mfd/axp20x.h> |
| 23 | |
| 24 | #define AXP20X_ADC_EN1_MASK GENMASK(7, 0) |
| 25 | |
| 26 | #define AXP20X_ADC_EN2_MASK (GENMASK(3, 2) | BIT(7)) |
| 27 | #define AXP22X_ADC_EN1_MASK (GENMASK(7, 5) | BIT(0)) |
| 28 | |
| 29 | #define AXP20X_GPIO10_IN_RANGE_GPIO0 BIT(0) |
| 30 | #define AXP20X_GPIO10_IN_RANGE_GPIO1 BIT(1) |
| 31 | #define AXP20X_GPIO10_IN_RANGE_GPIO0_VAL(x) ((x) & BIT(0)) |
| 32 | #define AXP20X_GPIO10_IN_RANGE_GPIO1_VAL(x) (((x) & BIT(0)) << 1) |
| 33 | |
| 34 | #define AXP20X_ADC_RATE_MASK GENMASK(7, 6) |
Quentin Schulz | 1a3f675 | 2018-01-15 11:33:41 +0100 | [diff] [blame] | 35 | #define AXP813_V_I_ADC_RATE_MASK GENMASK(5, 4) |
| 36 | #define AXP813_ADC_RATE_MASK (AXP20X_ADC_RATE_MASK | AXP813_V_I_ADC_RATE_MASK) |
Quentin Schulz | 0e34d5d | 2017-04-04 08:34:41 +0200 | [diff] [blame] | 37 | #define AXP20X_ADC_RATE_HZ(x) ((ilog2((x) / 25) << 6) & AXP20X_ADC_RATE_MASK) |
| 38 | #define AXP22X_ADC_RATE_HZ(x) ((ilog2((x) / 100) << 6) & AXP20X_ADC_RATE_MASK) |
Quentin Schulz | 1a3f675 | 2018-01-15 11:33:41 +0100 | [diff] [blame] | 39 | #define AXP813_TS_GPIO0_ADC_RATE_HZ(x) AXP20X_ADC_RATE_HZ(x) |
| 40 | #define AXP813_V_I_ADC_RATE_HZ(x) ((ilog2((x) / 100) << 4) & AXP813_V_I_ADC_RATE_MASK) |
| 41 | #define AXP813_ADC_RATE_HZ(x) (AXP20X_ADC_RATE_HZ(x) | AXP813_V_I_ADC_RATE_HZ(x)) |
Quentin Schulz | 0e34d5d | 2017-04-04 08:34:41 +0200 | [diff] [blame] | 42 | |
| 43 | #define AXP20X_ADC_CHANNEL(_channel, _name, _type, _reg) \ |
| 44 | { \ |
| 45 | .type = _type, \ |
| 46 | .indexed = 1, \ |
| 47 | .channel = _channel, \ |
| 48 | .address = _reg, \ |
| 49 | .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ |
| 50 | BIT(IIO_CHAN_INFO_SCALE), \ |
| 51 | .datasheet_name = _name, \ |
| 52 | } |
| 53 | |
| 54 | #define AXP20X_ADC_CHANNEL_OFFSET(_channel, _name, _type, _reg) \ |
| 55 | { \ |
| 56 | .type = _type, \ |
| 57 | .indexed = 1, \ |
| 58 | .channel = _channel, \ |
| 59 | .address = _reg, \ |
| 60 | .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ |
| 61 | BIT(IIO_CHAN_INFO_SCALE) |\ |
| 62 | BIT(IIO_CHAN_INFO_OFFSET),\ |
| 63 | .datasheet_name = _name, \ |
| 64 | } |
| 65 | |
| 66 | struct axp_data; |
| 67 | |
| 68 | struct axp20x_adc_iio { |
| 69 | struct regmap *regmap; |
Jonathan Cameron | 81f434f | 2020-08-09 15:13:05 +0100 | [diff] [blame] | 70 | const struct axp_data *data; |
Quentin Schulz | 0e34d5d | 2017-04-04 08:34:41 +0200 | [diff] [blame] | 71 | }; |
| 72 | |
| 73 | enum axp20x_adc_channel_v { |
| 74 | AXP20X_ACIN_V = 0, |
| 75 | AXP20X_VBUS_V, |
| 76 | AXP20X_TS_IN, |
| 77 | AXP20X_GPIO0_V, |
| 78 | AXP20X_GPIO1_V, |
| 79 | AXP20X_IPSOUT_V, |
| 80 | AXP20X_BATT_V, |
| 81 | }; |
| 82 | |
| 83 | enum axp20x_adc_channel_i { |
| 84 | AXP20X_ACIN_I = 0, |
| 85 | AXP20X_VBUS_I, |
| 86 | AXP20X_BATT_CHRG_I, |
| 87 | AXP20X_BATT_DISCHRG_I, |
| 88 | }; |
| 89 | |
| 90 | enum axp22x_adc_channel_v { |
| 91 | AXP22X_TS_IN = 0, |
| 92 | AXP22X_BATT_V, |
| 93 | }; |
| 94 | |
| 95 | enum axp22x_adc_channel_i { |
| 96 | AXP22X_BATT_CHRG_I = 1, |
| 97 | AXP22X_BATT_DISCHRG_I, |
| 98 | }; |
| 99 | |
Quentin Schulz | 1a3f675 | 2018-01-15 11:33:41 +0100 | [diff] [blame] | 100 | enum axp813_adc_channel_v { |
| 101 | AXP813_TS_IN = 0, |
| 102 | AXP813_GPIO0_V, |
| 103 | AXP813_BATT_V, |
| 104 | }; |
| 105 | |
Quentin Schulz | 0e34d5d | 2017-04-04 08:34:41 +0200 | [diff] [blame] | 106 | static struct iio_map axp20x_maps[] = { |
| 107 | { |
| 108 | .consumer_dev_name = "axp20x-usb-power-supply", |
| 109 | .consumer_channel = "vbus_v", |
| 110 | .adc_channel_label = "vbus_v", |
| 111 | }, { |
| 112 | .consumer_dev_name = "axp20x-usb-power-supply", |
| 113 | .consumer_channel = "vbus_i", |
| 114 | .adc_channel_label = "vbus_i", |
| 115 | }, { |
| 116 | .consumer_dev_name = "axp20x-ac-power-supply", |
| 117 | .consumer_channel = "acin_v", |
| 118 | .adc_channel_label = "acin_v", |
| 119 | }, { |
| 120 | .consumer_dev_name = "axp20x-ac-power-supply", |
| 121 | .consumer_channel = "acin_i", |
| 122 | .adc_channel_label = "acin_i", |
| 123 | }, { |
| 124 | .consumer_dev_name = "axp20x-battery-power-supply", |
| 125 | .consumer_channel = "batt_v", |
| 126 | .adc_channel_label = "batt_v", |
| 127 | }, { |
| 128 | .consumer_dev_name = "axp20x-battery-power-supply", |
| 129 | .consumer_channel = "batt_chrg_i", |
| 130 | .adc_channel_label = "batt_chrg_i", |
| 131 | }, { |
| 132 | .consumer_dev_name = "axp20x-battery-power-supply", |
| 133 | .consumer_channel = "batt_dischrg_i", |
| 134 | .adc_channel_label = "batt_dischrg_i", |
| 135 | }, { /* sentinel */ } |
| 136 | }; |
| 137 | |
| 138 | static struct iio_map axp22x_maps[] = { |
| 139 | { |
| 140 | .consumer_dev_name = "axp20x-battery-power-supply", |
| 141 | .consumer_channel = "batt_v", |
| 142 | .adc_channel_label = "batt_v", |
| 143 | }, { |
| 144 | .consumer_dev_name = "axp20x-battery-power-supply", |
| 145 | .consumer_channel = "batt_chrg_i", |
| 146 | .adc_channel_label = "batt_chrg_i", |
| 147 | }, { |
| 148 | .consumer_dev_name = "axp20x-battery-power-supply", |
| 149 | .consumer_channel = "batt_dischrg_i", |
| 150 | .adc_channel_label = "batt_dischrg_i", |
| 151 | }, { /* sentinel */ } |
| 152 | }; |
| 153 | |
| 154 | /* |
| 155 | * Channels are mapped by physical system. Their channels share the same index. |
| 156 | * i.e. acin_i is in_current0_raw and acin_v is in_voltage0_raw. |
| 157 | * The only exception is for the battery. batt_v will be in_voltage6_raw and |
| 158 | * charge current in_current6_raw and discharge current will be in_current7_raw. |
| 159 | */ |
| 160 | static const struct iio_chan_spec axp20x_adc_channels[] = { |
| 161 | AXP20X_ADC_CHANNEL(AXP20X_ACIN_V, "acin_v", IIO_VOLTAGE, |
| 162 | AXP20X_ACIN_V_ADC_H), |
| 163 | AXP20X_ADC_CHANNEL(AXP20X_ACIN_I, "acin_i", IIO_CURRENT, |
| 164 | AXP20X_ACIN_I_ADC_H), |
| 165 | AXP20X_ADC_CHANNEL(AXP20X_VBUS_V, "vbus_v", IIO_VOLTAGE, |
| 166 | AXP20X_VBUS_V_ADC_H), |
| 167 | AXP20X_ADC_CHANNEL(AXP20X_VBUS_I, "vbus_i", IIO_CURRENT, |
| 168 | AXP20X_VBUS_I_ADC_H), |
| 169 | { |
| 170 | .type = IIO_TEMP, |
| 171 | .address = AXP20X_TEMP_ADC_H, |
| 172 | .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | |
| 173 | BIT(IIO_CHAN_INFO_SCALE) | |
| 174 | BIT(IIO_CHAN_INFO_OFFSET), |
| 175 | .datasheet_name = "pmic_temp", |
| 176 | }, |
| 177 | AXP20X_ADC_CHANNEL_OFFSET(AXP20X_GPIO0_V, "gpio0_v", IIO_VOLTAGE, |
| 178 | AXP20X_GPIO0_V_ADC_H), |
| 179 | AXP20X_ADC_CHANNEL_OFFSET(AXP20X_GPIO1_V, "gpio1_v", IIO_VOLTAGE, |
| 180 | AXP20X_GPIO1_V_ADC_H), |
| 181 | AXP20X_ADC_CHANNEL(AXP20X_IPSOUT_V, "ipsout_v", IIO_VOLTAGE, |
| 182 | AXP20X_IPSOUT_V_HIGH_H), |
| 183 | AXP20X_ADC_CHANNEL(AXP20X_BATT_V, "batt_v", IIO_VOLTAGE, |
| 184 | AXP20X_BATT_V_H), |
| 185 | AXP20X_ADC_CHANNEL(AXP20X_BATT_CHRG_I, "batt_chrg_i", IIO_CURRENT, |
| 186 | AXP20X_BATT_CHRG_I_H), |
| 187 | AXP20X_ADC_CHANNEL(AXP20X_BATT_DISCHRG_I, "batt_dischrg_i", IIO_CURRENT, |
| 188 | AXP20X_BATT_DISCHRG_I_H), |
| 189 | }; |
| 190 | |
| 191 | static const struct iio_chan_spec axp22x_adc_channels[] = { |
| 192 | { |
| 193 | .type = IIO_TEMP, |
| 194 | .address = AXP22X_PMIC_TEMP_H, |
| 195 | .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | |
| 196 | BIT(IIO_CHAN_INFO_SCALE) | |
| 197 | BIT(IIO_CHAN_INFO_OFFSET), |
| 198 | .datasheet_name = "pmic_temp", |
| 199 | }, |
| 200 | AXP20X_ADC_CHANNEL(AXP22X_BATT_V, "batt_v", IIO_VOLTAGE, |
| 201 | AXP20X_BATT_V_H), |
| 202 | AXP20X_ADC_CHANNEL(AXP22X_BATT_CHRG_I, "batt_chrg_i", IIO_CURRENT, |
| 203 | AXP20X_BATT_CHRG_I_H), |
| 204 | AXP20X_ADC_CHANNEL(AXP22X_BATT_DISCHRG_I, "batt_dischrg_i", IIO_CURRENT, |
| 205 | AXP20X_BATT_DISCHRG_I_H), |
| 206 | }; |
| 207 | |
Quentin Schulz | 1a3f675 | 2018-01-15 11:33:41 +0100 | [diff] [blame] | 208 | static const struct iio_chan_spec axp813_adc_channels[] = { |
| 209 | { |
| 210 | .type = IIO_TEMP, |
| 211 | .address = AXP22X_PMIC_TEMP_H, |
| 212 | .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | |
| 213 | BIT(IIO_CHAN_INFO_SCALE) | |
| 214 | BIT(IIO_CHAN_INFO_OFFSET), |
| 215 | .datasheet_name = "pmic_temp", |
| 216 | }, |
| 217 | AXP20X_ADC_CHANNEL(AXP813_GPIO0_V, "gpio0_v", IIO_VOLTAGE, |
| 218 | AXP288_GP_ADC_H), |
| 219 | AXP20X_ADC_CHANNEL(AXP813_BATT_V, "batt_v", IIO_VOLTAGE, |
| 220 | AXP20X_BATT_V_H), |
| 221 | AXP20X_ADC_CHANNEL(AXP22X_BATT_CHRG_I, "batt_chrg_i", IIO_CURRENT, |
| 222 | AXP20X_BATT_CHRG_I_H), |
| 223 | AXP20X_ADC_CHANNEL(AXP22X_BATT_DISCHRG_I, "batt_dischrg_i", IIO_CURRENT, |
| 224 | AXP20X_BATT_DISCHRG_I_H), |
| 225 | }; |
| 226 | |
Quentin Schulz | 0e34d5d | 2017-04-04 08:34:41 +0200 | [diff] [blame] | 227 | static int axp20x_adc_raw(struct iio_dev *indio_dev, |
| 228 | struct iio_chan_spec const *chan, int *val) |
| 229 | { |
| 230 | struct axp20x_adc_iio *info = iio_priv(indio_dev); |
| 231 | int size = 12; |
| 232 | |
| 233 | /* |
| 234 | * N.B.: Unlike the Chinese datasheets tell, the charging current is |
| 235 | * stored on 12 bits, not 13 bits. Only discharging current is on 13 |
| 236 | * bits. |
| 237 | */ |
| 238 | if (chan->type == IIO_CURRENT && chan->channel == AXP20X_BATT_DISCHRG_I) |
| 239 | size = 13; |
| 240 | else |
| 241 | size = 12; |
| 242 | |
| 243 | *val = axp20x_read_variable_width(info->regmap, chan->address, size); |
| 244 | if (*val < 0) |
| 245 | return *val; |
| 246 | |
| 247 | return IIO_VAL_INT; |
| 248 | } |
| 249 | |
| 250 | static int axp22x_adc_raw(struct iio_dev *indio_dev, |
| 251 | struct iio_chan_spec const *chan, int *val) |
| 252 | { |
| 253 | struct axp20x_adc_iio *info = iio_priv(indio_dev); |
Quentin Schulz | 0e34d5d | 2017-04-04 08:34:41 +0200 | [diff] [blame] | 254 | |
Evgeny Boger | 92beafb | 2021-11-17 00:37:46 +0300 | [diff] [blame^] | 255 | *val = axp20x_read_variable_width(info->regmap, chan->address, 12); |
Quentin Schulz | 0e34d5d | 2017-04-04 08:34:41 +0200 | [diff] [blame] | 256 | if (*val < 0) |
| 257 | return *val; |
| 258 | |
| 259 | return IIO_VAL_INT; |
| 260 | } |
| 261 | |
Quentin Schulz | 1a3f675 | 2018-01-15 11:33:41 +0100 | [diff] [blame] | 262 | static int axp813_adc_raw(struct iio_dev *indio_dev, |
| 263 | struct iio_chan_spec const *chan, int *val) |
| 264 | { |
| 265 | struct axp20x_adc_iio *info = iio_priv(indio_dev); |
| 266 | |
| 267 | *val = axp20x_read_variable_width(info->regmap, chan->address, 12); |
| 268 | if (*val < 0) |
| 269 | return *val; |
| 270 | |
| 271 | return IIO_VAL_INT; |
| 272 | } |
| 273 | |
Quentin Schulz | 0e34d5d | 2017-04-04 08:34:41 +0200 | [diff] [blame] | 274 | static int axp20x_adc_scale_voltage(int channel, int *val, int *val2) |
| 275 | { |
| 276 | switch (channel) { |
| 277 | case AXP20X_ACIN_V: |
| 278 | case AXP20X_VBUS_V: |
| 279 | *val = 1; |
| 280 | *val2 = 700000; |
| 281 | return IIO_VAL_INT_PLUS_MICRO; |
| 282 | |
| 283 | case AXP20X_GPIO0_V: |
| 284 | case AXP20X_GPIO1_V: |
| 285 | *val = 0; |
| 286 | *val2 = 500000; |
| 287 | return IIO_VAL_INT_PLUS_MICRO; |
| 288 | |
| 289 | case AXP20X_BATT_V: |
| 290 | *val = 1; |
| 291 | *val2 = 100000; |
| 292 | return IIO_VAL_INT_PLUS_MICRO; |
| 293 | |
| 294 | case AXP20X_IPSOUT_V: |
| 295 | *val = 1; |
| 296 | *val2 = 400000; |
| 297 | return IIO_VAL_INT_PLUS_MICRO; |
| 298 | |
| 299 | default: |
| 300 | return -EINVAL; |
| 301 | } |
| 302 | } |
| 303 | |
Quentin Schulz | 1a3f675 | 2018-01-15 11:33:41 +0100 | [diff] [blame] | 304 | static int axp813_adc_scale_voltage(int channel, int *val, int *val2) |
| 305 | { |
| 306 | switch (channel) { |
| 307 | case AXP813_GPIO0_V: |
| 308 | *val = 0; |
| 309 | *val2 = 800000; |
| 310 | return IIO_VAL_INT_PLUS_MICRO; |
| 311 | |
| 312 | case AXP813_BATT_V: |
| 313 | *val = 1; |
| 314 | *val2 = 100000; |
| 315 | return IIO_VAL_INT_PLUS_MICRO; |
| 316 | |
| 317 | default: |
| 318 | return -EINVAL; |
| 319 | } |
| 320 | } |
| 321 | |
Quentin Schulz | 0e34d5d | 2017-04-04 08:34:41 +0200 | [diff] [blame] | 322 | static int axp20x_adc_scale_current(int channel, int *val, int *val2) |
| 323 | { |
| 324 | switch (channel) { |
| 325 | case AXP20X_ACIN_I: |
| 326 | *val = 0; |
| 327 | *val2 = 625000; |
| 328 | return IIO_VAL_INT_PLUS_MICRO; |
| 329 | |
| 330 | case AXP20X_VBUS_I: |
| 331 | *val = 0; |
| 332 | *val2 = 375000; |
| 333 | return IIO_VAL_INT_PLUS_MICRO; |
| 334 | |
| 335 | case AXP20X_BATT_DISCHRG_I: |
| 336 | case AXP20X_BATT_CHRG_I: |
| 337 | *val = 0; |
| 338 | *val2 = 500000; |
| 339 | return IIO_VAL_INT_PLUS_MICRO; |
| 340 | |
| 341 | default: |
| 342 | return -EINVAL; |
| 343 | } |
| 344 | } |
| 345 | |
| 346 | static int axp20x_adc_scale(struct iio_chan_spec const *chan, int *val, |
| 347 | int *val2) |
| 348 | { |
| 349 | switch (chan->type) { |
| 350 | case IIO_VOLTAGE: |
| 351 | return axp20x_adc_scale_voltage(chan->channel, val, val2); |
| 352 | |
| 353 | case IIO_CURRENT: |
| 354 | return axp20x_adc_scale_current(chan->channel, val, val2); |
| 355 | |
| 356 | case IIO_TEMP: |
| 357 | *val = 100; |
| 358 | return IIO_VAL_INT; |
| 359 | |
| 360 | default: |
| 361 | return -EINVAL; |
| 362 | } |
| 363 | } |
| 364 | |
| 365 | static int axp22x_adc_scale(struct iio_chan_spec const *chan, int *val, |
| 366 | int *val2) |
| 367 | { |
| 368 | switch (chan->type) { |
| 369 | case IIO_VOLTAGE: |
| 370 | if (chan->channel != AXP22X_BATT_V) |
| 371 | return -EINVAL; |
| 372 | |
| 373 | *val = 1; |
| 374 | *val2 = 100000; |
| 375 | return IIO_VAL_INT_PLUS_MICRO; |
| 376 | |
| 377 | case IIO_CURRENT: |
Evgeny Boger | 92beafb | 2021-11-17 00:37:46 +0300 | [diff] [blame^] | 378 | *val = 1; |
| 379 | return IIO_VAL_INT; |
Quentin Schulz | 0e34d5d | 2017-04-04 08:34:41 +0200 | [diff] [blame] | 380 | |
| 381 | case IIO_TEMP: |
| 382 | *val = 100; |
| 383 | return IIO_VAL_INT; |
| 384 | |
| 385 | default: |
| 386 | return -EINVAL; |
| 387 | } |
| 388 | } |
| 389 | |
Quentin Schulz | 1a3f675 | 2018-01-15 11:33:41 +0100 | [diff] [blame] | 390 | static int axp813_adc_scale(struct iio_chan_spec const *chan, int *val, |
| 391 | int *val2) |
| 392 | { |
| 393 | switch (chan->type) { |
| 394 | case IIO_VOLTAGE: |
| 395 | return axp813_adc_scale_voltage(chan->channel, val, val2); |
| 396 | |
| 397 | case IIO_CURRENT: |
| 398 | *val = 1; |
| 399 | return IIO_VAL_INT; |
| 400 | |
| 401 | case IIO_TEMP: |
| 402 | *val = 100; |
| 403 | return IIO_VAL_INT; |
| 404 | |
| 405 | default: |
| 406 | return -EINVAL; |
| 407 | } |
| 408 | } |
| 409 | |
Quentin Schulz | 0e34d5d | 2017-04-04 08:34:41 +0200 | [diff] [blame] | 410 | static int axp20x_adc_offset_voltage(struct iio_dev *indio_dev, int channel, |
| 411 | int *val) |
| 412 | { |
| 413 | struct axp20x_adc_iio *info = iio_priv(indio_dev); |
| 414 | int ret; |
| 415 | |
| 416 | ret = regmap_read(info->regmap, AXP20X_GPIO10_IN_RANGE, val); |
| 417 | if (ret < 0) |
| 418 | return ret; |
| 419 | |
| 420 | switch (channel) { |
| 421 | case AXP20X_GPIO0_V: |
| 422 | *val &= AXP20X_GPIO10_IN_RANGE_GPIO0; |
| 423 | break; |
| 424 | |
| 425 | case AXP20X_GPIO1_V: |
| 426 | *val &= AXP20X_GPIO10_IN_RANGE_GPIO1; |
| 427 | break; |
| 428 | |
| 429 | default: |
| 430 | return -EINVAL; |
| 431 | } |
| 432 | |
Quentin Schulz | adc18ba | 2018-02-19 13:47:36 +0100 | [diff] [blame] | 433 | *val = *val ? 700000 : 0; |
Quentin Schulz | 0e34d5d | 2017-04-04 08:34:41 +0200 | [diff] [blame] | 434 | |
| 435 | return IIO_VAL_INT; |
| 436 | } |
| 437 | |
| 438 | static int axp20x_adc_offset(struct iio_dev *indio_dev, |
| 439 | struct iio_chan_spec const *chan, int *val) |
| 440 | { |
| 441 | switch (chan->type) { |
| 442 | case IIO_VOLTAGE: |
| 443 | return axp20x_adc_offset_voltage(indio_dev, chan->channel, val); |
| 444 | |
| 445 | case IIO_TEMP: |
| 446 | *val = -1447; |
| 447 | return IIO_VAL_INT; |
| 448 | |
| 449 | default: |
| 450 | return -EINVAL; |
| 451 | } |
| 452 | } |
| 453 | |
| 454 | static int axp20x_read_raw(struct iio_dev *indio_dev, |
| 455 | struct iio_chan_spec const *chan, int *val, |
| 456 | int *val2, long mask) |
| 457 | { |
| 458 | switch (mask) { |
| 459 | case IIO_CHAN_INFO_OFFSET: |
| 460 | return axp20x_adc_offset(indio_dev, chan, val); |
| 461 | |
| 462 | case IIO_CHAN_INFO_SCALE: |
| 463 | return axp20x_adc_scale(chan, val, val2); |
| 464 | |
| 465 | case IIO_CHAN_INFO_RAW: |
| 466 | return axp20x_adc_raw(indio_dev, chan, val); |
| 467 | |
| 468 | default: |
| 469 | return -EINVAL; |
| 470 | } |
| 471 | } |
| 472 | |
| 473 | static int axp22x_read_raw(struct iio_dev *indio_dev, |
| 474 | struct iio_chan_spec const *chan, int *val, |
| 475 | int *val2, long mask) |
| 476 | { |
| 477 | switch (mask) { |
| 478 | case IIO_CHAN_INFO_OFFSET: |
| 479 | *val = -2677; |
| 480 | return IIO_VAL_INT; |
| 481 | |
| 482 | case IIO_CHAN_INFO_SCALE: |
| 483 | return axp22x_adc_scale(chan, val, val2); |
| 484 | |
| 485 | case IIO_CHAN_INFO_RAW: |
| 486 | return axp22x_adc_raw(indio_dev, chan, val); |
| 487 | |
| 488 | default: |
| 489 | return -EINVAL; |
| 490 | } |
| 491 | } |
| 492 | |
Quentin Schulz | 1a3f675 | 2018-01-15 11:33:41 +0100 | [diff] [blame] | 493 | static int axp813_read_raw(struct iio_dev *indio_dev, |
| 494 | struct iio_chan_spec const *chan, int *val, |
| 495 | int *val2, long mask) |
| 496 | { |
| 497 | switch (mask) { |
| 498 | case IIO_CHAN_INFO_OFFSET: |
| 499 | *val = -2667; |
| 500 | return IIO_VAL_INT; |
| 501 | |
| 502 | case IIO_CHAN_INFO_SCALE: |
| 503 | return axp813_adc_scale(chan, val, val2); |
| 504 | |
| 505 | case IIO_CHAN_INFO_RAW: |
| 506 | return axp813_adc_raw(indio_dev, chan, val); |
| 507 | |
| 508 | default: |
| 509 | return -EINVAL; |
| 510 | } |
| 511 | } |
| 512 | |
Quentin Schulz | 0e34d5d | 2017-04-04 08:34:41 +0200 | [diff] [blame] | 513 | static int axp20x_write_raw(struct iio_dev *indio_dev, |
| 514 | struct iio_chan_spec const *chan, int val, int val2, |
| 515 | long mask) |
| 516 | { |
| 517 | struct axp20x_adc_iio *info = iio_priv(indio_dev); |
| 518 | unsigned int reg, regval; |
| 519 | |
| 520 | /* |
| 521 | * The AXP20X PMIC allows the user to choose between 0V and 0.7V offsets |
| 522 | * for (independently) GPIO0 and GPIO1 when in ADC mode. |
| 523 | */ |
| 524 | if (mask != IIO_CHAN_INFO_OFFSET) |
| 525 | return -EINVAL; |
| 526 | |
| 527 | if (val != 0 && val != 700000) |
| 528 | return -EINVAL; |
| 529 | |
Quentin Schulz | adc18ba | 2018-02-19 13:47:36 +0100 | [diff] [blame] | 530 | val = val ? 1 : 0; |
| 531 | |
Quentin Schulz | 0e34d5d | 2017-04-04 08:34:41 +0200 | [diff] [blame] | 532 | switch (chan->channel) { |
| 533 | case AXP20X_GPIO0_V: |
| 534 | reg = AXP20X_GPIO10_IN_RANGE_GPIO0; |
Quentin Schulz | adc18ba | 2018-02-19 13:47:36 +0100 | [diff] [blame] | 535 | regval = AXP20X_GPIO10_IN_RANGE_GPIO0_VAL(val); |
Quentin Schulz | 0e34d5d | 2017-04-04 08:34:41 +0200 | [diff] [blame] | 536 | break; |
| 537 | |
| 538 | case AXP20X_GPIO1_V: |
| 539 | reg = AXP20X_GPIO10_IN_RANGE_GPIO1; |
Quentin Schulz | adc18ba | 2018-02-19 13:47:36 +0100 | [diff] [blame] | 540 | regval = AXP20X_GPIO10_IN_RANGE_GPIO1_VAL(val); |
Quentin Schulz | 0e34d5d | 2017-04-04 08:34:41 +0200 | [diff] [blame] | 541 | break; |
| 542 | |
| 543 | default: |
| 544 | return -EINVAL; |
| 545 | } |
| 546 | |
| 547 | return regmap_update_bits(info->regmap, AXP20X_GPIO10_IN_RANGE, reg, |
| 548 | regval); |
| 549 | } |
| 550 | |
| 551 | static const struct iio_info axp20x_adc_iio_info = { |
| 552 | .read_raw = axp20x_read_raw, |
| 553 | .write_raw = axp20x_write_raw, |
Quentin Schulz | 0e34d5d | 2017-04-04 08:34:41 +0200 | [diff] [blame] | 554 | }; |
| 555 | |
| 556 | static const struct iio_info axp22x_adc_iio_info = { |
| 557 | .read_raw = axp22x_read_raw, |
Quentin Schulz | 0e34d5d | 2017-04-04 08:34:41 +0200 | [diff] [blame] | 558 | }; |
| 559 | |
Quentin Schulz | 1a3f675 | 2018-01-15 11:33:41 +0100 | [diff] [blame] | 560 | static const struct iio_info axp813_adc_iio_info = { |
| 561 | .read_raw = axp813_read_raw, |
| 562 | }; |
| 563 | |
Quentin Schulz | 0659ecb | 2018-01-15 11:33:35 +0100 | [diff] [blame] | 564 | static int axp20x_adc_rate(struct axp20x_adc_iio *info, int rate) |
Quentin Schulz | 0e34d5d | 2017-04-04 08:34:41 +0200 | [diff] [blame] | 565 | { |
Quentin Schulz | 0659ecb | 2018-01-15 11:33:35 +0100 | [diff] [blame] | 566 | return regmap_update_bits(info->regmap, AXP20X_ADC_RATE, |
| 567 | AXP20X_ADC_RATE_MASK, |
| 568 | AXP20X_ADC_RATE_HZ(rate)); |
Quentin Schulz | 0e34d5d | 2017-04-04 08:34:41 +0200 | [diff] [blame] | 569 | } |
| 570 | |
Quentin Schulz | 0659ecb | 2018-01-15 11:33:35 +0100 | [diff] [blame] | 571 | static int axp22x_adc_rate(struct axp20x_adc_iio *info, int rate) |
Quentin Schulz | 0e34d5d | 2017-04-04 08:34:41 +0200 | [diff] [blame] | 572 | { |
Quentin Schulz | 0659ecb | 2018-01-15 11:33:35 +0100 | [diff] [blame] | 573 | return regmap_update_bits(info->regmap, AXP20X_ADC_RATE, |
| 574 | AXP20X_ADC_RATE_MASK, |
| 575 | AXP22X_ADC_RATE_HZ(rate)); |
Quentin Schulz | 0e34d5d | 2017-04-04 08:34:41 +0200 | [diff] [blame] | 576 | } |
| 577 | |
Quentin Schulz | 1a3f675 | 2018-01-15 11:33:41 +0100 | [diff] [blame] | 578 | static int axp813_adc_rate(struct axp20x_adc_iio *info, int rate) |
| 579 | { |
| 580 | return regmap_update_bits(info->regmap, AXP813_ADC_RATE, |
| 581 | AXP813_ADC_RATE_MASK, |
| 582 | AXP813_ADC_RATE_HZ(rate)); |
| 583 | } |
| 584 | |
Quentin Schulz | 0e34d5d | 2017-04-04 08:34:41 +0200 | [diff] [blame] | 585 | struct axp_data { |
| 586 | const struct iio_info *iio_info; |
| 587 | int num_channels; |
| 588 | struct iio_chan_spec const *channels; |
| 589 | unsigned long adc_en1_mask; |
Quentin Schulz | 0659ecb | 2018-01-15 11:33:35 +0100 | [diff] [blame] | 590 | int (*adc_rate)(struct axp20x_adc_iio *info, |
| 591 | int rate); |
Quentin Schulz | 0e34d5d | 2017-04-04 08:34:41 +0200 | [diff] [blame] | 592 | bool adc_en2; |
| 593 | struct iio_map *maps; |
| 594 | }; |
| 595 | |
| 596 | static const struct axp_data axp20x_data = { |
| 597 | .iio_info = &axp20x_adc_iio_info, |
| 598 | .num_channels = ARRAY_SIZE(axp20x_adc_channels), |
| 599 | .channels = axp20x_adc_channels, |
| 600 | .adc_en1_mask = AXP20X_ADC_EN1_MASK, |
| 601 | .adc_rate = axp20x_adc_rate, |
| 602 | .adc_en2 = true, |
| 603 | .maps = axp20x_maps, |
| 604 | }; |
| 605 | |
| 606 | static const struct axp_data axp22x_data = { |
| 607 | .iio_info = &axp22x_adc_iio_info, |
| 608 | .num_channels = ARRAY_SIZE(axp22x_adc_channels), |
| 609 | .channels = axp22x_adc_channels, |
| 610 | .adc_en1_mask = AXP22X_ADC_EN1_MASK, |
| 611 | .adc_rate = axp22x_adc_rate, |
| 612 | .adc_en2 = false, |
| 613 | .maps = axp22x_maps, |
| 614 | }; |
| 615 | |
Quentin Schulz | 1a3f675 | 2018-01-15 11:33:41 +0100 | [diff] [blame] | 616 | static const struct axp_data axp813_data = { |
| 617 | .iio_info = &axp813_adc_iio_info, |
| 618 | .num_channels = ARRAY_SIZE(axp813_adc_channels), |
| 619 | .channels = axp813_adc_channels, |
| 620 | .adc_en1_mask = AXP22X_ADC_EN1_MASK, |
| 621 | .adc_rate = axp813_adc_rate, |
| 622 | .adc_en2 = false, |
| 623 | .maps = axp22x_maps, |
| 624 | }; |
| 625 | |
Quentin Schulz | 359163d | 2018-01-15 11:33:37 +0100 | [diff] [blame] | 626 | static const struct of_device_id axp20x_adc_of_match[] = { |
| 627 | { .compatible = "x-powers,axp209-adc", .data = (void *)&axp20x_data, }, |
| 628 | { .compatible = "x-powers,axp221-adc", .data = (void *)&axp22x_data, }, |
Quentin Schulz | 1a3f675 | 2018-01-15 11:33:41 +0100 | [diff] [blame] | 629 | { .compatible = "x-powers,axp813-adc", .data = (void *)&axp813_data, }, |
Quentin Schulz | 359163d | 2018-01-15 11:33:37 +0100 | [diff] [blame] | 630 | { /* sentinel */ } |
| 631 | }; |
| 632 | MODULE_DEVICE_TABLE(of, axp20x_adc_of_match); |
| 633 | |
Quentin Schulz | 0e34d5d | 2017-04-04 08:34:41 +0200 | [diff] [blame] | 634 | static const struct platform_device_id axp20x_adc_id_match[] = { |
| 635 | { .name = "axp20x-adc", .driver_data = (kernel_ulong_t)&axp20x_data, }, |
| 636 | { .name = "axp22x-adc", .driver_data = (kernel_ulong_t)&axp22x_data, }, |
Quentin Schulz | 1a3f675 | 2018-01-15 11:33:41 +0100 | [diff] [blame] | 637 | { .name = "axp813-adc", .driver_data = (kernel_ulong_t)&axp813_data, }, |
Quentin Schulz | 0e34d5d | 2017-04-04 08:34:41 +0200 | [diff] [blame] | 638 | { /* sentinel */ }, |
| 639 | }; |
| 640 | MODULE_DEVICE_TABLE(platform, axp20x_adc_id_match); |
| 641 | |
| 642 | static int axp20x_probe(struct platform_device *pdev) |
| 643 | { |
| 644 | struct axp20x_adc_iio *info; |
| 645 | struct iio_dev *indio_dev; |
| 646 | struct axp20x_dev *axp20x_dev; |
| 647 | int ret; |
| 648 | |
| 649 | axp20x_dev = dev_get_drvdata(pdev->dev.parent); |
| 650 | |
| 651 | indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*info)); |
| 652 | if (!indio_dev) |
| 653 | return -ENOMEM; |
| 654 | |
| 655 | info = iio_priv(indio_dev); |
| 656 | platform_set_drvdata(pdev, indio_dev); |
| 657 | |
| 658 | info->regmap = axp20x_dev->regmap; |
Quentin Schulz | 0e34d5d | 2017-04-04 08:34:41 +0200 | [diff] [blame] | 659 | indio_dev->modes = INDIO_DIRECT_MODE; |
| 660 | |
Jonathan Cameron | 81f434f | 2020-08-09 15:13:05 +0100 | [diff] [blame] | 661 | if (!dev_fwnode(&pdev->dev)) { |
Quentin Schulz | 359163d | 2018-01-15 11:33:37 +0100 | [diff] [blame] | 662 | const struct platform_device_id *id; |
| 663 | |
| 664 | id = platform_get_device_id(pdev); |
Jonathan Cameron | 81f434f | 2020-08-09 15:13:05 +0100 | [diff] [blame] | 665 | info->data = (const struct axp_data *)id->driver_data; |
Quentin Schulz | 359163d | 2018-01-15 11:33:37 +0100 | [diff] [blame] | 666 | } else { |
| 667 | struct device *dev = &pdev->dev; |
| 668 | |
Jonathan Cameron | 81f434f | 2020-08-09 15:13:05 +0100 | [diff] [blame] | 669 | info->data = device_get_match_data(dev); |
Quentin Schulz | 359163d | 2018-01-15 11:33:37 +0100 | [diff] [blame] | 670 | } |
Quentin Schulz | 0e34d5d | 2017-04-04 08:34:41 +0200 | [diff] [blame] | 671 | |
| 672 | indio_dev->name = platform_get_device_id(pdev)->name; |
| 673 | indio_dev->info = info->data->iio_info; |
| 674 | indio_dev->num_channels = info->data->num_channels; |
| 675 | indio_dev->channels = info->data->channels; |
| 676 | |
| 677 | /* Enable the ADCs on IP */ |
| 678 | regmap_write(info->regmap, AXP20X_ADC_EN1, info->data->adc_en1_mask); |
| 679 | |
| 680 | if (info->data->adc_en2) |
| 681 | /* Enable GPIO0/1 and internal temperature ADCs */ |
| 682 | regmap_update_bits(info->regmap, AXP20X_ADC_EN2, |
| 683 | AXP20X_ADC_EN2_MASK, AXP20X_ADC_EN2_MASK); |
| 684 | |
| 685 | /* Configure ADCs rate */ |
Quentin Schulz | 0659ecb | 2018-01-15 11:33:35 +0100 | [diff] [blame] | 686 | info->data->adc_rate(info, 100); |
Quentin Schulz | 0e34d5d | 2017-04-04 08:34:41 +0200 | [diff] [blame] | 687 | |
| 688 | ret = iio_map_array_register(indio_dev, info->data->maps); |
| 689 | if (ret < 0) { |
| 690 | dev_err(&pdev->dev, "failed to register IIO maps: %d\n", ret); |
| 691 | goto fail_map; |
| 692 | } |
| 693 | |
| 694 | ret = iio_device_register(indio_dev); |
| 695 | if (ret < 0) { |
| 696 | dev_err(&pdev->dev, "could not register the device\n"); |
| 697 | goto fail_register; |
| 698 | } |
| 699 | |
| 700 | return 0; |
| 701 | |
| 702 | fail_register: |
| 703 | iio_map_array_unregister(indio_dev); |
| 704 | |
| 705 | fail_map: |
| 706 | regmap_write(info->regmap, AXP20X_ADC_EN1, 0); |
| 707 | |
| 708 | if (info->data->adc_en2) |
| 709 | regmap_write(info->regmap, AXP20X_ADC_EN2, 0); |
| 710 | |
| 711 | return ret; |
| 712 | } |
| 713 | |
| 714 | static int axp20x_remove(struct platform_device *pdev) |
| 715 | { |
| 716 | struct iio_dev *indio_dev = platform_get_drvdata(pdev); |
| 717 | struct axp20x_adc_iio *info = iio_priv(indio_dev); |
| 718 | |
| 719 | iio_device_unregister(indio_dev); |
| 720 | iio_map_array_unregister(indio_dev); |
| 721 | |
| 722 | regmap_write(info->regmap, AXP20X_ADC_EN1, 0); |
| 723 | |
| 724 | if (info->data->adc_en2) |
| 725 | regmap_write(info->regmap, AXP20X_ADC_EN2, 0); |
| 726 | |
| 727 | return 0; |
| 728 | } |
| 729 | |
| 730 | static struct platform_driver axp20x_adc_driver = { |
| 731 | .driver = { |
| 732 | .name = "axp20x-adc", |
Jonathan Cameron | 81f434f | 2020-08-09 15:13:05 +0100 | [diff] [blame] | 733 | .of_match_table = axp20x_adc_of_match, |
Quentin Schulz | 0e34d5d | 2017-04-04 08:34:41 +0200 | [diff] [blame] | 734 | }, |
| 735 | .id_table = axp20x_adc_id_match, |
| 736 | .probe = axp20x_probe, |
| 737 | .remove = axp20x_remove, |
| 738 | }; |
| 739 | |
| 740 | module_platform_driver(axp20x_adc_driver); |
| 741 | |
| 742 | MODULE_DESCRIPTION("ADC driver for AXP20X and AXP22X PMICs"); |
| 743 | MODULE_AUTHOR("Quentin Schulz <quentin.schulz@free-electrons.com>"); |
| 744 | MODULE_LICENSE("GPL"); |