blob: 13009d08b09ac5ed3271ffdc66b60d7d57cd1b41 [file] [log] [blame]
Thomas Gleixner2874c5f2019-05-27 08:55:01 +02001// SPDX-License-Identifier: GPL-2.0-or-later
Adam Thomson6d817c02015-09-29 16:44:01 +01002/*
3 * da7219.c - DA7219 ALSA SoC Codec Driver
4 *
5 * Copyright (c) 2015 Dialog Semiconductor
6 *
7 * Author: Adam Thomson <Adam.Thomson.Opensource@diasemi.com>
Adam Thomson6d817c02015-09-29 16:44:01 +01008 */
9
Mark Brownb58cea72016-05-06 18:13:17 +010010#include <linux/acpi.h>
Adam Thomson6d817c02015-09-29 16:44:01 +010011#include <linux/clk.h>
Adam Thomsonfc8f7ea2018-03-09 16:25:43 +000012#include <linux/clkdev.h>
13#include <linux/clk-provider.h>
Adam Thomson6d817c02015-09-29 16:44:01 +010014#include <linux/i2c.h>
15#include <linux/of_device.h>
Adam Thomsona01b8932016-06-21 18:50:21 +010016#include <linux/property.h>
Adam Thomson6d817c02015-09-29 16:44:01 +010017#include <linux/regmap.h>
18#include <linux/slab.h>
19#include <linux/pm.h>
20#include <linux/module.h>
21#include <linux/delay.h>
22#include <linux/regulator/consumer.h>
23#include <sound/pcm.h>
24#include <sound/pcm_params.h>
25#include <sound/soc.h>
26#include <sound/soc-dapm.h>
27#include <sound/initval.h>
28#include <sound/tlv.h>
29#include <asm/div64.h>
30
31#include <sound/da7219.h>
32#include "da7219.h"
33#include "da7219-aad.h"
34
35
36/*
37 * TLVs and Enums
38 */
39
40/* Input TLVs */
41static const DECLARE_TLV_DB_SCALE(da7219_mic_gain_tlv, -600, 600, 0);
42static const DECLARE_TLV_DB_SCALE(da7219_mixin_gain_tlv, -450, 150, 0);
43static const DECLARE_TLV_DB_SCALE(da7219_adc_dig_gain_tlv, -8325, 75, 0);
44static const DECLARE_TLV_DB_SCALE(da7219_alc_threshold_tlv, -9450, 150, 0);
45static const DECLARE_TLV_DB_SCALE(da7219_alc_gain_tlv, 0, 600, 0);
46static const DECLARE_TLV_DB_SCALE(da7219_alc_ana_gain_tlv, 0, 600, 0);
47static const DECLARE_TLV_DB_SCALE(da7219_sidetone_gain_tlv, -4200, 300, 0);
48static const DECLARE_TLV_DB_SCALE(da7219_tonegen_gain_tlv, -4500, 300, 0);
49
50/* Output TLVs */
51static const DECLARE_TLV_DB_SCALE(da7219_dac_eq_band_tlv, -1050, 150, 0);
52
53static const DECLARE_TLV_DB_RANGE(da7219_dac_dig_gain_tlv,
54 0x0, 0x07, TLV_DB_SCALE_ITEM(TLV_DB_GAIN_MUTE, 0, 1),
55 /* -77.25dB to 12dB */
56 0x08, 0x7f, TLV_DB_SCALE_ITEM(-7725, 75, 0)
57);
58
59static const DECLARE_TLV_DB_SCALE(da7219_dac_ng_threshold_tlv, -10200, 600, 0);
60static const DECLARE_TLV_DB_SCALE(da7219_hp_gain_tlv, -5700, 100, 0);
61
62/* Input Enums */
63static const char * const da7219_alc_attack_rate_txt[] = {
64 "7.33/fs", "14.66/fs", "29.32/fs", "58.64/fs", "117.3/fs", "234.6/fs",
65 "469.1/fs", "938.2/fs", "1876/fs", "3753/fs", "7506/fs", "15012/fs",
66 "30024/fs"
67};
68
69static const struct soc_enum da7219_alc_attack_rate =
70 SOC_ENUM_SINGLE(DA7219_ALC_CTRL2, DA7219_ALC_ATTACK_SHIFT,
71 DA7219_ALC_ATTACK_MAX, da7219_alc_attack_rate_txt);
72
73static const char * const da7219_alc_release_rate_txt[] = {
74 "28.66/fs", "57.33/fs", "114.6/fs", "229.3/fs", "458.6/fs", "917.1/fs",
75 "1834/fs", "3668/fs", "7337/fs", "14674/fs", "29348/fs"
76};
77
78static const struct soc_enum da7219_alc_release_rate =
79 SOC_ENUM_SINGLE(DA7219_ALC_CTRL2, DA7219_ALC_RELEASE_SHIFT,
80 DA7219_ALC_RELEASE_MAX, da7219_alc_release_rate_txt);
81
82static const char * const da7219_alc_hold_time_txt[] = {
83 "62/fs", "124/fs", "248/fs", "496/fs", "992/fs", "1984/fs", "3968/fs",
84 "7936/fs", "15872/fs", "31744/fs", "63488/fs", "126976/fs",
85 "253952/fs", "507904/fs", "1015808/fs", "2031616/fs"
86};
87
88static const struct soc_enum da7219_alc_hold_time =
89 SOC_ENUM_SINGLE(DA7219_ALC_CTRL3, DA7219_ALC_HOLD_SHIFT,
90 DA7219_ALC_HOLD_MAX, da7219_alc_hold_time_txt);
91
92static const char * const da7219_alc_env_rate_txt[] = {
93 "1/4", "1/16", "1/256", "1/65536"
94};
95
96static const struct soc_enum da7219_alc_env_attack_rate =
97 SOC_ENUM_SINGLE(DA7219_ALC_CTRL3, DA7219_ALC_INTEG_ATTACK_SHIFT,
98 DA7219_ALC_INTEG_MAX, da7219_alc_env_rate_txt);
99
100static const struct soc_enum da7219_alc_env_release_rate =
101 SOC_ENUM_SINGLE(DA7219_ALC_CTRL3, DA7219_ALC_INTEG_RELEASE_SHIFT,
102 DA7219_ALC_INTEG_MAX, da7219_alc_env_rate_txt);
103
104static const char * const da7219_alc_anticlip_step_txt[] = {
105 "0.034dB/fs", "0.068dB/fs", "0.136dB/fs", "0.272dB/fs"
106};
107
108static const struct soc_enum da7219_alc_anticlip_step =
109 SOC_ENUM_SINGLE(DA7219_ALC_ANTICLIP_CTRL,
110 DA7219_ALC_ANTICLIP_STEP_SHIFT,
111 DA7219_ALC_ANTICLIP_STEP_MAX,
112 da7219_alc_anticlip_step_txt);
113
114/* Input/Output Enums */
115static const char * const da7219_gain_ramp_rate_txt[] = {
116 "Nominal Rate * 8", "Nominal Rate", "Nominal Rate / 8",
117 "Nominal Rate / 16"
118};
119
120static const struct soc_enum da7219_gain_ramp_rate =
121 SOC_ENUM_SINGLE(DA7219_GAIN_RAMP_CTRL, DA7219_GAIN_RAMP_RATE_SHIFT,
122 DA7219_GAIN_RAMP_RATE_MAX, da7219_gain_ramp_rate_txt);
123
124static const char * const da7219_hpf_mode_txt[] = {
125 "Disabled", "Audio", "Voice"
126};
127
128static const unsigned int da7219_hpf_mode_val[] = {
129 DA7219_HPF_DISABLED, DA7219_HPF_AUDIO_EN, DA7219_HPF_VOICE_EN,
130};
131
132static const struct soc_enum da7219_adc_hpf_mode =
133 SOC_VALUE_ENUM_SINGLE(DA7219_ADC_FILTERS1, DA7219_HPF_MODE_SHIFT,
134 DA7219_HPF_MODE_MASK, DA7219_HPF_MODE_MAX,
135 da7219_hpf_mode_txt, da7219_hpf_mode_val);
136
137static const struct soc_enum da7219_dac_hpf_mode =
138 SOC_VALUE_ENUM_SINGLE(DA7219_DAC_FILTERS1, DA7219_HPF_MODE_SHIFT,
139 DA7219_HPF_MODE_MASK, DA7219_HPF_MODE_MAX,
140 da7219_hpf_mode_txt, da7219_hpf_mode_val);
141
142static const char * const da7219_audio_hpf_corner_txt[] = {
143 "2Hz", "4Hz", "8Hz", "16Hz"
144};
145
146static const struct soc_enum da7219_adc_audio_hpf_corner =
147 SOC_ENUM_SINGLE(DA7219_ADC_FILTERS1,
148 DA7219_ADC_AUDIO_HPF_CORNER_SHIFT,
149 DA7219_AUDIO_HPF_CORNER_MAX,
150 da7219_audio_hpf_corner_txt);
151
152static const struct soc_enum da7219_dac_audio_hpf_corner =
153 SOC_ENUM_SINGLE(DA7219_DAC_FILTERS1,
154 DA7219_DAC_AUDIO_HPF_CORNER_SHIFT,
155 DA7219_AUDIO_HPF_CORNER_MAX,
156 da7219_audio_hpf_corner_txt);
157
158static const char * const da7219_voice_hpf_corner_txt[] = {
159 "2.5Hz", "25Hz", "50Hz", "100Hz", "150Hz", "200Hz", "300Hz", "400Hz"
160};
161
162static const struct soc_enum da7219_adc_voice_hpf_corner =
163 SOC_ENUM_SINGLE(DA7219_ADC_FILTERS1,
164 DA7219_ADC_VOICE_HPF_CORNER_SHIFT,
165 DA7219_VOICE_HPF_CORNER_MAX,
166 da7219_voice_hpf_corner_txt);
167
168static const struct soc_enum da7219_dac_voice_hpf_corner =
169 SOC_ENUM_SINGLE(DA7219_DAC_FILTERS1,
170 DA7219_DAC_VOICE_HPF_CORNER_SHIFT,
171 DA7219_VOICE_HPF_CORNER_MAX,
172 da7219_voice_hpf_corner_txt);
173
174static const char * const da7219_tonegen_dtmf_key_txt[] = {
175 "0", "1", "2", "3", "4", "5", "6", "7", "8", "9", "A", "B", "C", "D",
176 "*", "#"
177};
178
179static const struct soc_enum da7219_tonegen_dtmf_key =
180 SOC_ENUM_SINGLE(DA7219_TONE_GEN_CFG1, DA7219_DTMF_REG_SHIFT,
181 DA7219_DTMF_REG_MAX, da7219_tonegen_dtmf_key_txt);
182
183static const char * const da7219_tonegen_swg_sel_txt[] = {
184 "Sum", "SWG1", "SWG2", "SWG1_1-Cos"
185};
186
187static const struct soc_enum da7219_tonegen_swg_sel =
188 SOC_ENUM_SINGLE(DA7219_TONE_GEN_CFG2, DA7219_SWG_SEL_SHIFT,
189 DA7219_SWG_SEL_MAX, da7219_tonegen_swg_sel_txt);
190
191/* Output Enums */
192static const char * const da7219_dac_softmute_rate_txt[] = {
193 "1 Sample", "2 Samples", "4 Samples", "8 Samples", "16 Samples",
194 "32 Samples", "64 Samples"
195};
196
197static const struct soc_enum da7219_dac_softmute_rate =
198 SOC_ENUM_SINGLE(DA7219_DAC_FILTERS5, DA7219_DAC_SOFTMUTE_RATE_SHIFT,
199 DA7219_DAC_SOFTMUTE_RATE_MAX,
200 da7219_dac_softmute_rate_txt);
201
202static const char * const da7219_dac_ng_setup_time_txt[] = {
203 "256 Samples", "512 Samples", "1024 Samples", "2048 Samples"
204};
205
206static const struct soc_enum da7219_dac_ng_setup_time =
207 SOC_ENUM_SINGLE(DA7219_DAC_NG_SETUP_TIME,
208 DA7219_DAC_NG_SETUP_TIME_SHIFT,
209 DA7219_DAC_NG_SETUP_TIME_MAX,
210 da7219_dac_ng_setup_time_txt);
211
212static const char * const da7219_dac_ng_rampup_txt[] = {
213 "0.22ms/dB", "0.0138ms/dB"
214};
215
216static const struct soc_enum da7219_dac_ng_rampup_rate =
217 SOC_ENUM_SINGLE(DA7219_DAC_NG_SETUP_TIME,
218 DA7219_DAC_NG_RAMPUP_RATE_SHIFT,
219 DA7219_DAC_NG_RAMP_RATE_MAX,
220 da7219_dac_ng_rampup_txt);
221
222static const char * const da7219_dac_ng_rampdown_txt[] = {
223 "0.88ms/dB", "14.08ms/dB"
224};
225
226static const struct soc_enum da7219_dac_ng_rampdown_rate =
227 SOC_ENUM_SINGLE(DA7219_DAC_NG_SETUP_TIME,
228 DA7219_DAC_NG_RAMPDN_RATE_SHIFT,
229 DA7219_DAC_NG_RAMP_RATE_MAX,
230 da7219_dac_ng_rampdown_txt);
231
232
233static const char * const da7219_cp_track_mode_txt[] = {
234 "Largest Volume", "DAC Volume", "Signal Magnitude"
235};
236
237static const unsigned int da7219_cp_track_mode_val[] = {
238 DA7219_CP_MCHANGE_LARGEST_VOL, DA7219_CP_MCHANGE_DAC_VOL,
239 DA7219_CP_MCHANGE_SIG_MAG
240};
241
242static const struct soc_enum da7219_cp_track_mode =
243 SOC_VALUE_ENUM_SINGLE(DA7219_CP_CTRL, DA7219_CP_MCHANGE_SHIFT,
244 DA7219_CP_MCHANGE_REL_MASK, DA7219_CP_MCHANGE_MAX,
245 da7219_cp_track_mode_txt,
246 da7219_cp_track_mode_val);
247
248
249/*
250 * Control Functions
251 */
252
253/* Locked Kcontrol calls */
254static int da7219_volsw_locked_get(struct snd_kcontrol *kcontrol,
255 struct snd_ctl_elem_value *ucontrol)
256{
Kuninori Morimoto45101122018-01-29 04:36:54 +0000257 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
258 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component);
Adam Thomson6d817c02015-09-29 16:44:01 +0100259 int ret;
260
Adam Thomson2a0c2182017-06-19 10:56:33 +0100261 mutex_lock(&da7219->ctrl_lock);
Adam Thomson6d817c02015-09-29 16:44:01 +0100262 ret = snd_soc_get_volsw(kcontrol, ucontrol);
Adam Thomson2a0c2182017-06-19 10:56:33 +0100263 mutex_unlock(&da7219->ctrl_lock);
Adam Thomson6d817c02015-09-29 16:44:01 +0100264
265 return ret;
266}
267
268static int da7219_volsw_locked_put(struct snd_kcontrol *kcontrol,
269 struct snd_ctl_elem_value *ucontrol)
270{
Kuninori Morimoto45101122018-01-29 04:36:54 +0000271 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
272 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component);
Adam Thomson6d817c02015-09-29 16:44:01 +0100273 int ret;
274
Adam Thomson2a0c2182017-06-19 10:56:33 +0100275 mutex_lock(&da7219->ctrl_lock);
Adam Thomson6d817c02015-09-29 16:44:01 +0100276 ret = snd_soc_put_volsw(kcontrol, ucontrol);
Adam Thomson2a0c2182017-06-19 10:56:33 +0100277 mutex_unlock(&da7219->ctrl_lock);
Adam Thomson6d817c02015-09-29 16:44:01 +0100278
279 return ret;
280}
281
282static int da7219_enum_locked_get(struct snd_kcontrol *kcontrol,
283 struct snd_ctl_elem_value *ucontrol)
284{
Kuninori Morimoto45101122018-01-29 04:36:54 +0000285 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
286 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component);
Adam Thomson6d817c02015-09-29 16:44:01 +0100287 int ret;
288
Adam Thomson2a0c2182017-06-19 10:56:33 +0100289 mutex_lock(&da7219->ctrl_lock);
Adam Thomson6d817c02015-09-29 16:44:01 +0100290 ret = snd_soc_get_enum_double(kcontrol, ucontrol);
Adam Thomson2a0c2182017-06-19 10:56:33 +0100291 mutex_unlock(&da7219->ctrl_lock);
Adam Thomson6d817c02015-09-29 16:44:01 +0100292
293 return ret;
294}
295
296static int da7219_enum_locked_put(struct snd_kcontrol *kcontrol,
297 struct snd_ctl_elem_value *ucontrol)
298{
Kuninori Morimoto45101122018-01-29 04:36:54 +0000299 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
300 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component);
Adam Thomson6d817c02015-09-29 16:44:01 +0100301 int ret;
302
Adam Thomson2a0c2182017-06-19 10:56:33 +0100303 mutex_lock(&da7219->ctrl_lock);
Adam Thomson6d817c02015-09-29 16:44:01 +0100304 ret = snd_soc_put_enum_double(kcontrol, ucontrol);
Adam Thomson2a0c2182017-06-19 10:56:33 +0100305 mutex_unlock(&da7219->ctrl_lock);
Adam Thomson6d817c02015-09-29 16:44:01 +0100306
307 return ret;
308}
309
310/* ALC */
Kuninori Morimoto45101122018-01-29 04:36:54 +0000311static void da7219_alc_calib(struct snd_soc_component *component)
Adam Thomson6d817c02015-09-29 16:44:01 +0100312{
313 u8 mic_ctrl, mixin_ctrl, adc_ctrl, calib_ctrl;
314
315 /* Save current state of mic control register */
Kuninori Morimoto2925b582020-06-16 14:21:42 +0900316 mic_ctrl = snd_soc_component_read(component, DA7219_MIC_1_CTRL);
Adam Thomson6d817c02015-09-29 16:44:01 +0100317
318 /* Save current state of input mixer control register */
Kuninori Morimoto2925b582020-06-16 14:21:42 +0900319 mixin_ctrl = snd_soc_component_read(component, DA7219_MIXIN_L_CTRL);
Adam Thomson6d817c02015-09-29 16:44:01 +0100320
321 /* Save current state of input ADC control register */
Kuninori Morimoto2925b582020-06-16 14:21:42 +0900322 adc_ctrl = snd_soc_component_read(component, DA7219_ADC_L_CTRL);
Adam Thomson6d817c02015-09-29 16:44:01 +0100323
324 /* Enable then Mute MIC PGAs */
Kuninori Morimoto45101122018-01-29 04:36:54 +0000325 snd_soc_component_update_bits(component, DA7219_MIC_1_CTRL, DA7219_MIC_1_AMP_EN_MASK,
Adam Thomson6d817c02015-09-29 16:44:01 +0100326 DA7219_MIC_1_AMP_EN_MASK);
Kuninori Morimoto45101122018-01-29 04:36:54 +0000327 snd_soc_component_update_bits(component, DA7219_MIC_1_CTRL,
Adam Thomson6d817c02015-09-29 16:44:01 +0100328 DA7219_MIC_1_AMP_MUTE_EN_MASK,
329 DA7219_MIC_1_AMP_MUTE_EN_MASK);
330
331 /* Enable input mixers unmuted */
Kuninori Morimoto45101122018-01-29 04:36:54 +0000332 snd_soc_component_update_bits(component, DA7219_MIXIN_L_CTRL,
Adam Thomson6d817c02015-09-29 16:44:01 +0100333 DA7219_MIXIN_L_AMP_EN_MASK |
334 DA7219_MIXIN_L_AMP_MUTE_EN_MASK,
335 DA7219_MIXIN_L_AMP_EN_MASK);
336
337 /* Enable input filters unmuted */
Kuninori Morimoto45101122018-01-29 04:36:54 +0000338 snd_soc_component_update_bits(component, DA7219_ADC_L_CTRL,
Adam Thomson6d817c02015-09-29 16:44:01 +0100339 DA7219_ADC_L_MUTE_EN_MASK | DA7219_ADC_L_EN_MASK,
340 DA7219_ADC_L_EN_MASK);
341
342 /* Perform auto calibration */
Kuninori Morimoto45101122018-01-29 04:36:54 +0000343 snd_soc_component_update_bits(component, DA7219_ALC_CTRL1,
Adam Thomson6d817c02015-09-29 16:44:01 +0100344 DA7219_ALC_AUTO_CALIB_EN_MASK,
345 DA7219_ALC_AUTO_CALIB_EN_MASK);
346 do {
Kuninori Morimoto2925b582020-06-16 14:21:42 +0900347 calib_ctrl = snd_soc_component_read(component, DA7219_ALC_CTRL1);
Adam Thomson6d817c02015-09-29 16:44:01 +0100348 } while (calib_ctrl & DA7219_ALC_AUTO_CALIB_EN_MASK);
349
350 /* If auto calibration fails, disable DC offset, hybrid ALC */
351 if (calib_ctrl & DA7219_ALC_CALIB_OVERFLOW_MASK) {
Kuninori Morimoto45101122018-01-29 04:36:54 +0000352 dev_warn(component->dev,
Adam Thomson6d817c02015-09-29 16:44:01 +0100353 "ALC auto calibration failed with overflow\n");
Kuninori Morimoto45101122018-01-29 04:36:54 +0000354 snd_soc_component_update_bits(component, DA7219_ALC_CTRL1,
Adam Thomson6d817c02015-09-29 16:44:01 +0100355 DA7219_ALC_OFFSET_EN_MASK |
356 DA7219_ALC_SYNC_MODE_MASK, 0);
357 } else {
358 /* Enable DC offset cancellation, hybrid mode */
Kuninori Morimoto45101122018-01-29 04:36:54 +0000359 snd_soc_component_update_bits(component, DA7219_ALC_CTRL1,
Adam Thomson6d817c02015-09-29 16:44:01 +0100360 DA7219_ALC_OFFSET_EN_MASK |
361 DA7219_ALC_SYNC_MODE_MASK,
362 DA7219_ALC_OFFSET_EN_MASK |
363 DA7219_ALC_SYNC_MODE_MASK);
364 }
365
366 /* Restore input filter control register to original state */
Kuninori Morimoto45101122018-01-29 04:36:54 +0000367 snd_soc_component_write(component, DA7219_ADC_L_CTRL, adc_ctrl);
Adam Thomson6d817c02015-09-29 16:44:01 +0100368
369 /* Restore input mixer control registers to original state */
Kuninori Morimoto45101122018-01-29 04:36:54 +0000370 snd_soc_component_write(component, DA7219_MIXIN_L_CTRL, mixin_ctrl);
Adam Thomson6d817c02015-09-29 16:44:01 +0100371
372 /* Restore MIC control registers to original states */
Kuninori Morimoto45101122018-01-29 04:36:54 +0000373 snd_soc_component_write(component, DA7219_MIC_1_CTRL, mic_ctrl);
Adam Thomson6d817c02015-09-29 16:44:01 +0100374}
375
376static int da7219_mixin_gain_put(struct snd_kcontrol *kcontrol,
377 struct snd_ctl_elem_value *ucontrol)
378{
Kuninori Morimoto45101122018-01-29 04:36:54 +0000379 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
380 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component);
Adam Thomson6d817c02015-09-29 16:44:01 +0100381 int ret;
382
383 ret = snd_soc_put_volsw(kcontrol, ucontrol);
384
385 /*
386 * If ALC in operation and value of control has been updated,
387 * make sure calibrated offsets are updated.
388 */
389 if ((ret == 1) && (da7219->alc_en))
Kuninori Morimoto45101122018-01-29 04:36:54 +0000390 da7219_alc_calib(component);
Adam Thomson6d817c02015-09-29 16:44:01 +0100391
392 return ret;
393}
394
395static int da7219_alc_sw_put(struct snd_kcontrol *kcontrol,
396 struct snd_ctl_elem_value *ucontrol)
397{
Kuninori Morimoto45101122018-01-29 04:36:54 +0000398 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
399 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component);
Adam Thomson6d817c02015-09-29 16:44:01 +0100400
401
402 /* Force ALC offset calibration if enabling ALC */
403 if ((ucontrol->value.integer.value[0]) && (!da7219->alc_en)) {
Kuninori Morimoto45101122018-01-29 04:36:54 +0000404 da7219_alc_calib(component);
Axel Linc5cff892015-10-21 08:34:37 +0800405 da7219->alc_en = true;
Adam Thomson6d817c02015-09-29 16:44:01 +0100406 } else {
407 da7219->alc_en = false;
408 }
409
410 return snd_soc_put_volsw(kcontrol, ucontrol);
411}
412
413/* ToneGen */
414static int da7219_tonegen_freq_get(struct snd_kcontrol *kcontrol,
415 struct snd_ctl_elem_value *ucontrol)
416{
Kuninori Morimoto45101122018-01-29 04:36:54 +0000417 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
418 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component);
Adam Thomson6d817c02015-09-29 16:44:01 +0100419 struct soc_mixer_control *mixer_ctrl =
420 (struct soc_mixer_control *) kcontrol->private_value;
421 unsigned int reg = mixer_ctrl->reg;
Pierre-Louis Bossart123c3de2019-01-04 20:02:46 -0600422 __le16 val;
Adam Thomson6d817c02015-09-29 16:44:01 +0100423 int ret;
424
Adam Thomson2a0c2182017-06-19 10:56:33 +0100425 mutex_lock(&da7219->ctrl_lock);
Adam Thomson6d817c02015-09-29 16:44:01 +0100426 ret = regmap_raw_read(da7219->regmap, reg, &val, sizeof(val));
Adam Thomson2a0c2182017-06-19 10:56:33 +0100427 mutex_unlock(&da7219->ctrl_lock);
Adam Thomson6d817c02015-09-29 16:44:01 +0100428
429 if (ret)
430 return ret;
431
432 /*
433 * Frequency value spans two 8-bit registers, lower then upper byte.
434 * Therefore we need to convert to host endianness here.
435 */
436 ucontrol->value.integer.value[0] = le16_to_cpu(val);
437
438 return 0;
439}
440
441static int da7219_tonegen_freq_put(struct snd_kcontrol *kcontrol,
442 struct snd_ctl_elem_value *ucontrol)
443{
Kuninori Morimoto45101122018-01-29 04:36:54 +0000444 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
445 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component);
Adam Thomson6d817c02015-09-29 16:44:01 +0100446 struct soc_mixer_control *mixer_ctrl =
447 (struct soc_mixer_control *) kcontrol->private_value;
448 unsigned int reg = mixer_ctrl->reg;
Pierre-Louis Bossart123c3de2019-01-04 20:02:46 -0600449 __le16 val;
Adam Thomson6d817c02015-09-29 16:44:01 +0100450 int ret;
451
452 /*
453 * Frequency value spans two 8-bit registers, lower then upper byte.
454 * Therefore we need to convert to little endian here to align with
455 * HW registers.
456 */
457 val = cpu_to_le16(ucontrol->value.integer.value[0]);
458
Adam Thomson2a0c2182017-06-19 10:56:33 +0100459 mutex_lock(&da7219->ctrl_lock);
Adam Thomson6d817c02015-09-29 16:44:01 +0100460 ret = regmap_raw_write(da7219->regmap, reg, &val, sizeof(val));
Adam Thomson2a0c2182017-06-19 10:56:33 +0100461 mutex_unlock(&da7219->ctrl_lock);
Adam Thomson6d817c02015-09-29 16:44:01 +0100462
463 return ret;
464}
465
466
467/*
468 * KControls
469 */
470
471static const struct snd_kcontrol_new da7219_snd_controls[] = {
472 /* Mics */
473 SOC_SINGLE_TLV("Mic Volume", DA7219_MIC_1_GAIN,
474 DA7219_MIC_1_AMP_GAIN_SHIFT, DA7219_MIC_1_AMP_GAIN_MAX,
475 DA7219_NO_INVERT, da7219_mic_gain_tlv),
476 SOC_SINGLE("Mic Switch", DA7219_MIC_1_CTRL,
477 DA7219_MIC_1_AMP_MUTE_EN_SHIFT, DA7219_SWITCH_EN_MAX,
478 DA7219_INVERT),
479
480 /* Mixer Input */
481 SOC_SINGLE_EXT_TLV("Mixin Volume", DA7219_MIXIN_L_GAIN,
482 DA7219_MIXIN_L_AMP_GAIN_SHIFT,
483 DA7219_MIXIN_L_AMP_GAIN_MAX, DA7219_NO_INVERT,
484 snd_soc_get_volsw, da7219_mixin_gain_put,
485 da7219_mixin_gain_tlv),
486 SOC_SINGLE("Mixin Switch", DA7219_MIXIN_L_CTRL,
487 DA7219_MIXIN_L_AMP_MUTE_EN_SHIFT, DA7219_SWITCH_EN_MAX,
488 DA7219_INVERT),
489 SOC_SINGLE("Mixin Gain Ramp Switch", DA7219_MIXIN_L_CTRL,
490 DA7219_MIXIN_L_AMP_RAMP_EN_SHIFT, DA7219_SWITCH_EN_MAX,
491 DA7219_NO_INVERT),
492 SOC_SINGLE("Mixin ZC Gain Switch", DA7219_MIXIN_L_CTRL,
493 DA7219_MIXIN_L_AMP_ZC_EN_SHIFT, DA7219_SWITCH_EN_MAX,
494 DA7219_NO_INVERT),
495
496 /* ADC */
497 SOC_SINGLE_TLV("Capture Digital Volume", DA7219_ADC_L_GAIN,
498 DA7219_ADC_L_DIGITAL_GAIN_SHIFT,
499 DA7219_ADC_L_DIGITAL_GAIN_MAX, DA7219_NO_INVERT,
500 da7219_adc_dig_gain_tlv),
501 SOC_SINGLE("Capture Digital Switch", DA7219_ADC_L_CTRL,
502 DA7219_ADC_L_MUTE_EN_SHIFT, DA7219_SWITCH_EN_MAX,
503 DA7219_INVERT),
504 SOC_SINGLE("Capture Digital Gain Ramp Switch", DA7219_ADC_L_CTRL,
505 DA7219_ADC_L_RAMP_EN_SHIFT, DA7219_SWITCH_EN_MAX,
506 DA7219_NO_INVERT),
507
508 /* ALC */
509 SOC_ENUM("ALC Attack Rate", da7219_alc_attack_rate),
510 SOC_ENUM("ALC Release Rate", da7219_alc_release_rate),
511 SOC_ENUM("ALC Hold Time", da7219_alc_hold_time),
512 SOC_ENUM("ALC Envelope Attack Rate", da7219_alc_env_attack_rate),
513 SOC_ENUM("ALC Envelope Release Rate", da7219_alc_env_release_rate),
514 SOC_SINGLE_TLV("ALC Noise Threshold", DA7219_ALC_NOISE,
515 DA7219_ALC_NOISE_SHIFT, DA7219_ALC_THRESHOLD_MAX,
516 DA7219_INVERT, da7219_alc_threshold_tlv),
517 SOC_SINGLE_TLV("ALC Min Threshold", DA7219_ALC_TARGET_MIN,
518 DA7219_ALC_THRESHOLD_MIN_SHIFT, DA7219_ALC_THRESHOLD_MAX,
519 DA7219_INVERT, da7219_alc_threshold_tlv),
520 SOC_SINGLE_TLV("ALC Max Threshold", DA7219_ALC_TARGET_MAX,
521 DA7219_ALC_THRESHOLD_MAX_SHIFT, DA7219_ALC_THRESHOLD_MAX,
522 DA7219_INVERT, da7219_alc_threshold_tlv),
523 SOC_SINGLE_TLV("ALC Max Attenuation", DA7219_ALC_GAIN_LIMITS,
524 DA7219_ALC_ATTEN_MAX_SHIFT, DA7219_ALC_ATTEN_GAIN_MAX,
525 DA7219_NO_INVERT, da7219_alc_gain_tlv),
526 SOC_SINGLE_TLV("ALC Max Volume", DA7219_ALC_GAIN_LIMITS,
527 DA7219_ALC_GAIN_MAX_SHIFT, DA7219_ALC_ATTEN_GAIN_MAX,
528 DA7219_NO_INVERT, da7219_alc_gain_tlv),
529 SOC_SINGLE_RANGE_TLV("ALC Min Analog Volume", DA7219_ALC_ANA_GAIN_LIMITS,
530 DA7219_ALC_ANA_GAIN_MIN_SHIFT,
531 DA7219_ALC_ANA_GAIN_MIN, DA7219_ALC_ANA_GAIN_MAX,
532 DA7219_NO_INVERT, da7219_alc_ana_gain_tlv),
533 SOC_SINGLE_RANGE_TLV("ALC Max Analog Volume", DA7219_ALC_ANA_GAIN_LIMITS,
534 DA7219_ALC_ANA_GAIN_MAX_SHIFT,
535 DA7219_ALC_ANA_GAIN_MIN, DA7219_ALC_ANA_GAIN_MAX,
536 DA7219_NO_INVERT, da7219_alc_ana_gain_tlv),
537 SOC_ENUM("ALC Anticlip Step", da7219_alc_anticlip_step),
538 SOC_SINGLE("ALC Anticlip Switch", DA7219_ALC_ANTICLIP_CTRL,
539 DA7219_ALC_ANTIPCLIP_EN_SHIFT, DA7219_SWITCH_EN_MAX,
540 DA7219_NO_INVERT),
541 SOC_SINGLE_EXT("ALC Switch", DA7219_ALC_CTRL1, DA7219_ALC_EN_SHIFT,
542 DA7219_SWITCH_EN_MAX, DA7219_NO_INVERT,
543 snd_soc_get_volsw, da7219_alc_sw_put),
544
545 /* Input High-Pass Filters */
546 SOC_ENUM("ADC HPF Mode", da7219_adc_hpf_mode),
547 SOC_ENUM("ADC HPF Corner Audio", da7219_adc_audio_hpf_corner),
548 SOC_ENUM("ADC HPF Corner Voice", da7219_adc_voice_hpf_corner),
549
550 /* Sidetone Filter */
551 SOC_SINGLE_TLV("Sidetone Volume", DA7219_SIDETONE_GAIN,
552 DA7219_SIDETONE_GAIN_SHIFT, DA7219_SIDETONE_GAIN_MAX,
553 DA7219_NO_INVERT, da7219_sidetone_gain_tlv),
554 SOC_SINGLE("Sidetone Switch", DA7219_SIDETONE_CTRL,
555 DA7219_SIDETONE_MUTE_EN_SHIFT, DA7219_SWITCH_EN_MAX,
556 DA7219_INVERT),
557
558 /* Tone Generator */
559 SOC_SINGLE_EXT_TLV("ToneGen Volume", DA7219_TONE_GEN_CFG2,
560 DA7219_TONE_GEN_GAIN_SHIFT, DA7219_TONE_GEN_GAIN_MAX,
561 DA7219_NO_INVERT, da7219_volsw_locked_get,
562 da7219_volsw_locked_put, da7219_tonegen_gain_tlv),
563 SOC_ENUM_EXT("ToneGen DTMF Key", da7219_tonegen_dtmf_key,
564 da7219_enum_locked_get, da7219_enum_locked_put),
565 SOC_SINGLE_EXT("ToneGen DTMF Switch", DA7219_TONE_GEN_CFG1,
566 DA7219_DTMF_EN_SHIFT, DA7219_SWITCH_EN_MAX,
567 DA7219_NO_INVERT, da7219_volsw_locked_get,
568 da7219_volsw_locked_put),
569 SOC_ENUM_EXT("ToneGen Sinewave Gen Type", da7219_tonegen_swg_sel,
570 da7219_enum_locked_get, da7219_enum_locked_put),
571 SOC_SINGLE_EXT("ToneGen Sinewave1 Freq", DA7219_TONE_GEN_FREQ1_L,
572 DA7219_FREQ1_L_SHIFT, DA7219_FREQ_MAX, DA7219_NO_INVERT,
573 da7219_tonegen_freq_get, da7219_tonegen_freq_put),
574 SOC_SINGLE_EXT("ToneGen Sinewave2 Freq", DA7219_TONE_GEN_FREQ2_L,
575 DA7219_FREQ2_L_SHIFT, DA7219_FREQ_MAX, DA7219_NO_INVERT,
576 da7219_tonegen_freq_get, da7219_tonegen_freq_put),
577 SOC_SINGLE_EXT("ToneGen On Time", DA7219_TONE_GEN_ON_PER,
578 DA7219_BEEP_ON_PER_SHIFT, DA7219_BEEP_ON_OFF_MAX,
579 DA7219_NO_INVERT, da7219_volsw_locked_get,
580 da7219_volsw_locked_put),
581 SOC_SINGLE("ToneGen Off Time", DA7219_TONE_GEN_OFF_PER,
582 DA7219_BEEP_OFF_PER_SHIFT, DA7219_BEEP_ON_OFF_MAX,
583 DA7219_NO_INVERT),
584
585 /* Gain ramping */
586 SOC_ENUM("Gain Ramp Rate", da7219_gain_ramp_rate),
587
588 /* DAC High-Pass Filter */
589 SOC_ENUM_EXT("DAC HPF Mode", da7219_dac_hpf_mode,
590 da7219_enum_locked_get, da7219_enum_locked_put),
591 SOC_ENUM("DAC HPF Corner Audio", da7219_dac_audio_hpf_corner),
592 SOC_ENUM("DAC HPF Corner Voice", da7219_dac_voice_hpf_corner),
593
594 /* DAC 5-Band Equaliser */
595 SOC_SINGLE_TLV("DAC EQ Band1 Volume", DA7219_DAC_FILTERS2,
596 DA7219_DAC_EQ_BAND1_SHIFT, DA7219_DAC_EQ_BAND_MAX,
597 DA7219_NO_INVERT, da7219_dac_eq_band_tlv),
598 SOC_SINGLE_TLV("DAC EQ Band2 Volume", DA7219_DAC_FILTERS2,
599 DA7219_DAC_EQ_BAND2_SHIFT, DA7219_DAC_EQ_BAND_MAX,
600 DA7219_NO_INVERT, da7219_dac_eq_band_tlv),
601 SOC_SINGLE_TLV("DAC EQ Band3 Volume", DA7219_DAC_FILTERS3,
602 DA7219_DAC_EQ_BAND3_SHIFT, DA7219_DAC_EQ_BAND_MAX,
603 DA7219_NO_INVERT, da7219_dac_eq_band_tlv),
604 SOC_SINGLE_TLV("DAC EQ Band4 Volume", DA7219_DAC_FILTERS3,
605 DA7219_DAC_EQ_BAND4_SHIFT, DA7219_DAC_EQ_BAND_MAX,
606 DA7219_NO_INVERT, da7219_dac_eq_band_tlv),
607 SOC_SINGLE_TLV("DAC EQ Band5 Volume", DA7219_DAC_FILTERS4,
608 DA7219_DAC_EQ_BAND5_SHIFT, DA7219_DAC_EQ_BAND_MAX,
609 DA7219_NO_INVERT, da7219_dac_eq_band_tlv),
610 SOC_SINGLE_EXT("DAC EQ Switch", DA7219_DAC_FILTERS4,
611 DA7219_DAC_EQ_EN_SHIFT, DA7219_SWITCH_EN_MAX,
612 DA7219_NO_INVERT, da7219_volsw_locked_get,
613 da7219_volsw_locked_put),
614
615 /* DAC Softmute */
616 SOC_ENUM("DAC Soft Mute Rate", da7219_dac_softmute_rate),
617 SOC_SINGLE_EXT("DAC Soft Mute Switch", DA7219_DAC_FILTERS5,
618 DA7219_DAC_SOFTMUTE_EN_SHIFT, DA7219_SWITCH_EN_MAX,
619 DA7219_NO_INVERT, da7219_volsw_locked_get,
620 da7219_volsw_locked_put),
621
622 /* DAC Noise Gate */
623 SOC_ENUM("DAC NG Setup Time", da7219_dac_ng_setup_time),
624 SOC_ENUM("DAC NG Rampup Rate", da7219_dac_ng_rampup_rate),
625 SOC_ENUM("DAC NG Rampdown Rate", da7219_dac_ng_rampdown_rate),
626 SOC_SINGLE_TLV("DAC NG Off Threshold", DA7219_DAC_NG_OFF_THRESH,
627 DA7219_DAC_NG_OFF_THRESHOLD_SHIFT,
628 DA7219_DAC_NG_THRESHOLD_MAX, DA7219_NO_INVERT,
629 da7219_dac_ng_threshold_tlv),
630 SOC_SINGLE_TLV("DAC NG On Threshold", DA7219_DAC_NG_ON_THRESH,
631 DA7219_DAC_NG_ON_THRESHOLD_SHIFT,
632 DA7219_DAC_NG_THRESHOLD_MAX, DA7219_NO_INVERT,
633 da7219_dac_ng_threshold_tlv),
634 SOC_SINGLE("DAC NG Switch", DA7219_DAC_NG_CTRL, DA7219_DAC_NG_EN_SHIFT,
635 DA7219_SWITCH_EN_MAX, DA7219_NO_INVERT),
636
637 /* DACs */
638 SOC_DOUBLE_R_EXT_TLV("Playback Digital Volume", DA7219_DAC_L_GAIN,
639 DA7219_DAC_R_GAIN, DA7219_DAC_L_DIGITAL_GAIN_SHIFT,
640 DA7219_DAC_DIGITAL_GAIN_MAX, DA7219_NO_INVERT,
641 da7219_volsw_locked_get, da7219_volsw_locked_put,
642 da7219_dac_dig_gain_tlv),
643 SOC_DOUBLE_R_EXT("Playback Digital Switch", DA7219_DAC_L_CTRL,
644 DA7219_DAC_R_CTRL, DA7219_DAC_L_MUTE_EN_SHIFT,
645 DA7219_SWITCH_EN_MAX, DA7219_INVERT,
646 da7219_volsw_locked_get, da7219_volsw_locked_put),
647 SOC_DOUBLE_R("Playback Digital Gain Ramp Switch", DA7219_DAC_L_CTRL,
648 DA7219_DAC_R_CTRL, DA7219_DAC_L_RAMP_EN_SHIFT,
649 DA7219_SWITCH_EN_MAX, DA7219_NO_INVERT),
650
651 /* CP */
652 SOC_ENUM("Charge Pump Track Mode", da7219_cp_track_mode),
653 SOC_SINGLE("Charge Pump Threshold", DA7219_CP_VOL_THRESHOLD1,
654 DA7219_CP_THRESH_VDD2_SHIFT, DA7219_CP_THRESH_VDD2_MAX,
655 DA7219_NO_INVERT),
656
657 /* Headphones */
658 SOC_DOUBLE_R_EXT_TLV("Headphone Volume", DA7219_HP_L_GAIN,
659 DA7219_HP_R_GAIN, DA7219_HP_L_AMP_GAIN_SHIFT,
660 DA7219_HP_AMP_GAIN_MAX, DA7219_NO_INVERT,
661 da7219_volsw_locked_get, da7219_volsw_locked_put,
662 da7219_hp_gain_tlv),
663 SOC_DOUBLE_R_EXT("Headphone Switch", DA7219_HP_L_CTRL, DA7219_HP_R_CTRL,
664 DA7219_HP_L_AMP_MUTE_EN_SHIFT, DA7219_SWITCH_EN_MAX,
665 DA7219_INVERT, da7219_volsw_locked_get,
666 da7219_volsw_locked_put),
667 SOC_DOUBLE_R("Headphone Gain Ramp Switch", DA7219_HP_L_CTRL,
668 DA7219_HP_R_CTRL, DA7219_HP_L_AMP_RAMP_EN_SHIFT,
669 DA7219_SWITCH_EN_MAX, DA7219_NO_INVERT),
670 SOC_DOUBLE_R("Headphone ZC Gain Switch", DA7219_HP_L_CTRL,
671 DA7219_HP_R_CTRL, DA7219_HP_L_AMP_ZC_EN_SHIFT,
672 DA7219_SWITCH_EN_MAX, DA7219_NO_INVERT),
673};
674
675
676/*
677 * DAPM Mux Controls
678 */
679
680static const char * const da7219_out_sel_txt[] = {
681 "ADC", "Tone Generator", "DAIL", "DAIR"
682};
683
684static const struct soc_enum da7219_out_dail_sel =
685 SOC_ENUM_SINGLE(DA7219_DIG_ROUTING_DAI,
686 DA7219_DAI_L_SRC_SHIFT,
687 DA7219_OUT_SRC_MAX,
688 da7219_out_sel_txt);
689
690static const struct snd_kcontrol_new da7219_out_dail_sel_mux =
691 SOC_DAPM_ENUM("Out DAIL Mux", da7219_out_dail_sel);
692
693static const struct soc_enum da7219_out_dair_sel =
694 SOC_ENUM_SINGLE(DA7219_DIG_ROUTING_DAI,
695 DA7219_DAI_R_SRC_SHIFT,
696 DA7219_OUT_SRC_MAX,
697 da7219_out_sel_txt);
698
699static const struct snd_kcontrol_new da7219_out_dair_sel_mux =
700 SOC_DAPM_ENUM("Out DAIR Mux", da7219_out_dair_sel);
701
702static const struct soc_enum da7219_out_dacl_sel =
703 SOC_ENUM_SINGLE(DA7219_DIG_ROUTING_DAC,
704 DA7219_DAC_L_SRC_SHIFT,
705 DA7219_OUT_SRC_MAX,
706 da7219_out_sel_txt);
707
708static const struct snd_kcontrol_new da7219_out_dacl_sel_mux =
709 SOC_DAPM_ENUM("Out DACL Mux", da7219_out_dacl_sel);
710
711static const struct soc_enum da7219_out_dacr_sel =
712 SOC_ENUM_SINGLE(DA7219_DIG_ROUTING_DAC,
713 DA7219_DAC_R_SRC_SHIFT,
714 DA7219_OUT_SRC_MAX,
715 da7219_out_sel_txt);
716
717static const struct snd_kcontrol_new da7219_out_dacr_sel_mux =
718 SOC_DAPM_ENUM("Out DACR Mux", da7219_out_dacr_sel);
719
720
721/*
722 * DAPM Mixer Controls
723 */
724
725static const struct snd_kcontrol_new da7219_mixin_controls[] = {
726 SOC_DAPM_SINGLE("Mic Switch", DA7219_MIXIN_L_SELECT,
727 DA7219_MIXIN_L_MIX_SELECT_SHIFT,
728 DA7219_SWITCH_EN_MAX, DA7219_NO_INVERT),
729};
730
731static const struct snd_kcontrol_new da7219_mixout_l_controls[] = {
732 SOC_DAPM_SINGLE("DACL Switch", DA7219_MIXOUT_L_SELECT,
733 DA7219_MIXOUT_L_MIX_SELECT_SHIFT,
734 DA7219_SWITCH_EN_MAX, DA7219_NO_INVERT),
735};
736
737static const struct snd_kcontrol_new da7219_mixout_r_controls[] = {
738 SOC_DAPM_SINGLE("DACR Switch", DA7219_MIXOUT_R_SELECT,
739 DA7219_MIXOUT_R_MIX_SELECT_SHIFT,
740 DA7219_SWITCH_EN_MAX, DA7219_NO_INVERT),
741};
742
743#define DA7219_DMIX_ST_CTRLS(reg) \
744 SOC_DAPM_SINGLE("Out FilterL Switch", reg, \
745 DA7219_DMIX_ST_SRC_OUTFILT1L_SHIFT, \
746 DA7219_SWITCH_EN_MAX, DA7219_NO_INVERT), \
747 SOC_DAPM_SINGLE("Out FilterR Switch", reg, \
748 DA7219_DMIX_ST_SRC_OUTFILT1R_SHIFT, \
749 DA7219_SWITCH_EN_MAX, DA7219_NO_INVERT), \
750 SOC_DAPM_SINGLE("Sidetone Switch", reg, \
751 DA7219_DMIX_ST_SRC_SIDETONE_SHIFT, \
752 DA7219_SWITCH_EN_MAX, DA7219_NO_INVERT) \
753
754static const struct snd_kcontrol_new da7219_st_out_filtl_mix_controls[] = {
755 DA7219_DMIX_ST_CTRLS(DA7219_DROUTING_ST_OUTFILT_1L),
756};
757
758static const struct snd_kcontrol_new da7219_st_out_filtr_mix_controls[] = {
759 DA7219_DMIX_ST_CTRLS(DA7219_DROUTING_ST_OUTFILT_1R),
760};
761
762
763/*
764 * DAPM Events
765 */
766
Adam Thomson17c81d22018-08-09 10:48:50 +0100767static int da7219_mic_pga_event(struct snd_soc_dapm_widget *w,
768 struct snd_kcontrol *kcontrol, int event)
769{
770 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
771 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component);
772
773 switch (event) {
774 case SND_SOC_DAPM_POST_PMU:
775 if (da7219->micbias_on_event) {
776 /*
777 * Delay only for first capture after bias enabled to
778 * avoid possible DC offset related noise.
779 */
780 da7219->micbias_on_event = false;
781 msleep(da7219->mic_pga_delay);
782 }
783 break;
784 default:
785 break;
786 }
787
788 return 0;
789}
790
Adam Thomson6d817c02015-09-29 16:44:01 +0100791static int da7219_dai_event(struct snd_soc_dapm_widget *w,
792 struct snd_kcontrol *kcontrol, int event)
793{
Kuninori Morimoto45101122018-01-29 04:36:54 +0000794 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
795 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component);
Adam Thomsond90ba6c2019-03-19 17:49:31 +0000796 struct clk *bclk = da7219->dai_clks[DA7219_DAI_BCLK_IDX];
Adam Thomson6d817c02015-09-29 16:44:01 +0100797 u8 pll_ctrl, pll_status;
Adam Thomsonfc8f7ea2018-03-09 16:25:43 +0000798 int i = 0, ret;
Adam Thomson6d817c02015-09-29 16:44:01 +0100799 bool srm_lock = false;
800
801 switch (event) {
802 case SND_SOC_DAPM_PRE_PMU:
Adam Thomsonfc8f7ea2018-03-09 16:25:43 +0000803 if (da7219->master) {
Adam Thomson6d817c02015-09-29 16:44:01 +0100804 /* Enable DAI clks for master mode */
Adam Thomsond90ba6c2019-03-19 17:49:31 +0000805 if (bclk) {
806 ret = clk_prepare_enable(bclk);
Adam Thomsonfc8f7ea2018-03-09 16:25:43 +0000807 if (ret) {
808 dev_err(component->dev,
Adam Thomsond90ba6c2019-03-19 17:49:31 +0000809 "Failed to enable DAI clks\n");
Adam Thomsonfc8f7ea2018-03-09 16:25:43 +0000810 return ret;
811 }
812 } else {
813 snd_soc_component_update_bits(component,
814 DA7219_DAI_CLK_MODE,
815 DA7219_DAI_CLK_EN_MASK,
816 DA7219_DAI_CLK_EN_MASK);
817 }
818 }
Adam Thomson6d817c02015-09-29 16:44:01 +0100819
820 /* PC synchronised to DAI */
Kuninori Morimoto45101122018-01-29 04:36:54 +0000821 snd_soc_component_update_bits(component, DA7219_PC_COUNT,
Adam Thomson6d817c02015-09-29 16:44:01 +0100822 DA7219_PC_FREERUN_MASK, 0);
823
824 /* Slave mode, if SRM not enabled no need for status checks */
Kuninori Morimoto2925b582020-06-16 14:21:42 +0900825 pll_ctrl = snd_soc_component_read(component, DA7219_PLL_CTRL);
Adam Thomson6d817c02015-09-29 16:44:01 +0100826 if ((pll_ctrl & DA7219_PLL_MODE_MASK) != DA7219_PLL_MODE_SRM)
827 return 0;
828
829 /* Check SRM has locked */
830 do {
Kuninori Morimoto2925b582020-06-16 14:21:42 +0900831 pll_status = snd_soc_component_read(component, DA7219_PLL_SRM_STS);
Adam Thomson6d817c02015-09-29 16:44:01 +0100832 if (pll_status & DA7219_PLL_SRM_STS_SRM_LOCK) {
833 srm_lock = true;
834 } else {
835 ++i;
836 msleep(50);
837 }
Pierre-Louis Bossartb468f372019-01-04 20:02:47 -0600838 } while ((i < DA7219_SRM_CHECK_RETRIES) && (!srm_lock));
Adam Thomson6d817c02015-09-29 16:44:01 +0100839
840 if (!srm_lock)
Kuninori Morimoto45101122018-01-29 04:36:54 +0000841 dev_warn(component->dev, "SRM failed to lock\n");
Adam Thomson6d817c02015-09-29 16:44:01 +0100842
843 return 0;
844 case SND_SOC_DAPM_POST_PMD:
845 /* PC free-running */
Kuninori Morimoto45101122018-01-29 04:36:54 +0000846 snd_soc_component_update_bits(component, DA7219_PC_COUNT,
Adam Thomson6d817c02015-09-29 16:44:01 +0100847 DA7219_PC_FREERUN_MASK,
848 DA7219_PC_FREERUN_MASK);
849
850 /* Disable DAI clks if in master mode */
Adam Thomsonfc8f7ea2018-03-09 16:25:43 +0000851 if (da7219->master) {
Adam Thomsond90ba6c2019-03-19 17:49:31 +0000852 if (bclk)
853 clk_disable_unprepare(bclk);
Adam Thomsonfc8f7ea2018-03-09 16:25:43 +0000854 else
855 snd_soc_component_update_bits(component,
856 DA7219_DAI_CLK_MODE,
857 DA7219_DAI_CLK_EN_MASK,
858 0);
859 }
860
Adam Thomson6d817c02015-09-29 16:44:01 +0100861 return 0;
862 default:
863 return -EINVAL;
864 }
865}
866
Adam Thomson86834512016-10-03 11:21:01 +0100867static int da7219_settling_event(struct snd_soc_dapm_widget *w,
868 struct snd_kcontrol *kcontrol, int event)
869{
870 switch (event) {
871 case SND_SOC_DAPM_POST_PMU:
872 case SND_SOC_DAPM_POST_PMD:
873 msleep(DA7219_SETTLING_DELAY);
874 break;
875 default:
876 break;
877 }
878
879 return 0;
880}
881
882static int da7219_mixout_event(struct snd_soc_dapm_widget *w,
883 struct snd_kcontrol *kcontrol, int event)
884{
Kuninori Morimoto45101122018-01-29 04:36:54 +0000885 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
Adam Thomson86834512016-10-03 11:21:01 +0100886 u8 hp_ctrl, min_gain_mask;
887
888 switch (w->reg) {
889 case DA7219_MIXOUT_L_CTRL:
890 hp_ctrl = DA7219_HP_L_CTRL;
891 min_gain_mask = DA7219_HP_L_AMP_MIN_GAIN_EN_MASK;
892 break;
893 case DA7219_MIXOUT_R_CTRL:
894 hp_ctrl = DA7219_HP_R_CTRL;
895 min_gain_mask = DA7219_HP_R_AMP_MIN_GAIN_EN_MASK;
896 break;
897 default:
898 return -EINVAL;
899 }
900
901 switch (event) {
902 case SND_SOC_DAPM_PRE_PMD:
903 /* Enable minimum gain on HP to avoid pops */
Kuninori Morimoto45101122018-01-29 04:36:54 +0000904 snd_soc_component_update_bits(component, hp_ctrl, min_gain_mask,
Adam Thomson86834512016-10-03 11:21:01 +0100905 min_gain_mask);
906
907 msleep(DA7219_MIN_GAIN_DELAY);
908
909 break;
910 case SND_SOC_DAPM_POST_PMU:
911 /* Remove minimum gain on HP */
Kuninori Morimoto45101122018-01-29 04:36:54 +0000912 snd_soc_component_update_bits(component, hp_ctrl, min_gain_mask, 0);
Adam Thomson86834512016-10-03 11:21:01 +0100913
914 break;
915 }
916
917 return 0;
918}
919
920static int da7219_gain_ramp_event(struct snd_soc_dapm_widget *w,
921 struct snd_kcontrol *kcontrol, int event)
922{
Kuninori Morimoto45101122018-01-29 04:36:54 +0000923 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
924 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component);
Adam Thomson86834512016-10-03 11:21:01 +0100925
926 switch (event) {
927 case SND_SOC_DAPM_PRE_PMU:
928 case SND_SOC_DAPM_PRE_PMD:
929 /* Ensure nominal gain ramping for DAPM sequence */
930 da7219->gain_ramp_ctrl =
Kuninori Morimoto2925b582020-06-16 14:21:42 +0900931 snd_soc_component_read(component, DA7219_GAIN_RAMP_CTRL);
Kuninori Morimoto45101122018-01-29 04:36:54 +0000932 snd_soc_component_write(component, DA7219_GAIN_RAMP_CTRL,
Adam Thomson86834512016-10-03 11:21:01 +0100933 DA7219_GAIN_RAMP_RATE_NOMINAL);
934 break;
935 case SND_SOC_DAPM_POST_PMU:
936 case SND_SOC_DAPM_POST_PMD:
937 /* Restore previous gain ramp settings */
Kuninori Morimoto45101122018-01-29 04:36:54 +0000938 snd_soc_component_write(component, DA7219_GAIN_RAMP_CTRL,
Adam Thomson86834512016-10-03 11:21:01 +0100939 da7219->gain_ramp_ctrl);
940 break;
941 }
942
943 return 0;
944}
945
Adam Thomson6d817c02015-09-29 16:44:01 +0100946
947/*
948 * DAPM Widgets
949 */
950
951static const struct snd_soc_dapm_widget da7219_dapm_widgets[] = {
952 /* Input Supplies */
953 SND_SOC_DAPM_SUPPLY("Mic Bias", DA7219_MICBIAS_CTRL,
954 DA7219_MICBIAS1_EN_SHIFT, DA7219_NO_INVERT,
955 NULL, 0),
956
957 /* Inputs */
958 SND_SOC_DAPM_INPUT("MIC"),
959
960 /* Input PGAs */
Adam Thomson17c81d22018-08-09 10:48:50 +0100961 SND_SOC_DAPM_PGA_E("Mic PGA", DA7219_MIC_1_CTRL,
962 DA7219_MIC_1_AMP_EN_SHIFT, DA7219_NO_INVERT,
963 NULL, 0, da7219_mic_pga_event, SND_SOC_DAPM_POST_PMU),
964 SND_SOC_DAPM_PGA_E("Mixin PGA", DA7219_MIXIN_L_CTRL,
965 DA7219_MIXIN_L_AMP_EN_SHIFT, DA7219_NO_INVERT,
966 NULL, 0, da7219_settling_event, SND_SOC_DAPM_POST_PMU),
Adam Thomson6d817c02015-09-29 16:44:01 +0100967
968 /* Input Filters */
969 SND_SOC_DAPM_ADC("ADC", NULL, DA7219_ADC_L_CTRL, DA7219_ADC_L_EN_SHIFT,
970 DA7219_NO_INVERT),
971
972 /* Tone Generator */
973 SND_SOC_DAPM_SIGGEN("TONE"),
974 SND_SOC_DAPM_PGA("Tone Generator", DA7219_TONE_GEN_CFG1,
975 DA7219_START_STOPN_SHIFT, DA7219_NO_INVERT, NULL, 0),
976
977 /* Sidetone Input */
978 SND_SOC_DAPM_ADC("Sidetone Filter", NULL, DA7219_SIDETONE_CTRL,
979 DA7219_SIDETONE_EN_SHIFT, DA7219_NO_INVERT),
980
981 /* Input Mixer Supply */
982 SND_SOC_DAPM_SUPPLY("Mixer In Supply", DA7219_MIXIN_L_CTRL,
983 DA7219_MIXIN_L_MIX_EN_SHIFT, DA7219_NO_INVERT,
984 NULL, 0),
985
986 /* Input Mixer */
987 SND_SOC_DAPM_MIXER("Mixer In", SND_SOC_NOPM, 0, 0,
988 da7219_mixin_controls,
989 ARRAY_SIZE(da7219_mixin_controls)),
990
991 /* Input Muxes */
992 SND_SOC_DAPM_MUX("Out DAIL Mux", SND_SOC_NOPM, 0, 0,
993 &da7219_out_dail_sel_mux),
994 SND_SOC_DAPM_MUX("Out DAIR Mux", SND_SOC_NOPM, 0, 0,
995 &da7219_out_dair_sel_mux),
996
997 /* DAI Supply */
998 SND_SOC_DAPM_SUPPLY("DAI", DA7219_DAI_CTRL, DA7219_DAI_EN_SHIFT,
999 DA7219_NO_INVERT, da7219_dai_event,
1000 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
1001
1002 /* DAI */
Stephen Barberd64b5bf2016-10-27 18:02:27 -07001003 SND_SOC_DAPM_AIF_OUT("DAIOUT", "Capture", 0, DA7219_DAI_TDM_CTRL,
1004 DA7219_DAI_OE_SHIFT, DA7219_NO_INVERT),
Adam Thomson6d817c02015-09-29 16:44:01 +01001005 SND_SOC_DAPM_AIF_IN("DAIIN", "Playback", 0, SND_SOC_NOPM, 0, 0),
1006
1007 /* Output Muxes */
1008 SND_SOC_DAPM_MUX("Out DACL Mux", SND_SOC_NOPM, 0, 0,
1009 &da7219_out_dacl_sel_mux),
1010 SND_SOC_DAPM_MUX("Out DACR Mux", SND_SOC_NOPM, 0, 0,
1011 &da7219_out_dacr_sel_mux),
1012
1013 /* Output Mixers */
1014 SND_SOC_DAPM_MIXER("Mixer Out FilterL", SND_SOC_NOPM, 0, 0,
1015 da7219_mixout_l_controls,
1016 ARRAY_SIZE(da7219_mixout_l_controls)),
1017 SND_SOC_DAPM_MIXER("Mixer Out FilterR", SND_SOC_NOPM, 0, 0,
1018 da7219_mixout_r_controls,
1019 ARRAY_SIZE(da7219_mixout_r_controls)),
1020
1021 /* Sidetone Mixers */
1022 SND_SOC_DAPM_MIXER("ST Mixer Out FilterL", SND_SOC_NOPM, 0, 0,
1023 da7219_st_out_filtl_mix_controls,
1024 ARRAY_SIZE(da7219_st_out_filtl_mix_controls)),
1025 SND_SOC_DAPM_MIXER("ST Mixer Out FilterR", SND_SOC_NOPM, 0,
1026 0, da7219_st_out_filtr_mix_controls,
1027 ARRAY_SIZE(da7219_st_out_filtr_mix_controls)),
1028
1029 /* DACs */
Adam Thomson86834512016-10-03 11:21:01 +01001030 SND_SOC_DAPM_DAC_E("DACL", NULL, DA7219_DAC_L_CTRL,
1031 DA7219_DAC_L_EN_SHIFT, DA7219_NO_INVERT,
1032 da7219_settling_event,
1033 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
1034 SND_SOC_DAPM_DAC_E("DACR", NULL, DA7219_DAC_R_CTRL,
1035 DA7219_DAC_R_EN_SHIFT, DA7219_NO_INVERT,
1036 da7219_settling_event,
1037 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
Adam Thomson6d817c02015-09-29 16:44:01 +01001038
1039 /* Output PGAs */
Adam Thomson86834512016-10-03 11:21:01 +01001040 SND_SOC_DAPM_PGA_E("Mixout Left PGA", DA7219_MIXOUT_L_CTRL,
1041 DA7219_MIXOUT_L_AMP_EN_SHIFT, DA7219_NO_INVERT,
1042 NULL, 0, da7219_mixout_event,
1043 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
1044 SND_SOC_DAPM_PGA_E("Mixout Right PGA", DA7219_MIXOUT_R_CTRL,
1045 DA7219_MIXOUT_R_AMP_EN_SHIFT, DA7219_NO_INVERT,
1046 NULL, 0, da7219_mixout_event,
1047 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
1048 SND_SOC_DAPM_SUPPLY_S("Headphone Left PGA", 1, DA7219_HP_L_CTRL,
1049 DA7219_HP_L_AMP_EN_SHIFT, DA7219_NO_INVERT,
1050 da7219_settling_event,
1051 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
1052 SND_SOC_DAPM_SUPPLY_S("Headphone Right PGA", 1, DA7219_HP_R_CTRL,
1053 DA7219_HP_R_AMP_EN_SHIFT, DA7219_NO_INVERT,
1054 da7219_settling_event,
1055 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
Adam Thomson6d817c02015-09-29 16:44:01 +01001056
1057 /* Output Supplies */
Adam Thomson86834512016-10-03 11:21:01 +01001058 SND_SOC_DAPM_SUPPLY_S("Charge Pump", 0, DA7219_CP_CTRL,
1059 DA7219_CP_EN_SHIFT, DA7219_NO_INVERT,
1060 da7219_settling_event,
1061 SND_SOC_DAPM_POST_PMU),
Adam Thomson6d817c02015-09-29 16:44:01 +01001062
1063 /* Outputs */
1064 SND_SOC_DAPM_OUTPUT("HPL"),
1065 SND_SOC_DAPM_OUTPUT("HPR"),
Adam Thomson86834512016-10-03 11:21:01 +01001066
1067 /* Pre/Post Power */
1068 SND_SOC_DAPM_PRE("Pre Power Gain Ramp", da7219_gain_ramp_event),
1069 SND_SOC_DAPM_POST("Post Power Gain Ramp", da7219_gain_ramp_event),
Adam Thomson6d817c02015-09-29 16:44:01 +01001070};
1071
1072
1073/*
1074 * DAPM Mux Routes
1075 */
1076
1077#define DA7219_OUT_DAI_MUX_ROUTES(name) \
1078 {name, "ADC", "Mixer In"}, \
1079 {name, "Tone Generator", "Tone Generator"}, \
1080 {name, "DAIL", "DAIOUT"}, \
1081 {name, "DAIR", "DAIOUT"}
1082
1083#define DA7219_OUT_DAC_MUX_ROUTES(name) \
1084 {name, "ADC", "Mixer In"}, \
1085 {name, "Tone Generator", "Tone Generator"}, \
1086 {name, "DAIL", "DAIIN"}, \
1087 {name, "DAIR", "DAIIN"}
1088
1089/*
1090 * DAPM Mixer Routes
1091 */
1092
1093#define DA7219_DMIX_ST_ROUTES(name) \
1094 {name, "Out FilterL Switch", "Mixer Out FilterL"}, \
1095 {name, "Out FilterR Switch", "Mixer Out FilterR"}, \
1096 {name, "Sidetone Switch", "Sidetone Filter"}
1097
1098
1099/*
1100 * DAPM audio route definition
1101 */
1102
1103static const struct snd_soc_dapm_route da7219_audio_map[] = {
1104 /* Input paths */
1105 {"MIC", NULL, "Mic Bias"},
1106 {"Mic PGA", NULL, "MIC"},
1107 {"Mixin PGA", NULL, "Mic PGA"},
1108 {"ADC", NULL, "Mixin PGA"},
1109
Adam Thomson6d817c02015-09-29 16:44:01 +01001110 {"Mixer In", NULL, "Mixer In Supply"},
1111 {"Mixer In", "Mic Switch", "ADC"},
1112
Adam Thomsonfdd50a82015-12-22 18:27:52 +00001113 {"Sidetone Filter", NULL, "Mixer In"},
1114
Adam Thomson6d817c02015-09-29 16:44:01 +01001115 {"Tone Generator", NULL, "TONE"},
1116
1117 DA7219_OUT_DAI_MUX_ROUTES("Out DAIL Mux"),
1118 DA7219_OUT_DAI_MUX_ROUTES("Out DAIR Mux"),
1119
1120 {"DAIOUT", NULL, "Out DAIL Mux"},
1121 {"DAIOUT", NULL, "Out DAIR Mux"},
1122 {"DAIOUT", NULL, "DAI"},
1123
1124 /* Output paths */
1125 {"DAIIN", NULL, "DAI"},
1126
1127 DA7219_OUT_DAC_MUX_ROUTES("Out DACL Mux"),
1128 DA7219_OUT_DAC_MUX_ROUTES("Out DACR Mux"),
1129
1130 {"Mixer Out FilterL", "DACL Switch", "Out DACL Mux"},
1131 {"Mixer Out FilterR", "DACR Switch", "Out DACR Mux"},
1132
1133 DA7219_DMIX_ST_ROUTES("ST Mixer Out FilterL"),
1134 DA7219_DMIX_ST_ROUTES("ST Mixer Out FilterR"),
1135
1136 {"DACL", NULL, "ST Mixer Out FilterL"},
1137 {"DACR", NULL, "ST Mixer Out FilterR"},
1138
1139 {"Mixout Left PGA", NULL, "DACL"},
1140 {"Mixout Right PGA", NULL, "DACR"},
1141
Adam Thomson86834512016-10-03 11:21:01 +01001142 {"HPL", NULL, "Mixout Left PGA"},
1143 {"HPR", NULL, "Mixout Right PGA"},
Adam Thomson6d817c02015-09-29 16:44:01 +01001144
1145 {"HPL", NULL, "Headphone Left PGA"},
1146 {"HPR", NULL, "Headphone Right PGA"},
1147
1148 {"HPL", NULL, "Charge Pump"},
1149 {"HPR", NULL, "Charge Pump"},
1150};
1151
1152
1153/*
1154 * DAI operations
1155 */
1156
1157static int da7219_set_dai_sysclk(struct snd_soc_dai *codec_dai,
1158 int clk_id, unsigned int freq, int dir)
1159{
Kuninori Morimoto45101122018-01-29 04:36:54 +00001160 struct snd_soc_component *component = codec_dai->component;
1161 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component);
Adam Thomson6d817c02015-09-29 16:44:01 +01001162 int ret = 0;
1163
1164 if ((da7219->clk_src == clk_id) && (da7219->mclk_rate == freq))
1165 return 0;
1166
Adam Thomsonfb137ba2016-04-19 15:19:03 +01001167 if ((freq < 2000000) || (freq > 54000000)) {
Adam Thomson6d817c02015-09-29 16:44:01 +01001168 dev_err(codec_dai->dev, "Unsupported MCLK value %d\n",
1169 freq);
1170 return -EINVAL;
1171 }
1172
Adam Thomson2a0c2182017-06-19 10:56:33 +01001173 mutex_lock(&da7219->pll_lock);
1174
Adam Thomson6d817c02015-09-29 16:44:01 +01001175 switch (clk_id) {
1176 case DA7219_CLKSRC_MCLK_SQR:
Kuninori Morimoto45101122018-01-29 04:36:54 +00001177 snd_soc_component_update_bits(component, DA7219_PLL_CTRL,
Adam Thomson6d817c02015-09-29 16:44:01 +01001178 DA7219_PLL_MCLK_SQR_EN_MASK,
1179 DA7219_PLL_MCLK_SQR_EN_MASK);
1180 break;
1181 case DA7219_CLKSRC_MCLK:
Kuninori Morimoto45101122018-01-29 04:36:54 +00001182 snd_soc_component_update_bits(component, DA7219_PLL_CTRL,
Adam Thomson6d817c02015-09-29 16:44:01 +01001183 DA7219_PLL_MCLK_SQR_EN_MASK, 0);
1184 break;
1185 default:
1186 dev_err(codec_dai->dev, "Unknown clock source %d\n", clk_id);
Adam Thomson2a0c2182017-06-19 10:56:33 +01001187 mutex_unlock(&da7219->pll_lock);
Adam Thomson6d817c02015-09-29 16:44:01 +01001188 return -EINVAL;
1189 }
1190
1191 da7219->clk_src = clk_id;
1192
1193 if (da7219->mclk) {
1194 freq = clk_round_rate(da7219->mclk, freq);
1195 ret = clk_set_rate(da7219->mclk, freq);
1196 if (ret) {
1197 dev_err(codec_dai->dev, "Failed to set clock rate %d\n",
1198 freq);
Adam Thomson2a0c2182017-06-19 10:56:33 +01001199 mutex_unlock(&da7219->pll_lock);
Adam Thomson6d817c02015-09-29 16:44:01 +01001200 return ret;
1201 }
1202 }
1203
1204 da7219->mclk_rate = freq;
1205
Adam Thomson2a0c2182017-06-19 10:56:33 +01001206 mutex_unlock(&da7219->pll_lock);
1207
Adam Thomson6d817c02015-09-29 16:44:01 +01001208 return 0;
1209}
1210
Kuninori Morimoto45101122018-01-29 04:36:54 +00001211int da7219_set_pll(struct snd_soc_component *component, int source, unsigned int fout)
Adam Thomson6d817c02015-09-29 16:44:01 +01001212{
Kuninori Morimoto45101122018-01-29 04:36:54 +00001213 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component);
Adam Thomson6d817c02015-09-29 16:44:01 +01001214
1215 u8 pll_ctrl, indiv_bits, indiv;
1216 u8 pll_frac_top, pll_frac_bot, pll_integer;
1217 u32 freq_ref;
1218 u64 frac_div;
1219
Adam Thomson501f72e2015-12-22 18:27:56 +00001220 /* Verify 2MHz - 54MHz MCLK provided, and set input divider */
1221 if (da7219->mclk_rate < 2000000) {
Kuninori Morimoto45101122018-01-29 04:36:54 +00001222 dev_err(component->dev, "PLL input clock %d below valid range\n",
Adam Thomson6d817c02015-09-29 16:44:01 +01001223 da7219->mclk_rate);
1224 return -EINVAL;
Adam Thomson63a450aa2016-04-19 15:19:02 +01001225 } else if (da7219->mclk_rate <= 4500000) {
1226 indiv_bits = DA7219_PLL_INDIV_2_TO_4_5_MHZ;
1227 indiv = DA7219_PLL_INDIV_2_TO_4_5_MHZ_VAL;
1228 } else if (da7219->mclk_rate <= 9000000) {
1229 indiv_bits = DA7219_PLL_INDIV_4_5_TO_9_MHZ;
1230 indiv = DA7219_PLL_INDIV_4_5_TO_9_MHZ_VAL;
1231 } else if (da7219->mclk_rate <= 18000000) {
1232 indiv_bits = DA7219_PLL_INDIV_9_TO_18_MHZ;
1233 indiv = DA7219_PLL_INDIV_9_TO_18_MHZ_VAL;
1234 } else if (da7219->mclk_rate <= 36000000) {
1235 indiv_bits = DA7219_PLL_INDIV_18_TO_36_MHZ;
1236 indiv = DA7219_PLL_INDIV_18_TO_36_MHZ_VAL;
Adam Thomson6d817c02015-09-29 16:44:01 +01001237 } else if (da7219->mclk_rate <= 54000000) {
Adam Thomson63a450aa2016-04-19 15:19:02 +01001238 indiv_bits = DA7219_PLL_INDIV_36_TO_54_MHZ;
1239 indiv = DA7219_PLL_INDIV_36_TO_54_MHZ_VAL;
Adam Thomson6d817c02015-09-29 16:44:01 +01001240 } else {
Kuninori Morimoto45101122018-01-29 04:36:54 +00001241 dev_err(component->dev, "PLL input clock %d above valid range\n",
Adam Thomson6d817c02015-09-29 16:44:01 +01001242 da7219->mclk_rate);
1243 return -EINVAL;
1244 }
1245 freq_ref = (da7219->mclk_rate / indiv);
1246 pll_ctrl = indiv_bits;
1247
1248 /* Configure PLL */
1249 switch (source) {
1250 case DA7219_SYSCLK_MCLK:
1251 pll_ctrl |= DA7219_PLL_MODE_BYPASS;
Kuninori Morimoto45101122018-01-29 04:36:54 +00001252 snd_soc_component_update_bits(component, DA7219_PLL_CTRL,
Adam Thomson6d817c02015-09-29 16:44:01 +01001253 DA7219_PLL_INDIV_MASK |
1254 DA7219_PLL_MODE_MASK, pll_ctrl);
1255 return 0;
1256 case DA7219_SYSCLK_PLL:
1257 pll_ctrl |= DA7219_PLL_MODE_NORMAL;
1258 break;
1259 case DA7219_SYSCLK_PLL_SRM:
1260 pll_ctrl |= DA7219_PLL_MODE_SRM;
1261 break;
Adam Thomson6d817c02015-09-29 16:44:01 +01001262 default:
Kuninori Morimoto45101122018-01-29 04:36:54 +00001263 dev_err(component->dev, "Invalid PLL config\n");
Adam Thomson6d817c02015-09-29 16:44:01 +01001264 return -EINVAL;
1265 }
1266
1267 /* Calculate dividers for PLL */
1268 pll_integer = fout / freq_ref;
1269 frac_div = (u64)(fout % freq_ref) * 8192ULL;
1270 do_div(frac_div, freq_ref);
1271 pll_frac_top = (frac_div >> DA7219_BYTE_SHIFT) & DA7219_BYTE_MASK;
1272 pll_frac_bot = (frac_div) & DA7219_BYTE_MASK;
1273
1274 /* Write PLL config & dividers */
Kuninori Morimoto45101122018-01-29 04:36:54 +00001275 snd_soc_component_write(component, DA7219_PLL_FRAC_TOP, pll_frac_top);
1276 snd_soc_component_write(component, DA7219_PLL_FRAC_BOT, pll_frac_bot);
1277 snd_soc_component_write(component, DA7219_PLL_INTEGER, pll_integer);
1278 snd_soc_component_update_bits(component, DA7219_PLL_CTRL,
Adam Thomson6d817c02015-09-29 16:44:01 +01001279 DA7219_PLL_INDIV_MASK | DA7219_PLL_MODE_MASK,
1280 pll_ctrl);
1281
1282 return 0;
1283}
1284
Adam Thomson2a0c2182017-06-19 10:56:33 +01001285static int da7219_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
1286 int source, unsigned int fref, unsigned int fout)
1287{
Kuninori Morimoto45101122018-01-29 04:36:54 +00001288 struct snd_soc_component *component = codec_dai->component;
1289 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component);
Adam Thomson2a0c2182017-06-19 10:56:33 +01001290 int ret;
1291
1292 mutex_lock(&da7219->pll_lock);
Kuninori Morimoto45101122018-01-29 04:36:54 +00001293 ret = da7219_set_pll(component, source, fout);
Adam Thomson2a0c2182017-06-19 10:56:33 +01001294 mutex_unlock(&da7219->pll_lock);
1295
1296 return ret;
1297}
1298
Adam Thomson6d817c02015-09-29 16:44:01 +01001299static int da7219_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
1300{
Kuninori Morimoto45101122018-01-29 04:36:54 +00001301 struct snd_soc_component *component = codec_dai->component;
1302 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component);
Adam Thomson6d817c02015-09-29 16:44:01 +01001303 u8 dai_clk_mode = 0, dai_ctrl = 0;
1304
1305 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1306 case SND_SOC_DAIFMT_CBM_CFM:
1307 da7219->master = true;
1308 break;
1309 case SND_SOC_DAIFMT_CBS_CFS:
1310 da7219->master = false;
1311 break;
1312 default:
1313 return -EINVAL;
1314 }
1315
Adam Thomson4acfa362016-01-05 15:05:36 +00001316 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1317 case SND_SOC_DAIFMT_I2S:
1318 case SND_SOC_DAIFMT_LEFT_J:
1319 case SND_SOC_DAIFMT_RIGHT_J:
1320 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1321 case SND_SOC_DAIFMT_NB_NF:
1322 break;
1323 case SND_SOC_DAIFMT_NB_IF:
1324 dai_clk_mode |= DA7219_DAI_WCLK_POL_INV;
1325 break;
1326 case SND_SOC_DAIFMT_IB_NF:
1327 dai_clk_mode |= DA7219_DAI_CLK_POL_INV;
1328 break;
1329 case SND_SOC_DAIFMT_IB_IF:
1330 dai_clk_mode |= DA7219_DAI_WCLK_POL_INV |
1331 DA7219_DAI_CLK_POL_INV;
1332 break;
1333 default:
1334 return -EINVAL;
1335 }
Adam Thomson6d817c02015-09-29 16:44:01 +01001336 break;
Adam Thomson4acfa362016-01-05 15:05:36 +00001337 case SND_SOC_DAIFMT_DSP_B:
1338 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1339 case SND_SOC_DAIFMT_NB_NF:
1340 dai_clk_mode |= DA7219_DAI_CLK_POL_INV;
1341 break;
1342 case SND_SOC_DAIFMT_NB_IF:
1343 dai_clk_mode |= DA7219_DAI_WCLK_POL_INV |
1344 DA7219_DAI_CLK_POL_INV;
1345 break;
1346 case SND_SOC_DAIFMT_IB_NF:
1347 break;
1348 case SND_SOC_DAIFMT_IB_IF:
1349 dai_clk_mode |= DA7219_DAI_WCLK_POL_INV;
1350 break;
1351 default:
1352 return -EINVAL;
1353 }
Adam Thomson6d817c02015-09-29 16:44:01 +01001354 break;
1355 default:
1356 return -EINVAL;
1357 }
1358
1359 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1360 case SND_SOC_DAIFMT_I2S:
1361 dai_ctrl |= DA7219_DAI_FORMAT_I2S;
1362 break;
1363 case SND_SOC_DAIFMT_LEFT_J:
1364 dai_ctrl |= DA7219_DAI_FORMAT_LEFT_J;
1365 break;
1366 case SND_SOC_DAIFMT_RIGHT_J:
1367 dai_ctrl |= DA7219_DAI_FORMAT_RIGHT_J;
1368 break;
1369 case SND_SOC_DAIFMT_DSP_B:
1370 dai_ctrl |= DA7219_DAI_FORMAT_DSP;
1371 break;
1372 default:
1373 return -EINVAL;
1374 }
1375
Kuninori Morimoto45101122018-01-29 04:36:54 +00001376 snd_soc_component_update_bits(component, DA7219_DAI_CLK_MODE,
Adam Thomson6d817c02015-09-29 16:44:01 +01001377 DA7219_DAI_CLK_POL_MASK | DA7219_DAI_WCLK_POL_MASK,
1378 dai_clk_mode);
Kuninori Morimoto45101122018-01-29 04:36:54 +00001379 snd_soc_component_update_bits(component, DA7219_DAI_CTRL, DA7219_DAI_FORMAT_MASK,
Adam Thomson6d817c02015-09-29 16:44:01 +01001380 dai_ctrl);
1381
1382 return 0;
1383}
1384
Adam Thomsond90ba6c2019-03-19 17:49:31 +00001385static int da7219_set_bclks_per_wclk(struct snd_soc_component *component,
1386 unsigned long factor)
1387{
1388 u8 bclks_per_wclk;
1389
1390 switch (factor) {
1391 case 32:
1392 bclks_per_wclk = DA7219_DAI_BCLKS_PER_WCLK_32;
1393 break;
1394 case 64:
1395 bclks_per_wclk = DA7219_DAI_BCLKS_PER_WCLK_64;
1396 break;
1397 case 128:
1398 bclks_per_wclk = DA7219_DAI_BCLKS_PER_WCLK_128;
1399 break;
1400 case 256:
1401 bclks_per_wclk = DA7219_DAI_BCLKS_PER_WCLK_256;
1402 break;
1403 default:
1404 return -EINVAL;
1405 }
1406
1407 snd_soc_component_update_bits(component, DA7219_DAI_CLK_MODE,
1408 DA7219_DAI_BCLKS_PER_WCLK_MASK,
1409 bclks_per_wclk);
1410
1411 return 0;
1412}
1413
Adam Thomson6d817c02015-09-29 16:44:01 +01001414static int da7219_set_dai_tdm_slot(struct snd_soc_dai *dai,
1415 unsigned int tx_mask, unsigned int rx_mask,
1416 int slots, int slot_width)
1417{
Kuninori Morimoto45101122018-01-29 04:36:54 +00001418 struct snd_soc_component *component = dai->component;
1419 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component);
Adam Thomsond90ba6c2019-03-19 17:49:31 +00001420 struct clk *wclk = da7219->dai_clks[DA7219_DAI_WCLK_IDX];
1421 struct clk *bclk = da7219->dai_clks[DA7219_DAI_BCLK_IDX];
Adam Thomson541ccdc2019-02-14 10:13:30 +00001422 unsigned int ch_mask;
Adam Thomsond90ba6c2019-03-19 17:49:31 +00001423 unsigned long sr, bclk_rate;
1424 u8 slot_offset;
Adam Thomson541ccdc2019-02-14 10:13:30 +00001425 u16 offset;
1426 __le16 dai_offset;
Adam Thomson6d817c02015-09-29 16:44:01 +01001427 u32 frame_size;
Adam Thomsond90ba6c2019-03-19 17:49:31 +00001428 int ret;
Adam Thomson6d817c02015-09-29 16:44:01 +01001429
Adam Thomson9fd72952019-02-14 10:13:29 +00001430 /* No channels enabled so disable TDM */
Adam Thomson6d817c02015-09-29 16:44:01 +01001431 if (!tx_mask) {
Kuninori Morimoto45101122018-01-29 04:36:54 +00001432 snd_soc_component_update_bits(component, DA7219_DAI_TDM_CTRL,
Adam Thomson6d817c02015-09-29 16:44:01 +01001433 DA7219_DAI_TDM_CH_EN_MASK |
1434 DA7219_DAI_TDM_MODE_EN_MASK, 0);
Adam Thomson9fd72952019-02-14 10:13:29 +00001435 da7219->tdm_en = false;
Adam Thomson6d817c02015-09-29 16:44:01 +01001436 return 0;
1437 }
1438
1439 /* Check we have valid slots */
Adam Thomson541ccdc2019-02-14 10:13:30 +00001440 slot_offset = ffs(tx_mask) - 1;
1441 ch_mask = (tx_mask >> slot_offset);
1442 if (fls(ch_mask) > DA7219_DAI_TDM_MAX_SLOTS) {
1443 dev_err(component->dev,
1444 "Invalid number of slots, max = %d\n",
Adam Thomson6d817c02015-09-29 16:44:01 +01001445 DA7219_DAI_TDM_MAX_SLOTS);
1446 return -EINVAL;
1447 }
1448
Adam Thomson541ccdc2019-02-14 10:13:30 +00001449 /*
1450 * Ensure we have a valid offset into the frame, based on slot width
1451 * and slot offset of first slot we're interested in.
1452 */
1453 offset = slot_offset * slot_width;
1454 if (offset > DA7219_DAI_OFFSET_MAX) {
1455 dev_err(component->dev, "Invalid frame offset %d\n", offset);
Adam Thomson6d817c02015-09-29 16:44:01 +01001456 return -EINVAL;
1457 }
1458
Adam Thomson541ccdc2019-02-14 10:13:30 +00001459 /*
1460 * If we're master, calculate & validate frame size based on slot info
1461 * provided as we have a limited set of rates available.
1462 */
1463 if (da7219->master) {
1464 frame_size = slots * slot_width;
Adam Thomson541ccdc2019-02-14 10:13:30 +00001465
Adam Thomsond90ba6c2019-03-19 17:49:31 +00001466 if (bclk) {
1467 sr = clk_get_rate(wclk);
1468 bclk_rate = sr * frame_size;
1469 ret = clk_set_rate(bclk, bclk_rate);
1470 if (ret) {
1471 dev_err(component->dev,
1472 "Failed to set TDM BCLK rate %lu: %d\n",
1473 bclk_rate, ret);
1474 return ret;
1475 }
1476 } else {
1477 ret = da7219_set_bclks_per_wclk(component, frame_size);
1478 if (ret) {
1479 dev_err(component->dev,
1480 "Failed to set TDM BCLKs per WCLK %d: %d\n",
1481 frame_size, ret);
1482 return ret;
1483 }
1484 }
Adam Thomson6d817c02015-09-29 16:44:01 +01001485 }
1486
Adam Thomson541ccdc2019-02-14 10:13:30 +00001487 dai_offset = cpu_to_le16(offset);
Adam Thomson6d817c02015-09-29 16:44:01 +01001488 regmap_bulk_write(da7219->regmap, DA7219_DAI_OFFSET_LOWER,
Adam Thomson541ccdc2019-02-14 10:13:30 +00001489 &dai_offset, sizeof(dai_offset));
Adam Thomson6d817c02015-09-29 16:44:01 +01001490
Kuninori Morimoto45101122018-01-29 04:36:54 +00001491 snd_soc_component_update_bits(component, DA7219_DAI_TDM_CTRL,
Adam Thomson6d817c02015-09-29 16:44:01 +01001492 DA7219_DAI_TDM_CH_EN_MASK |
1493 DA7219_DAI_TDM_MODE_EN_MASK,
Adam Thomson541ccdc2019-02-14 10:13:30 +00001494 (ch_mask << DA7219_DAI_TDM_CH_EN_SHIFT) |
Adam Thomson6d817c02015-09-29 16:44:01 +01001495 DA7219_DAI_TDM_MODE_EN_MASK);
1496
Adam Thomson9fd72952019-02-14 10:13:29 +00001497 da7219->tdm_en = true;
1498
Adam Thomson6d817c02015-09-29 16:44:01 +01001499 return 0;
1500}
1501
Adam Thomsond90ba6c2019-03-19 17:49:31 +00001502static int da7219_set_sr(struct snd_soc_component *component,
1503 unsigned long rate)
Adam Thomson6d817c02015-09-29 16:44:01 +01001504{
Adam Thomsond90ba6c2019-03-19 17:49:31 +00001505 u8 fs;
Adam Thomson6d817c02015-09-29 16:44:01 +01001506
Adam Thomsond90ba6c2019-03-19 17:49:31 +00001507 switch (rate) {
Adam Thomson6d817c02015-09-29 16:44:01 +01001508 case 8000:
1509 fs = DA7219_SR_8000;
1510 break;
1511 case 11025:
1512 fs = DA7219_SR_11025;
1513 break;
1514 case 12000:
1515 fs = DA7219_SR_12000;
1516 break;
1517 case 16000:
1518 fs = DA7219_SR_16000;
1519 break;
1520 case 22050:
1521 fs = DA7219_SR_22050;
1522 break;
1523 case 24000:
1524 fs = DA7219_SR_24000;
1525 break;
1526 case 32000:
1527 fs = DA7219_SR_32000;
1528 break;
1529 case 44100:
1530 fs = DA7219_SR_44100;
1531 break;
1532 case 48000:
1533 fs = DA7219_SR_48000;
1534 break;
1535 case 88200:
1536 fs = DA7219_SR_88200;
1537 break;
1538 case 96000:
1539 fs = DA7219_SR_96000;
1540 break;
1541 default:
1542 return -EINVAL;
1543 }
1544
Adam Thomsond90ba6c2019-03-19 17:49:31 +00001545 snd_soc_component_write(component, DA7219_SR, fs);
1546
1547 return 0;
1548}
1549
1550static int da7219_hw_params(struct snd_pcm_substream *substream,
1551 struct snd_pcm_hw_params *params,
1552 struct snd_soc_dai *dai)
1553{
1554 struct snd_soc_component *component = dai->component;
1555 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component);
1556 struct clk *wclk = da7219->dai_clks[DA7219_DAI_WCLK_IDX];
1557 struct clk *bclk = da7219->dai_clks[DA7219_DAI_BCLK_IDX];
1558 u8 dai_ctrl = 0;
1559 unsigned int channels;
1560 unsigned long sr, bclk_rate;
1561 int word_len = params_width(params);
1562 int frame_size, ret;
1563
1564 switch (word_len) {
1565 case 16:
1566 dai_ctrl |= DA7219_DAI_WORD_LENGTH_S16_LE;
1567 break;
1568 case 20:
1569 dai_ctrl |= DA7219_DAI_WORD_LENGTH_S20_LE;
1570 break;
1571 case 24:
1572 dai_ctrl |= DA7219_DAI_WORD_LENGTH_S24_LE;
1573 break;
1574 case 32:
1575 dai_ctrl |= DA7219_DAI_WORD_LENGTH_S32_LE;
1576 break;
1577 default:
1578 return -EINVAL;
1579 }
1580
1581 channels = params_channels(params);
1582 if ((channels < 1) || (channels > DA7219_DAI_CH_NUM_MAX)) {
1583 dev_err(component->dev,
1584 "Invalid number of channels, only 1 to %d supported\n",
1585 DA7219_DAI_CH_NUM_MAX);
1586 return -EINVAL;
1587 }
1588 dai_ctrl |= channels << DA7219_DAI_CH_NUM_SHIFT;
1589
1590 sr = params_rate(params);
1591 if (da7219->master && wclk) {
1592 ret = clk_set_rate(wclk, sr);
1593 if (ret) {
1594 dev_err(component->dev,
1595 "Failed to set WCLK SR %lu: %d\n", sr, ret);
1596 return ret;
1597 }
1598 } else {
1599 ret = da7219_set_sr(component, sr);
1600 if (ret) {
1601 dev_err(component->dev,
1602 "Failed to set SR %lu: %d\n", sr, ret);
1603 return ret;
1604 }
1605 }
1606
Adam Thomson9fd72952019-02-14 10:13:29 +00001607 /*
1608 * If we're master, then we have a limited set of BCLK rates we
1609 * support. For slave mode this isn't the case and the codec can detect
1610 * the BCLK rate automatically.
1611 */
1612 if (da7219->master && !da7219->tdm_en) {
Adam Thomsond90ba6c2019-03-19 17:49:31 +00001613 if ((word_len * DA7219_DAI_CH_NUM_MAX) <= 32)
1614 frame_size = 32;
Adam Thomson9fd72952019-02-14 10:13:29 +00001615 else
Adam Thomsond90ba6c2019-03-19 17:49:31 +00001616 frame_size = 64;
Adam Thomson9fd72952019-02-14 10:13:29 +00001617
Adam Thomsond90ba6c2019-03-19 17:49:31 +00001618 if (bclk) {
1619 bclk_rate = frame_size * sr;
Adam Thomson1cd472d2019-04-29 11:57:33 +01001620 /*
1621 * Rounding the rate here avoids failure trying to set a
1622 * new rate on an already enabled bclk. In that
1623 * instance this will just set the same rate as is
1624 * currently in use, and so should continue without
1625 * problem, as long as the BCLK rate is suitable for the
1626 * desired frame size.
1627 */
1628 bclk_rate = clk_round_rate(bclk, bclk_rate);
1629 if ((bclk_rate / sr) < frame_size) {
1630 dev_err(component->dev,
1631 "BCLK rate mismatch against frame size");
1632 return -EINVAL;
1633 }
1634
Adam Thomsond90ba6c2019-03-19 17:49:31 +00001635 ret = clk_set_rate(bclk, bclk_rate);
1636 if (ret) {
1637 dev_err(component->dev,
1638 "Failed to set BCLK rate %lu: %d\n",
1639 bclk_rate, ret);
1640 return ret;
1641 }
1642 } else {
1643 ret = da7219_set_bclks_per_wclk(component, frame_size);
1644 if (ret) {
1645 dev_err(component->dev,
1646 "Failed to set BCLKs per WCLK %d: %d\n",
1647 frame_size, ret);
1648 return ret;
1649 }
1650 }
Adam Thomson9fd72952019-02-14 10:13:29 +00001651 }
1652
Kuninori Morimoto45101122018-01-29 04:36:54 +00001653 snd_soc_component_update_bits(component, DA7219_DAI_CTRL,
Adam Thomson6d817c02015-09-29 16:44:01 +01001654 DA7219_DAI_WORD_LENGTH_MASK |
1655 DA7219_DAI_CH_NUM_MASK,
1656 dai_ctrl);
Adam Thomson6d817c02015-09-29 16:44:01 +01001657
1658 return 0;
1659}
1660
1661static const struct snd_soc_dai_ops da7219_dai_ops = {
1662 .hw_params = da7219_hw_params,
1663 .set_sysclk = da7219_set_dai_sysclk,
1664 .set_pll = da7219_set_dai_pll,
1665 .set_fmt = da7219_set_dai_fmt,
1666 .set_tdm_slot = da7219_set_dai_tdm_slot,
1667};
1668
1669#define DA7219_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
1670 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
1671
Yu-Hsuan Hsucd8926e2019-05-02 12:07:43 +08001672#define DA7219_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
1673 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |\
1674 SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |\
1675 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 |\
1676 SNDRV_PCM_RATE_96000)
1677
Adam Thomson6d817c02015-09-29 16:44:01 +01001678static struct snd_soc_dai_driver da7219_dai = {
1679 .name = "da7219-hifi",
1680 .playback = {
1681 .stream_name = "Playback",
1682 .channels_min = 1,
1683 .channels_max = DA7219_DAI_CH_NUM_MAX,
Yu-Hsuan Hsucd8926e2019-05-02 12:07:43 +08001684 .rates = DA7219_RATES,
Adam Thomson6d817c02015-09-29 16:44:01 +01001685 .formats = DA7219_FORMATS,
1686 },
1687 .capture = {
1688 .stream_name = "Capture",
1689 .channels_min = 1,
1690 .channels_max = DA7219_DAI_CH_NUM_MAX,
Yu-Hsuan Hsucd8926e2019-05-02 12:07:43 +08001691 .rates = DA7219_RATES,
Adam Thomson6d817c02015-09-29 16:44:01 +01001692 .formats = DA7219_FORMATS,
1693 },
1694 .ops = &da7219_dai_ops,
Kuninori Morimoto1c6d1c42021-01-15 13:54:33 +09001695 .symmetric_rate = 1,
Adam Thomson6d817c02015-09-29 16:44:01 +01001696 .symmetric_channels = 1,
Kuninori Morimoto1c6d1c42021-01-15 13:54:33 +09001697 .symmetric_sample_bits = 1,
Adam Thomson6d817c02015-09-29 16:44:01 +01001698};
1699
1700
1701/*
Adam Thomsona01b8932016-06-21 18:50:21 +01001702 * DT/ACPI
Adam Thomson6d817c02015-09-29 16:44:01 +01001703 */
1704
Krzysztof Kozlowskia7de3672020-11-25 17:44:31 +01001705#ifdef CONFIG_OF
Adam Thomson6d817c02015-09-29 16:44:01 +01001706static const struct of_device_id da7219_of_match[] = {
1707 { .compatible = "dlg,da7219", },
1708 { }
1709};
1710MODULE_DEVICE_TABLE(of, da7219_of_match);
Krzysztof Kozlowskia7de3672020-11-25 17:44:31 +01001711#endif
Adam Thomson6d817c02015-09-29 16:44:01 +01001712
Pierre-Louis Bossart14310a92020-07-07 14:06:06 -05001713#ifdef CONFIG_ACPI
Adam Thomson51813652016-05-05 11:53:06 +01001714static const struct acpi_device_id da7219_acpi_match[] = {
1715 { .id = "DLGS7219", },
1716 { }
1717};
1718MODULE_DEVICE_TABLE(acpi, da7219_acpi_match);
Pierre-Louis Bossart14310a92020-07-07 14:06:06 -05001719#endif
Adam Thomson51813652016-05-05 11:53:06 +01001720
Adam Thomson6d817c02015-09-29 16:44:01 +01001721static enum da7219_micbias_voltage
Adam Thomsona01b8932016-06-21 18:50:21 +01001722 da7219_fw_micbias_lvl(struct device *dev, u32 val)
Adam Thomson6d817c02015-09-29 16:44:01 +01001723{
1724 switch (val) {
Adam Thomson0aed64c2015-12-22 18:27:55 +00001725 case 1600:
1726 return DA7219_MICBIAS_1_6V;
Adam Thomson6d817c02015-09-29 16:44:01 +01001727 case 1800:
1728 return DA7219_MICBIAS_1_8V;
1729 case 2000:
1730 return DA7219_MICBIAS_2_0V;
1731 case 2200:
1732 return DA7219_MICBIAS_2_2V;
1733 case 2400:
1734 return DA7219_MICBIAS_2_4V;
1735 case 2600:
1736 return DA7219_MICBIAS_2_6V;
1737 default:
Adam Thomsona01b8932016-06-21 18:50:21 +01001738 dev_warn(dev, "Invalid micbias level");
Adam Thomson6d817c02015-09-29 16:44:01 +01001739 return DA7219_MICBIAS_2_2V;
1740 }
1741}
1742
1743static enum da7219_mic_amp_in_sel
Adam Thomsona01b8932016-06-21 18:50:21 +01001744 da7219_fw_mic_amp_in_sel(struct device *dev, const char *str)
Adam Thomson6d817c02015-09-29 16:44:01 +01001745{
1746 if (!strcmp(str, "diff")) {
1747 return DA7219_MIC_AMP_IN_SEL_DIFF;
1748 } else if (!strcmp(str, "se_p")) {
1749 return DA7219_MIC_AMP_IN_SEL_SE_P;
1750 } else if (!strcmp(str, "se_n")) {
1751 return DA7219_MIC_AMP_IN_SEL_SE_N;
1752 } else {
Adam Thomsona01b8932016-06-21 18:50:21 +01001753 dev_warn(dev, "Invalid mic input type selection");
Adam Thomson6d817c02015-09-29 16:44:01 +01001754 return DA7219_MIC_AMP_IN_SEL_DIFF;
1755 }
1756}
1757
Adam Thomson21f279f2020-08-11 17:57:23 +01001758static struct da7219_pdata *da7219_fw_to_pdata(struct device *dev)
Adam Thomson6d817c02015-09-29 16:44:01 +01001759{
Adam Thomson6d817c02015-09-29 16:44:01 +01001760 struct da7219_pdata *pdata;
1761 const char *of_str;
1762 u32 of_val32;
1763
Adam Thomsona01b8932016-06-21 18:50:21 +01001764 pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
Adam Thomson6d817c02015-09-29 16:44:01 +01001765 if (!pdata)
1766 return NULL;
1767
Adam Thomsonbb0c35f2016-09-26 14:29:21 +01001768 pdata->wakeup_source = device_property_read_bool(dev, "wakeup-source");
1769
Adam Thomsond90ba6c2019-03-19 17:49:31 +00001770 pdata->dai_clk_names[DA7219_DAI_WCLK_IDX] = "da7219-dai-wclk";
1771 pdata->dai_clk_names[DA7219_DAI_BCLK_IDX] = "da7219-dai-bclk";
1772 if (device_property_read_string_array(dev, "clock-output-names",
1773 pdata->dai_clk_names,
1774 DA7219_DAI_NUM_CLKS) < 0)
1775 dev_warn(dev, "Using default DAI clk names: %s, %s\n",
1776 pdata->dai_clk_names[DA7219_DAI_WCLK_IDX],
1777 pdata->dai_clk_names[DA7219_DAI_BCLK_IDX]);
Adam Thomsonfc8f7ea2018-03-09 16:25:43 +00001778
Adam Thomsona01b8932016-06-21 18:50:21 +01001779 if (device_property_read_u32(dev, "dlg,micbias-lvl", &of_val32) >= 0)
1780 pdata->micbias_lvl = da7219_fw_micbias_lvl(dev, of_val32);
Adam Thomson6d817c02015-09-29 16:44:01 +01001781 else
1782 pdata->micbias_lvl = DA7219_MICBIAS_2_2V;
1783
Adam Thomsona01b8932016-06-21 18:50:21 +01001784 if (!device_property_read_string(dev, "dlg,mic-amp-in-sel", &of_str))
1785 pdata->mic_amp_in_sel = da7219_fw_mic_amp_in_sel(dev, of_str);
Adam Thomson6d817c02015-09-29 16:44:01 +01001786 else
1787 pdata->mic_amp_in_sel = DA7219_MIC_AMP_IN_SEL_DIFF;
1788
1789 return pdata;
1790}
1791
1792
1793/*
1794 * Codec driver functions
1795 */
1796
Kuninori Morimoto45101122018-01-29 04:36:54 +00001797static int da7219_set_bias_level(struct snd_soc_component *component,
Adam Thomson6d817c02015-09-29 16:44:01 +01001798 enum snd_soc_bias_level level)
1799{
Kuninori Morimoto45101122018-01-29 04:36:54 +00001800 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component);
Adam Thomsonba856fb2015-10-07 11:57:14 +01001801 int ret;
Adam Thomson6d817c02015-09-29 16:44:01 +01001802
1803 switch (level) {
1804 case SND_SOC_BIAS_ON:
Adam Thomson6d817c02015-09-29 16:44:01 +01001805 break;
Adam Thomson40585392016-07-29 14:46:54 +01001806 case SND_SOC_BIAS_PREPARE:
1807 /* Enable MCLK for transition to ON state */
Kuninori Morimoto45101122018-01-29 04:36:54 +00001808 if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_STANDBY) {
Adam Thomsonba856fb2015-10-07 11:57:14 +01001809 if (da7219->mclk) {
1810 ret = clk_prepare_enable(da7219->mclk);
1811 if (ret) {
Kuninori Morimoto45101122018-01-29 04:36:54 +00001812 dev_err(component->dev,
Adam Thomsonba856fb2015-10-07 11:57:14 +01001813 "Failed to enable mclk\n");
1814 return ret;
1815 }
1816 }
Adam Thomson40585392016-07-29 14:46:54 +01001817 }
Adam Thomson6d817c02015-09-29 16:44:01 +01001818
Adam Thomson40585392016-07-29 14:46:54 +01001819 break;
1820 case SND_SOC_BIAS_STANDBY:
Kuninori Morimoto45101122018-01-29 04:36:54 +00001821 if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF)
Adam Thomson6d817c02015-09-29 16:44:01 +01001822 /* Master bias */
Kuninori Morimoto45101122018-01-29 04:36:54 +00001823 snd_soc_component_update_bits(component, DA7219_REFERENCES,
Adam Thomson6d817c02015-09-29 16:44:01 +01001824 DA7219_BIAS_EN_MASK,
1825 DA7219_BIAS_EN_MASK);
Adam Thomsonbb0c35f2016-09-26 14:29:21 +01001826
Kuninori Morimoto45101122018-01-29 04:36:54 +00001827 if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_PREPARE) {
Adam Thomson40585392016-07-29 14:46:54 +01001828 /* Remove MCLK */
1829 if (da7219->mclk)
1830 clk_disable_unprepare(da7219->mclk);
Adam Thomson6d817c02015-09-29 16:44:01 +01001831 }
1832 break;
1833 case SND_SOC_BIAS_OFF:
Adam Thomsonbb0c35f2016-09-26 14:29:21 +01001834 /* Only disable master bias if we're not a wake-up source */
1835 if (!da7219->wakeup_source)
Kuninori Morimoto45101122018-01-29 04:36:54 +00001836 snd_soc_component_update_bits(component, DA7219_REFERENCES,
Adam Thomson6d817c02015-09-29 16:44:01 +01001837 DA7219_BIAS_EN_MASK, 0);
Adam Thomson6d817c02015-09-29 16:44:01 +01001838
Adam Thomson6d817c02015-09-29 16:44:01 +01001839 break;
1840 }
1841
1842 return 0;
1843}
1844
1845static const char *da7219_supply_names[DA7219_NUM_SUPPLIES] = {
1846 [DA7219_SUPPLY_VDD] = "VDD",
1847 [DA7219_SUPPLY_VDDMIC] = "VDDMIC",
1848 [DA7219_SUPPLY_VDDIO] = "VDDIO",
1849};
1850
Adam Thomsonaa5b18d2020-08-11 17:57:24 +01001851static int da7219_handle_supplies(struct snd_soc_component *component,
1852 u8 *io_voltage_lvl)
Adam Thomson6d817c02015-09-29 16:44:01 +01001853{
Kuninori Morimoto45101122018-01-29 04:36:54 +00001854 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component);
Adam Thomson6d817c02015-09-29 16:44:01 +01001855 struct regulator *vddio;
Adam Thomson6d817c02015-09-29 16:44:01 +01001856 int i, ret;
1857
1858 /* Get required supplies */
1859 for (i = 0; i < DA7219_NUM_SUPPLIES; ++i)
1860 da7219->supplies[i].supply = da7219_supply_names[i];
1861
Adam Thomsonaa5b18d2020-08-11 17:57:24 +01001862 ret = regulator_bulk_get(component->dev, DA7219_NUM_SUPPLIES,
1863 da7219->supplies);
Adam Thomson4e929132015-10-05 15:10:04 +01001864 if (ret) {
Kuninori Morimoto45101122018-01-29 04:36:54 +00001865 dev_err(component->dev, "Failed to get supplies");
Adam Thomson6d817c02015-09-29 16:44:01 +01001866 return ret;
Adam Thomson4e929132015-10-05 15:10:04 +01001867 }
Adam Thomson6d817c02015-09-29 16:44:01 +01001868
Adam Thomsonfcea8b02020-08-21 15:22:59 +01001869 /* Default to upper range */
1870 *io_voltage_lvl = DA7219_IO_VOLTAGE_LEVEL_2_5V_3_6V;
1871
Adam Thomson6d817c02015-09-29 16:44:01 +01001872 /* Determine VDDIO voltage provided */
1873 vddio = da7219->supplies[DA7219_SUPPLY_VDDIO].consumer;
1874 ret = regulator_get_voltage(vddio);
1875 if (ret < 1200000)
Kuninori Morimoto45101122018-01-29 04:36:54 +00001876 dev_warn(component->dev, "Invalid VDDIO voltage\n");
Adam Thomson6d817c02015-09-29 16:44:01 +01001877 else if (ret < 2800000)
Adam Thomsonaa5b18d2020-08-11 17:57:24 +01001878 *io_voltage_lvl = DA7219_IO_VOLTAGE_LEVEL_1_2V_2_8V;
Adam Thomson6d817c02015-09-29 16:44:01 +01001879
1880 /* Enable main supplies */
1881 ret = regulator_bulk_enable(DA7219_NUM_SUPPLIES, da7219->supplies);
Adam Thomson4e929132015-10-05 15:10:04 +01001882 if (ret) {
Kuninori Morimoto45101122018-01-29 04:36:54 +00001883 dev_err(component->dev, "Failed to enable supplies");
Adam Thomsonaa5b18d2020-08-11 17:57:24 +01001884 regulator_bulk_free(DA7219_NUM_SUPPLIES, da7219->supplies);
Adam Thomson4e929132015-10-05 15:10:04 +01001885 return ret;
1886 }
Adam Thomson6d817c02015-09-29 16:44:01 +01001887
Adam Thomson4e929132015-10-05 15:10:04 +01001888 return 0;
Adam Thomson6d817c02015-09-29 16:44:01 +01001889}
1890
Adam Thomsonfc8f7ea2018-03-09 16:25:43 +00001891#ifdef CONFIG_COMMON_CLK
Adam Thomsond90ba6c2019-03-19 17:49:31 +00001892static int da7219_wclk_prepare(struct clk_hw *hw)
Adam Thomsonfc8f7ea2018-03-09 16:25:43 +00001893{
1894 struct da7219_priv *da7219 =
Adam Thomsond90ba6c2019-03-19 17:49:31 +00001895 container_of(hw, struct da7219_priv,
1896 dai_clks_hw[DA7219_DAI_WCLK_IDX]);
Adam Thomsona58943a2019-01-08 09:13:28 +00001897 struct snd_soc_component *component = da7219->component;
Adam Thomsonfc8f7ea2018-03-09 16:25:43 +00001898
Adam Thomsond90ba6c2019-03-19 17:49:31 +00001899 if (!da7219->master)
1900 return -EINVAL;
1901
Adam Thomsonfc8f7ea2018-03-09 16:25:43 +00001902 snd_soc_component_update_bits(component, DA7219_DAI_CLK_MODE,
1903 DA7219_DAI_CLK_EN_MASK,
1904 DA7219_DAI_CLK_EN_MASK);
1905
1906 return 0;
1907}
1908
Adam Thomsond90ba6c2019-03-19 17:49:31 +00001909static void da7219_wclk_unprepare(struct clk_hw *hw)
Adam Thomsonfc8f7ea2018-03-09 16:25:43 +00001910{
1911 struct da7219_priv *da7219 =
Adam Thomsond90ba6c2019-03-19 17:49:31 +00001912 container_of(hw, struct da7219_priv,
1913 dai_clks_hw[DA7219_DAI_WCLK_IDX]);
Adam Thomsona58943a2019-01-08 09:13:28 +00001914 struct snd_soc_component *component = da7219->component;
Adam Thomsonfc8f7ea2018-03-09 16:25:43 +00001915
Adam Thomsond90ba6c2019-03-19 17:49:31 +00001916 if (!da7219->master)
1917 return;
1918
Adam Thomsonfc8f7ea2018-03-09 16:25:43 +00001919 snd_soc_component_update_bits(component, DA7219_DAI_CLK_MODE,
1920 DA7219_DAI_CLK_EN_MASK, 0);
1921}
1922
Adam Thomsond90ba6c2019-03-19 17:49:31 +00001923static int da7219_wclk_is_prepared(struct clk_hw *hw)
Adam Thomsonfc8f7ea2018-03-09 16:25:43 +00001924{
1925 struct da7219_priv *da7219 =
Adam Thomsond90ba6c2019-03-19 17:49:31 +00001926 container_of(hw, struct da7219_priv,
1927 dai_clks_hw[DA7219_DAI_WCLK_IDX]);
Adam Thomsona58943a2019-01-08 09:13:28 +00001928 struct snd_soc_component *component = da7219->component;
Adam Thomsonfc8f7ea2018-03-09 16:25:43 +00001929 u8 clk_reg;
1930
Adam Thomsond90ba6c2019-03-19 17:49:31 +00001931 if (!da7219->master)
1932 return -EINVAL;
1933
Kuninori Morimoto2925b582020-06-16 14:21:42 +09001934 clk_reg = snd_soc_component_read(component, DA7219_DAI_CLK_MODE);
Adam Thomsonfc8f7ea2018-03-09 16:25:43 +00001935
1936 return !!(clk_reg & DA7219_DAI_CLK_EN_MASK);
1937}
1938
Adam Thomsond90ba6c2019-03-19 17:49:31 +00001939static unsigned long da7219_wclk_recalc_rate(struct clk_hw *hw,
1940 unsigned long parent_rate)
Adam Thomsona58943a2019-01-08 09:13:28 +00001941{
1942 struct da7219_priv *da7219 =
Adam Thomsond90ba6c2019-03-19 17:49:31 +00001943 container_of(hw, struct da7219_priv,
1944 dai_clks_hw[DA7219_DAI_WCLK_IDX]);
Adam Thomsona58943a2019-01-08 09:13:28 +00001945 struct snd_soc_component *component = da7219->component;
Kuninori Morimoto2925b582020-06-16 14:21:42 +09001946 u8 fs = snd_soc_component_read(component, DA7219_SR);
Adam Thomsona58943a2019-01-08 09:13:28 +00001947
1948 switch (fs & DA7219_SR_MASK) {
1949 case DA7219_SR_8000:
1950 return 8000;
1951 case DA7219_SR_11025:
1952 return 11025;
1953 case DA7219_SR_12000:
1954 return 12000;
1955 case DA7219_SR_16000:
1956 return 16000;
1957 case DA7219_SR_22050:
1958 return 22050;
1959 case DA7219_SR_24000:
1960 return 24000;
1961 case DA7219_SR_32000:
1962 return 32000;
1963 case DA7219_SR_44100:
1964 return 44100;
1965 case DA7219_SR_48000:
1966 return 48000;
1967 case DA7219_SR_88200:
1968 return 88200;
1969 case DA7219_SR_96000:
1970 return 96000;
1971 default:
1972 return 0;
1973 }
1974}
1975
Adam Thomsond90ba6c2019-03-19 17:49:31 +00001976static long da7219_wclk_round_rate(struct clk_hw *hw, unsigned long rate,
1977 unsigned long *parent_rate)
1978{
1979 struct da7219_priv *da7219 =
1980 container_of(hw, struct da7219_priv,
1981 dai_clks_hw[DA7219_DAI_WCLK_IDX]);
1982
1983 if (!da7219->master)
1984 return -EINVAL;
1985
1986 if (rate < 11025)
1987 return 8000;
1988 else if (rate < 12000)
1989 return 11025;
1990 else if (rate < 16000)
1991 return 12000;
1992 else if (rate < 22050)
1993 return 16000;
1994 else if (rate < 24000)
1995 return 22050;
1996 else if (rate < 32000)
1997 return 24000;
1998 else if (rate < 44100)
1999 return 32000;
2000 else if (rate < 48000)
2001 return 44100;
2002 else if (rate < 88200)
2003 return 48000;
2004 else if (rate < 96000)
2005 return 88200;
2006 else
2007 return 96000;
2008}
2009
2010static int da7219_wclk_set_rate(struct clk_hw *hw, unsigned long rate,
2011 unsigned long parent_rate)
2012{
2013 struct da7219_priv *da7219 =
2014 container_of(hw, struct da7219_priv,
2015 dai_clks_hw[DA7219_DAI_WCLK_IDX]);
2016 struct snd_soc_component *component = da7219->component;
2017
2018 if (!da7219->master)
2019 return -EINVAL;
2020
2021 return da7219_set_sr(component, rate);
2022}
2023
2024static unsigned long da7219_bclk_recalc_rate(struct clk_hw *hw,
2025 unsigned long parent_rate)
2026{
2027 struct da7219_priv *da7219 =
2028 container_of(hw, struct da7219_priv,
2029 dai_clks_hw[DA7219_DAI_BCLK_IDX]);
2030 struct snd_soc_component *component = da7219->component;
Kuninori Morimoto2925b582020-06-16 14:21:42 +09002031 u8 bclks_per_wclk = snd_soc_component_read(component,
Adam Thomsond90ba6c2019-03-19 17:49:31 +00002032 DA7219_DAI_CLK_MODE);
2033
Adam Thomsond90ba6c2019-03-19 17:49:31 +00002034 switch (bclks_per_wclk & DA7219_DAI_BCLKS_PER_WCLK_MASK) {
2035 case DA7219_DAI_BCLKS_PER_WCLK_32:
2036 return parent_rate * 32;
2037 case DA7219_DAI_BCLKS_PER_WCLK_64:
2038 return parent_rate * 64;
2039 case DA7219_DAI_BCLKS_PER_WCLK_128:
2040 return parent_rate * 128;
2041 case DA7219_DAI_BCLKS_PER_WCLK_256:
2042 return parent_rate * 256;
2043 default:
2044 return 0;
2045 }
2046}
2047
2048static unsigned long da7219_bclk_get_factor(unsigned long rate,
2049 unsigned long parent_rate)
2050{
2051 unsigned long factor;
2052
2053 factor = rate / parent_rate;
2054 if (factor < 64)
2055 return 32;
2056 else if (factor < 128)
2057 return 64;
2058 else if (factor < 256)
2059 return 128;
2060 else
2061 return 256;
2062}
2063
2064static long da7219_bclk_round_rate(struct clk_hw *hw, unsigned long rate,
2065 unsigned long *parent_rate)
2066{
2067 struct da7219_priv *da7219 =
2068 container_of(hw, struct da7219_priv,
2069 dai_clks_hw[DA7219_DAI_BCLK_IDX]);
2070 unsigned long factor;
2071
2072 if (!*parent_rate || !da7219->master)
2073 return -EINVAL;
2074
2075 /*
2076 * We don't allow changing the parent rate as some BCLK rates can be
2077 * derived from multiple parent WCLK rates (BCLK rates are set as a
2078 * multiplier of WCLK in HW). We just do some rounding down based on the
2079 * parent WCLK rate set and find the appropriate multiplier of BCLK to
2080 * get the rounded down BCLK value.
2081 */
2082 factor = da7219_bclk_get_factor(rate, *parent_rate);
2083
2084 return *parent_rate * factor;
2085}
2086
2087static int da7219_bclk_set_rate(struct clk_hw *hw, unsigned long rate,
2088 unsigned long parent_rate)
2089{
2090 struct da7219_priv *da7219 =
2091 container_of(hw, struct da7219_priv,
2092 dai_clks_hw[DA7219_DAI_BCLK_IDX]);
2093 struct snd_soc_component *component = da7219->component;
2094 unsigned long factor;
2095
2096 if (!da7219->master)
2097 return -EINVAL;
2098
2099 factor = da7219_bclk_get_factor(rate, parent_rate);
2100
2101 return da7219_set_bclks_per_wclk(component, factor);
2102}
2103
2104static const struct clk_ops da7219_dai_clk_ops[DA7219_DAI_NUM_CLKS] = {
2105 [DA7219_DAI_WCLK_IDX] = {
2106 .prepare = da7219_wclk_prepare,
2107 .unprepare = da7219_wclk_unprepare,
2108 .is_prepared = da7219_wclk_is_prepared,
2109 .recalc_rate = da7219_wclk_recalc_rate,
2110 .round_rate = da7219_wclk_round_rate,
2111 .set_rate = da7219_wclk_set_rate,
2112 },
2113 [DA7219_DAI_BCLK_IDX] = {
2114 .recalc_rate = da7219_bclk_recalc_rate,
2115 .round_rate = da7219_bclk_round_rate,
2116 .set_rate = da7219_bclk_set_rate,
2117 },
Adam Thomsonfc8f7ea2018-03-09 16:25:43 +00002118};
2119
Adam Thomsona6028cc2019-01-07 16:11:46 +00002120static int da7219_register_dai_clks(struct snd_soc_component *component)
Adam Thomsonfc8f7ea2018-03-09 16:25:43 +00002121{
2122 struct device *dev = component->dev;
Adam Thomson78013a12020-08-11 17:57:25 +01002123 struct device_node *np = dev->of_node;
Adam Thomsonfc8f7ea2018-03-09 16:25:43 +00002124 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component);
2125 struct da7219_pdata *pdata = da7219->pdata;
Adam Thomsona6028cc2019-01-07 16:11:46 +00002126 const char *parent_name;
Adam Thomson78013a12020-08-11 17:57:25 +01002127 struct clk_hw_onecell_data *clk_data;
Adam Thomsond90ba6c2019-03-19 17:49:31 +00002128 int i, ret;
Adam Thomsonfc8f7ea2018-03-09 16:25:43 +00002129
Adam Thomson78013a12020-08-11 17:57:25 +01002130 /* For DT platforms allocate onecell data for clock registration */
2131 if (np) {
2132 clk_data = kzalloc(struct_size(clk_data, hws, DA7219_DAI_NUM_CLKS),
2133 GFP_KERNEL);
2134 if (!clk_data)
2135 return -ENOMEM;
2136
2137 clk_data->num = DA7219_DAI_NUM_CLKS;
2138 da7219->clk_hw_data = clk_data;
2139 }
2140
Adam Thomsond90ba6c2019-03-19 17:49:31 +00002141 for (i = 0; i < DA7219_DAI_NUM_CLKS; ++i) {
2142 struct clk_init_data init = {};
Adam Thomsond90ba6c2019-03-19 17:49:31 +00002143 struct clk_lookup *dai_clk_lookup;
2144 struct clk_hw *dai_clk_hw = &da7219->dai_clks_hw[i];
Adam Thomsona6028cc2019-01-07 16:11:46 +00002145
Adam Thomsond90ba6c2019-03-19 17:49:31 +00002146 switch (i) {
2147 case DA7219_DAI_WCLK_IDX:
2148 /*
2149 * If we can, make MCLK the parent of WCLK to ensure
2150 * it's enabled as required.
2151 */
2152 if (da7219->mclk) {
2153 parent_name = __clk_get_name(da7219->mclk);
2154 init.parent_names = &parent_name;
2155 init.num_parents = 1;
2156 } else {
2157 init.parent_names = NULL;
2158 init.num_parents = 0;
2159 }
2160 break;
2161 case DA7219_DAI_BCLK_IDX:
2162 /* Make WCLK the parent of BCLK */
2163 parent_name = __clk_get_name(da7219->dai_clks[DA7219_DAI_WCLK_IDX]);
2164 init.parent_names = &parent_name;
2165 init.num_parents = 1;
2166 break;
2167 default:
2168 dev_err(dev, "Invalid clock index\n");
2169 ret = -EINVAL;
2170 goto err;
2171 }
Adam Thomsonfc8f7ea2018-03-09 16:25:43 +00002172
Adam Thomsond90ba6c2019-03-19 17:49:31 +00002173 init.name = pdata->dai_clk_names[i];
2174 init.ops = &da7219_dai_clk_ops[i];
2175 init.flags = CLK_GET_RATE_NOCACHE | CLK_SET_RATE_GATE;
2176 dai_clk_hw->init = &init;
Adam Thomsonfc8f7ea2018-03-09 16:25:43 +00002177
Adam Thomson78013a12020-08-11 17:57:25 +01002178 ret = clk_hw_register(dev, dai_clk_hw);
2179 if (ret) {
2180 dev_warn(dev, "Failed to register %s: %d\n", init.name,
2181 ret);
Adam Thomsond90ba6c2019-03-19 17:49:31 +00002182 goto err;
2183 }
Jerome Brunet97c73362021-04-28 14:26:32 +02002184 da7219->dai_clks[i] = dai_clk_hw->clk;
Adam Thomsond90ba6c2019-03-19 17:49:31 +00002185
Adam Thomson78013a12020-08-11 17:57:25 +01002186 /* For DT setup onecell data, otherwise create lookup */
2187 if (np) {
2188 da7219->clk_hw_data->hws[i] = dai_clk_hw;
Adam Thomsond90ba6c2019-03-19 17:49:31 +00002189 } else {
Adam Thomson78013a12020-08-11 17:57:25 +01002190 dai_clk_lookup = clkdev_hw_create(dai_clk_hw, init.name,
2191 "%s", dev_name(dev));
Adam Thomsond90ba6c2019-03-19 17:49:31 +00002192 if (!dai_clk_lookup) {
2193 ret = -ENOMEM;
2194 goto err;
2195 } else {
2196 da7219->dai_clks_lookup[i] = dai_clk_lookup;
2197 }
2198 }
Adam Thomsonfc8f7ea2018-03-09 16:25:43 +00002199 }
Adam Thomsona6028cc2019-01-07 16:11:46 +00002200
Adam Thomson78013a12020-08-11 17:57:25 +01002201 /* If we're using DT, then register as provider accordingly */
2202 if (np) {
2203 ret = of_clk_add_hw_provider(dev->of_node, of_clk_hw_onecell_get,
2204 da7219->clk_hw_data);
2205 if (ret) {
2206 dev_err(dev, "Failed to register clock provider\n");
2207 goto err;
2208 }
2209 }
2210
Adam Thomsona6028cc2019-01-07 16:11:46 +00002211 return 0;
Adam Thomsond90ba6c2019-03-19 17:49:31 +00002212
2213err:
2214 do {
2215 if (da7219->dai_clks_lookup[i])
2216 clkdev_drop(da7219->dai_clks_lookup[i]);
Adam Thomson78013a12020-08-11 17:57:25 +01002217
2218 clk_hw_unregister(&da7219->dai_clks_hw[i]);
Adam Thomsond90ba6c2019-03-19 17:49:31 +00002219 } while (i-- > 0);
2220
Adam Thomson78013a12020-08-11 17:57:25 +01002221 if (np)
2222 kfree(da7219->clk_hw_data);
2223
Adam Thomsond90ba6c2019-03-19 17:49:31 +00002224 return ret;
Adam Thomsonfc8f7ea2018-03-09 16:25:43 +00002225}
Adam Thomson78013a12020-08-11 17:57:25 +01002226
2227static void da7219_free_dai_clks(struct snd_soc_component *component)
2228{
2229 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component);
2230 struct device_node *np = component->dev->of_node;
2231 int i;
2232
2233 if (np)
2234 of_clk_del_provider(np);
2235
2236 for (i = DA7219_DAI_NUM_CLKS - 1; i >= 0; --i) {
2237 if (da7219->dai_clks_lookup[i])
2238 clkdev_drop(da7219->dai_clks_lookup[i]);
2239
2240 clk_hw_unregister(&da7219->dai_clks_hw[i]);
2241 }
2242
2243 if (np)
2244 kfree(da7219->clk_hw_data);
2245}
Adam Thomsonfc8f7ea2018-03-09 16:25:43 +00002246#else
Adam Thomsona6028cc2019-01-07 16:11:46 +00002247static inline int da7219_register_dai_clks(struct snd_soc_component *component)
2248{
2249 return 0;
2250}
Adam Thomson78013a12020-08-11 17:57:25 +01002251
2252static void da7219_free_dai_clks(struct snd_soc_component *component) {}
Adam Thomsonfc8f7ea2018-03-09 16:25:43 +00002253#endif /* CONFIG_COMMON_CLK */
2254
Kuninori Morimoto45101122018-01-29 04:36:54 +00002255static void da7219_handle_pdata(struct snd_soc_component *component)
Adam Thomson6d817c02015-09-29 16:44:01 +01002256{
Kuninori Morimoto45101122018-01-29 04:36:54 +00002257 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component);
Adam Thomson6d817c02015-09-29 16:44:01 +01002258 struct da7219_pdata *pdata = da7219->pdata;
2259
2260 if (pdata) {
2261 u8 micbias_lvl = 0;
2262
Adam Thomsonbb0c35f2016-09-26 14:29:21 +01002263 da7219->wakeup_source = pdata->wakeup_source;
2264
Adam Thomson6d817c02015-09-29 16:44:01 +01002265 /* Mic Bias voltages */
2266 switch (pdata->micbias_lvl) {
Adam Thomson0aed64c2015-12-22 18:27:55 +00002267 case DA7219_MICBIAS_1_6V:
Adam Thomson6d817c02015-09-29 16:44:01 +01002268 case DA7219_MICBIAS_1_8V:
2269 case DA7219_MICBIAS_2_0V:
2270 case DA7219_MICBIAS_2_2V:
2271 case DA7219_MICBIAS_2_4V:
2272 case DA7219_MICBIAS_2_6V:
2273 micbias_lvl |= (pdata->micbias_lvl <<
2274 DA7219_MICBIAS1_LEVEL_SHIFT);
2275 break;
2276 }
2277
Kuninori Morimoto45101122018-01-29 04:36:54 +00002278 snd_soc_component_write(component, DA7219_MICBIAS_CTRL, micbias_lvl);
Adam Thomson6d817c02015-09-29 16:44:01 +01002279
Adam Thomson17c81d22018-08-09 10:48:50 +01002280 /*
2281 * Calculate delay required to compensate for DC offset in
2282 * Mic PGA, based on Mic Bias voltage.
2283 */
2284 da7219->mic_pga_delay = DA7219_MIC_PGA_BASE_DELAY +
2285 (pdata->micbias_lvl *
2286 DA7219_MIC_PGA_OFFSET_DELAY);
2287
Adam Thomson6d817c02015-09-29 16:44:01 +01002288 /* Mic */
2289 switch (pdata->mic_amp_in_sel) {
2290 case DA7219_MIC_AMP_IN_SEL_DIFF:
2291 case DA7219_MIC_AMP_IN_SEL_SE_P:
2292 case DA7219_MIC_AMP_IN_SEL_SE_N:
Kuninori Morimoto45101122018-01-29 04:36:54 +00002293 snd_soc_component_write(component, DA7219_MIC_1_SELECT,
Adam Thomson6d817c02015-09-29 16:44:01 +01002294 pdata->mic_amp_in_sel);
2295 break;
2296 }
2297 }
2298}
2299
Adam Thomson6d817c02015-09-29 16:44:01 +01002300
2301/*
2302 * Regmap configs
2303 */
2304
2305static struct reg_default da7219_reg_defaults[] = {
2306 { DA7219_MIC_1_SELECT, 0x00 },
2307 { DA7219_CIF_TIMEOUT_CTRL, 0x01 },
2308 { DA7219_SR_24_48, 0x00 },
2309 { DA7219_SR, 0x0A },
2310 { DA7219_CIF_I2C_ADDR_CFG, 0x02 },
2311 { DA7219_PLL_CTRL, 0x10 },
2312 { DA7219_PLL_FRAC_TOP, 0x00 },
2313 { DA7219_PLL_FRAC_BOT, 0x00 },
2314 { DA7219_PLL_INTEGER, 0x20 },
2315 { DA7219_DIG_ROUTING_DAI, 0x10 },
2316 { DA7219_DAI_CLK_MODE, 0x01 },
2317 { DA7219_DAI_CTRL, 0x28 },
2318 { DA7219_DAI_TDM_CTRL, 0x40 },
2319 { DA7219_DIG_ROUTING_DAC, 0x32 },
2320 { DA7219_DAI_OFFSET_LOWER, 0x00 },
2321 { DA7219_DAI_OFFSET_UPPER, 0x00 },
Adam Thomson9ff09972015-12-22 18:27:53 +00002322 { DA7219_REFERENCES, 0x08 },
Adam Thomson6d817c02015-09-29 16:44:01 +01002323 { DA7219_MIXIN_L_SELECT, 0x00 },
2324 { DA7219_MIXIN_L_GAIN, 0x03 },
2325 { DA7219_ADC_L_GAIN, 0x6F },
2326 { DA7219_ADC_FILTERS1, 0x80 },
2327 { DA7219_MIC_1_GAIN, 0x01 },
2328 { DA7219_SIDETONE_CTRL, 0x40 },
2329 { DA7219_SIDETONE_GAIN, 0x0E },
2330 { DA7219_DROUTING_ST_OUTFILT_1L, 0x01 },
2331 { DA7219_DROUTING_ST_OUTFILT_1R, 0x02 },
2332 { DA7219_DAC_FILTERS5, 0x00 },
2333 { DA7219_DAC_FILTERS2, 0x88 },
2334 { DA7219_DAC_FILTERS3, 0x88 },
2335 { DA7219_DAC_FILTERS4, 0x08 },
2336 { DA7219_DAC_FILTERS1, 0x80 },
2337 { DA7219_DAC_L_GAIN, 0x6F },
2338 { DA7219_DAC_R_GAIN, 0x6F },
2339 { DA7219_CP_CTRL, 0x20 },
2340 { DA7219_HP_L_GAIN, 0x39 },
2341 { DA7219_HP_R_GAIN, 0x39 },
2342 { DA7219_MIXOUT_L_SELECT, 0x00 },
2343 { DA7219_MIXOUT_R_SELECT, 0x00 },
2344 { DA7219_MICBIAS_CTRL, 0x03 },
2345 { DA7219_MIC_1_CTRL, 0x40 },
2346 { DA7219_MIXIN_L_CTRL, 0x40 },
2347 { DA7219_ADC_L_CTRL, 0x40 },
2348 { DA7219_DAC_L_CTRL, 0x40 },
2349 { DA7219_DAC_R_CTRL, 0x40 },
2350 { DA7219_HP_L_CTRL, 0x40 },
2351 { DA7219_HP_R_CTRL, 0x40 },
2352 { DA7219_MIXOUT_L_CTRL, 0x10 },
2353 { DA7219_MIXOUT_R_CTRL, 0x10 },
2354 { DA7219_CHIP_ID1, 0x23 },
2355 { DA7219_CHIP_ID2, 0x93 },
Adam Thomson6d817c02015-09-29 16:44:01 +01002356 { DA7219_IO_CTRL, 0x00 },
2357 { DA7219_GAIN_RAMP_CTRL, 0x00 },
2358 { DA7219_PC_COUNT, 0x02 },
2359 { DA7219_CP_VOL_THRESHOLD1, 0x0E },
2360 { DA7219_DIG_CTRL, 0x00 },
2361 { DA7219_ALC_CTRL2, 0x00 },
2362 { DA7219_ALC_CTRL3, 0x00 },
2363 { DA7219_ALC_NOISE, 0x3F },
2364 { DA7219_ALC_TARGET_MIN, 0x3F },
2365 { DA7219_ALC_TARGET_MAX, 0x00 },
2366 { DA7219_ALC_GAIN_LIMITS, 0xFF },
2367 { DA7219_ALC_ANA_GAIN_LIMITS, 0x71 },
2368 { DA7219_ALC_ANTICLIP_CTRL, 0x00 },
2369 { DA7219_ALC_ANTICLIP_LEVEL, 0x00 },
2370 { DA7219_DAC_NG_SETUP_TIME, 0x00 },
2371 { DA7219_DAC_NG_OFF_THRESH, 0x00 },
2372 { DA7219_DAC_NG_ON_THRESH, 0x00 },
2373 { DA7219_DAC_NG_CTRL, 0x00 },
2374 { DA7219_TONE_GEN_CFG1, 0x00 },
2375 { DA7219_TONE_GEN_CFG2, 0x00 },
2376 { DA7219_TONE_GEN_CYCLES, 0x00 },
2377 { DA7219_TONE_GEN_FREQ1_L, 0x55 },
2378 { DA7219_TONE_GEN_FREQ1_U, 0x15 },
2379 { DA7219_TONE_GEN_FREQ2_L, 0x00 },
2380 { DA7219_TONE_GEN_FREQ2_U, 0x40 },
2381 { DA7219_TONE_GEN_ON_PER, 0x02 },
2382 { DA7219_TONE_GEN_OFF_PER, 0x01 },
2383 { DA7219_ACCDET_IRQ_MASK_A, 0x00 },
2384 { DA7219_ACCDET_IRQ_MASK_B, 0x00 },
2385 { DA7219_ACCDET_CONFIG_1, 0xD6 },
2386 { DA7219_ACCDET_CONFIG_2, 0x34 },
2387 { DA7219_ACCDET_CONFIG_3, 0x0A },
2388 { DA7219_ACCDET_CONFIG_4, 0x16 },
2389 { DA7219_ACCDET_CONFIG_5, 0x21 },
2390 { DA7219_ACCDET_CONFIG_6, 0x3E },
2391 { DA7219_ACCDET_CONFIG_7, 0x01 },
2392 { DA7219_SYSTEM_ACTIVE, 0x00 },
2393};
2394
2395static bool da7219_volatile_register(struct device *dev, unsigned int reg)
2396{
2397 switch (reg) {
2398 case DA7219_MIC_1_GAIN_STATUS:
2399 case DA7219_MIXIN_L_GAIN_STATUS:
2400 case DA7219_ADC_L_GAIN_STATUS:
2401 case DA7219_DAC_L_GAIN_STATUS:
2402 case DA7219_DAC_R_GAIN_STATUS:
2403 case DA7219_HP_L_GAIN_STATUS:
2404 case DA7219_HP_R_GAIN_STATUS:
2405 case DA7219_CIF_CTRL:
2406 case DA7219_PLL_SRM_STS:
2407 case DA7219_ALC_CTRL1:
2408 case DA7219_SYSTEM_MODES_INPUT:
2409 case DA7219_SYSTEM_MODES_OUTPUT:
2410 case DA7219_ALC_OFFSET_AUTO_M_L:
2411 case DA7219_ALC_OFFSET_AUTO_U_L:
2412 case DA7219_TONE_GEN_CFG1:
2413 case DA7219_ACCDET_STATUS_A:
2414 case DA7219_ACCDET_STATUS_B:
2415 case DA7219_ACCDET_IRQ_EVENT_A:
2416 case DA7219_ACCDET_IRQ_EVENT_B:
2417 case DA7219_ACCDET_CONFIG_8:
2418 case DA7219_SYSTEM_STATUS:
Gustavo A. R. Silva965afd32018-08-04 16:53:10 -05002419 return true;
Adam Thomson6d817c02015-09-29 16:44:01 +01002420 default:
Gustavo A. R. Silva965afd32018-08-04 16:53:10 -05002421 return false;
Adam Thomson6d817c02015-09-29 16:44:01 +01002422 }
2423}
2424
2425static const struct regmap_config da7219_regmap_config = {
2426 .reg_bits = 8,
2427 .val_bits = 8,
2428
2429 .max_register = DA7219_SYSTEM_ACTIVE,
2430 .reg_defaults = da7219_reg_defaults,
2431 .num_reg_defaults = ARRAY_SIZE(da7219_reg_defaults),
2432 .volatile_reg = da7219_volatile_register,
2433 .cache_type = REGCACHE_RBTREE,
2434};
2435
Adam Thomsonaa5b18d2020-08-11 17:57:24 +01002436static struct reg_sequence da7219_rev_aa_patch[] = {
2437 { DA7219_REFERENCES, 0x08 },
2438};
Adam Thomson6d817c02015-09-29 16:44:01 +01002439
Adam Thomsonaa5b18d2020-08-11 17:57:24 +01002440static int da7219_probe(struct snd_soc_component *component)
Adam Thomson6d817c02015-09-29 16:44:01 +01002441{
Adam Thomsonaa5b18d2020-08-11 17:57:24 +01002442 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component);
2443 unsigned int system_active, system_status, rev;
2444 u8 io_voltage_lvl;
Adam Thomsona7f16ea2016-09-26 14:29:20 +01002445 int i, ret;
Adam Thomson6d817c02015-09-29 16:44:01 +01002446
Adam Thomsonaa5b18d2020-08-11 17:57:24 +01002447 da7219->component = component;
2448 mutex_init(&da7219->ctrl_lock);
2449 mutex_init(&da7219->pll_lock);
Adam Thomson6d817c02015-09-29 16:44:01 +01002450
Adam Thomsonaa5b18d2020-08-11 17:57:24 +01002451 /* Regulator configuration */
2452 ret = da7219_handle_supplies(component, &io_voltage_lvl);
2453 if (ret)
Adam Thomson6d817c02015-09-29 16:44:01 +01002454 return ret;
Adam Thomson6d817c02015-09-29 16:44:01 +01002455
Adam Thomsona7f16ea2016-09-26 14:29:20 +01002456 regcache_cache_bypass(da7219->regmap, true);
2457
2458 /* Disable audio paths if still active from previous start */
2459 regmap_read(da7219->regmap, DA7219_SYSTEM_ACTIVE, &system_active);
2460 if (system_active) {
2461 regmap_write(da7219->regmap, DA7219_GAIN_RAMP_CTRL,
2462 DA7219_GAIN_RAMP_RATE_NOMINAL);
2463 regmap_write(da7219->regmap, DA7219_SYSTEM_MODES_INPUT, 0x00);
2464 regmap_write(da7219->regmap, DA7219_SYSTEM_MODES_OUTPUT, 0x01);
2465
2466 for (i = 0; i < DA7219_SYS_STAT_CHECK_RETRIES; ++i) {
2467 regmap_read(da7219->regmap, DA7219_SYSTEM_STATUS,
2468 &system_status);
2469 if (!system_status)
2470 break;
2471
2472 msleep(DA7219_SYS_STAT_CHECK_DELAY);
2473 }
2474 }
2475
Kuninori Morimoto45101122018-01-29 04:36:54 +00002476 /* Soft reset component */
Hsin-Yu Chao96fc2942016-09-14 22:25:40 +08002477 regmap_write_bits(da7219->regmap, DA7219_ACCDET_CONFIG_1,
2478 DA7219_ACCDET_EN_MASK, 0);
2479 regmap_write_bits(da7219->regmap, DA7219_CIF_CTRL,
Adam Thomsona7f16ea2016-09-26 14:29:20 +01002480 DA7219_CIF_REG_SOFT_RESET_MASK,
2481 DA7219_CIF_REG_SOFT_RESET_MASK);
Hsin-Yu Chao96fc2942016-09-14 22:25:40 +08002482 regmap_write_bits(da7219->regmap, DA7219_SYSTEM_ACTIVE,
2483 DA7219_SYSTEM_ACTIVE_MASK, 0);
Adam Thomsonaa5b18d2020-08-11 17:57:24 +01002484 regmap_write_bits(da7219->regmap, DA7219_SYSTEM_ACTIVE,
2485 DA7219_SYSTEM_ACTIVE_MASK, 1);
Hsin-Yu Chao96fc2942016-09-14 22:25:40 +08002486
Adam Thomsona7f16ea2016-09-26 14:29:20 +01002487 regcache_cache_bypass(da7219->regmap, false);
Adam Thomsonaa5b18d2020-08-11 17:57:24 +01002488 regmap_reinit_cache(da7219->regmap, &da7219_regmap_config);
2489
2490 /* Update IO voltage level range based on supply level */
2491 snd_soc_component_write(component, DA7219_IO_CTRL, io_voltage_lvl);
2492
2493 ret = regmap_read(da7219->regmap, DA7219_CHIP_REVISION, &rev);
2494 if (ret) {
2495 dev_err(component->dev, "Failed to read chip revision: %d\n", ret);
2496 goto err_disable_reg;
2497 }
2498
2499 switch (rev & DA7219_CHIP_MINOR_MASK) {
2500 case 0:
2501 ret = regmap_register_patch(da7219->regmap, da7219_rev_aa_patch,
2502 ARRAY_SIZE(da7219_rev_aa_patch));
2503 if (ret) {
2504 dev_err(component->dev, "Failed to register AA patch: %d\n",
2505 ret);
2506 goto err_disable_reg;
2507 }
2508 break;
2509 default:
2510 break;
2511 }
2512
2513 /* Handle DT/ACPI/Platform data */
2514 da7219_handle_pdata(component);
2515
2516 /* Check if MCLK provided */
Adam Thomson78013a12020-08-11 17:57:25 +01002517 da7219->mclk = clk_get(component->dev, "mclk");
Adam Thomsonaa5b18d2020-08-11 17:57:24 +01002518 if (IS_ERR(da7219->mclk)) {
2519 if (PTR_ERR(da7219->mclk) != -ENOENT) {
2520 ret = PTR_ERR(da7219->mclk);
2521 goto err_disable_reg;
2522 } else {
2523 da7219->mclk = NULL;
2524 }
2525 }
2526
2527 /* Register CCF DAI clock control */
2528 ret = da7219_register_dai_clks(component);
2529 if (ret)
Adam Thomson78013a12020-08-11 17:57:25 +01002530 goto err_put_clk;
Adam Thomsonaa5b18d2020-08-11 17:57:24 +01002531
2532 /* Default PC counter to free-running */
2533 snd_soc_component_update_bits(component, DA7219_PC_COUNT, DA7219_PC_FREERUN_MASK,
2534 DA7219_PC_FREERUN_MASK);
2535
2536 /* Default gain ramping */
2537 snd_soc_component_update_bits(component, DA7219_MIXIN_L_CTRL,
2538 DA7219_MIXIN_L_AMP_RAMP_EN_MASK,
2539 DA7219_MIXIN_L_AMP_RAMP_EN_MASK);
2540 snd_soc_component_update_bits(component, DA7219_ADC_L_CTRL, DA7219_ADC_L_RAMP_EN_MASK,
2541 DA7219_ADC_L_RAMP_EN_MASK);
2542 snd_soc_component_update_bits(component, DA7219_DAC_L_CTRL, DA7219_DAC_L_RAMP_EN_MASK,
2543 DA7219_DAC_L_RAMP_EN_MASK);
2544 snd_soc_component_update_bits(component, DA7219_DAC_R_CTRL, DA7219_DAC_R_RAMP_EN_MASK,
2545 DA7219_DAC_R_RAMP_EN_MASK);
2546 snd_soc_component_update_bits(component, DA7219_HP_L_CTRL,
2547 DA7219_HP_L_AMP_RAMP_EN_MASK,
2548 DA7219_HP_L_AMP_RAMP_EN_MASK);
2549 snd_soc_component_update_bits(component, DA7219_HP_R_CTRL,
2550 DA7219_HP_R_AMP_RAMP_EN_MASK,
2551 DA7219_HP_R_AMP_RAMP_EN_MASK);
2552
2553 /* Default minimum gain on HP to avoid pops during DAPM sequencing */
2554 snd_soc_component_update_bits(component, DA7219_HP_L_CTRL,
2555 DA7219_HP_L_AMP_MIN_GAIN_EN_MASK,
2556 DA7219_HP_L_AMP_MIN_GAIN_EN_MASK);
2557 snd_soc_component_update_bits(component, DA7219_HP_R_CTRL,
2558 DA7219_HP_R_AMP_MIN_GAIN_EN_MASK,
2559 DA7219_HP_R_AMP_MIN_GAIN_EN_MASK);
2560
2561 /* Default infinite tone gen, start/stop by Kcontrol */
2562 snd_soc_component_write(component, DA7219_TONE_GEN_CYCLES, DA7219_BEEP_CYCLES_MASK);
2563
2564 /* Initialise AAD block */
2565 ret = da7219_aad_init(component);
2566 if (ret)
Adam Thomson78013a12020-08-11 17:57:25 +01002567 goto err_free_dai_clks;
Adam Thomsonaa5b18d2020-08-11 17:57:24 +01002568
2569 return 0;
2570
Adam Thomson78013a12020-08-11 17:57:25 +01002571err_free_dai_clks:
2572 da7219_free_dai_clks(component);
2573
2574err_put_clk:
2575 clk_put(da7219->mclk);
2576
Adam Thomsonaa5b18d2020-08-11 17:57:24 +01002577err_disable_reg:
2578 regulator_bulk_disable(DA7219_NUM_SUPPLIES, da7219->supplies);
2579 regulator_bulk_free(DA7219_NUM_SUPPLIES, da7219->supplies);
2580
2581 return ret;
2582}
2583
2584static void da7219_remove(struct snd_soc_component *component)
2585{
2586 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component);
Adam Thomsonaa5b18d2020-08-11 17:57:24 +01002587
2588 da7219_aad_exit(component);
2589
Adam Thomson78013a12020-08-11 17:57:25 +01002590 da7219_free_dai_clks(component);
2591 clk_put(da7219->mclk);
Adam Thomsonaa5b18d2020-08-11 17:57:24 +01002592
2593 /* Supplies */
2594 regulator_bulk_disable(DA7219_NUM_SUPPLIES, da7219->supplies);
2595 regulator_bulk_free(DA7219_NUM_SUPPLIES, da7219->supplies);
2596}
2597
2598#ifdef CONFIG_PM
2599static int da7219_suspend(struct snd_soc_component *component)
2600{
2601 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component);
2602
2603 /* Suspend AAD if we're not a wake-up source */
2604 if (!da7219->wakeup_source)
2605 da7219_aad_suspend(component);
2606
2607 snd_soc_component_force_bias_level(component, SND_SOC_BIAS_OFF);
2608
2609 return 0;
2610}
2611
2612static int da7219_resume(struct snd_soc_component *component)
2613{
2614 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component);
2615
2616 snd_soc_component_force_bias_level(component, SND_SOC_BIAS_STANDBY);
2617
2618 /* Resume AAD if previously suspended */
2619 if (!da7219->wakeup_source)
2620 da7219_aad_resume(component);
2621
2622 return 0;
2623}
2624#else
2625#define da7219_suspend NULL
2626#define da7219_resume NULL
2627#endif
2628
2629static const struct snd_soc_component_driver soc_component_dev_da7219 = {
2630 .probe = da7219_probe,
2631 .remove = da7219_remove,
2632 .suspend = da7219_suspend,
2633 .resume = da7219_resume,
2634 .set_bias_level = da7219_set_bias_level,
2635 .controls = da7219_snd_controls,
2636 .num_controls = ARRAY_SIZE(da7219_snd_controls),
2637 .dapm_widgets = da7219_dapm_widgets,
2638 .num_dapm_widgets = ARRAY_SIZE(da7219_dapm_widgets),
2639 .dapm_routes = da7219_audio_map,
2640 .num_dapm_routes = ARRAY_SIZE(da7219_audio_map),
2641 .idle_bias_on = 1,
2642 .use_pmdown_time = 1,
2643 .endianness = 1,
2644 .non_legacy_dai_naming = 1,
2645};
2646
2647
2648/*
2649 * I2C layer
2650 */
2651
2652static int da7219_i2c_probe(struct i2c_client *i2c,
2653 const struct i2c_device_id *id)
2654{
2655 struct device *dev = &i2c->dev;
2656 struct da7219_priv *da7219;
2657 int ret;
2658
2659 da7219 = devm_kzalloc(dev, sizeof(struct da7219_priv),
2660 GFP_KERNEL);
2661 if (!da7219)
2662 return -ENOMEM;
2663
2664 i2c_set_clientdata(i2c, da7219);
2665
2666 da7219->regmap = devm_regmap_init_i2c(i2c, &da7219_regmap_config);
2667 if (IS_ERR(da7219->regmap)) {
2668 ret = PTR_ERR(da7219->regmap);
2669 dev_err(dev, "regmap_init() failed: %d\n", ret);
2670 return ret;
2671 }
Adam Thomsona7f16ea2016-09-26 14:29:20 +01002672
Adam Thomson21f279f2020-08-11 17:57:23 +01002673 /* Retrieve DT/ACPI/Platform data */
2674 da7219->pdata = dev_get_platdata(dev);
2675 if (!da7219->pdata)
2676 da7219->pdata = da7219_fw_to_pdata(dev);
2677
2678 /* AAD */
2679 ret = da7219_aad_probe(i2c);
2680 if (ret)
2681 return ret;
2682
2683 ret = devm_snd_soc_register_component(dev, &soc_component_dev_da7219,
2684 &da7219_dai, 1);
Adam Thomson6d817c02015-09-29 16:44:01 +01002685 if (ret < 0) {
Adam Thomson21f279f2020-08-11 17:57:23 +01002686 dev_err(dev, "Failed to register da7219 component: %d\n", ret);
Adam Thomson6d817c02015-09-29 16:44:01 +01002687 }
2688 return ret;
2689}
2690
2691static int da7219_i2c_remove(struct i2c_client *client)
2692{
Adam Thomson6d817c02015-09-29 16:44:01 +01002693 return 0;
2694}
2695
2696static const struct i2c_device_id da7219_i2c_id[] = {
2697 { "da7219", },
2698 { }
2699};
2700MODULE_DEVICE_TABLE(i2c, da7219_i2c_id);
2701
2702static struct i2c_driver da7219_i2c_driver = {
2703 .driver = {
2704 .name = "da7219",
Adam Thomsonb7ebd782015-10-07 11:57:12 +01002705 .of_match_table = of_match_ptr(da7219_of_match),
Adam Thomson51813652016-05-05 11:53:06 +01002706 .acpi_match_table = ACPI_PTR(da7219_acpi_match),
Adam Thomson6d817c02015-09-29 16:44:01 +01002707 },
2708 .probe = da7219_i2c_probe,
2709 .remove = da7219_i2c_remove,
2710 .id_table = da7219_i2c_id,
2711};
2712
2713module_i2c_driver(da7219_i2c_driver);
2714
2715MODULE_DESCRIPTION("ASoC DA7219 Codec Driver");
2716MODULE_AUTHOR("Adam Thomson <Adam.Thomson.Opensource@diasemi.com>");
2717MODULE_LICENSE("GPL");