Thomas Gleixner | d2912cb | 2019-06-04 10:11:33 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Bard Liao | 0ddce71 | 2018-06-07 16:37:38 +0800 | [diff] [blame] | 2 | /* |
| 3 | * linux/sound/rt5682.h -- Platform data for RT5682 |
| 4 | * |
| 5 | * Copyright 2018 Realtek Microelectronics |
Bard Liao | 0ddce71 | 2018-06-07 16:37:38 +0800 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | #ifndef __LINUX_SND_RT5682_H |
| 9 | #define __LINUX_SND_RT5682_H |
| 10 | |
| 11 | enum rt5682_dmic1_data_pin { |
| 12 | RT5682_DMIC1_NULL, |
| 13 | RT5682_DMIC1_DATA_GPIO2, |
| 14 | RT5682_DMIC1_DATA_GPIO5, |
| 15 | }; |
| 16 | |
| 17 | enum rt5682_dmic1_clk_pin { |
| 18 | RT5682_DMIC1_CLK_GPIO1, |
| 19 | RT5682_DMIC1_CLK_GPIO3, |
| 20 | }; |
| 21 | |
| 22 | enum rt5682_jd_src { |
| 23 | RT5682_JD_NULL, |
| 24 | RT5682_JD1, |
| 25 | }; |
| 26 | |
Derek Fang | ebbfabc | 2020-02-18 21:51:51 +0800 | [diff] [blame] | 27 | enum rt5682_dai_clks { |
| 28 | RT5682_DAI_WCLK_IDX, |
| 29 | RT5682_DAI_BCLK_IDX, |
| 30 | RT5682_DAI_NUM_CLKS, |
| 31 | }; |
| 32 | |
Bard Liao | 0ddce71 | 2018-06-07 16:37:38 +0800 | [diff] [blame] | 33 | struct rt5682_platform_data { |
| 34 | |
| 35 | int ldo1_en; /* GPIO for LDO1_EN */ |
| 36 | |
| 37 | enum rt5682_dmic1_data_pin dmic1_data_pin; |
| 38 | enum rt5682_dmic1_clk_pin dmic1_clk_pin; |
| 39 | enum rt5682_jd_src jd_src; |
Shuming Fan | e226445 | 2019-10-30 16:55:33 +0800 | [diff] [blame] | 40 | unsigned int btndet_delay; |
Oder Chiou | 9a74c44 | 2020-03-23 16:25:45 +0800 | [diff] [blame] | 41 | unsigned int dmic_clk_rate; |
Oder Chiou | 8b15ee0 | 2020-03-23 16:25:46 +0800 | [diff] [blame] | 42 | unsigned int dmic_delay; |
Oder Chiou | 7416f6b | 2020-11-13 13:53:59 +0800 | [diff] [blame] | 43 | bool dmic_clk_driving_high; |
Derek Fang | ebbfabc | 2020-02-18 21:51:51 +0800 | [diff] [blame] | 44 | |
| 45 | const char *dai_clk_names[RT5682_DAI_NUM_CLKS]; |
Bard Liao | 0ddce71 | 2018-06-07 16:37:38 +0800 | [diff] [blame] | 46 | }; |
| 47 | |
| 48 | #endif |
| 49 | |