Thomas Gleixner | d2912cb | 2019-06-04 10:11:33 +0200 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0-only |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2 | /* |
| 3 | * linux/arch/arm/mach-footbridge/irq.c |
| 4 | * |
| 5 | * Copyright (C) 1996-2000 Russell King |
| 6 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 7 | * Changelog: |
| 8 | * 22-Aug-1998 RMK Restructured IRQ routines |
| 9 | * 03-Sep-1998 PJB Merged CATS support |
| 10 | * 20-Jan-1998 RMK Started merge of EBSA286, CATS and NetWinder |
| 11 | * 26-Jan-1999 PJB Don't use IACK on CATS |
| 12 | * 16-Mar-1999 RMK Added autodetect of ISA PICs |
| 13 | */ |
| 14 | #include <linux/ioport.h> |
| 15 | #include <linux/interrupt.h> |
| 16 | #include <linux/list.h> |
| 17 | #include <linux/init.h> |
Russell King | fced80c | 2008-09-06 12:10:45 +0100 | [diff] [blame] | 18 | #include <linux/io.h> |
Russell King | 70d13e0 | 2008-12-06 08:25:16 +0000 | [diff] [blame] | 19 | #include <linux/spinlock.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 20 | |
| 21 | #include <asm/mach/irq.h> |
| 22 | |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 23 | #include <mach/hardware.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 24 | #include <asm/hardware/dec21285.h> |
| 25 | #include <asm/irq.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 26 | #include <asm/mach-types.h> |
| 27 | |
Ben Dooks | 39ebfd3 | 2009-01-08 15:42:41 +0000 | [diff] [blame] | 28 | #include "common.h" |
| 29 | |
Lennert Buytenhek | dc2caf6 | 2010-11-29 10:30:13 +0100 | [diff] [blame] | 30 | static void isa_mask_pic_lo_irq(struct irq_data *d) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 31 | { |
Lennert Buytenhek | dc2caf6 | 2010-11-29 10:30:13 +0100 | [diff] [blame] | 32 | unsigned int mask = 1 << (d->irq & 7); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 33 | |
| 34 | outb(inb(PIC_MASK_LO) | mask, PIC_MASK_LO); |
| 35 | } |
| 36 | |
Lennert Buytenhek | dc2caf6 | 2010-11-29 10:30:13 +0100 | [diff] [blame] | 37 | static void isa_ack_pic_lo_irq(struct irq_data *d) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 38 | { |
Lennert Buytenhek | dc2caf6 | 2010-11-29 10:30:13 +0100 | [diff] [blame] | 39 | unsigned int mask = 1 << (d->irq & 7); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 40 | |
| 41 | outb(inb(PIC_MASK_LO) | mask, PIC_MASK_LO); |
| 42 | outb(0x20, PIC_LO); |
| 43 | } |
| 44 | |
Lennert Buytenhek | dc2caf6 | 2010-11-29 10:30:13 +0100 | [diff] [blame] | 45 | static void isa_unmask_pic_lo_irq(struct irq_data *d) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 46 | { |
Lennert Buytenhek | dc2caf6 | 2010-11-29 10:30:13 +0100 | [diff] [blame] | 47 | unsigned int mask = 1 << (d->irq & 7); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 48 | |
| 49 | outb(inb(PIC_MASK_LO) & ~mask, PIC_MASK_LO); |
| 50 | } |
| 51 | |
Russell King | 10dd5ce | 2006-11-23 11:41:32 +0000 | [diff] [blame] | 52 | static struct irq_chip isa_lo_chip = { |
Lennert Buytenhek | dc2caf6 | 2010-11-29 10:30:13 +0100 | [diff] [blame] | 53 | .irq_ack = isa_ack_pic_lo_irq, |
| 54 | .irq_mask = isa_mask_pic_lo_irq, |
| 55 | .irq_unmask = isa_unmask_pic_lo_irq, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 56 | }; |
| 57 | |
Lennert Buytenhek | dc2caf6 | 2010-11-29 10:30:13 +0100 | [diff] [blame] | 58 | static void isa_mask_pic_hi_irq(struct irq_data *d) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 59 | { |
Lennert Buytenhek | dc2caf6 | 2010-11-29 10:30:13 +0100 | [diff] [blame] | 60 | unsigned int mask = 1 << (d->irq & 7); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 61 | |
| 62 | outb(inb(PIC_MASK_HI) | mask, PIC_MASK_HI); |
| 63 | } |
| 64 | |
Lennert Buytenhek | dc2caf6 | 2010-11-29 10:30:13 +0100 | [diff] [blame] | 65 | static void isa_ack_pic_hi_irq(struct irq_data *d) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 66 | { |
Lennert Buytenhek | dc2caf6 | 2010-11-29 10:30:13 +0100 | [diff] [blame] | 67 | unsigned int mask = 1 << (d->irq & 7); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 68 | |
| 69 | outb(inb(PIC_MASK_HI) | mask, PIC_MASK_HI); |
| 70 | outb(0x62, PIC_LO); |
| 71 | outb(0x20, PIC_HI); |
| 72 | } |
| 73 | |
Lennert Buytenhek | dc2caf6 | 2010-11-29 10:30:13 +0100 | [diff] [blame] | 74 | static void isa_unmask_pic_hi_irq(struct irq_data *d) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 75 | { |
Lennert Buytenhek | dc2caf6 | 2010-11-29 10:30:13 +0100 | [diff] [blame] | 76 | unsigned int mask = 1 << (d->irq & 7); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 77 | |
| 78 | outb(inb(PIC_MASK_HI) & ~mask, PIC_MASK_HI); |
| 79 | } |
| 80 | |
Russell King | 10dd5ce | 2006-11-23 11:41:32 +0000 | [diff] [blame] | 81 | static struct irq_chip isa_hi_chip = { |
Lennert Buytenhek | dc2caf6 | 2010-11-29 10:30:13 +0100 | [diff] [blame] | 82 | .irq_ack = isa_ack_pic_hi_irq, |
| 83 | .irq_mask = isa_mask_pic_hi_irq, |
| 84 | .irq_unmask = isa_unmask_pic_hi_irq, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 85 | }; |
| 86 | |
Thomas Gleixner | bd0b9ac | 2015-09-14 10:42:37 +0200 | [diff] [blame] | 87 | static void isa_irq_handler(struct irq_desc *desc) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 88 | { |
| 89 | unsigned int isa_irq = *(unsigned char *)PCIIACK_BASE; |
| 90 | |
| 91 | if (isa_irq < _ISA_IRQ(0) || isa_irq >= _ISA_IRQ(16)) { |
Thomas Gleixner | bd0b9ac | 2015-09-14 10:42:37 +0200 | [diff] [blame] | 92 | do_bad_IRQ(desc); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 93 | return; |
| 94 | } |
| 95 | |
Dmitry Baryshkov | d8aa025 | 2008-10-09 13:36:24 +0100 | [diff] [blame] | 96 | generic_handle_irq(isa_irq); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 97 | } |
| 98 | |
Russell King | 020732a | 2006-07-03 13:18:04 +0100 | [diff] [blame] | 99 | static struct resource pic1_resource = { |
| 100 | .name = "pic1", |
| 101 | .start = 0x20, |
| 102 | .end = 0x3f, |
| 103 | }; |
| 104 | |
| 105 | static struct resource pic2_resource = { |
| 106 | .name = "pic2", |
| 107 | .start = 0xa0, |
| 108 | .end = 0xbf, |
| 109 | }; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 110 | |
| 111 | void __init isa_init_irq(unsigned int host_irq) |
| 112 | { |
| 113 | unsigned int irq; |
| 114 | |
| 115 | /* |
| 116 | * Setup, and then probe for an ISA PIC |
| 117 | * If the PIC is not there, then we |
| 118 | * ignore the PIC. |
| 119 | */ |
| 120 | outb(0x11, PIC_LO); |
| 121 | outb(_ISA_IRQ(0), PIC_MASK_LO); /* IRQ number */ |
| 122 | outb(0x04, PIC_MASK_LO); /* Slave on Ch2 */ |
| 123 | outb(0x01, PIC_MASK_LO); /* x86 */ |
| 124 | outb(0xf5, PIC_MASK_LO); /* pattern: 11110101 */ |
| 125 | |
| 126 | outb(0x11, PIC_HI); |
| 127 | outb(_ISA_IRQ(8), PIC_MASK_HI); /* IRQ number */ |
| 128 | outb(0x02, PIC_MASK_HI); /* Slave on Ch1 */ |
| 129 | outb(0x01, PIC_MASK_HI); /* x86 */ |
| 130 | outb(0xfa, PIC_MASK_HI); /* pattern: 11111010 */ |
| 131 | |
| 132 | outb(0x0b, PIC_LO); |
| 133 | outb(0x0b, PIC_HI); |
| 134 | |
| 135 | if (inb(PIC_MASK_LO) == 0xf5 && inb(PIC_MASK_HI) == 0xfa) { |
| 136 | outb(0xff, PIC_MASK_LO);/* mask all IRQs */ |
| 137 | outb(0xff, PIC_MASK_HI);/* mask all IRQs */ |
| 138 | } else { |
| 139 | printk(KERN_INFO "IRQ: ISA PIC not found\n"); |
| 140 | host_irq = (unsigned int)-1; |
| 141 | } |
| 142 | |
| 143 | if (host_irq != (unsigned int)-1) { |
| 144 | for (irq = _ISA_IRQ(0); irq < _ISA_IRQ(8); irq++) { |
Thomas Gleixner | f38c02f | 2011-03-24 13:35:09 +0100 | [diff] [blame] | 145 | irq_set_chip_and_handler(irq, &isa_lo_chip, |
| 146 | handle_level_irq); |
Rob Herring | e8d36d5 | 2015-07-27 15:55:13 -0500 | [diff] [blame] | 147 | irq_clear_status_flags(irq, IRQ_NOREQUEST | IRQ_NOPROBE); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 148 | } |
| 149 | |
| 150 | for (irq = _ISA_IRQ(8); irq < _ISA_IRQ(16); irq++) { |
Thomas Gleixner | f38c02f | 2011-03-24 13:35:09 +0100 | [diff] [blame] | 151 | irq_set_chip_and_handler(irq, &isa_hi_chip, |
| 152 | handle_level_irq); |
Rob Herring | e8d36d5 | 2015-07-27 15:55:13 -0500 | [diff] [blame] | 153 | irq_clear_status_flags(irq, IRQ_NOREQUEST | IRQ_NOPROBE); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 154 | } |
| 155 | |
| 156 | request_resource(&ioport_resource, &pic1_resource); |
| 157 | request_resource(&ioport_resource, &pic2_resource); |
afzal mohammed | 5926e7e | 2020-03-12 14:51:23 +0100 | [diff] [blame] | 158 | |
| 159 | irq = IRQ_ISA_CASCADE; |
| 160 | if (request_irq(irq, no_action, 0, "cascade", NULL)) |
| 161 | pr_err("Failed to request irq %u (cascade)\n", irq); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 162 | |
Thomas Gleixner | 6845664a | 2011-03-24 13:25:22 +0100 | [diff] [blame] | 163 | irq_set_chained_handler(host_irq, isa_irq_handler); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 164 | |
| 165 | /* |
| 166 | * On the NetWinder, don't automatically |
| 167 | * enable ISA IRQ11 when it is requested. |
| 168 | * There appears to be a missing pull-up |
| 169 | * resistor on this line. |
| 170 | */ |
| 171 | if (machine_is_netwinder()) |
Rob Herring | e8d36d5 | 2015-07-27 15:55:13 -0500 | [diff] [blame] | 172 | irq_modify_status(_ISA_IRQ(11), |
| 173 | IRQ_NOREQUEST | IRQ_NOPROBE, IRQ_NOAUTOEN); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 174 | } |
| 175 | } |
| 176 | |
| 177 | |