blob: 91b5a7ade0d5ae906c682dbad47a0ae50fad447e [file] [log] [blame]
Thomas Gleixner5b497af2019-05-29 07:18:09 -07001// SPDX-License-Identifier: GPL-2.0-only
Dan Williams1f7df6f2015-06-09 20:13:14 -04002/*
3 * Copyright(c) 2013-2015 Intel Corporation. All rights reserved.
Dan Williams1f7df6f2015-06-09 20:13:14 -04004 */
Dan Williamseaf96152015-05-01 13:11:27 -04005#include <linux/scatterlist.h>
Ross Zwisler047fc8a2015-06-25 04:21:02 -04006#include <linux/highmem.h>
Dan Williamseaf96152015-05-01 13:11:27 -04007#include <linux/sched.h>
Dan Williams1f7df6f2015-06-09 20:13:14 -04008#include <linux/slab.h>
Dan Williams0c27af62016-05-27 09:23:01 -07009#include <linux/hash.h>
Dan Williamseaf96152015-05-01 13:11:27 -040010#include <linux/sort.h>
Dan Williams1f7df6f2015-06-09 20:13:14 -040011#include <linux/io.h>
Dan Williamsbf9bccc2015-06-17 17:14:46 -040012#include <linux/nd.h>
Dan Williams1f7df6f2015-06-09 20:13:14 -040013#include "nd-core.h"
14#include "nd.h"
15
Dan Williamsf284a4f2016-07-07 19:44:50 -070016/*
17 * For readq() and writeq() on 32-bit builds, the hi-lo, lo-hi order is
18 * irrelevant.
19 */
20#include <linux/io-64-nonatomic-hi-lo.h>
21
Dan Williams1f7df6f2015-06-09 20:13:14 -040022static DEFINE_IDA(region_ida);
Dan Williams0c27af62016-05-27 09:23:01 -070023static DEFINE_PER_CPU(int, flush_idx);
Dan Williams1f7df6f2015-06-09 20:13:14 -040024
Dan Williamse5ae3b22016-06-07 17:00:04 -070025static int nvdimm_map_flush(struct device *dev, struct nvdimm *nvdimm, int dimm,
26 struct nd_region_data *ndrd)
27{
28 int i, j;
29
30 dev_dbg(dev, "%s: map %d flush address%s\n", nvdimm_name(nvdimm),
31 nvdimm->num_flush, nvdimm->num_flush == 1 ? "" : "es");
Dan Williams595c7302016-09-23 17:53:52 -070032 for (i = 0; i < (1 << ndrd->hints_shift); i++) {
Dan Williamse5ae3b22016-06-07 17:00:04 -070033 struct resource *res = &nvdimm->flush_wpq[i];
34 unsigned long pfn = PHYS_PFN(res->start);
35 void __iomem *flush_page;
36
37 /* check if flush hints share a page */
38 for (j = 0; j < i; j++) {
39 struct resource *res_j = &nvdimm->flush_wpq[j];
40 unsigned long pfn_j = PHYS_PFN(res_j->start);
41
42 if (pfn == pfn_j)
43 break;
44 }
45
46 if (j < i)
47 flush_page = (void __iomem *) ((unsigned long)
Dan Williams595c7302016-09-23 17:53:52 -070048 ndrd_get_flush_wpq(ndrd, dimm, j)
49 & PAGE_MASK);
Dan Williamse5ae3b22016-06-07 17:00:04 -070050 else
51 flush_page = devm_nvdimm_ioremap(dev,
Oliver O'Halloran480b6832016-09-19 20:19:00 +100052 PFN_PHYS(pfn), PAGE_SIZE);
Dan Williamse5ae3b22016-06-07 17:00:04 -070053 if (!flush_page)
54 return -ENXIO;
Dan Williams595c7302016-09-23 17:53:52 -070055 ndrd_set_flush_wpq(ndrd, dimm, i, flush_page
56 + (res->start & ~PAGE_MASK));
Dan Williamse5ae3b22016-06-07 17:00:04 -070057 }
58
59 return 0;
60}
61
62int nd_region_activate(struct nd_region *nd_region)
63{
Dave Jiangdb580282016-09-26 11:06:50 -070064 int i, j, num_flush = 0;
Dan Williamse5ae3b22016-06-07 17:00:04 -070065 struct nd_region_data *ndrd;
66 struct device *dev = &nd_region->dev;
67 size_t flush_data_size = sizeof(void *);
68
69 nvdimm_bus_lock(&nd_region->dev);
70 for (i = 0; i < nd_region->ndr_mappings; i++) {
71 struct nd_mapping *nd_mapping = &nd_region->mapping[i];
72 struct nvdimm *nvdimm = nd_mapping->nvdimm;
73
Dave Jiang7d988092018-12-13 15:36:18 -070074 if (test_bit(NDD_SECURITY_OVERWRITE, &nvdimm->flags)) {
75 nvdimm_bus_unlock(&nd_region->dev);
76 return -EBUSY;
77 }
78
Dan Williamse5ae3b22016-06-07 17:00:04 -070079 /* at least one null hint slot per-dimm for the "no-hint" case */
80 flush_data_size += sizeof(void *);
Dan Williams0c27af62016-05-27 09:23:01 -070081 num_flush = min_not_zero(num_flush, nvdimm->num_flush);
Dan Williamse5ae3b22016-06-07 17:00:04 -070082 if (!nvdimm->num_flush)
83 continue;
84 flush_data_size += nvdimm->num_flush * sizeof(void *);
85 }
86 nvdimm_bus_unlock(&nd_region->dev);
87
88 ndrd = devm_kzalloc(dev, sizeof(*ndrd) + flush_data_size, GFP_KERNEL);
89 if (!ndrd)
90 return -ENOMEM;
91 dev_set_drvdata(dev, ndrd);
92
Dan Williams595c7302016-09-23 17:53:52 -070093 if (!num_flush)
94 return 0;
95
96 ndrd->hints_shift = ilog2(num_flush);
Dan Williamse5ae3b22016-06-07 17:00:04 -070097 for (i = 0; i < nd_region->ndr_mappings; i++) {
98 struct nd_mapping *nd_mapping = &nd_region->mapping[i];
99 struct nvdimm *nvdimm = nd_mapping->nvdimm;
100 int rc = nvdimm_map_flush(&nd_region->dev, nvdimm, i, ndrd);
101
102 if (rc)
103 return rc;
104 }
105
Dave Jiangdb580282016-09-26 11:06:50 -0700106 /*
107 * Clear out entries that are duplicates. This should prevent the
108 * extra flushings.
109 */
110 for (i = 0; i < nd_region->ndr_mappings - 1; i++) {
111 /* ignore if NULL already */
112 if (!ndrd_get_flush_wpq(ndrd, i, 0))
113 continue;
114
115 for (j = i + 1; j < nd_region->ndr_mappings; j++)
116 if (ndrd_get_flush_wpq(ndrd, i, 0) ==
117 ndrd_get_flush_wpq(ndrd, j, 0))
118 ndrd_set_flush_wpq(ndrd, j, 0, NULL);
119 }
120
Dan Williamse5ae3b22016-06-07 17:00:04 -0700121 return 0;
122}
123
Dan Williams1f7df6f2015-06-09 20:13:14 -0400124static void nd_region_release(struct device *dev)
125{
126 struct nd_region *nd_region = to_nd_region(dev);
127 u16 i;
128
129 for (i = 0; i < nd_region->ndr_mappings; i++) {
130 struct nd_mapping *nd_mapping = &nd_region->mapping[i];
131 struct nvdimm *nvdimm = nd_mapping->nvdimm;
132
133 put_device(&nvdimm->dev);
134 }
Vishal Verma5212e112015-06-25 04:20:32 -0400135 free_percpu(nd_region->lane);
Dan Williams1f7df6f2015-06-09 20:13:14 -0400136 ida_simple_remove(&region_ida, nd_region->id);
Ross Zwisler047fc8a2015-06-25 04:21:02 -0400137 if (is_nd_blk(dev))
138 kfree(to_nd_blk_region(dev));
139 else
140 kfree(nd_region);
Dan Williams1f7df6f2015-06-09 20:13:14 -0400141}
142
143static struct device_type nd_blk_device_type = {
144 .name = "nd_blk",
145 .release = nd_region_release,
146};
147
148static struct device_type nd_pmem_device_type = {
149 .name = "nd_pmem",
150 .release = nd_region_release,
151};
152
153static struct device_type nd_volatile_device_type = {
154 .name = "nd_volatile",
155 .release = nd_region_release,
156};
157
Dan Williams3d880022015-05-31 15:02:11 -0400158bool is_nd_pmem(struct device *dev)
Dan Williams1f7df6f2015-06-09 20:13:14 -0400159{
160 return dev ? dev->type == &nd_pmem_device_type : false;
161}
162
Dan Williams3d880022015-05-31 15:02:11 -0400163bool is_nd_blk(struct device *dev)
164{
165 return dev ? dev->type == &nd_blk_device_type : false;
166}
167
Dan Williamsc9e582a2017-05-29 23:12:19 -0700168bool is_nd_volatile(struct device *dev)
169{
170 return dev ? dev->type == &nd_volatile_device_type : false;
171}
172
Dan Williams1f7df6f2015-06-09 20:13:14 -0400173struct nd_region *to_nd_region(struct device *dev)
174{
175 struct nd_region *nd_region = container_of(dev, struct nd_region, dev);
176
177 WARN_ON(dev->type->release != nd_region_release);
178 return nd_region;
179}
180EXPORT_SYMBOL_GPL(to_nd_region);
181
Dan Williams243f29f2018-04-02 13:14:25 -0700182struct device *nd_region_dev(struct nd_region *nd_region)
183{
184 if (!nd_region)
185 return NULL;
186 return &nd_region->dev;
187}
188EXPORT_SYMBOL_GPL(nd_region_dev);
189
Ross Zwisler047fc8a2015-06-25 04:21:02 -0400190struct nd_blk_region *to_nd_blk_region(struct device *dev)
191{
192 struct nd_region *nd_region = to_nd_region(dev);
193
194 WARN_ON(!is_nd_blk(dev));
195 return container_of(nd_region, struct nd_blk_region, nd_region);
196}
197EXPORT_SYMBOL_GPL(to_nd_blk_region);
198
199void *nd_region_provider_data(struct nd_region *nd_region)
200{
201 return nd_region->provider_data;
202}
203EXPORT_SYMBOL_GPL(nd_region_provider_data);
204
205void *nd_blk_region_provider_data(struct nd_blk_region *ndbr)
206{
207 return ndbr->blk_provider_data;
208}
209EXPORT_SYMBOL_GPL(nd_blk_region_provider_data);
210
211void nd_blk_region_set_provider_data(struct nd_blk_region *ndbr, void *data)
212{
213 ndbr->blk_provider_data = data;
214}
215EXPORT_SYMBOL_GPL(nd_blk_region_set_provider_data);
216
Dan Williams3d880022015-05-31 15:02:11 -0400217/**
218 * nd_region_to_nstype() - region to an integer namespace type
219 * @nd_region: region-device to interrogate
220 *
221 * This is the 'nstype' attribute of a region as well, an input to the
222 * MODALIAS for namespace devices, and bit number for a nvdimm_bus to match
223 * namespace devices with namespace drivers.
224 */
225int nd_region_to_nstype(struct nd_region *nd_region)
226{
Dan Williamsc9e582a2017-05-29 23:12:19 -0700227 if (is_memory(&nd_region->dev)) {
Dan Williams3d880022015-05-31 15:02:11 -0400228 u16 i, alias;
229
230 for (i = 0, alias = 0; i < nd_region->ndr_mappings; i++) {
231 struct nd_mapping *nd_mapping = &nd_region->mapping[i];
232 struct nvdimm *nvdimm = nd_mapping->nvdimm;
233
Dan Williams8f078b32017-05-04 14:01:24 -0700234 if (test_bit(NDD_ALIASING, &nvdimm->flags))
Dan Williams3d880022015-05-31 15:02:11 -0400235 alias++;
236 }
237 if (alias)
238 return ND_DEVICE_NAMESPACE_PMEM;
239 else
240 return ND_DEVICE_NAMESPACE_IO;
241 } else if (is_nd_blk(&nd_region->dev)) {
242 return ND_DEVICE_NAMESPACE_BLK;
243 }
244
245 return 0;
246}
Dan Williamsbf9bccc2015-06-17 17:14:46 -0400247EXPORT_SYMBOL(nd_region_to_nstype);
248
Dan Williams1f7df6f2015-06-09 20:13:14 -0400249static ssize_t size_show(struct device *dev,
250 struct device_attribute *attr, char *buf)
251{
252 struct nd_region *nd_region = to_nd_region(dev);
253 unsigned long long size = 0;
254
Dan Williamsc9e582a2017-05-29 23:12:19 -0700255 if (is_memory(dev)) {
Dan Williams1f7df6f2015-06-09 20:13:14 -0400256 size = nd_region->ndr_size;
257 } else if (nd_region->ndr_mappings == 1) {
258 struct nd_mapping *nd_mapping = &nd_region->mapping[0];
259
260 size = nd_mapping->size;
261 }
262
263 return sprintf(buf, "%llu\n", size);
264}
265static DEVICE_ATTR_RO(size);
266
Dan Williamsab630892017-04-21 13:28:12 -0700267static ssize_t deep_flush_show(struct device *dev,
268 struct device_attribute *attr, char *buf)
269{
270 struct nd_region *nd_region = to_nd_region(dev);
271
272 /*
273 * NOTE: in the nvdimm_has_flush() error case this attribute is
274 * not visible.
275 */
276 return sprintf(buf, "%d\n", nvdimm_has_flush(nd_region));
277}
278
279static ssize_t deep_flush_store(struct device *dev, struct device_attribute *attr,
280 const char *buf, size_t len)
281{
282 bool flush;
283 int rc = strtobool(buf, &flush);
284 struct nd_region *nd_region = to_nd_region(dev);
285
286 if (rc)
287 return rc;
288 if (!flush)
289 return -EINVAL;
290 nvdimm_flush(nd_region);
291
292 return len;
293}
294static DEVICE_ATTR_RW(deep_flush);
295
Dan Williams1f7df6f2015-06-09 20:13:14 -0400296static ssize_t mappings_show(struct device *dev,
297 struct device_attribute *attr, char *buf)
298{
299 struct nd_region *nd_region = to_nd_region(dev);
300
301 return sprintf(buf, "%d\n", nd_region->ndr_mappings);
302}
303static DEVICE_ATTR_RO(mappings);
304
Dan Williams3d880022015-05-31 15:02:11 -0400305static ssize_t nstype_show(struct device *dev,
306 struct device_attribute *attr, char *buf)
307{
308 struct nd_region *nd_region = to_nd_region(dev);
309
310 return sprintf(buf, "%d\n", nd_region_to_nstype(nd_region));
311}
312static DEVICE_ATTR_RO(nstype);
313
Dan Williamseaf96152015-05-01 13:11:27 -0400314static ssize_t set_cookie_show(struct device *dev,
315 struct device_attribute *attr, char *buf)
316{
317 struct nd_region *nd_region = to_nd_region(dev);
318 struct nd_interleave_set *nd_set = nd_region->nd_set;
Dan Williamsc12c48c2017-06-04 10:59:15 +0900319 ssize_t rc = 0;
Dan Williamseaf96152015-05-01 13:11:27 -0400320
Dan Williamsc9e582a2017-05-29 23:12:19 -0700321 if (is_memory(dev) && nd_set)
Dan Williamseaf96152015-05-01 13:11:27 -0400322 /* pass, should be precluded by region_visible */;
323 else
324 return -ENXIO;
325
Dan Williamsc12c48c2017-06-04 10:59:15 +0900326 /*
327 * The cookie to show depends on which specification of the
328 * labels we are using. If there are not labels then default to
329 * the v1.1 namespace label cookie definition. To read all this
330 * data we need to wait for probing to settle.
331 */
Dan Williams87a30e12019-07-17 18:08:26 -0700332 nd_device_lock(dev);
Dan Williamsc12c48c2017-06-04 10:59:15 +0900333 nvdimm_bus_lock(dev);
334 wait_nvdimm_bus_probe_idle(dev);
335 if (nd_region->ndr_mappings) {
336 struct nd_mapping *nd_mapping = &nd_region->mapping[0];
337 struct nvdimm_drvdata *ndd = to_ndd(nd_mapping);
338
339 if (ndd) {
340 struct nd_namespace_index *nsindex;
341
342 nsindex = to_namespace_index(ndd, ndd->ns_current);
343 rc = sprintf(buf, "%#llx\n",
344 nd_region_interleave_set_cookie(nd_region,
345 nsindex));
346 }
347 }
348 nvdimm_bus_unlock(dev);
Dan Williams87a30e12019-07-17 18:08:26 -0700349 nd_device_unlock(dev);
Dan Williamsc12c48c2017-06-04 10:59:15 +0900350
351 if (rc)
352 return rc;
353 return sprintf(buf, "%#llx\n", nd_set->cookie1);
Dan Williamseaf96152015-05-01 13:11:27 -0400354}
355static DEVICE_ATTR_RO(set_cookie);
356
Dan Williamsbf9bccc2015-06-17 17:14:46 -0400357resource_size_t nd_region_available_dpa(struct nd_region *nd_region)
358{
359 resource_size_t blk_max_overlap = 0, available, overlap;
360 int i;
361
362 WARN_ON(!is_nvdimm_bus_locked(&nd_region->dev));
363
364 retry:
365 available = 0;
366 overlap = blk_max_overlap;
367 for (i = 0; i < nd_region->ndr_mappings; i++) {
368 struct nd_mapping *nd_mapping = &nd_region->mapping[i];
369 struct nvdimm_drvdata *ndd = to_ndd(nd_mapping);
370
371 /* if a dimm is disabled the available capacity is zero */
372 if (!ndd)
373 return 0;
374
Dan Williamsc9e582a2017-05-29 23:12:19 -0700375 if (is_memory(&nd_region->dev)) {
Dan Williamsbf9bccc2015-06-17 17:14:46 -0400376 available += nd_pmem_available_dpa(nd_region,
377 nd_mapping, &overlap);
378 if (overlap > blk_max_overlap) {
379 blk_max_overlap = overlap;
380 goto retry;
381 }
Dan Williamsa1f3e4d2016-09-30 17:28:58 -0700382 } else if (is_nd_blk(&nd_region->dev))
383 available += nd_blk_available_dpa(nd_region);
Dan Williamsbf9bccc2015-06-17 17:14:46 -0400384 }
385
386 return available;
387}
388
Keith Busch12e31292018-07-24 15:07:57 -0600389resource_size_t nd_region_allocatable_dpa(struct nd_region *nd_region)
390{
391 resource_size_t available = 0;
392 int i;
393
394 if (is_memory(&nd_region->dev))
395 available = PHYS_ADDR_MAX;
396
397 WARN_ON(!is_nvdimm_bus_locked(&nd_region->dev));
398 for (i = 0; i < nd_region->ndr_mappings; i++) {
399 struct nd_mapping *nd_mapping = &nd_region->mapping[i];
400
401 if (is_memory(&nd_region->dev))
402 available = min(available,
403 nd_pmem_max_contiguous_dpa(nd_region,
404 nd_mapping));
405 else if (is_nd_blk(&nd_region->dev))
406 available += nd_blk_available_dpa(nd_region);
407 }
408 if (is_memory(&nd_region->dev))
409 return available * nd_region->ndr_mappings;
410 return available;
411}
412
Dan Williamsbf9bccc2015-06-17 17:14:46 -0400413static ssize_t available_size_show(struct device *dev,
414 struct device_attribute *attr, char *buf)
415{
416 struct nd_region *nd_region = to_nd_region(dev);
417 unsigned long long available = 0;
418
419 /*
420 * Flush in-flight updates and grab a snapshot of the available
421 * size. Of course, this value is potentially invalidated the
422 * memory nvdimm_bus_lock() is dropped, but that's userspace's
423 * problem to not race itself.
424 */
Dan Williams87a30e12019-07-17 18:08:26 -0700425 nd_device_lock(dev);
Dan Williamsbf9bccc2015-06-17 17:14:46 -0400426 nvdimm_bus_lock(dev);
427 wait_nvdimm_bus_probe_idle(dev);
428 available = nd_region_available_dpa(nd_region);
429 nvdimm_bus_unlock(dev);
Dan Williams87a30e12019-07-17 18:08:26 -0700430 nd_device_unlock(dev);
Dan Williamsbf9bccc2015-06-17 17:14:46 -0400431
432 return sprintf(buf, "%llu\n", available);
433}
434static DEVICE_ATTR_RO(available_size);
435
Keith Busch1e687222018-07-24 15:07:58 -0600436static ssize_t max_available_extent_show(struct device *dev,
437 struct device_attribute *attr, char *buf)
438{
439 struct nd_region *nd_region = to_nd_region(dev);
440 unsigned long long available = 0;
441
Dan Williams87a30e12019-07-17 18:08:26 -0700442 nd_device_lock(dev);
Keith Busch1e687222018-07-24 15:07:58 -0600443 nvdimm_bus_lock(dev);
444 wait_nvdimm_bus_probe_idle(dev);
445 available = nd_region_allocatable_dpa(nd_region);
446 nvdimm_bus_unlock(dev);
Dan Williams87a30e12019-07-17 18:08:26 -0700447 nd_device_unlock(dev);
Keith Busch1e687222018-07-24 15:07:58 -0600448
449 return sprintf(buf, "%llu\n", available);
450}
451static DEVICE_ATTR_RO(max_available_extent);
452
Dan Williams3d880022015-05-31 15:02:11 -0400453static ssize_t init_namespaces_show(struct device *dev,
454 struct device_attribute *attr, char *buf)
455{
Dan Williamse5ae3b22016-06-07 17:00:04 -0700456 struct nd_region_data *ndrd = dev_get_drvdata(dev);
Dan Williams3d880022015-05-31 15:02:11 -0400457 ssize_t rc;
458
459 nvdimm_bus_lock(dev);
Dan Williamse5ae3b22016-06-07 17:00:04 -0700460 if (ndrd)
461 rc = sprintf(buf, "%d/%d\n", ndrd->ns_active, ndrd->ns_count);
Dan Williams3d880022015-05-31 15:02:11 -0400462 else
463 rc = -ENXIO;
464 nvdimm_bus_unlock(dev);
465
466 return rc;
467}
468static DEVICE_ATTR_RO(init_namespaces);
469
Dan Williamsbf9bccc2015-06-17 17:14:46 -0400470static ssize_t namespace_seed_show(struct device *dev,
471 struct device_attribute *attr, char *buf)
472{
473 struct nd_region *nd_region = to_nd_region(dev);
474 ssize_t rc;
475
476 nvdimm_bus_lock(dev);
477 if (nd_region->ns_seed)
478 rc = sprintf(buf, "%s\n", dev_name(nd_region->ns_seed));
479 else
480 rc = sprintf(buf, "\n");
481 nvdimm_bus_unlock(dev);
482 return rc;
483}
484static DEVICE_ATTR_RO(namespace_seed);
485
Dan Williams8c2f7e82015-06-25 04:20:04 -0400486static ssize_t btt_seed_show(struct device *dev,
487 struct device_attribute *attr, char *buf)
488{
489 struct nd_region *nd_region = to_nd_region(dev);
490 ssize_t rc;
491
492 nvdimm_bus_lock(dev);
493 if (nd_region->btt_seed)
494 rc = sprintf(buf, "%s\n", dev_name(nd_region->btt_seed));
495 else
496 rc = sprintf(buf, "\n");
497 nvdimm_bus_unlock(dev);
498
499 return rc;
500}
501static DEVICE_ATTR_RO(btt_seed);
502
Dan Williamse1455742015-07-30 17:57:47 -0400503static ssize_t pfn_seed_show(struct device *dev,
504 struct device_attribute *attr, char *buf)
505{
506 struct nd_region *nd_region = to_nd_region(dev);
507 ssize_t rc;
508
509 nvdimm_bus_lock(dev);
510 if (nd_region->pfn_seed)
511 rc = sprintf(buf, "%s\n", dev_name(nd_region->pfn_seed));
512 else
513 rc = sprintf(buf, "\n");
514 nvdimm_bus_unlock(dev);
515
516 return rc;
517}
518static DEVICE_ATTR_RO(pfn_seed);
519
Dan Williamscd034122016-03-11 10:15:36 -0800520static ssize_t dax_seed_show(struct device *dev,
521 struct device_attribute *attr, char *buf)
522{
523 struct nd_region *nd_region = to_nd_region(dev);
524 ssize_t rc;
525
526 nvdimm_bus_lock(dev);
527 if (nd_region->dax_seed)
528 rc = sprintf(buf, "%s\n", dev_name(nd_region->dax_seed));
529 else
530 rc = sprintf(buf, "\n");
531 nvdimm_bus_unlock(dev);
532
533 return rc;
534}
535static DEVICE_ATTR_RO(dax_seed);
536
Dan Williams58138822015-06-23 20:08:34 -0400537static ssize_t read_only_show(struct device *dev,
538 struct device_attribute *attr, char *buf)
539{
540 struct nd_region *nd_region = to_nd_region(dev);
541
542 return sprintf(buf, "%d\n", nd_region->ro);
543}
544
545static ssize_t read_only_store(struct device *dev,
546 struct device_attribute *attr, const char *buf, size_t len)
547{
548 bool ro;
549 int rc = strtobool(buf, &ro);
550 struct nd_region *nd_region = to_nd_region(dev);
551
552 if (rc)
553 return rc;
554
555 nd_region->ro = ro;
556 return len;
557}
558static DEVICE_ATTR_RW(read_only);
559
Dan Williams23f49842017-04-29 15:24:03 -0700560static ssize_t region_badblocks_show(struct device *dev,
Dave Jiang6a6bef92017-04-07 15:33:20 -0700561 struct device_attribute *attr, char *buf)
562{
563 struct nd_region *nd_region = to_nd_region(dev);
Dan Williams5d394ee2018-09-27 15:01:55 -0700564 ssize_t rc;
Dave Jiang6a6bef92017-04-07 15:33:20 -0700565
Dan Williams87a30e12019-07-17 18:08:26 -0700566 nd_device_lock(dev);
Dan Williams5d394ee2018-09-27 15:01:55 -0700567 if (dev->driver)
568 rc = badblocks_show(&nd_region->bb, buf, 0);
569 else
570 rc = -ENXIO;
Dan Williams87a30e12019-07-17 18:08:26 -0700571 nd_device_unlock(dev);
Dan Williams5d394ee2018-09-27 15:01:55 -0700572
573 return rc;
Dave Jiang6a6bef92017-04-07 15:33:20 -0700574}
Dan Williams23f49842017-04-29 15:24:03 -0700575static DEVICE_ATTR(badblocks, 0444, region_badblocks_show, NULL);
Dave Jiang6a6bef92017-04-07 15:33:20 -0700576
Dave Jiang802f4be2017-04-07 15:33:25 -0700577static ssize_t resource_show(struct device *dev,
578 struct device_attribute *attr, char *buf)
579{
580 struct nd_region *nd_region = to_nd_region(dev);
581
582 return sprintf(buf, "%#llx\n", nd_region->ndr_start);
583}
584static DEVICE_ATTR_RO(resource);
585
Dave Jiang96c3a232018-01-31 12:45:49 -0700586static ssize_t persistence_domain_show(struct device *dev,
587 struct device_attribute *attr, char *buf)
588{
589 struct nd_region *nd_region = to_nd_region(dev);
Dave Jiang96c3a232018-01-31 12:45:49 -0700590
Dan Williamsfe9a5522018-03-21 15:12:07 -0700591 if (test_bit(ND_REGION_PERSIST_CACHE, &nd_region->flags))
592 return sprintf(buf, "cpu_cache\n");
593 else if (test_bit(ND_REGION_PERSIST_MEMCTRL, &nd_region->flags))
594 return sprintf(buf, "memory_controller\n");
595 else
596 return sprintf(buf, "\n");
Dave Jiang96c3a232018-01-31 12:45:49 -0700597}
598static DEVICE_ATTR_RO(persistence_domain);
599
Dan Williams1f7df6f2015-06-09 20:13:14 -0400600static struct attribute *nd_region_attributes[] = {
601 &dev_attr_size.attr,
Dan Williams3d880022015-05-31 15:02:11 -0400602 &dev_attr_nstype.attr,
Dan Williams1f7df6f2015-06-09 20:13:14 -0400603 &dev_attr_mappings.attr,
Dan Williams8c2f7e82015-06-25 04:20:04 -0400604 &dev_attr_btt_seed.attr,
Dan Williamse1455742015-07-30 17:57:47 -0400605 &dev_attr_pfn_seed.attr,
Dan Williamscd034122016-03-11 10:15:36 -0800606 &dev_attr_dax_seed.attr,
Dan Williamsab630892017-04-21 13:28:12 -0700607 &dev_attr_deep_flush.attr,
Dan Williams58138822015-06-23 20:08:34 -0400608 &dev_attr_read_only.attr,
Dan Williamseaf96152015-05-01 13:11:27 -0400609 &dev_attr_set_cookie.attr,
Dan Williamsbf9bccc2015-06-17 17:14:46 -0400610 &dev_attr_available_size.attr,
Keith Busch1e687222018-07-24 15:07:58 -0600611 &dev_attr_max_available_extent.attr,
Dan Williamsbf9bccc2015-06-17 17:14:46 -0400612 &dev_attr_namespace_seed.attr,
Dan Williams3d880022015-05-31 15:02:11 -0400613 &dev_attr_init_namespaces.attr,
Dan Williams23f49842017-04-29 15:24:03 -0700614 &dev_attr_badblocks.attr,
Dave Jiang802f4be2017-04-07 15:33:25 -0700615 &dev_attr_resource.attr,
Dave Jiang96c3a232018-01-31 12:45:49 -0700616 &dev_attr_persistence_domain.attr,
Dan Williams1f7df6f2015-06-09 20:13:14 -0400617 NULL,
618};
619
Dan Williamseaf96152015-05-01 13:11:27 -0400620static umode_t region_visible(struct kobject *kobj, struct attribute *a, int n)
621{
622 struct device *dev = container_of(kobj, typeof(*dev), kobj);
623 struct nd_region *nd_region = to_nd_region(dev);
624 struct nd_interleave_set *nd_set = nd_region->nd_set;
Dan Williamsbf9bccc2015-06-17 17:14:46 -0400625 int type = nd_region_to_nstype(nd_region);
Dan Williamseaf96152015-05-01 13:11:27 -0400626
Dan Williamsc9e582a2017-05-29 23:12:19 -0700627 if (!is_memory(dev) && a == &dev_attr_pfn_seed.attr)
Dmitry Krivenok6bb691a2015-12-02 09:39:29 +0300628 return 0;
629
Dan Williamsc9e582a2017-05-29 23:12:19 -0700630 if (!is_memory(dev) && a == &dev_attr_dax_seed.attr)
Dan Williamscd034122016-03-11 10:15:36 -0800631 return 0;
632
Dan Williams23f49842017-04-29 15:24:03 -0700633 if (!is_nd_pmem(dev) && a == &dev_attr_badblocks.attr)
Dave Jiang6a6bef92017-04-07 15:33:20 -0700634 return 0;
635
Dan Williamsb8ff9812017-09-26 11:17:52 -0700636 if (a == &dev_attr_resource.attr) {
637 if (is_nd_pmem(dev))
638 return 0400;
639 else
640 return 0;
641 }
Dave Jiang802f4be2017-04-07 15:33:25 -0700642
Dan Williamsab630892017-04-21 13:28:12 -0700643 if (a == &dev_attr_deep_flush.attr) {
644 int has_flush = nvdimm_has_flush(nd_region);
645
646 if (has_flush == 1)
647 return a->mode;
648 else if (has_flush == 0)
649 return 0444;
650 else
651 return 0;
652 }
653
Dan Williams896196dc2018-03-21 14:06:23 -0700654 if (a == &dev_attr_persistence_domain.attr) {
655 if ((nd_region->flags & (BIT(ND_REGION_PERSIST_CACHE)
656 | BIT(ND_REGION_PERSIST_MEMCTRL))) == 0)
657 return 0;
658 return a->mode;
659 }
660
Dan Williamsbf9bccc2015-06-17 17:14:46 -0400661 if (a != &dev_attr_set_cookie.attr
662 && a != &dev_attr_available_size.attr)
Dan Williamseaf96152015-05-01 13:11:27 -0400663 return a->mode;
664
Dan Williamsbf9bccc2015-06-17 17:14:46 -0400665 if ((type == ND_DEVICE_NAMESPACE_PMEM
666 || type == ND_DEVICE_NAMESPACE_BLK)
667 && a == &dev_attr_available_size.attr)
668 return a->mode;
Dan Williamsc9e582a2017-05-29 23:12:19 -0700669 else if (is_memory(dev) && nd_set)
Dan Williamsbf9bccc2015-06-17 17:14:46 -0400670 return a->mode;
Dan Williamseaf96152015-05-01 13:11:27 -0400671
672 return 0;
673}
674
Dan Williams1f7df6f2015-06-09 20:13:14 -0400675struct attribute_group nd_region_attribute_group = {
676 .attrs = nd_region_attributes,
Dan Williamseaf96152015-05-01 13:11:27 -0400677 .is_visible = region_visible,
Dan Williams1f7df6f2015-06-09 20:13:14 -0400678};
679EXPORT_SYMBOL_GPL(nd_region_attribute_group);
680
Dan Williamsc12c48c2017-06-04 10:59:15 +0900681u64 nd_region_interleave_set_cookie(struct nd_region *nd_region,
682 struct nd_namespace_index *nsindex)
Dan Williamsbf9bccc2015-06-17 17:14:46 -0400683{
684 struct nd_interleave_set *nd_set = nd_region->nd_set;
685
Dan Williamsc12c48c2017-06-04 10:59:15 +0900686 if (!nd_set)
687 return 0;
688
689 if (nsindex && __le16_to_cpu(nsindex->major) == 1
690 && __le16_to_cpu(nsindex->minor) == 1)
691 return nd_set->cookie1;
692 return nd_set->cookie2;
Dan Williamsbf9bccc2015-06-17 17:14:46 -0400693}
694
Dan Williams86ef58a2017-02-28 18:32:48 -0800695u64 nd_region_interleave_set_altcookie(struct nd_region *nd_region)
696{
697 struct nd_interleave_set *nd_set = nd_region->nd_set;
698
699 if (nd_set)
700 return nd_set->altcookie;
701 return 0;
702}
703
Dan Williamsae8219f2016-09-19 16:04:21 -0700704void nd_mapping_free_labels(struct nd_mapping *nd_mapping)
705{
706 struct nd_label_ent *label_ent, *e;
707
Dan Williams9cf8bd52016-12-15 20:04:31 -0800708 lockdep_assert_held(&nd_mapping->lock);
Dan Williamsae8219f2016-09-19 16:04:21 -0700709 list_for_each_entry_safe(label_ent, e, &nd_mapping->labels, list) {
710 list_del(&label_ent->list);
711 kfree(label_ent);
712 }
713}
714
Dan Williamseaf96152015-05-01 13:11:27 -0400715/*
716 * Upon successful probe/remove, take/release a reference on the
Dan Williams8c2f7e82015-06-25 04:20:04 -0400717 * associated interleave set (if present), and plant new btt + namespace
Ross Zwisler047fc8a2015-06-25 04:21:02 -0400718 * seeds. Also, on the removal of a BLK region, notify the provider to
719 * disable the region.
Dan Williamseaf96152015-05-01 13:11:27 -0400720 */
721static void nd_region_notify_driver_action(struct nvdimm_bus *nvdimm_bus,
722 struct device *dev, bool probe)
723{
Dan Williams8c2f7e82015-06-25 04:20:04 -0400724 struct nd_region *nd_region;
725
Dan Williamsc9e582a2017-05-29 23:12:19 -0700726 if (!probe && is_nd_region(dev)) {
Dan Williamseaf96152015-05-01 13:11:27 -0400727 int i;
728
Dan Williams8c2f7e82015-06-25 04:20:04 -0400729 nd_region = to_nd_region(dev);
Dan Williamseaf96152015-05-01 13:11:27 -0400730 for (i = 0; i < nd_region->ndr_mappings; i++) {
731 struct nd_mapping *nd_mapping = &nd_region->mapping[i];
Dan Williamsbf9bccc2015-06-17 17:14:46 -0400732 struct nvdimm_drvdata *ndd = nd_mapping->ndd;
Dan Williamseaf96152015-05-01 13:11:27 -0400733 struct nvdimm *nvdimm = nd_mapping->nvdimm;
734
Dan Williamsae8219f2016-09-19 16:04:21 -0700735 mutex_lock(&nd_mapping->lock);
736 nd_mapping_free_labels(nd_mapping);
737 mutex_unlock(&nd_mapping->lock);
738
Dan Williamsbf9bccc2015-06-17 17:14:46 -0400739 put_ndd(ndd);
740 nd_mapping->ndd = NULL;
Ross Zwisler047fc8a2015-06-25 04:21:02 -0400741 if (ndd)
742 atomic_dec(&nvdimm->busy);
Dan Williamseaf96152015-05-01 13:11:27 -0400743 }
Dan Williams8c2f7e82015-06-25 04:20:04 -0400744 }
Dan Williamsc9e582a2017-05-29 23:12:19 -0700745 if (dev->parent && is_nd_region(dev->parent) && probe) {
Dan Williams8c2f7e82015-06-25 04:20:04 -0400746 nd_region = to_nd_region(dev->parent);
Dan Williams1b40e092015-05-01 13:34:01 -0400747 nvdimm_bus_lock(dev);
748 if (nd_region->ns_seed == dev)
Dan Williams98a29c32016-09-30 15:28:27 -0700749 nd_region_create_ns_seed(nd_region);
Dan Williams1b40e092015-05-01 13:34:01 -0400750 nvdimm_bus_unlock(dev);
Dan Williamseaf96152015-05-01 13:11:27 -0400751 }
Dan Williams8c2f7e82015-06-25 04:20:04 -0400752 if (is_nd_btt(dev) && probe) {
Dan Williams8ca24352015-07-24 23:42:34 -0400753 struct nd_btt *nd_btt = to_nd_btt(dev);
754
Dan Williams8c2f7e82015-06-25 04:20:04 -0400755 nd_region = to_nd_region(dev->parent);
756 nvdimm_bus_lock(dev);
757 if (nd_region->btt_seed == dev)
758 nd_region_create_btt_seed(nd_region);
Dan Williams98a29c32016-09-30 15:28:27 -0700759 if (nd_region->ns_seed == &nd_btt->ndns->dev)
760 nd_region_create_ns_seed(nd_region);
Dan Williams8c2f7e82015-06-25 04:20:04 -0400761 nvdimm_bus_unlock(dev);
762 }
Dan Williams2dc43332015-12-13 11:41:36 -0800763 if (is_nd_pfn(dev) && probe) {
Dan Williams98a29c32016-09-30 15:28:27 -0700764 struct nd_pfn *nd_pfn = to_nd_pfn(dev);
765
Dan Williams2dc43332015-12-13 11:41:36 -0800766 nd_region = to_nd_region(dev->parent);
767 nvdimm_bus_lock(dev);
768 if (nd_region->pfn_seed == dev)
769 nd_region_create_pfn_seed(nd_region);
Dan Williams98a29c32016-09-30 15:28:27 -0700770 if (nd_region->ns_seed == &nd_pfn->ndns->dev)
771 nd_region_create_ns_seed(nd_region);
Dan Williams2dc43332015-12-13 11:41:36 -0800772 nvdimm_bus_unlock(dev);
773 }
Dan Williamscd034122016-03-11 10:15:36 -0800774 if (is_nd_dax(dev) && probe) {
Dan Williams98a29c32016-09-30 15:28:27 -0700775 struct nd_dax *nd_dax = to_nd_dax(dev);
776
Dan Williamscd034122016-03-11 10:15:36 -0800777 nd_region = to_nd_region(dev->parent);
778 nvdimm_bus_lock(dev);
779 if (nd_region->dax_seed == dev)
780 nd_region_create_dax_seed(nd_region);
Dan Williams98a29c32016-09-30 15:28:27 -0700781 if (nd_region->ns_seed == &nd_dax->nd_pfn.ndns->dev)
782 nd_region_create_ns_seed(nd_region);
Dan Williamscd034122016-03-11 10:15:36 -0800783 nvdimm_bus_unlock(dev);
784 }
Dan Williamseaf96152015-05-01 13:11:27 -0400785}
786
787void nd_region_probe_success(struct nvdimm_bus *nvdimm_bus, struct device *dev)
788{
789 nd_region_notify_driver_action(nvdimm_bus, dev, true);
790}
791
792void nd_region_disable(struct nvdimm_bus *nvdimm_bus, struct device *dev)
793{
794 nd_region_notify_driver_action(nvdimm_bus, dev, false);
795}
796
Dan Williams1f7df6f2015-06-09 20:13:14 -0400797static ssize_t mappingN(struct device *dev, char *buf, int n)
798{
799 struct nd_region *nd_region = to_nd_region(dev);
800 struct nd_mapping *nd_mapping;
801 struct nvdimm *nvdimm;
802
803 if (n >= nd_region->ndr_mappings)
804 return -ENXIO;
805 nd_mapping = &nd_region->mapping[n];
806 nvdimm = nd_mapping->nvdimm;
807
Dan Williams401c0a12017-08-04 17:20:16 -0700808 return sprintf(buf, "%s,%llu,%llu,%d\n", dev_name(&nvdimm->dev),
809 nd_mapping->start, nd_mapping->size,
810 nd_mapping->position);
Dan Williams1f7df6f2015-06-09 20:13:14 -0400811}
812
813#define REGION_MAPPING(idx) \
814static ssize_t mapping##idx##_show(struct device *dev, \
815 struct device_attribute *attr, char *buf) \
816{ \
817 return mappingN(dev, buf, idx); \
818} \
819static DEVICE_ATTR_RO(mapping##idx)
820
821/*
822 * 32 should be enough for a while, even in the presence of socket
823 * interleave a 32-way interleave set is a degenerate case.
824 */
825REGION_MAPPING(0);
826REGION_MAPPING(1);
827REGION_MAPPING(2);
828REGION_MAPPING(3);
829REGION_MAPPING(4);
830REGION_MAPPING(5);
831REGION_MAPPING(6);
832REGION_MAPPING(7);
833REGION_MAPPING(8);
834REGION_MAPPING(9);
835REGION_MAPPING(10);
836REGION_MAPPING(11);
837REGION_MAPPING(12);
838REGION_MAPPING(13);
839REGION_MAPPING(14);
840REGION_MAPPING(15);
841REGION_MAPPING(16);
842REGION_MAPPING(17);
843REGION_MAPPING(18);
844REGION_MAPPING(19);
845REGION_MAPPING(20);
846REGION_MAPPING(21);
847REGION_MAPPING(22);
848REGION_MAPPING(23);
849REGION_MAPPING(24);
850REGION_MAPPING(25);
851REGION_MAPPING(26);
852REGION_MAPPING(27);
853REGION_MAPPING(28);
854REGION_MAPPING(29);
855REGION_MAPPING(30);
856REGION_MAPPING(31);
857
858static umode_t mapping_visible(struct kobject *kobj, struct attribute *a, int n)
859{
860 struct device *dev = container_of(kobj, struct device, kobj);
861 struct nd_region *nd_region = to_nd_region(dev);
862
863 if (n < nd_region->ndr_mappings)
864 return a->mode;
865 return 0;
866}
867
868static struct attribute *mapping_attributes[] = {
869 &dev_attr_mapping0.attr,
870 &dev_attr_mapping1.attr,
871 &dev_attr_mapping2.attr,
872 &dev_attr_mapping3.attr,
873 &dev_attr_mapping4.attr,
874 &dev_attr_mapping5.attr,
875 &dev_attr_mapping6.attr,
876 &dev_attr_mapping7.attr,
877 &dev_attr_mapping8.attr,
878 &dev_attr_mapping9.attr,
879 &dev_attr_mapping10.attr,
880 &dev_attr_mapping11.attr,
881 &dev_attr_mapping12.attr,
882 &dev_attr_mapping13.attr,
883 &dev_attr_mapping14.attr,
884 &dev_attr_mapping15.attr,
885 &dev_attr_mapping16.attr,
886 &dev_attr_mapping17.attr,
887 &dev_attr_mapping18.attr,
888 &dev_attr_mapping19.attr,
889 &dev_attr_mapping20.attr,
890 &dev_attr_mapping21.attr,
891 &dev_attr_mapping22.attr,
892 &dev_attr_mapping23.attr,
893 &dev_attr_mapping24.attr,
894 &dev_attr_mapping25.attr,
895 &dev_attr_mapping26.attr,
896 &dev_attr_mapping27.attr,
897 &dev_attr_mapping28.attr,
898 &dev_attr_mapping29.attr,
899 &dev_attr_mapping30.attr,
900 &dev_attr_mapping31.attr,
901 NULL,
902};
903
904struct attribute_group nd_mapping_attribute_group = {
905 .is_visible = mapping_visible,
906 .attrs = mapping_attributes,
907};
908EXPORT_SYMBOL_GPL(nd_mapping_attribute_group);
909
Ross Zwisler047fc8a2015-06-25 04:21:02 -0400910int nd_blk_region_init(struct nd_region *nd_region)
Dan Williams1f7df6f2015-06-09 20:13:14 -0400911{
Ross Zwisler047fc8a2015-06-25 04:21:02 -0400912 struct device *dev = &nd_region->dev;
913 struct nvdimm_bus *nvdimm_bus = walk_to_nvdimm_bus(dev);
914
915 if (!is_nd_blk(dev))
916 return 0;
917
918 if (nd_region->ndr_mappings < 1) {
Dan Williamsd5d51fe2017-06-29 09:02:10 -0700919 dev_dbg(dev, "invalid BLK region\n");
Ross Zwisler047fc8a2015-06-25 04:21:02 -0400920 return -ENXIO;
921 }
922
923 return to_nd_blk_region(dev)->enable(nvdimm_bus, dev);
Dan Williams1f7df6f2015-06-09 20:13:14 -0400924}
Dan Williams1f7df6f2015-06-09 20:13:14 -0400925
Vishal Verma5212e112015-06-25 04:20:32 -0400926/**
927 * nd_region_acquire_lane - allocate and lock a lane
928 * @nd_region: region id and number of lanes possible
929 *
930 * A lane correlates to a BLK-data-window and/or a log slot in the BTT.
931 * We optimize for the common case where there are 256 lanes, one
932 * per-cpu. For larger systems we need to lock to share lanes. For now
933 * this implementation assumes the cost of maintaining an allocator for
934 * free lanes is on the order of the lock hold time, so it implements a
935 * static lane = cpu % num_lanes mapping.
936 *
937 * In the case of a BTT instance on top of a BLK namespace a lane may be
938 * acquired recursively. We lock on the first instance.
939 *
940 * In the case of a BTT instance on top of PMEM, we only acquire a lane
941 * for the BTT metadata updates.
942 */
943unsigned int nd_region_acquire_lane(struct nd_region *nd_region)
944{
945 unsigned int cpu, lane;
946
947 cpu = get_cpu();
948 if (nd_region->num_lanes < nr_cpu_ids) {
949 struct nd_percpu_lane *ndl_lock, *ndl_count;
950
951 lane = cpu % nd_region->num_lanes;
952 ndl_count = per_cpu_ptr(nd_region->lane, cpu);
953 ndl_lock = per_cpu_ptr(nd_region->lane, lane);
954 if (ndl_count->count++ == 0)
955 spin_lock(&ndl_lock->lock);
956 } else
957 lane = cpu;
958
959 return lane;
960}
961EXPORT_SYMBOL(nd_region_acquire_lane);
962
963void nd_region_release_lane(struct nd_region *nd_region, unsigned int lane)
964{
965 if (nd_region->num_lanes < nr_cpu_ids) {
966 unsigned int cpu = get_cpu();
967 struct nd_percpu_lane *ndl_lock, *ndl_count;
968
969 ndl_count = per_cpu_ptr(nd_region->lane, cpu);
970 ndl_lock = per_cpu_ptr(nd_region->lane, lane);
971 if (--ndl_count->count == 0)
972 spin_unlock(&ndl_lock->lock);
973 put_cpu();
974 }
975 put_cpu();
976}
977EXPORT_SYMBOL(nd_region_release_lane);
978
Dan Williams1f7df6f2015-06-09 20:13:14 -0400979static struct nd_region *nd_region_create(struct nvdimm_bus *nvdimm_bus,
980 struct nd_region_desc *ndr_desc, struct device_type *dev_type,
981 const char *caller)
982{
983 struct nd_region *nd_region;
984 struct device *dev;
Ross Zwisler047fc8a2015-06-25 04:21:02 -0400985 void *region_buf;
Vishal Verma5212e112015-06-25 04:20:32 -0400986 unsigned int i;
Dan Williams58138822015-06-23 20:08:34 -0400987 int ro = 0;
Dan Williams1f7df6f2015-06-09 20:13:14 -0400988
989 for (i = 0; i < ndr_desc->num_mappings; i++) {
Dan Williams44c462e2016-09-19 16:38:50 -0700990 struct nd_mapping_desc *mapping = &ndr_desc->mapping[i];
991 struct nvdimm *nvdimm = mapping->nvdimm;
Dan Williams1f7df6f2015-06-09 20:13:14 -0400992
Dan Williams44c462e2016-09-19 16:38:50 -0700993 if ((mapping->start | mapping->size) % SZ_4K) {
Dan Williams1f7df6f2015-06-09 20:13:14 -0400994 dev_err(&nvdimm_bus->dev, "%s: %s mapping%d is not 4K aligned\n",
995 caller, dev_name(&nvdimm->dev), i);
996
997 return NULL;
998 }
Dan Williams58138822015-06-23 20:08:34 -0400999
Dan Williams8f078b32017-05-04 14:01:24 -07001000 if (test_bit(NDD_UNARMED, &nvdimm->flags))
Dan Williams58138822015-06-23 20:08:34 -04001001 ro = 1;
Dan Williamsd5d30d52019-02-02 16:35:26 -08001002
1003 if (test_bit(NDD_NOBLK, &nvdimm->flags)
1004 && dev_type == &nd_blk_device_type) {
1005 dev_err(&nvdimm_bus->dev, "%s: %s mapping%d is not BLK capable\n",
1006 caller, dev_name(&nvdimm->dev), i);
1007 return NULL;
1008 }
Dan Williams1f7df6f2015-06-09 20:13:14 -04001009 }
1010
Ross Zwisler047fc8a2015-06-25 04:21:02 -04001011 if (dev_type == &nd_blk_device_type) {
1012 struct nd_blk_region_desc *ndbr_desc;
1013 struct nd_blk_region *ndbr;
1014
1015 ndbr_desc = to_blk_region_desc(ndr_desc);
1016 ndbr = kzalloc(sizeof(*ndbr) + sizeof(struct nd_mapping)
1017 * ndr_desc->num_mappings,
1018 GFP_KERNEL);
1019 if (ndbr) {
1020 nd_region = &ndbr->nd_region;
1021 ndbr->enable = ndbr_desc->enable;
Ross Zwisler047fc8a2015-06-25 04:21:02 -04001022 ndbr->do_io = ndbr_desc->do_io;
1023 }
1024 region_buf = ndbr;
1025 } else {
1026 nd_region = kzalloc(sizeof(struct nd_region)
1027 + sizeof(struct nd_mapping)
1028 * ndr_desc->num_mappings,
1029 GFP_KERNEL);
1030 region_buf = nd_region;
1031 }
1032
1033 if (!region_buf)
Dan Williams1f7df6f2015-06-09 20:13:14 -04001034 return NULL;
1035 nd_region->id = ida_simple_get(&region_ida, 0, 0, GFP_KERNEL);
Vishal Verma5212e112015-06-25 04:20:32 -04001036 if (nd_region->id < 0)
1037 goto err_id;
1038
1039 nd_region->lane = alloc_percpu(struct nd_percpu_lane);
1040 if (!nd_region->lane)
1041 goto err_percpu;
1042
1043 for (i = 0; i < nr_cpu_ids; i++) {
1044 struct nd_percpu_lane *ndl;
1045
1046 ndl = per_cpu_ptr(nd_region->lane, i);
1047 spin_lock_init(&ndl->lock);
1048 ndl->count = 0;
Dan Williams1f7df6f2015-06-09 20:13:14 -04001049 }
1050
Dan Williams1f7df6f2015-06-09 20:13:14 -04001051 for (i = 0; i < ndr_desc->num_mappings; i++) {
Dan Williams44c462e2016-09-19 16:38:50 -07001052 struct nd_mapping_desc *mapping = &ndr_desc->mapping[i];
1053 struct nvdimm *nvdimm = mapping->nvdimm;
1054
1055 nd_region->mapping[i].nvdimm = nvdimm;
1056 nd_region->mapping[i].start = mapping->start;
1057 nd_region->mapping[i].size = mapping->size;
Dan Williams401c0a12017-08-04 17:20:16 -07001058 nd_region->mapping[i].position = mapping->position;
Dan Williamsae8219f2016-09-19 16:04:21 -07001059 INIT_LIST_HEAD(&nd_region->mapping[i].labels);
1060 mutex_init(&nd_region->mapping[i].lock);
Dan Williams1f7df6f2015-06-09 20:13:14 -04001061
1062 get_device(&nvdimm->dev);
1063 }
1064 nd_region->ndr_mappings = ndr_desc->num_mappings;
1065 nd_region->provider_data = ndr_desc->provider_data;
Dan Williamseaf96152015-05-01 13:11:27 -04001066 nd_region->nd_set = ndr_desc->nd_set;
Vishal Verma5212e112015-06-25 04:20:32 -04001067 nd_region->num_lanes = ndr_desc->num_lanes;
Dan Williams004f1af2015-08-24 19:20:23 -04001068 nd_region->flags = ndr_desc->flags;
Dan Williams58138822015-06-23 20:08:34 -04001069 nd_region->ro = ro;
Toshi Kani41d7a6d2015-06-19 12:18:33 -06001070 nd_region->numa_node = ndr_desc->numa_node;
Dan Williams8fc5c732018-11-09 12:43:07 -08001071 nd_region->target_node = ndr_desc->target_node;
Dan Williams1b40e092015-05-01 13:34:01 -04001072 ida_init(&nd_region->ns_ida);
Dan Williams8c2f7e82015-06-25 04:20:04 -04001073 ida_init(&nd_region->btt_ida);
Dan Williamse1455742015-07-30 17:57:47 -04001074 ida_init(&nd_region->pfn_ida);
Dan Williamscd034122016-03-11 10:15:36 -08001075 ida_init(&nd_region->dax_ida);
Dan Williams1f7df6f2015-06-09 20:13:14 -04001076 dev = &nd_region->dev;
1077 dev_set_name(dev, "region%d", nd_region->id);
1078 dev->parent = &nvdimm_bus->dev;
1079 dev->type = dev_type;
1080 dev->groups = ndr_desc->attr_groups;
Oliver O'Halloran1ff19f42018-04-06 15:21:13 +10001081 dev->of_node = ndr_desc->of_node;
Dan Williams1f7df6f2015-06-09 20:13:14 -04001082 nd_region->ndr_size = resource_size(ndr_desc->res);
1083 nd_region->ndr_start = ndr_desc->res->start;
1084 nd_device_register(dev);
1085
1086 return nd_region;
Vishal Verma5212e112015-06-25 04:20:32 -04001087
1088 err_percpu:
1089 ida_simple_remove(&region_ida, nd_region->id);
1090 err_id:
Ross Zwisler047fc8a2015-06-25 04:21:02 -04001091 kfree(region_buf);
Vishal Verma5212e112015-06-25 04:20:32 -04001092 return NULL;
Dan Williams1f7df6f2015-06-09 20:13:14 -04001093}
1094
1095struct nd_region *nvdimm_pmem_region_create(struct nvdimm_bus *nvdimm_bus,
1096 struct nd_region_desc *ndr_desc)
1097{
Vishal Verma5212e112015-06-25 04:20:32 -04001098 ndr_desc->num_lanes = ND_MAX_LANES;
Dan Williams1f7df6f2015-06-09 20:13:14 -04001099 return nd_region_create(nvdimm_bus, ndr_desc, &nd_pmem_device_type,
1100 __func__);
1101}
1102EXPORT_SYMBOL_GPL(nvdimm_pmem_region_create);
1103
1104struct nd_region *nvdimm_blk_region_create(struct nvdimm_bus *nvdimm_bus,
1105 struct nd_region_desc *ndr_desc)
1106{
1107 if (ndr_desc->num_mappings > 1)
1108 return NULL;
Vishal Verma5212e112015-06-25 04:20:32 -04001109 ndr_desc->num_lanes = min(ndr_desc->num_lanes, ND_MAX_LANES);
Dan Williams1f7df6f2015-06-09 20:13:14 -04001110 return nd_region_create(nvdimm_bus, ndr_desc, &nd_blk_device_type,
1111 __func__);
1112}
1113EXPORT_SYMBOL_GPL(nvdimm_blk_region_create);
1114
1115struct nd_region *nvdimm_volatile_region_create(struct nvdimm_bus *nvdimm_bus,
1116 struct nd_region_desc *ndr_desc)
1117{
Vishal Verma5212e112015-06-25 04:20:32 -04001118 ndr_desc->num_lanes = ND_MAX_LANES;
Dan Williams1f7df6f2015-06-09 20:13:14 -04001119 return nd_region_create(nvdimm_bus, ndr_desc, &nd_volatile_device_type,
1120 __func__);
1121}
1122EXPORT_SYMBOL_GPL(nvdimm_volatile_region_create);
Dan Williamsb354aba2016-05-17 20:24:16 -07001123
Dan Williamsf284a4f2016-07-07 19:44:50 -07001124/**
1125 * nvdimm_flush - flush any posted write queues between the cpu and pmem media
1126 * @nd_region: blk or interleaved pmem region
1127 */
1128void nvdimm_flush(struct nd_region *nd_region)
1129{
1130 struct nd_region_data *ndrd = dev_get_drvdata(&nd_region->dev);
Dan Williams0c27af62016-05-27 09:23:01 -07001131 int i, idx;
1132
1133 /*
1134 * Try to encourage some diversity in flush hint addresses
1135 * across cpus assuming a limited number of flush hints.
1136 */
1137 idx = this_cpu_read(flush_idx);
1138 idx = this_cpu_add_return(flush_idx, hash_32(current->pid + idx, 8));
Dan Williamsf284a4f2016-07-07 19:44:50 -07001139
1140 /*
1141 * The first wmb() is needed to 'sfence' all previous writes
1142 * such that they are architecturally visible for the platform
1143 * buffer flush. Note that we've already arranged for pmem
Dan Williams0aed55a2017-05-29 12:22:50 -07001144 * writes to avoid the cache via memcpy_flushcache(). The final
1145 * wmb() ensures ordering for the NVDIMM flush write.
Dan Williamsf284a4f2016-07-07 19:44:50 -07001146 */
1147 wmb();
1148 for (i = 0; i < nd_region->ndr_mappings; i++)
Dan Williams595c7302016-09-23 17:53:52 -07001149 if (ndrd_get_flush_wpq(ndrd, i, 0))
1150 writeq(1, ndrd_get_flush_wpq(ndrd, i, idx));
Dan Williamsf284a4f2016-07-07 19:44:50 -07001151 wmb();
1152}
1153EXPORT_SYMBOL_GPL(nvdimm_flush);
1154
1155/**
1156 * nvdimm_has_flush - determine write flushing requirements
1157 * @nd_region: blk or interleaved pmem region
1158 *
1159 * Returns 1 if writes require flushing
1160 * Returns 0 if writes do not require flushing
1161 * Returns -ENXIO if flushing capability can not be determined
1162 */
1163int nvdimm_has_flush(struct nd_region *nd_region)
1164{
Dan Williamsf284a4f2016-07-07 19:44:50 -07001165 int i;
1166
Dan Williamsc00b3962017-05-29 23:11:57 -07001167 /* no nvdimm or pmem api == flushing capability unknown */
1168 if (nd_region->ndr_mappings == 0
1169 || !IS_ENABLED(CONFIG_ARCH_HAS_PMEM_API))
Dan Williamsf284a4f2016-07-07 19:44:50 -07001170 return -ENXIO;
1171
Dan Williamsbc042fd2017-04-24 15:43:05 -07001172 for (i = 0; i < nd_region->ndr_mappings; i++) {
1173 struct nd_mapping *nd_mapping = &nd_region->mapping[i];
1174 struct nvdimm *nvdimm = nd_mapping->nvdimm;
1175
1176 /* flush hints present / available */
1177 if (nvdimm->num_flush)
Dan Williamsf284a4f2016-07-07 19:44:50 -07001178 return 1;
Dan Williamsbc042fd2017-04-24 15:43:05 -07001179 }
Dan Williamsf284a4f2016-07-07 19:44:50 -07001180
1181 /*
1182 * The platform defines dimm devices without hints, assume
1183 * platform persistence mechanism like ADR
1184 */
1185 return 0;
1186}
1187EXPORT_SYMBOL_GPL(nvdimm_has_flush);
1188
Dan Williams0b277962017-06-09 09:46:50 -07001189int nvdimm_has_cache(struct nd_region *nd_region)
1190{
Ross Zwisler546eb032018-06-06 10:45:15 -06001191 return is_nd_pmem(&nd_region->dev) &&
1192 !test_bit(ND_REGION_PERSIST_CACHE, &nd_region->flags);
Dan Williams0b277962017-06-09 09:46:50 -07001193}
1194EXPORT_SYMBOL_GPL(nvdimm_has_cache);
1195
Dan Williamsae86cbf2018-11-24 10:47:04 -08001196struct conflict_context {
1197 struct nd_region *nd_region;
1198 resource_size_t start, size;
1199};
1200
1201static int region_conflict(struct device *dev, void *data)
1202{
1203 struct nd_region *nd_region;
1204 struct conflict_context *ctx = data;
1205 resource_size_t res_end, region_end, region_start;
1206
1207 if (!is_memory(dev))
1208 return 0;
1209
1210 nd_region = to_nd_region(dev);
1211 if (nd_region == ctx->nd_region)
1212 return 0;
1213
1214 res_end = ctx->start + ctx->size;
1215 region_start = nd_region->ndr_start;
1216 region_end = region_start + nd_region->ndr_size;
1217 if (ctx->start >= region_start && ctx->start < region_end)
1218 return -EBUSY;
1219 if (res_end > region_start && res_end <= region_end)
1220 return -EBUSY;
1221 return 0;
1222}
1223
1224int nd_region_conflict(struct nd_region *nd_region, resource_size_t start,
1225 resource_size_t size)
1226{
1227 struct nvdimm_bus *nvdimm_bus = walk_to_nvdimm_bus(&nd_region->dev);
1228 struct conflict_context ctx = {
1229 .nd_region = nd_region,
1230 .start = start,
1231 .size = size,
1232 };
1233
1234 return device_for_each_child(&nvdimm_bus->dev, &ctx, region_conflict);
1235}
1236
Dan Williamsb354aba2016-05-17 20:24:16 -07001237void __exit nd_region_devs_exit(void)
1238{
1239 ida_destroy(&region_ida);
1240}