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review.shift-gmbh.com / SHIFTPHONES / mainline / linux / 86bc843a268058df558844b6bf64531617fbc698 / . / include / asm-sparc64 / ttable.h
blob: 2d5e3c464df598ee7679eacd3c66b0bb987d9c2e [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]1/* $Id: ttable.h,v 1.18 2002/02/09 19:49:32 davem Exp $ */
2#ifndef _SPARC64_TTABLE_H
3#define _SPARC64_TTABLE_H
4
5#include <linux/config.h>
6#include <asm/utrap.h>
7
8#ifdef __ASSEMBLY__
9#include <asm/thread_info.h>
10#endif
11
12#define BOOT_KERNEL b sparc64_boot; nop; nop; nop; nop; nop; nop; nop;
13
14/* We need a "cleaned" instruction... */
15#define CLEAN_WINDOW \
16 rdpr %cleanwin, %l0; add %l0, 1, %l0; \
17 wrpr %l0, 0x0, %cleanwin; \
18 clr %o0; clr %o1; clr %o2; clr %o3; \
19 clr %o4; clr %o5; clr %o6; clr %o7; \
20 clr %l0; clr %l1; clr %l2; clr %l3; \
21 clr %l4; clr %l5; clr %l6; clr %l7; \
22 retry; \
23 nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;
24
25#define TRAP(routine) \
26 sethi %hi(109f), %g7; \
27 ba,pt %xcc, etrap; \
28109: or %g7, %lo(109b), %g7; \
29 call routine; \
30 add %sp, PTREGS_OFF, %o0; \
31 ba,pt %xcc, rtrap; \
32 clr %l6; \
33 nop;
34
35#define TRAP_7INSNS(routine) \
36 sethi %hi(109f), %g7; \
37 ba,pt %xcc, etrap; \
38109: or %g7, %lo(109b), %g7; \
39 call routine; \
40 add %sp, PTREGS_OFF, %o0; \
41 ba,pt %xcc, rtrap; \
42 clr %l6;
43
44#define TRAP_SAVEFPU(routine) \
45 sethi %hi(109f), %g7; \
46 ba,pt %xcc, do_fptrap; \
47109: or %g7, %lo(109b), %g7; \
48 call routine; \
49 add %sp, PTREGS_OFF, %o0; \
50 ba,pt %xcc, rtrap; \
51 clr %l6; \
52 nop;
53
54#define TRAP_NOSAVE(routine) \
55 ba,pt %xcc, routine; \
56 nop; \
57 nop; nop; nop; nop; nop; nop;
58
59#define TRAP_NOSAVE_7INSNS(routine) \
60 ba,pt %xcc, routine; \
61 nop; \
62 nop; nop; nop; nop; nop;
63
64#define TRAPTL1(routine) \
65 sethi %hi(109f), %g7; \
66 ba,pt %xcc, etraptl1; \
67109: or %g7, %lo(109b), %g7; \
68 call routine; \
69 add %sp, PTREGS_OFF, %o0; \
70 ba,pt %xcc, rtrap; \
71 clr %l6; \
72 nop;
73
74#define TRAP_ARG(routine, arg) \
75 sethi %hi(109f), %g7; \
76 ba,pt %xcc, etrap; \
77109: or %g7, %lo(109b), %g7; \
78 add %sp, PTREGS_OFF, %o0; \
79 call routine; \
80 mov arg, %o1; \
81 ba,pt %xcc, rtrap; \
82 clr %l6;
83
84#define TRAPTL1_ARG(routine, arg) \
85 sethi %hi(109f), %g7; \
86 ba,pt %xcc, etraptl1; \
87109: or %g7, %lo(109b), %g7; \
88 add %sp, PTREGS_OFF, %o0; \
89 call routine; \
90 mov arg, %o1; \
91 ba,pt %xcc, rtrap; \
92 clr %l6;
93
94#define SYSCALL_TRAP(routine, systbl) \
95 sethi %hi(109f), %g7; \
David S. Miller314ef682006-02-04 00:10:01 -0800[diff] [blame]96 ba,pt %xcc, etrap; \
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]97109: or %g7, %lo(109b), %g7; \
98 sethi %hi(systbl), %l7; \
99 ba,pt %xcc, routine; \
100 or %l7, %lo(systbl), %l7; \
101 nop; nop;
102
103#define INDIRECT_SOLARIS_SYSCALL(num) \
104 sethi %hi(109f), %g7; \
105 ba,pt %xcc, etrap; \
106109: or %g7, %lo(109b), %g7; \
107 ba,pt %xcc, tl0_solaris + 0xc; \
108 mov num, %g1; \
109 nop;nop;nop;
110
111#define TRAP_UTRAP(handler,lvl) \
David S. Miller56fb4df2006-02-26 23:24:22 -0800[diff] [blame]112 mov handler, %g3; \
113 ba,pt %xcc, utrap_trap; \
114 mov lvl, %g4; \
115 nop; \
116 nop; \
117 nop; \
118 nop; \
119 nop;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]120
121#ifdef CONFIG_SUNOS_EMUL
122#define SUNOS_SYSCALL_TRAP SYSCALL_TRAP(linux_sparc_syscall32, sunos_sys_table)
123#else
124#define SUNOS_SYSCALL_TRAP TRAP(sunos_syscall)
125#endif
126#ifdef CONFIG_COMPAT
127#define LINUX_32BIT_SYSCALL_TRAP SYSCALL_TRAP(linux_sparc_syscall32, sys_call_table32)
128#else
129#define LINUX_32BIT_SYSCALL_TRAP BTRAP(0x110)
130#endif
131#define LINUX_64BIT_SYSCALL_TRAP SYSCALL_TRAP(linux_sparc_syscall, sys_call_table64)
132#define GETCC_TRAP TRAP(getcc)
133#define SETCC_TRAP TRAP(setcc)
134#ifdef CONFIG_SOLARIS_EMUL
135#define SOLARIS_SYSCALL_TRAP TRAP(solaris_sparc_syscall)
136#else
137#define SOLARIS_SYSCALL_TRAP TRAP(solaris_syscall)
138#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]139#define BREAKPOINT_TRAP TRAP(breakpoint_trap)
140
141#define TRAP_IRQ(routine, level) \
142 rdpr %pil, %g2; \
143 wrpr %g0, 15, %pil; \
144 b,pt %xcc, etrap_irq; \
145 rd %pc, %g7; \
146 mov level, %o0; \
147 call routine; \
148 add %sp, PTREGS_OFF, %o1; \
149 ba,a,pt %xcc, rtrap_irq;
150
151#define TICK_SMP_IRQ \
152 rdpr %pil, %g2; \
153 wrpr %g0, 15, %pil; \
154 sethi %hi(109f), %g7; \
155 b,pt %xcc, etrap_irq; \
156109: or %g7, %lo(109b), %g7; \
157 call smp_percpu_timer_interrupt; \
158 add %sp, PTREGS_OFF, %o0; \
159 ba,a,pt %xcc, rtrap_irq;
160
161#define TRAP_IVEC TRAP_NOSAVE(do_ivec)
162
163#define BTRAP(lvl) TRAP_ARG(bad_trap, lvl)
164
165#define BTRAPTL1(lvl) TRAPTL1_ARG(bad_trap_tl1, lvl)
166
167#define FLUSH_WINDOW_TRAP \
168 ba,pt %xcc, etrap; \
169 rd %pc, %g7; \
170 flushw; \
171 ldx [%sp + PTREGS_OFF + PT_V9_TNPC], %l1; \
172 add %l1, 4, %l2; \
173 stx %l1, [%sp + PTREGS_OFF + PT_V9_TPC]; \
174 ba,pt %xcc, rtrap_clr_l6; \
175 stx %l2, [%sp + PTREGS_OFF + PT_V9_TNPC];
176
177#ifdef CONFIG_KPROBES
178#define KPROBES_TRAP(lvl) TRAP_IRQ(kprobe_trap, lvl)
179#else
180#define KPROBES_TRAP(lvl) TRAP_ARG(bad_trap, lvl)
181#endif
182
David S. Miller12eaa322006-02-10 15:39:51 -0800[diff] [blame]183#define SUN4V_ITSB_MISS \
184 ldxa [%g0] ASI_SCRATCHPAD, %g2; \
185 ldx [%g2 + HV_FAULT_I_ADDR_OFFSET], %g4; \
186 ldx [%g2 + HV_FAULT_I_CTX_OFFSET], %g5; \
David S. Miller8b234272006-02-17 18:01:02 -0800[diff] [blame]187 srlx %g4, 22, %g6; \
David S. Miller459b6e62006-02-11 12:21:20 -0800[diff] [blame]188 ba,pt %xcc, sun4v_itsb_miss; \
David S. Miller8b234272006-02-17 18:01:02 -0800[diff] [blame]189 nop; \
190 nop; \
David S. Miller459b6e62006-02-11 12:21:20 -0800[diff] [blame]191 nop;
David S. Milleraa9143b2006-02-09 16:12:22 -0800[diff] [blame]192
David S. Miller459b6e62006-02-11 12:21:20 -0800[diff] [blame]193#define SUN4V_DTSB_MISS \
David S. Miller12eaa322006-02-10 15:39:51 -0800[diff] [blame]194 ldxa [%g0] ASI_SCRATCHPAD, %g2; \
195 ldx [%g2 + HV_FAULT_D_ADDR_OFFSET], %g4; \
196 ldx [%g2 + HV_FAULT_D_CTX_OFFSET], %g5; \
David S. Miller8b234272006-02-17 18:01:02 -0800[diff] [blame]197 srlx %g4, 22, %g6; \
David S. Miller459b6e62006-02-11 12:21:20 -0800[diff] [blame]198 ba,pt %xcc, sun4v_dtsb_miss; \
David S. Miller8b234272006-02-17 18:01:02 -0800[diff] [blame]199 nop; \
200 nop; \
David S. Miller459b6e62006-02-11 12:21:20 -0800[diff] [blame]201 nop;
David S. Milleraa9143b2006-02-09 16:12:22 -0800[diff] [blame]202
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]203/* Before touching these macros, you owe it to yourself to go and
204 * see how arch/sparc64/kernel/winfixup.S works... -DaveM
205 *
206 * For the user cases we used to use the %asi register, but
207 * it turns out that the "wr xxx, %asi" costs ~5 cycles, so
208 * now we use immediate ASI loads and stores instead. Kudos
209 * to Greg Onufer for pointing out this performance anomaly.
210 *
211 * Further note that we cannot use the g2, g4, g5, and g7 alternate
212 * globals in the spill routines, check out the save instruction in
213 * arch/sparc64/kernel/etrap.S to see what I mean about g2, and
214 * g4/g5 are the globals which are preserved by etrap processing
215 * for the caller of it. The g7 register is the return pc for
216 * etrap. Finally, g6 is the current thread register so we cannot
217 * us it in the spill handlers either. Most of these rules do not
218 * apply to fill processing, only g6 is not usable.
219 */
220
221/* Normal kernel spill */
222#define SPILL_0_NORMAL \
223 stx %l0, [%sp + STACK_BIAS + 0x00]; \
224 stx %l1, [%sp + STACK_BIAS + 0x08]; \
225 stx %l2, [%sp + STACK_BIAS + 0x10]; \
226 stx %l3, [%sp + STACK_BIAS + 0x18]; \
227 stx %l4, [%sp + STACK_BIAS + 0x20]; \
228 stx %l5, [%sp + STACK_BIAS + 0x28]; \
229 stx %l6, [%sp + STACK_BIAS + 0x30]; \
230 stx %l7, [%sp + STACK_BIAS + 0x38]; \
231 stx %i0, [%sp + STACK_BIAS + 0x40]; \
232 stx %i1, [%sp + STACK_BIAS + 0x48]; \
233 stx %i2, [%sp + STACK_BIAS + 0x50]; \
234 stx %i3, [%sp + STACK_BIAS + 0x58]; \
235 stx %i4, [%sp + STACK_BIAS + 0x60]; \
236 stx %i5, [%sp + STACK_BIAS + 0x68]; \
237 stx %i6, [%sp + STACK_BIAS + 0x70]; \
238 stx %i7, [%sp + STACK_BIAS + 0x78]; \
239 saved; retry; nop; nop; nop; nop; nop; nop; \
240 nop; nop; nop; nop; nop; nop; nop; nop;
241
David S. Miller314ef682006-02-04 00:10:01 -0800[diff] [blame]242#define SPILL_0_NORMAL_ETRAP \
243etrap_kernel_spill: \
244 stx %l0, [%sp + STACK_BIAS + 0x00]; \
245 stx %l1, [%sp + STACK_BIAS + 0x08]; \
246 stx %l2, [%sp + STACK_BIAS + 0x10]; \
247 stx %l3, [%sp + STACK_BIAS + 0x18]; \
248 stx %l4, [%sp + STACK_BIAS + 0x20]; \
249 stx %l5, [%sp + STACK_BIAS + 0x28]; \
250 stx %l6, [%sp + STACK_BIAS + 0x30]; \
251 stx %l7, [%sp + STACK_BIAS + 0x38]; \
252 stx %i0, [%sp + STACK_BIAS + 0x40]; \
253 stx %i1, [%sp + STACK_BIAS + 0x48]; \
254 stx %i2, [%sp + STACK_BIAS + 0x50]; \
255 stx %i3, [%sp + STACK_BIAS + 0x58]; \
256 stx %i4, [%sp + STACK_BIAS + 0x60]; \
257 stx %i5, [%sp + STACK_BIAS + 0x68]; \
258 stx %i6, [%sp + STACK_BIAS + 0x70]; \
259 stx %i7, [%sp + STACK_BIAS + 0x78]; \
260 saved; \
261 sub %g1, 2, %g1; \
262 ba,pt %xcc, etrap_save; \
263 wrpr %g1, %cwp; \
264 nop; nop; nop; nop; nop; nop; nop; nop; \
265 nop; nop; nop; nop;
266
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]267/* Normal 64bit spill */
268#define SPILL_1_GENERIC(ASI) \
269 add %sp, STACK_BIAS + 0x00, %g1; \
270 stxa %l0, [%g1 + %g0] ASI; \
271 mov 0x08, %g3; \
272 stxa %l1, [%g1 + %g3] ASI; \
273 add %g1, 0x10, %g1; \
274 stxa %l2, [%g1 + %g0] ASI; \
275 stxa %l3, [%g1 + %g3] ASI; \
276 add %g1, 0x10, %g1; \
277 stxa %l4, [%g1 + %g0] ASI; \
278 stxa %l5, [%g1 + %g3] ASI; \
279 add %g1, 0x10, %g1; \
280 stxa %l6, [%g1 + %g0] ASI; \
281 stxa %l7, [%g1 + %g3] ASI; \
282 add %g1, 0x10, %g1; \
283 stxa %i0, [%g1 + %g0] ASI; \
284 stxa %i1, [%g1 + %g3] ASI; \
285 add %g1, 0x10, %g1; \
286 stxa %i2, [%g1 + %g0] ASI; \
287 stxa %i3, [%g1 + %g3] ASI; \
288 add %g1, 0x10, %g1; \
289 stxa %i4, [%g1 + %g0] ASI; \
290 stxa %i5, [%g1 + %g3] ASI; \
291 add %g1, 0x10, %g1; \
292 stxa %i6, [%g1 + %g0] ASI; \
293 stxa %i7, [%g1 + %g3] ASI; \
294 saved; \
295 retry; nop; nop; \
296 b,a,pt %xcc, spill_fixup_dax; \
297 b,a,pt %xcc, spill_fixup_mna; \
298 b,a,pt %xcc, spill_fixup;
299
David S. Miller314ef682006-02-04 00:10:01 -0800[diff] [blame]300#define SPILL_1_GENERIC_ETRAP \
301etrap_user_spill_64bit: \
302 stxa %l0, [%sp + STACK_BIAS + 0x00] %asi; \
303 stxa %l1, [%sp + STACK_BIAS + 0x08] %asi; \
304 stxa %l2, [%sp + STACK_BIAS + 0x10] %asi; \
305 stxa %l3, [%sp + STACK_BIAS + 0x18] %asi; \
306 stxa %l4, [%sp + STACK_BIAS + 0x20] %asi; \
307 stxa %l5, [%sp + STACK_BIAS + 0x28] %asi; \
308 stxa %l6, [%sp + STACK_BIAS + 0x30] %asi; \
309 stxa %l7, [%sp + STACK_BIAS + 0x38] %asi; \
310 stxa %i0, [%sp + STACK_BIAS + 0x40] %asi; \
311 stxa %i1, [%sp + STACK_BIAS + 0x48] %asi; \
312 stxa %i2, [%sp + STACK_BIAS + 0x50] %asi; \
313 stxa %i3, [%sp + STACK_BIAS + 0x58] %asi; \
314 stxa %i4, [%sp + STACK_BIAS + 0x60] %asi; \
315 stxa %i5, [%sp + STACK_BIAS + 0x68] %asi; \
316 stxa %i6, [%sp + STACK_BIAS + 0x70] %asi; \
317 stxa %i7, [%sp + STACK_BIAS + 0x78] %asi; \
318 saved; \
319 sub %g1, 2, %g1; \
320 ba,pt %xcc, etrap_save; \
321 wrpr %g1, %cwp; \
322 nop; nop; nop; nop; nop; \
323 nop; nop; nop; nop; \
324 ba,a,pt %xcc, etrap_spill_fixup_64bit; \
325 ba,a,pt %xcc, etrap_spill_fixup_64bit; \
326 ba,a,pt %xcc, etrap_spill_fixup_64bit;
327
328#define SPILL_1_GENERIC_ETRAP_FIXUP \
329etrap_spill_fixup_64bit: \
330 ldub [%g6 + TI_WSAVED], %g1; \
331 sll %g1, 3, %g3; \
332 add %g6, %g3, %g3; \
333 stx %sp, [%g3 + TI_RWIN_SPTRS]; \
334 sll %g1, 7, %g3; \
335 add %g6, %g3, %g3; \
336 stx %l0, [%g3 + TI_REG_WINDOW + 0x00]; \
337 stx %l1, [%g3 + TI_REG_WINDOW + 0x08]; \
338 stx %l2, [%g3 + TI_REG_WINDOW + 0x10]; \
339 stx %l3, [%g3 + TI_REG_WINDOW + 0x18]; \
340 stx %l4, [%g3 + TI_REG_WINDOW + 0x20]; \
341 stx %l5, [%g3 + TI_REG_WINDOW + 0x28]; \
342 stx %l6, [%g3 + TI_REG_WINDOW + 0x30]; \
343 stx %l7, [%g3 + TI_REG_WINDOW + 0x38]; \
344 stx %i0, [%g3 + TI_REG_WINDOW + 0x40]; \
345 stx %i1, [%g3 + TI_REG_WINDOW + 0x48]; \
346 stx %i2, [%g3 + TI_REG_WINDOW + 0x50]; \
347 stx %i3, [%g3 + TI_REG_WINDOW + 0x58]; \
348 stx %i4, [%g3 + TI_REG_WINDOW + 0x60]; \
349 stx %i5, [%g3 + TI_REG_WINDOW + 0x68]; \
350 stx %i6, [%g3 + TI_REG_WINDOW + 0x70]; \
351 stx %i7, [%g3 + TI_REG_WINDOW + 0x78]; \
352 add %g1, 1, %g1; \
353 stb %g1, [%g6 + TI_WSAVED]; \
354 saved; \
355 rdpr %cwp, %g1; \
356 sub %g1, 2, %g1; \
357 ba,pt %xcc, etrap_save; \
358 wrpr %g1, %cwp; \
359 nop; nop; nop
360
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]361/* Normal 32bit spill */
362#define SPILL_2_GENERIC(ASI) \
363 srl %sp, 0, %sp; \
364 stwa %l0, [%sp + %g0] ASI; \
365 mov 0x04, %g3; \
366 stwa %l1, [%sp + %g3] ASI; \
367 add %sp, 0x08, %g1; \
368 stwa %l2, [%g1 + %g0] ASI; \
369 stwa %l3, [%g1 + %g3] ASI; \
370 add %g1, 0x08, %g1; \
371 stwa %l4, [%g1 + %g0] ASI; \
372 stwa %l5, [%g1 + %g3] ASI; \
373 add %g1, 0x08, %g1; \
374 stwa %l6, [%g1 + %g0] ASI; \
375 stwa %l7, [%g1 + %g3] ASI; \
376 add %g1, 0x08, %g1; \
377 stwa %i0, [%g1 + %g0] ASI; \
378 stwa %i1, [%g1 + %g3] ASI; \
379 add %g1, 0x08, %g1; \
380 stwa %i2, [%g1 + %g0] ASI; \
381 stwa %i3, [%g1 + %g3] ASI; \
382 add %g1, 0x08, %g1; \
383 stwa %i4, [%g1 + %g0] ASI; \
384 stwa %i5, [%g1 + %g3] ASI; \
385 add %g1, 0x08, %g1; \
386 stwa %i6, [%g1 + %g0] ASI; \
387 stwa %i7, [%g1 + %g3] ASI; \
388 saved; \
389 retry; nop; nop; \
390 b,a,pt %xcc, spill_fixup_dax; \
391 b,a,pt %xcc, spill_fixup_mna; \
392 b,a,pt %xcc, spill_fixup;
393
David S. Miller314ef682006-02-04 00:10:01 -0800[diff] [blame]394#define SPILL_2_GENERIC_ETRAP \
395etrap_user_spill_32bit: \
396 srl %sp, 0, %sp; \
397 stwa %l0, [%sp + 0x00] %asi; \
398 stwa %l1, [%sp + 0x04] %asi; \
399 stwa %l2, [%sp + 0x08] %asi; \
400 stwa %l3, [%sp + 0x0c] %asi; \
401 stwa %l4, [%sp + 0x10] %asi; \
402 stwa %l5, [%sp + 0x14] %asi; \
403 stwa %l6, [%sp + 0x18] %asi; \
404 stwa %l7, [%sp + 0x1c] %asi; \
405 stwa %i0, [%sp + 0x20] %asi; \
406 stwa %i1, [%sp + 0x24] %asi; \
407 stwa %i2, [%sp + 0x28] %asi; \
408 stwa %i3, [%sp + 0x2c] %asi; \
409 stwa %i4, [%sp + 0x30] %asi; \
410 stwa %i5, [%sp + 0x34] %asi; \
411 stwa %i6, [%sp + 0x38] %asi; \
412 stwa %i7, [%sp + 0x3c] %asi; \
413 saved; \
414 sub %g1, 2, %g1; \
415 ba,pt %xcc, etrap_save; \
416 wrpr %g1, %cwp; \
417 nop; nop; nop; nop; \
418 nop; nop; nop; nop; \
419 ba,a,pt %xcc, etrap_spill_fixup_32bit; \
420 ba,a,pt %xcc, etrap_spill_fixup_32bit; \
421 ba,a,pt %xcc, etrap_spill_fixup_32bit;
422
423#define SPILL_2_GENERIC_ETRAP_FIXUP \
424etrap_spill_fixup_32bit: \
425 ldub [%g6 + TI_WSAVED], %g1; \
426 sll %g1, 3, %g3; \
427 add %g6, %g3, %g3; \
428 stx %sp, [%g3 + TI_RWIN_SPTRS]; \
429 sll %g1, 7, %g3; \
430 add %g6, %g3, %g3; \
431 stw %l0, [%g3 + TI_REG_WINDOW + 0x00]; \
432 stw %l1, [%g3 + TI_REG_WINDOW + 0x04]; \
433 stw %l2, [%g3 + TI_REG_WINDOW + 0x08]; \
434 stw %l3, [%g3 + TI_REG_WINDOW + 0x0c]; \
435 stw %l4, [%g3 + TI_REG_WINDOW + 0x10]; \
436 stw %l5, [%g3 + TI_REG_WINDOW + 0x14]; \
437 stw %l6, [%g3 + TI_REG_WINDOW + 0x18]; \
438 stw %l7, [%g3 + TI_REG_WINDOW + 0x1c]; \
439 stw %i0, [%g3 + TI_REG_WINDOW + 0x20]; \
440 stw %i1, [%g3 + TI_REG_WINDOW + 0x24]; \
441 stw %i2, [%g3 + TI_REG_WINDOW + 0x28]; \
442 stw %i3, [%g3 + TI_REG_WINDOW + 0x2c]; \
443 stw %i4, [%g3 + TI_REG_WINDOW + 0x30]; \
444 stw %i5, [%g3 + TI_REG_WINDOW + 0x34]; \
445 stw %i6, [%g3 + TI_REG_WINDOW + 0x38]; \
446 stw %i7, [%g3 + TI_REG_WINDOW + 0x3c]; \
447 add %g1, 1, %g1; \
448 stb %g1, [%g6 + TI_WSAVED]; \
449 saved; \
450 rdpr %cwp, %g1; \
451 sub %g1, 2, %g1; \
452 ba,pt %xcc, etrap_save; \
453 wrpr %g1, %cwp; \
454 nop; nop; nop
455
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]456#define SPILL_1_NORMAL SPILL_1_GENERIC(ASI_AIUP)
457#define SPILL_2_NORMAL SPILL_2_GENERIC(ASI_AIUP)
458#define SPILL_3_NORMAL SPILL_0_NORMAL
459#define SPILL_4_NORMAL SPILL_0_NORMAL
460#define SPILL_5_NORMAL SPILL_0_NORMAL
461#define SPILL_6_NORMAL SPILL_0_NORMAL
462#define SPILL_7_NORMAL SPILL_0_NORMAL
463
464#define SPILL_0_OTHER SPILL_0_NORMAL
465#define SPILL_1_OTHER SPILL_1_GENERIC(ASI_AIUS)
466#define SPILL_2_OTHER SPILL_2_GENERIC(ASI_AIUS)
467#define SPILL_3_OTHER SPILL_3_NORMAL
468#define SPILL_4_OTHER SPILL_4_NORMAL
469#define SPILL_5_OTHER SPILL_5_NORMAL
470#define SPILL_6_OTHER SPILL_6_NORMAL
471#define SPILL_7_OTHER SPILL_7_NORMAL
472
473/* Normal kernel fill */
474#define FILL_0_NORMAL \
475 ldx [%sp + STACK_BIAS + 0x00], %l0; \
476 ldx [%sp + STACK_BIAS + 0x08], %l1; \
477 ldx [%sp + STACK_BIAS + 0x10], %l2; \
478 ldx [%sp + STACK_BIAS + 0x18], %l3; \
479 ldx [%sp + STACK_BIAS + 0x20], %l4; \
480 ldx [%sp + STACK_BIAS + 0x28], %l5; \
481 ldx [%sp + STACK_BIAS + 0x30], %l6; \
482 ldx [%sp + STACK_BIAS + 0x38], %l7; \
483 ldx [%sp + STACK_BIAS + 0x40], %i0; \
484 ldx [%sp + STACK_BIAS + 0x48], %i1; \
485 ldx [%sp + STACK_BIAS + 0x50], %i2; \
486 ldx [%sp + STACK_BIAS + 0x58], %i3; \
487 ldx [%sp + STACK_BIAS + 0x60], %i4; \
488 ldx [%sp + STACK_BIAS + 0x68], %i5; \
489 ldx [%sp + STACK_BIAS + 0x70], %i6; \
490 ldx [%sp + STACK_BIAS + 0x78], %i7; \
491 restored; retry; nop; nop; nop; nop; nop; nop; \
492 nop; nop; nop; nop; nop; nop; nop; nop;
493
David S. Miller314ef682006-02-04 00:10:01 -0800[diff] [blame]494#define FILL_0_NORMAL_RTRAP \
495kern_rtt_fill: \
496 rdpr %cwp, %g1; \
497 sub %g1, 1, %g1; \
498 wrpr %g1, %cwp; \
499 ldx [%sp + STACK_BIAS + 0x00], %l0; \
500 ldx [%sp + STACK_BIAS + 0x08], %l1; \
501 ldx [%sp + STACK_BIAS + 0x10], %l2; \
502 ldx [%sp + STACK_BIAS + 0x18], %l3; \
503 ldx [%sp + STACK_BIAS + 0x20], %l4; \
504 ldx [%sp + STACK_BIAS + 0x28], %l5; \
505 ldx [%sp + STACK_BIAS + 0x30], %l6; \
506 ldx [%sp + STACK_BIAS + 0x38], %l7; \
507 ldx [%sp + STACK_BIAS + 0x40], %i0; \
508 ldx [%sp + STACK_BIAS + 0x48], %i1; \
509 ldx [%sp + STACK_BIAS + 0x50], %i2; \
510 ldx [%sp + STACK_BIAS + 0x58], %i3; \
511 ldx [%sp + STACK_BIAS + 0x60], %i4; \
512 ldx [%sp + STACK_BIAS + 0x68], %i5; \
513 ldx [%sp + STACK_BIAS + 0x70], %i6; \
514 ldx [%sp + STACK_BIAS + 0x78], %i7; \
515 restored; \
516 add %g1, 1, %g1; \
517 ba,pt %xcc, kern_rtt_restore; \
518 wrpr %g1, %cwp; \
519 nop; nop; nop; nop; nop; \
520 nop; nop; nop; nop;
521
522
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]523/* Normal 64bit fill */
524#define FILL_1_GENERIC(ASI) \
525 add %sp, STACK_BIAS + 0x00, %g1; \
526 ldxa [%g1 + %g0] ASI, %l0; \
527 mov 0x08, %g2; \
528 mov 0x10, %g3; \
529 ldxa [%g1 + %g2] ASI, %l1; \
530 mov 0x18, %g5; \
531 ldxa [%g1 + %g3] ASI, %l2; \
532 ldxa [%g1 + %g5] ASI, %l3; \
533 add %g1, 0x20, %g1; \
534 ldxa [%g1 + %g0] ASI, %l4; \
535 ldxa [%g1 + %g2] ASI, %l5; \
536 ldxa [%g1 + %g3] ASI, %l6; \
537 ldxa [%g1 + %g5] ASI, %l7; \
538 add %g1, 0x20, %g1; \
539 ldxa [%g1 + %g0] ASI, %i0; \
540 ldxa [%g1 + %g2] ASI, %i1; \
541 ldxa [%g1 + %g3] ASI, %i2; \
542 ldxa [%g1 + %g5] ASI, %i3; \
543 add %g1, 0x20, %g1; \
544 ldxa [%g1 + %g0] ASI, %i4; \
545 ldxa [%g1 + %g2] ASI, %i5; \
546 ldxa [%g1 + %g3] ASI, %i6; \
547 ldxa [%g1 + %g5] ASI, %i7; \
548 restored; \
549 retry; nop; nop; nop; nop; \
550 b,a,pt %xcc, fill_fixup_dax; \
551 b,a,pt %xcc, fill_fixup_mna; \
552 b,a,pt %xcc, fill_fixup;
553
David S. Miller314ef682006-02-04 00:10:01 -0800[diff] [blame]554#define FILL_1_GENERIC_RTRAP \
555user_rtt_fill_64bit: \
556 ldxa [%sp + STACK_BIAS + 0x00] %asi, %l0; \
557 ldxa [%sp + STACK_BIAS + 0x08] %asi, %l1; \
558 ldxa [%sp + STACK_BIAS + 0x10] %asi, %l2; \
559 ldxa [%sp + STACK_BIAS + 0x18] %asi, %l3; \
560 ldxa [%sp + STACK_BIAS + 0x20] %asi, %l4; \
561 ldxa [%sp + STACK_BIAS + 0x28] %asi, %l5; \
562 ldxa [%sp + STACK_BIAS + 0x30] %asi, %l6; \
563 ldxa [%sp + STACK_BIAS + 0x38] %asi, %l7; \
564 ldxa [%sp + STACK_BIAS + 0x40] %asi, %i0; \
565 ldxa [%sp + STACK_BIAS + 0x48] %asi, %i1; \
566 ldxa [%sp + STACK_BIAS + 0x50] %asi, %i2; \
567 ldxa [%sp + STACK_BIAS + 0x58] %asi, %i3; \
568 ldxa [%sp + STACK_BIAS + 0x60] %asi, %i4; \
569 ldxa [%sp + STACK_BIAS + 0x68] %asi, %i5; \
570 ldxa [%sp + STACK_BIAS + 0x70] %asi, %i6; \
571 ldxa [%sp + STACK_BIAS + 0x78] %asi, %i7; \
572 ba,pt %xcc, user_rtt_pre_restore; \
573 restored; \
574 nop; nop; nop; nop; nop; nop; \
575 nop; nop; nop; nop; nop; \
576 ba,a,pt %xcc, user_rtt_fill_fixup; \
577 ba,a,pt %xcc, user_rtt_fill_fixup; \
578 ba,a,pt %xcc, user_rtt_fill_fixup;
579
580
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]581/* Normal 32bit fill */
582#define FILL_2_GENERIC(ASI) \
583 srl %sp, 0, %sp; \
584 lduwa [%sp + %g0] ASI, %l0; \
585 mov 0x04, %g2; \
586 mov 0x08, %g3; \
587 lduwa [%sp + %g2] ASI, %l1; \
588 mov 0x0c, %g5; \
589 lduwa [%sp + %g3] ASI, %l2; \
590 lduwa [%sp + %g5] ASI, %l3; \
591 add %sp, 0x10, %g1; \
592 lduwa [%g1 + %g0] ASI, %l4; \
593 lduwa [%g1 + %g2] ASI, %l5; \
594 lduwa [%g1 + %g3] ASI, %l6; \
595 lduwa [%g1 + %g5] ASI, %l7; \
596 add %g1, 0x10, %g1; \
597 lduwa [%g1 + %g0] ASI, %i0; \
598 lduwa [%g1 + %g2] ASI, %i1; \
599 lduwa [%g1 + %g3] ASI, %i2; \
600 lduwa [%g1 + %g5] ASI, %i3; \
601 add %g1, 0x10, %g1; \
602 lduwa [%g1 + %g0] ASI, %i4; \
603 lduwa [%g1 + %g2] ASI, %i5; \
604 lduwa [%g1 + %g3] ASI, %i6; \
605 lduwa [%g1 + %g5] ASI, %i7; \
606 restored; \
607 retry; nop; nop; nop; nop; \
608 b,a,pt %xcc, fill_fixup_dax; \
609 b,a,pt %xcc, fill_fixup_mna; \
610 b,a,pt %xcc, fill_fixup;
611
David S. Miller314ef682006-02-04 00:10:01 -0800[diff] [blame]612#define FILL_2_GENERIC_RTRAP \
613user_rtt_fill_32bit: \
614 srl %sp, 0, %sp; \
615 lduwa [%sp + 0x00] %asi, %l0; \
616 lduwa [%sp + 0x04] %asi, %l1; \
617 lduwa [%sp + 0x08] %asi, %l2; \
618 lduwa [%sp + 0x0c] %asi, %l3; \
619 lduwa [%sp + 0x10] %asi, %l4; \
620 lduwa [%sp + 0x14] %asi, %l5; \
621 lduwa [%sp + 0x18] %asi, %l6; \
622 lduwa [%sp + 0x1c] %asi, %l7; \
623 lduwa [%sp + 0x20] %asi, %i0; \
624 lduwa [%sp + 0x24] %asi, %i1; \
625 lduwa [%sp + 0x28] %asi, %i2; \
626 lduwa [%sp + 0x2c] %asi, %i3; \
627 lduwa [%sp + 0x30] %asi, %i4; \
628 lduwa [%sp + 0x34] %asi, %i5; \
629 lduwa [%sp + 0x38] %asi, %i6; \
630 lduwa [%sp + 0x3c] %asi, %i7; \
631 ba,pt %xcc, user_rtt_pre_restore; \
632 restored; \
633 nop; nop; nop; nop; nop; \
634 nop; nop; nop; nop; nop; \
635 ba,a,pt %xcc, user_rtt_fill_fixup; \
636 ba,a,pt %xcc, user_rtt_fill_fixup; \
637 ba,a,pt %xcc, user_rtt_fill_fixup;
638
639
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]640#define FILL_1_NORMAL FILL_1_GENERIC(ASI_AIUP)
641#define FILL_2_NORMAL FILL_2_GENERIC(ASI_AIUP)
642#define FILL_3_NORMAL FILL_0_NORMAL
643#define FILL_4_NORMAL FILL_0_NORMAL
644#define FILL_5_NORMAL FILL_0_NORMAL
645#define FILL_6_NORMAL FILL_0_NORMAL
646#define FILL_7_NORMAL FILL_0_NORMAL
647
648#define FILL_0_OTHER FILL_0_NORMAL
649#define FILL_1_OTHER FILL_1_GENERIC(ASI_AIUS)
650#define FILL_2_OTHER FILL_2_GENERIC(ASI_AIUS)
651#define FILL_3_OTHER FILL_3_NORMAL
652#define FILL_4_OTHER FILL_4_NORMAL
653#define FILL_5_OTHER FILL_5_NORMAL
654#define FILL_6_OTHER FILL_6_NORMAL
655#define FILL_7_OTHER FILL_7_NORMAL
656
657#endif /* !(_SPARC64_TTABLE_H) */