blob: f9803dad6919848a4097f4ed82b3a6dd35ae17d9 [file] [log] [blame]
Greg Kroah-Hartmanb2441312017-11-01 15:07:57 +01001# SPDX-License-Identifier: GPL-2.0
Alan Tull6a8c3be2015-10-07 16:36:28 +01002#
3# Makefile for the fpga framework and fpga manager drivers.
4#
5
6# Core FPGA Manager Framework
7obj-$(CONFIG_FPGA) += fpga-mgr.o
8
9# FPGA Manager Drivers
Anatolij Gustschin34d1dc12017-06-14 10:36:35 -050010obj-$(CONFIG_FPGA_MGR_ALTERA_CVP) += altera-cvp.o
Joshua Clayton5692fae2017-06-14 10:36:29 -050011obj-$(CONFIG_FPGA_MGR_ALTERA_PS_SPI) += altera-ps-spi.o
Joel Holdsworth21f8ba22017-02-27 16:14:26 -060012obj-$(CONFIG_FPGA_MGR_ICE40_SPI) += ice40-spi.o
Paolo Pisati88fb3a02018-04-16 20:43:36 -070013obj-$(CONFIG_FPGA_MGR_MACHXO2_SPI) += machxo2-spi.o
Alan Tullfab62662015-10-07 16:36:29 +010014obj-$(CONFIG_FPGA_MGR_SOCFPGA) += socfpga.o
Alan Tullacbb910a2016-11-01 14:14:32 -050015obj-$(CONFIG_FPGA_MGR_SOCFPGA_A10) += socfpga-a10.o
Florian Fainelli4348f7e2017-02-27 16:14:22 -060016obj-$(CONFIG_FPGA_MGR_TS73XX) += ts73xx-fpga.o
Anatolij Gustschin061c97d2017-03-23 19:34:26 -050017obj-$(CONFIG_FPGA_MGR_XILINX_SPI) += xilinx-spi.o
Moritz Fischer37784702015-10-16 15:42:30 -070018obj-$(CONFIG_FPGA_MGR_ZYNQ_FPGA) += zynq-fpga.o
Matthew Gerlachd201cc12017-03-23 19:34:28 -050019obj-$(CONFIG_ALTERA_PR_IP_CORE) += altera-pr-ip-core.o
Matthew Gerlach5b73cb52017-03-23 19:34:30 -050020obj-$(CONFIG_ALTERA_PR_IP_CORE_PLAT) += altera-pr-ip-core-plat.o
Alan Tull21aeda92016-11-01 14:14:28 -050021
22# FPGA Bridge Drivers
23obj-$(CONFIG_FPGA_BRIDGE) += fpga-bridge.o
Alan Tulle5f8efa2016-11-01 14:14:30 -050024obj-$(CONFIG_SOCFPGA_FPGA_BRIDGE) += altera-hps2fpga.o altera-fpga2sdram.o
Alan Tullca24a642016-11-01 14:14:31 -050025obj-$(CONFIG_ALTERA_FREEZE_BRIDGE) += altera-freeze-bridge.o
Moritz Fischer7e961c12017-03-24 10:33:21 -050026obj-$(CONFIG_XILINX_PR_DECOUPLER) += xilinx-pr-decoupler.o
Alan Tull0fa20cd2016-11-01 14:14:29 -050027
28# High Level Interfaces
29obj-$(CONFIG_FPGA_REGION) += fpga-region.o
Alan Tullef3acdd2017-11-15 14:20:25 -060030obj-$(CONFIG_OF_FPGA_REGION) += of-fpga-region.o