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Dave Martin80c59da2012-02-09 08:47:17 -08001/*
2 * Copyright (c) 2012 Linaro Limited.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License along
15 * with this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
17 */
18
19#include <linux/init.h>
20#include <linux/linkage.h>
21#include <asm/assembler.h>
22#include <asm/virt.h>
23
Dave Martin424e5992012-02-10 18:07:07 -080024#ifndef ZIMAGE
Dave Martin80c59da2012-02-09 08:47:17 -080025/*
26 * For the kernel proper, we need to find out the CPU boot mode long after
27 * boot, so we need to store it in a writable variable.
28 *
29 * This is not in .bss, because we set it sufficiently early that the boot-time
30 * zeroing of .bss would clobber it.
31 */
32.data
33ENTRY(__boot_cpu_mode)
34 .long 0
35.text
36
37 /*
38 * Save the primary CPU boot mode. Requires 3 scratch registers.
39 */
40 .macro store_primary_cpu_mode reg1, reg2, reg3
41 mrs \reg1, cpsr
42 and \reg1, \reg1, #MODE_MASK
43 adr \reg2, .L__boot_cpu_mode_offset
44 ldr \reg3, [\reg2]
45 str \reg1, [\reg2, \reg3]
46 .endm
47
48 /*
49 * Compare the current mode with the one saved on the primary CPU.
50 * If they don't match, record that fact. The Z bit indicates
51 * if there's a match or not.
52 * Requires 3 additionnal scratch registers.
53 */
54 .macro compare_cpu_mode_with_primary mode, reg1, reg2, reg3
55 adr \reg2, .L__boot_cpu_mode_offset
56 ldr \reg3, [\reg2]
57 ldr \reg1, [\reg2, \reg3]
58 cmp \mode, \reg1 @ matches primary CPU boot mode?
Mark Rutlandb60d5db2013-07-18 17:20:32 +010059 orrne \reg1, \reg1, #BOOT_CPU_MODE_MISMATCH
60 strne \reg1, [\reg2, \reg3] @ record what happened and give up
Dave Martin80c59da2012-02-09 08:47:17 -080061 .endm
62
Dave Martin424e5992012-02-10 18:07:07 -080063#else /* ZIMAGE */
64
65 .macro store_primary_cpu_mode reg1:req, reg2:req, reg3:req
66 .endm
67
68/*
69 * The zImage loader only runs on one CPU, so we don't bother with mult-CPU
70 * consistency checking:
71 */
72 .macro compare_cpu_mode_with_primary mode, reg1, reg2, reg3
73 cmp \mode, \mode
74 .endm
75
76#endif /* ZIMAGE */
77
Dave Martin80c59da2012-02-09 08:47:17 -080078/*
79 * Hypervisor stub installation functions.
80 *
81 * These must be called with the MMU and D-cache off.
82 * They are not ABI compliant and are only intended to be called from the kernel
83 * entry points in head.S.
84 */
85@ Call this from the primary CPU
86ENTRY(__hyp_stub_install)
87 store_primary_cpu_mode r4, r5, r6
88ENDPROC(__hyp_stub_install)
89
90 @ fall through...
91
92@ Secondary CPUs should call here
93ENTRY(__hyp_stub_install_secondary)
94 mrs r4, cpsr
95 and r4, r4, #MODE_MASK
96
97 /*
98 * If the secondary has booted with a different mode, give up
99 * immediately.
100 */
101 compare_cpu_mode_with_primary r4, r5, r6, r7
Russell King6ebbf2c2014-06-30 16:29:12 +0100102 retne lr
Dave Martin80c59da2012-02-09 08:47:17 -0800103
104 /*
105 * Once we have given up on one CPU, we do not try to install the
106 * stub hypervisor on the remaining ones: because the saved boot mode
107 * is modified, it can't compare equal to the CPSR mode field any
108 * more.
109 *
110 * Otherwise...
111 */
112
113 cmp r4, #HYP_MODE
Russell King6ebbf2c2014-06-30 16:29:12 +0100114 retne lr @ give up if the CPU is not in HYP mode
Dave Martin80c59da2012-02-09 08:47:17 -0800115
116/*
117 * Configure HSCTLR to set correct exception endianness/instruction set
118 * state etc.
119 * Turn off all traps
120 * Eventually, CPU-specific code might be needed -- assume not for now
121 *
122 * This code relies on the "eret" instruction to synchronize the
Marc Zyngierd0172342013-01-04 17:44:15 +0000123 * various coprocessor accesses. This is done when we switch to SVC
124 * (see safe_svcmode_maskall).
Dave Martin80c59da2012-02-09 08:47:17 -0800125 */
126 @ Now install the hypervisor stub:
127 adr r7, __hyp_stub_vectors
128 mcr p15, 4, r7, c12, c0, 0 @ set hypervisor vector base (HVBAR)
129
130 @ Disable all traps, so we don't get any nasty surprise
131 mov r7, #0
132 mcr p15, 4, r7, c1, c1, 0 @ HCR
133 mcr p15, 4, r7, c1, c1, 2 @ HCPTR
134 mcr p15, 4, r7, c1, c1, 3 @ HSTR
135
136THUMB( orr r7, #(1 << 30) ) @ HSCTLR.TE
Li Liuaf923942014-07-01 18:01:50 +0800137ARM_BE8(orr r7, r7, #(1 << 25)) @ HSCTLR.EE
Dave Martin80c59da2012-02-09 08:47:17 -0800138 mcr p15, 4, r7, c1, c0, 0 @ HSCTLR
139
140 mrc p15, 4, r7, c1, c1, 1 @ HDCR
141 and r7, #0x1f @ Preserve HPMN
142 mcr p15, 4, r7, c1, c1, 1 @ HDCR
143
Marc Zyngier8ec58be2012-08-01 14:46:41 +0100144#if !defined(ZIMAGE) && defined(CONFIG_ARM_ARCH_TIMER)
145 @ make CNTP_* and CNTPCT accessible from PL1
146 mrc p15, 0, r7, c0, c1, 1 @ ID_PFR1
147 lsr r7, #16
148 and r7, #0xf
149 cmp r7, #1
150 bne 1f
151 mrc p15, 4, r7, c14, c1, 0 @ CNTHCTL
152 orr r7, r7, #3 @ PL1PCEN | PL1PCTEN
153 mcr p15, 4, r7, c14, c1, 0 @ CNTHCTL
Marc Zyngier0af0b1892013-01-30 18:17:49 +0000154 mov r7, #0
155 mcrr p15, 4, r7, r7, c14 @ CNTVOFF
Marc Zyngier3f71be22013-03-12 14:56:12 +0000156
157 @ Disable virtual timer in case it was counting
158 mrc p15, 0, r7, c14, c3, 1 @ CNTV_CTL
159 bic r7, #1 @ Clear ENABLE
160 mcr p15, 0, r7, c14, c3, 1 @ CNTV_CTL
Marc Zyngier8ec58be2012-08-01 14:46:41 +01001611:
162#endif
163
Marc Zyngierd0172342013-01-04 17:44:15 +0000164 bx lr @ The boot CPU mode is left in r4.
Dave Martin80c59da2012-02-09 08:47:17 -0800165ENDPROC(__hyp_stub_install_secondary)
166
167__hyp_stub_do_trap:
168 cmp r0, #-1
169 mrceq p15, 4, r0, c12, c0, 0 @ get HVBAR
170 mcrne p15, 4, r0, c12, c0, 0 @ set HVBAR
171 __ERET
172ENDPROC(__hyp_stub_do_trap)
173
174/*
175 * __hyp_set_vectors: Call this after boot to set the initial hypervisor
176 * vectors as part of hypervisor installation. On an SMP system, this should
177 * be called on each CPU.
178 *
179 * r0 must be the physical address of the new vector table (which must lie in
180 * the bottom 4GB of physical address space.
181 *
182 * r0 must be 32-byte aligned.
183 *
184 * Before calling this, you must check that the stub hypervisor is installed
185 * everywhere, by waiting for any secondary CPUs to be brought up and then
186 * checking that BOOT_CPU_MODE_HAVE_HYP(__boot_cpu_mode) is true.
187 *
188 * If not, there is a pre-existing hypervisor, some CPUs failed to boot, or
189 * something else went wrong... in such cases, trying to install a new
190 * hypervisor is unlikely to work as desired.
191 *
192 * When you call into your shiny new hypervisor, sp_hyp will contain junk,
193 * so you will need to set that to something sensible at the new hypervisor's
194 * initialisation entry point.
195 */
196ENTRY(__hyp_get_vectors)
197 mov r0, #-1
198ENDPROC(__hyp_get_vectors)
199 @ fall through
200ENTRY(__hyp_set_vectors)
201 __HVC(0)
Russell King6ebbf2c2014-06-30 16:29:12 +0100202 ret lr
Dave Martin80c59da2012-02-09 08:47:17 -0800203ENDPROC(__hyp_set_vectors)
204
Dave Martin424e5992012-02-10 18:07:07 -0800205#ifndef ZIMAGE
Dave Martin80c59da2012-02-09 08:47:17 -0800206.align 2
207.L__boot_cpu_mode_offset:
208 .long __boot_cpu_mode - .
Dave Martin424e5992012-02-10 18:07:07 -0800209#endif
Dave Martin80c59da2012-02-09 08:47:17 -0800210
211.align 5
212__hyp_stub_vectors:
213__hyp_stub_reset: W(b) .
214__hyp_stub_und: W(b) .
215__hyp_stub_svc: W(b) .
216__hyp_stub_pabort: W(b) .
217__hyp_stub_dabort: W(b) .
218__hyp_stub_trap: W(b) __hyp_stub_do_trap
219__hyp_stub_irq: W(b) .
220__hyp_stub_fiq: W(b) .
221ENDPROC(__hyp_stub_vectors)
222