blob: ca382fbf7a86a3ed3e3f94ca6e695eb9a717a1c0 [file] [log] [blame]
Jerome Glisse771fe6b2009-06-05 14:42:42 +02001/*
2 * Copyright © 2007 David Airlie
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 *
23 * Authors:
24 * David Airlie
25 */
Jerome Glisse771fe6b2009-06-05 14:42:42 +020026
Sam Ravnborgf9183122019-06-08 10:02:40 +020027#include <linux/module.h>
Thomas Zimmermann2ef79412019-12-03 11:04:02 +010028#include <linux/pci.h>
Sam Ravnborgf9183122019-06-08 10:02:40 +020029#include <linux/pm_runtime.h>
30#include <linux/slab.h>
31#include <linux/vga_switcheroo.h>
32
David Howells760285e2012-10-02 18:01:07 +010033#include <drm/drm_crtc.h>
34#include <drm/drm_crtc_helper.h>
David Howells760285e2012-10-02 18:01:07 +010035#include <drm/drm_fb_helper.h>
Sam Ravnborgf9183122019-06-08 10:02:40 +020036#include <drm/drm_fourcc.h>
Sam Ravnborgf9183122019-06-08 10:02:40 +020037#include <drm/radeon_drm.h>
Dave Airlie785b93e2009-08-28 15:46:53 +100038
Sam Ravnborgf9183122019-06-08 10:02:40 +020039#include "radeon.h"
Dave Airlie6a9ee8a2010-02-01 15:38:10 +100040
Dave Airlie38651672010-03-30 05:34:13 +000041/* object hierarchy -
Jérome Glisse3cf8bb12016-03-16 12:56:45 +010042 * this contains a helper + a radeon fb
43 * the helper contains a pointer to radeon framebuffer baseclass.
44 */
Dave Airlie8be48d92010-03-30 05:34:14 +000045struct radeon_fbdev {
Daniel Vetter19d8a4e2019-03-26 14:20:03 +010046 struct drm_fb_helper helper; /* must be first */
Daniel Stone9a0f0c92018-03-30 15:11:37 +010047 struct drm_framebuffer fb;
Dave Airlie38651672010-03-30 05:34:13 +000048 struct radeon_device *rdev;
Jerome Glisse771fe6b2009-06-05 14:42:42 +020049};
50
Alex Deucher5756b152016-08-31 17:29:51 -040051static int
52radeonfb_open(struct fb_info *info, int user)
53{
54 struct radeon_fbdev *rfbdev = info->par;
55 struct radeon_device *rdev = rfbdev->rdev;
56 int ret = pm_runtime_get_sync(rdev->ddev->dev);
Sergio Miguéns Iglesiasb5768a72021-08-04 13:20:53 +020057
Alex Deucher5756b152016-08-31 17:29:51 -040058 if (ret < 0 && ret != -EACCES) {
59 pm_runtime_mark_last_busy(rdev->ddev->dev);
60 pm_runtime_put_autosuspend(rdev->ddev->dev);
61 return ret;
62 }
63 return 0;
64}
65
66static int
67radeonfb_release(struct fb_info *info, int user)
68{
69 struct radeon_fbdev *rfbdev = info->par;
70 struct radeon_device *rdev = rfbdev->rdev;
71
72 pm_runtime_mark_last_busy(rdev->ddev->dev);
73 pm_runtime_put_autosuspend(rdev->ddev->dev);
74 return 0;
75}
76
Jani Nikulab6ff7532019-12-03 18:38:48 +020077static const struct fb_ops radeonfb_ops = {
Jerome Glisse771fe6b2009-06-05 14:42:42 +020078 .owner = THIS_MODULE,
Stefan Christ13be31f2016-11-14 00:03:21 +010079 DRM_FB_HELPER_DEFAULT_OPS,
Alex Deucher5756b152016-08-31 17:29:51 -040080 .fb_open = radeonfb_open,
81 .fb_release = radeonfb_release,
Archit Taneja00450052015-07-31 16:21:54 +053082 .fb_fillrect = drm_fb_helper_cfb_fillrect,
83 .fb_copyarea = drm_fb_helper_cfb_copyarea,
84 .fb_imageblit = drm_fb_helper_cfb_imageblit,
Jerome Glisse771fe6b2009-06-05 14:42:42 +020085};
86
Jerome Glisse771fe6b2009-06-05 14:42:42 +020087
Laurent Pinchart802aaf72016-10-18 01:41:18 +030088int radeon_align_pitch(struct radeon_device *rdev, int width, int cpp, bool tiled)
Jerome Glisse771fe6b2009-06-05 14:42:42 +020089{
90 int aligned = width;
Dave Airliee024e112009-06-24 09:48:08 +100091 int align_large = (ASIC_IS_AVIVO(rdev)) || tiled;
Jerome Glisse771fe6b2009-06-05 14:42:42 +020092 int pitch_mask = 0;
93
Laurent Pinchart802aaf72016-10-18 01:41:18 +030094 switch (cpp) {
Jerome Glisse771fe6b2009-06-05 14:42:42 +020095 case 1:
96 pitch_mask = align_large ? 255 : 127;
97 break;
98 case 2:
99 pitch_mask = align_large ? 127 : 31;
100 break;
101 case 3:
102 case 4:
103 pitch_mask = align_large ? 63 : 15;
104 break;
105 }
106
107 aligned += pitch_mask;
108 aligned &= ~pitch_mask;
Laurent Pinchart802aaf72016-10-18 01:41:18 +0300109 return aligned * cpp;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200110}
111
Dave Airlie8be48d92010-03-30 05:34:14 +0000112static void radeonfb_destroy_pinned_object(struct drm_gem_object *gobj)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200113{
Daniel Vetter7e4d15d2011-02-18 17:59:17 +0100114 struct radeon_bo *rbo = gem_to_radeon_bo(gobj);
Dave Airlie8be48d92010-03-30 05:34:14 +0000115 int ret;
116
117 ret = radeon_bo_reserve(rbo, false);
118 if (likely(ret == 0)) {
119 radeon_bo_kunmap(rbo);
Dave Airlie29d08b32010-09-27 16:17:17 +1000120 radeon_bo_unpin(rbo);
Dave Airlie8be48d92010-03-30 05:34:14 +0000121 radeon_bo_unreserve(rbo);
122 }
Emil Velikovf11fb662020-05-15 10:51:09 +0100123 drm_gem_object_put(gobj);
Dave Airlie8be48d92010-03-30 05:34:14 +0000124}
125
126static int radeonfb_create_pinned_object(struct radeon_fbdev *rfbdev,
Jesse Barnes308e5bc2011-11-14 14:51:28 -0800127 struct drm_mode_fb_cmd2 *mode_cmd,
Dave Airlie8be48d92010-03-30 05:34:14 +0000128 struct drm_gem_object **gobj_p)
129{
Maxime Ripard24c478e2019-05-16 12:31:49 +0200130 const struct drm_format_info *info;
Dave Airlie8be48d92010-03-30 05:34:14 +0000131 struct radeon_device *rdev = rfbdev->rdev;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200132 struct drm_gem_object *gobj = NULL;
Jerome Glisse4c788672009-11-20 14:29:23 +0100133 struct radeon_bo *rbo = NULL;
Dave Airliee024e112009-06-24 09:48:08 +1000134 bool fb_tiled = false; /* useful for testing */
Michel Dänzerc88f9f02009-09-15 17:09:30 +0200135 u32 tiling_flags = 0;
Dave Airlie8be48d92010-03-30 05:34:14 +0000136 int ret;
137 int aligned_size, size;
Dave Airliee40b6fc2011-02-18 15:51:57 +1000138 int height = mode_cmd->height;
Laurent Pinchart802aaf72016-10-18 01:41:18 +0300139 u32 cpp;
Jesse Barnes308e5bc2011-11-14 14:51:28 -0800140
Maxime Ripard24c478e2019-05-16 12:31:49 +0200141 info = drm_get_format_info(rdev->ddev, mode_cmd);
Maxime Ripardb0f986b2019-05-16 12:31:52 +0200142 cpp = info->cpp[0];
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200143
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200144 /* need to align pitch with crtc limits */
Laurent Pinchart802aaf72016-10-18 01:41:18 +0300145 mode_cmd->pitches[0] = radeon_align_pitch(rdev, mode_cmd->width, cpp,
146 fb_tiled);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200147
Dave Airliee40b6fc2011-02-18 15:51:57 +1000148 if (rdev->family >= CHIP_R600)
149 height = ALIGN(mode_cmd->height, 8);
Jesse Barnes308e5bc2011-11-14 14:51:28 -0800150 size = mode_cmd->pitches[0] * height;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200151 aligned_size = ALIGN(size, PAGE_SIZE);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200152 ret = radeon_gem_object_create(rdev, aligned_size, 0,
Dave Airlie8be48d92010-03-30 05:34:14 +0000153 RADEON_GEM_DOMAIN_VRAM,
Christian Königed5cb432014-07-21 13:27:27 +0200154 0, true, &gobj);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200155 if (ret) {
Joe Perches7ca85292017-02-28 04:55:52 -0800156 pr_err("failed to allocate framebuffer (%d)\n", aligned_size);
Dave Airlie8be48d92010-03-30 05:34:14 +0000157 return -ENOMEM;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200158 }
Daniel Vetter7e4d15d2011-02-18 17:59:17 +0100159 rbo = gem_to_radeon_bo(gobj);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200160
Dave Airliee024e112009-06-24 09:48:08 +1000161 if (fb_tiled)
Michel Dänzerc88f9f02009-09-15 17:09:30 +0200162 tiling_flags = RADEON_TILING_MACRO;
163
164#ifdef __BIG_ENDIAN
Laurent Pinchart802aaf72016-10-18 01:41:18 +0300165 switch (cpp) {
166 case 4:
Michel Dänzerc88f9f02009-09-15 17:09:30 +0200167 tiling_flags |= RADEON_TILING_SWAP_32BIT;
168 break;
Laurent Pinchart802aaf72016-10-18 01:41:18 +0300169 case 2:
Michel Dänzerc88f9f02009-09-15 17:09:30 +0200170 tiling_flags |= RADEON_TILING_SWAP_16BIT;
Nathan Chancellor3a6e4102021-08-15 12:29:59 -0700171 break;
Michel Dänzerc88f9f02009-09-15 17:09:30 +0200172 default:
173 break;
174 }
175#endif
176
Jerome Glisse4c788672009-11-20 14:29:23 +0100177 if (tiling_flags) {
178 ret = radeon_bo_set_tiling_flags(rbo,
Dave Airlie8be48d92010-03-30 05:34:14 +0000179 tiling_flags | RADEON_TILING_SURFACE,
Jesse Barnes308e5bc2011-11-14 14:51:28 -0800180 mode_cmd->pitches[0]);
Jerome Glisse4c788672009-11-20 14:29:23 +0100181 if (ret)
182 dev_err(rdev->dev, "FB failed to set tiling flags\n");
183 }
Dave Airlie8be48d92010-03-30 05:34:14 +0000184
Dave Airlie38651672010-03-30 05:34:13 +0000185
Jerome Glisse4c788672009-11-20 14:29:23 +0100186 ret = radeon_bo_reserve(rbo, false);
187 if (unlikely(ret != 0))
188 goto out_unref;
Michel Dänzer0349af72012-03-14 17:12:42 +0100189 /* Only 27 bit offset for legacy CRTC */
190 ret = radeon_bo_pin_restricted(rbo, RADEON_GEM_DOMAIN_VRAM,
191 ASIC_IS_AVIVO(rdev) ? 0 : 1 << 27,
192 NULL);
Jerome Glissef92e93e2009-06-22 18:15:58 +0200193 if (ret) {
Jerome Glisse4c788672009-11-20 14:29:23 +0100194 radeon_bo_unreserve(rbo);
195 goto out_unref;
196 }
197 if (fb_tiled)
198 radeon_bo_check_tiling(rbo, 0, 0);
Dave Airlie8be48d92010-03-30 05:34:14 +0000199 ret = radeon_bo_kmap(rbo, NULL);
Jerome Glisse4c788672009-11-20 14:29:23 +0100200 radeon_bo_unreserve(rbo);
Sergio Miguéns Iglesiasb5768a72021-08-04 13:20:53 +0200201 if (ret)
Jerome Glissef92e93e2009-06-22 18:15:58 +0200202 goto out_unref;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200203
Dave Airlie8be48d92010-03-30 05:34:14 +0000204 *gobj_p = gobj;
205 return 0;
206out_unref:
207 radeonfb_destroy_pinned_object(gobj);
208 *gobj_p = NULL;
209 return ret;
210}
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200211
Daniel Vettercd5428a2013-01-21 23:42:49 +0100212static int radeonfb_create(struct drm_fb_helper *helper,
Dave Airlie8be48d92010-03-30 05:34:14 +0000213 struct drm_fb_helper_surface_size *sizes)
214{
Fabian Fredericka1d02802014-09-14 18:40:16 +0200215 struct radeon_fbdev *rfbdev =
216 container_of(helper, struct radeon_fbdev, helper);
Dave Airlie8be48d92010-03-30 05:34:14 +0000217 struct radeon_device *rdev = rfbdev->rdev;
218 struct fb_info *info;
219 struct drm_framebuffer *fb = NULL;
Jesse Barnes308e5bc2011-11-14 14:51:28 -0800220 struct drm_mode_fb_cmd2 mode_cmd;
Dave Airlie8be48d92010-03-30 05:34:14 +0000221 struct drm_gem_object *gobj = NULL;
222 struct radeon_bo *rbo = NULL;
Dave Airlie8be48d92010-03-30 05:34:14 +0000223 int ret;
224 unsigned long tmp;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200225
Dave Airlie8be48d92010-03-30 05:34:14 +0000226 mode_cmd.width = sizes->surface_width;
227 mode_cmd.height = sizes->surface_height;
228
229 /* avivo can't scanout real 24bpp */
230 if ((sizes->surface_bpp == 24) && ASIC_IS_AVIVO(rdev))
231 sizes->surface_bpp = 32;
232
Jesse Barnes308e5bc2011-11-14 14:51:28 -0800233 mode_cmd.pixel_format = drm_mode_legacy_fb_format(sizes->surface_bpp,
234 sizes->surface_depth);
Dave Airlie8be48d92010-03-30 05:34:14 +0000235
236 ret = radeonfb_create_pinned_object(rfbdev, &mode_cmd, &gobj);
Dave Airlieaaefcd42012-03-06 10:44:40 +0000237 if (ret) {
238 DRM_ERROR("failed to create fbcon object %d\n", ret);
239 return ret;
240 }
241
Daniel Vetter7e4d15d2011-02-18 17:59:17 +0100242 rbo = gem_to_radeon_bo(gobj);
Dave Airlie8be48d92010-03-30 05:34:14 +0000243
244 /* okay we have an object now allocate the framebuffer */
Archit Taneja00450052015-07-31 16:21:54 +0530245 info = drm_fb_helper_alloc_fbi(helper);
246 if (IS_ERR(info)) {
247 ret = PTR_ERR(info);
Daniel Vetterda7bdda2017-02-07 17:16:03 +0100248 goto out;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200249 }
Dave Airlie785b93e2009-08-28 15:46:53 +1000250
Daniel Vetter8782c642018-11-27 18:34:24 +0100251 /* radeon resume is fragile and needs a vt switch to help it along */
252 info->skip_vt_switch = false;
253
Daniel Stone9a0f0c92018-03-30 15:11:37 +0100254 ret = radeon_framebuffer_init(rdev->ddev, &rfbdev->fb, &mode_cmd, gobj);
Dave Airlieaaefcd42012-03-06 10:44:40 +0000255 if (ret) {
Masanari Iida8b513d02013-05-21 23:13:12 +0900256 DRM_ERROR("failed to initialize framebuffer %d\n", ret);
Daniel Vetterda7bdda2017-02-07 17:16:03 +0100257 goto out;
Dave Airlieaaefcd42012-03-06 10:44:40 +0000258 }
Dave Airlie8be48d92010-03-30 05:34:14 +0000259
Daniel Stone9a0f0c92018-03-30 15:11:37 +0100260 fb = &rfbdev->fb;
Dave Airlie38651672010-03-30 05:34:13 +0000261
262 /* setup helper */
263 rfbdev->helper.fb = fb;
Dave Airlie38651672010-03-30 05:34:13 +0000264
Dave Airlie8be48d92010-03-30 05:34:14 +0000265 memset_io(rbo->kptr, 0x0, radeon_bo_size(rbo));
Dave Airliebf8e8282009-08-17 10:20:47 +1000266
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200267 info->fbops = &radeonfb_ops;
Dave Airlie785b93e2009-08-28 15:46:53 +1000268
Dave Airlie8be48d92010-03-30 05:34:14 +0000269 tmp = radeon_bo_gpu_offset(rbo) - rdev->mc.vram_start;
Jerome Glissef92e93e2009-06-22 18:15:58 +0200270 info->fix.smem_start = rdev->mc.aper_base + tmp;
Dave Airlie8be48d92010-03-30 05:34:14 +0000271 info->fix.smem_len = radeon_bo_size(rbo);
272 info->screen_base = rbo->kptr;
273 info->screen_size = radeon_bo_size(rbo);
Dave Airlie785b93e2009-08-28 15:46:53 +1000274
Daniel Vetter19d8a4e2019-03-26 14:20:03 +0100275 drm_fb_helper_fill_info(info, &rfbdev->helper, sizes);
Dave Airlieed8f0d92009-07-29 17:07:38 +1000276
277 /* setup aperture base/size for vesafb takeover */
Marcin Slusarz1471ca92010-05-16 17:27:03 +0200278 info->apertures->ranges[0].base = rdev->ddev->mode_config.fb_base;
Dave Airlie68d30592010-12-20 10:54:48 +1000279 info->apertures->ranges[0].size = rdev->mc.aper_size;
Dave Airlieed8f0d92009-07-29 17:07:38 +1000280
Sascha Hauerfb2a99e2012-02-06 10:58:19 +0100281 /* Use default scratch pixmap (info->pixmap.flags = FB_PIXMAP_SYSTEM) */
Dave Airlie4abe3522010-03-30 05:34:18 +0000282
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200283 if (info->screen_base == NULL) {
284 ret = -ENOSPC;
Daniel Vetterda7bdda2017-02-07 17:16:03 +0100285 goto out;
Dave Airlie4abe3522010-03-30 05:34:18 +0000286 }
287
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200288 DRM_INFO("fb mappable at 0x%lX\n", info->fix.smem_start);
289 DRM_INFO("vram apper at 0x%lX\n", (unsigned long)rdev->mc.aper_base);
Dave Airlie8be48d92010-03-30 05:34:14 +0000290 DRM_INFO("size %lu\n", (unsigned long)radeon_bo_size(rbo));
Ville Syrjäläb00c6002016-12-14 23:31:35 +0200291 DRM_INFO("fb depth is %d\n", fb->format->depth);
Ville Syrjälä01f2c772011-12-20 00:06:49 +0200292 DRM_INFO(" pitch is %d\n", fb->pitches[0]);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200293
Thomas Zimmermannd86a4122020-12-01 11:35:38 +0100294 vga_switcheroo_client_fb_set(rdev->pdev, info);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200295 return 0;
296
Daniel Vetterda7bdda2017-02-07 17:16:03 +0100297out:
Jerome Glissef92e93e2009-06-22 18:15:58 +0200298 if (fb && ret) {
Emil Velikovf11fb662020-05-15 10:51:09 +0100299 drm_gem_object_put(gobj);
Daniel Vetter36206362012-12-10 20:42:17 +0100300 drm_framebuffer_unregister_private(fb);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200301 drm_framebuffer_cleanup(fb);
302 kfree(fb);
303 }
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200304 return ret;
305}
306
Dave Airlie8be48d92010-03-30 05:34:14 +0000307static int radeon_fbdev_destroy(struct drm_device *dev, struct radeon_fbdev *rfbdev)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200308{
Daniel Stone9a0f0c92018-03-30 15:11:37 +0100309 struct drm_framebuffer *fb = &rfbdev->fb;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200310
Archit Taneja00450052015-07-31 16:21:54 +0530311 drm_fb_helper_unregister_fbi(&rfbdev->helper);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200312
Daniel Stone9a0f0c92018-03-30 15:11:37 +0100313 if (fb->obj[0]) {
314 radeonfb_destroy_pinned_object(fb->obj[0]);
315 fb->obj[0] = NULL;
316 drm_framebuffer_unregister_private(fb);
317 drm_framebuffer_cleanup(fb);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200318 }
Dave Airlie4abe3522010-03-30 05:34:18 +0000319 drm_fb_helper_fini(&rfbdev->helper);
Dave Airlie785b93e2009-08-28 15:46:53 +1000320
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200321 return 0;
322}
Dave Airlie4abe3522010-03-30 05:34:18 +0000323
Thierry Reding3a493872014-06-27 17:19:23 +0200324static const struct drm_fb_helper_funcs radeon_fb_helper_funcs = {
Daniel Vettercd5428a2013-01-21 23:42:49 +0100325 .fb_probe = radeonfb_create,
Dave Airlie4abe3522010-03-30 05:34:18 +0000326};
Dave Airlie38651672010-03-30 05:34:13 +0000327
328int radeon_fbdev_init(struct radeon_device *rdev)
329{
Dave Airlie8be48d92010-03-30 05:34:14 +0000330 struct radeon_fbdev *rfbdev;
Dave Airlie4abe3522010-03-30 05:34:18 +0000331 int bpp_sel = 32;
Chris Wilson5a793952010-06-06 10:50:03 +0100332 int ret;
Dave Airlie4abe3522010-03-30 05:34:18 +0000333
Alex Deuchere5f243b2016-03-10 15:55:26 -0500334 /* don't enable fbdev if no connectors */
335 if (list_empty(&rdev->ddev->mode_config.connector_list))
336 return 0;
337
Egbert Eich7b8bd6b2017-07-18 17:20:53 +0200338 /* select 8 bpp console on 8MB cards, or 16 bpp on RN50 or 32MB */
339 if (rdev->mc.real_vram_size <= (8*1024*1024))
Dave Airlie4abe3522010-03-30 05:34:18 +0000340 bpp_sel = 8;
Egbert Eich7b8bd6b2017-07-18 17:20:53 +0200341 else if (ASIC_IS_RN50(rdev) ||
342 rdev->mc.real_vram_size <= (32*1024*1024))
343 bpp_sel = 16;
Dave Airlie8be48d92010-03-30 05:34:14 +0000344
345 rfbdev = kzalloc(sizeof(struct radeon_fbdev), GFP_KERNEL);
346 if (!rfbdev)
347 return -ENOMEM;
348
349 rfbdev->rdev = rdev;
350 rdev->mode_info.rfbdev = rfbdev;
Thierry Reding10a23102014-06-27 17:19:24 +0200351
352 drm_fb_helper_prepare(rdev->ddev, &rfbdev->helper,
353 &radeon_fb_helper_funcs);
Dave Airlie8be48d92010-03-30 05:34:14 +0000354
Pankaj Bharadiya2dea2d12020-03-05 17:34:28 +0530355 ret = drm_fb_helper_init(rdev->ddev, &rfbdev->helper);
Thierry Reding01934c22014-12-19 11:21:32 +0100356 if (ret)
357 goto free;
Chris Wilson5a793952010-06-06 10:50:03 +0100358
Daniel Vetter76a39db2013-01-20 23:12:54 +0100359 /* disable all the possible outputs/crtcs before entering KMS mode */
360 drm_helper_disable_unused_functions(rdev->ddev);
361
Thierry Reding01934c22014-12-19 11:21:32 +0100362 ret = drm_fb_helper_initial_config(&rfbdev->helper, bpp_sel);
363 if (ret)
364 goto fini;
365
Dave Airlie38651672010-03-30 05:34:13 +0000366 return 0;
Thierry Reding01934c22014-12-19 11:21:32 +0100367
368fini:
369 drm_fb_helper_fini(&rfbdev->helper);
370free:
371 kfree(rfbdev);
372 return ret;
Dave Airlie38651672010-03-30 05:34:13 +0000373}
374
375void radeon_fbdev_fini(struct radeon_device *rdev)
376{
Dave Airlie8be48d92010-03-30 05:34:14 +0000377 if (!rdev->mode_info.rfbdev)
378 return;
379
Dave Airlie38651672010-03-30 05:34:13 +0000380 radeon_fbdev_destroy(rdev->ddev, rdev->mode_info.rfbdev);
Dave Airlie8be48d92010-03-30 05:34:14 +0000381 kfree(rdev->mode_info.rfbdev);
Dave Airlie38651672010-03-30 05:34:13 +0000382 rdev->mode_info.rfbdev = NULL;
383}
384
385void radeon_fbdev_set_suspend(struct radeon_device *rdev, int state)
386{
Alex Deuchere5f243b2016-03-10 15:55:26 -0500387 if (rdev->mode_info.rfbdev)
Daniel Vetter9db7d2b2016-08-10 18:52:37 +0200388 drm_fb_helper_set_suspend(&rdev->mode_info.rfbdev->helper, state);
Dave Airlie38651672010-03-30 05:34:13 +0000389}
390
Dave Airlie38651672010-03-30 05:34:13 +0000391bool radeon_fbdev_robj_is_fb(struct radeon_device *rdev, struct radeon_bo *robj)
392{
Alex Deuchere5f243b2016-03-10 15:55:26 -0500393 if (!rdev->mode_info.rfbdev)
394 return false;
395
Daniel Stone9a0f0c92018-03-30 15:11:37 +0100396 if (robj == gem_to_radeon_bo(rdev->mode_info.rfbdev->fb.obj[0]))
Dave Airlie38651672010-03-30 05:34:13 +0000397 return true;
398 return false;
399}