Benjamin Gaignard | ef32b63 | 2019-12-17 10:07:15 +0100 | [diff] [blame] | 1 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/spi/st,stm32-spi.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: STMicroelectronics STM32 SPI Controller bindings |
| 8 | |
| 9 | description: | |
| 10 | The STM32 SPI controller is used to communicate with external devices using |
| 11 | the Serial Peripheral Interface. It supports full-duplex, half-duplex and |
| 12 | simplex synchronous serial communication with external devices. It supports |
| 13 | from 4 to 32-bit data size. |
| 14 | |
| 15 | maintainers: |
| 16 | - Erwan Leray <erwan.leray@st.com> |
| 17 | - Fabrice Gasnier <fabrice.gasnier@st.com> |
| 18 | |
| 19 | allOf: |
| 20 | - $ref: "spi-controller.yaml#" |
| 21 | - if: |
| 22 | properties: |
| 23 | compatible: |
| 24 | contains: |
| 25 | const: st,stm32f4-spi |
| 26 | |
| 27 | then: |
| 28 | properties: |
| 29 | st,spi-midi-ns: false |
| 30 | |
| 31 | properties: |
| 32 | compatible: |
| 33 | enum: |
| 34 | - st,stm32f4-spi |
| 35 | - st,stm32h7-spi |
| 36 | |
| 37 | reg: |
| 38 | maxItems: 1 |
| 39 | |
| 40 | clocks: |
| 41 | maxItems: 1 |
| 42 | |
| 43 | interrupts: |
| 44 | maxItems: 1 |
| 45 | |
| 46 | resets: |
| 47 | maxItems: 1 |
| 48 | |
| 49 | dmas: |
| 50 | description: | |
| 51 | DMA specifiers for tx and rx dma. DMA fifo mode must be used. See |
| 52 | the STM32 DMA bindings Documentation/devicetree/bindings/dma/stm32-dma.txt. |
| 53 | items: |
| 54 | - description: rx DMA channel |
| 55 | - description: tx DMA channel |
| 56 | |
| 57 | dma-names: |
| 58 | items: |
| 59 | - const: rx |
| 60 | - const: tx |
| 61 | |
| 62 | patternProperties: |
| 63 | "^[a-zA-Z][a-zA-Z0-9,+\\-._]{0,63}@[0-9a-f]+$": |
| 64 | type: object |
| 65 | # SPI slave nodes must be children of the SPI master node and can |
| 66 | # contain the following properties. |
| 67 | properties: |
| 68 | st,spi-midi-ns: |
| 69 | description: | |
| 70 | Only for STM32H7, (Master Inter-Data Idleness) minimum time |
| 71 | delay in nanoseconds inserted between two consecutive data frames. |
| 72 | |
| 73 | required: |
| 74 | - compatible |
| 75 | - reg |
| 76 | - clocks |
| 77 | - interrupts |
| 78 | |
| 79 | examples: |
| 80 | - | |
| 81 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
| 82 | #include <dt-bindings/clock/stm32mp1-clks.h> |
| 83 | #include <dt-bindings/reset/stm32mp1-resets.h> |
| 84 | spi@4000b000 { |
| 85 | #address-cells = <1>; |
| 86 | #size-cells = <0>; |
| 87 | compatible = "st,stm32h7-spi"; |
| 88 | reg = <0x4000b000 0x400>; |
| 89 | interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; |
| 90 | clocks = <&rcc SPI2_K>; |
| 91 | resets = <&rcc SPI2_R>; |
| 92 | dmas = <&dmamux1 0 39 0x400 0x05>, |
| 93 | <&dmamux1 1 40 0x400 0x05>; |
| 94 | dma-names = "rx", "tx"; |
| 95 | cs-gpios = <&gpioa 11 0>; |
| 96 | |
| 97 | aardvark@0 { |
| 98 | compatible = "totalphase,aardvark"; |
| 99 | reg = <0>; |
| 100 | spi-max-frequency = <4000000>; |
| 101 | st,spi-midi-ns = <4000>; |
| 102 | }; |
| 103 | }; |
| 104 | |
| 105 | ... |