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Thomas Gleixner2874c5f2019-05-27 08:55:01 +02001// SPDX-License-Identifier: GPL-2.0-or-later
Andrew Lunn2a4bd9f2013-02-05 22:52:51 +01002/*
3 * kirkwood_freq.c: cpufreq driver for the Marvell kirkwood
4 *
5 * Copyright (C) 2013 Andrew Lunn <andrew@lunn.ch>
Andrew Lunn2a4bd9f2013-02-05 22:52:51 +01006 */
7
8#include <linux/kernel.h>
9#include <linux/module.h>
10#include <linux/clk.h>
Andrew Lunn2a4bd9f2013-02-05 22:52:51 +010011#include <linux/cpufreq.h>
Sudeep KarkadaNageshae768f352013-06-17 15:09:51 +010012#include <linux/of_device.h>
Andrew Lunn2a4bd9f2013-02-05 22:52:51 +010013#include <linux/platform_device.h>
14#include <linux/io.h>
15#include <asm/proc-fns.h>
16
17#define CPU_SW_INT_BLK BIT(28)
18
19static struct priv
20{
21 struct clk *cpu_clk;
22 struct clk *ddr_clk;
23 struct clk *powersave_clk;
24 struct device *dev;
25 void __iomem *base;
26} priv;
27
28#define STATE_CPU_FREQ 0x01
29#define STATE_DDR_FREQ 0x02
30
31/*
32 * Kirkwood can swap the clock to the CPU between two clocks:
33 *
34 * - cpu clk
35 * - ddr clk
36 *
Mike Turquette10529932014-08-18 17:30:29 +020037 * The frequencies are set at runtime before registering this table.
Andrew Lunn2a4bd9f2013-02-05 22:52:51 +010038 */
39static struct cpufreq_frequency_table kirkwood_freq_table[] = {
Viresh Kumar7f4b0462014-03-28 19:11:47 +053040 {0, STATE_CPU_FREQ, 0}, /* CPU uses cpuclk */
41 {0, STATE_DDR_FREQ, 0}, /* CPU uses ddrclk */
42 {0, 0, CPUFREQ_TABLE_END},
Andrew Lunn2a4bd9f2013-02-05 22:52:51 +010043};
44
45static unsigned int kirkwood_cpufreq_get_cpu_frequency(unsigned int cpu)
46{
Mike Turquette10529932014-08-18 17:30:29 +020047 return clk_get_rate(priv.powersave_clk) / 1000;
Andrew Lunn2a4bd9f2013-02-05 22:52:51 +010048}
49
Viresh Kumar9c0ebcf2013-10-25 19:45:48 +053050static int kirkwood_cpufreq_target(struct cpufreq_policy *policy,
51 unsigned int index)
Andrew Lunn2a4bd9f2013-02-05 22:52:51 +010052{
Viresh Kumar50701582013-03-30 16:25:15 +053053 unsigned int state = kirkwood_freq_table[index].driver_data;
Andrew Lunn2a4bd9f2013-02-05 22:52:51 +010054 unsigned long reg;
55
Viresh Kumard4019f02013-08-14 19:38:24 +053056 local_irq_disable();
Andrew Lunn2a4bd9f2013-02-05 22:52:51 +010057
Viresh Kumard4019f02013-08-14 19:38:24 +053058 /* Disable interrupts to the CPU */
59 reg = readl_relaxed(priv.base);
60 reg |= CPU_SW_INT_BLK;
61 writel_relaxed(reg, priv.base);
Andrew Lunn2a4bd9f2013-02-05 22:52:51 +010062
Viresh Kumard4019f02013-08-14 19:38:24 +053063 switch (state) {
64 case STATE_CPU_FREQ:
Mike Turquette10529932014-08-18 17:30:29 +020065 clk_set_parent(priv.powersave_clk, priv.cpu_clk);
Viresh Kumard4019f02013-08-14 19:38:24 +053066 break;
67 case STATE_DDR_FREQ:
Mike Turquette10529932014-08-18 17:30:29 +020068 clk_set_parent(priv.powersave_clk, priv.ddr_clk);
Viresh Kumard4019f02013-08-14 19:38:24 +053069 break;
Andrew Lunn2a4bd9f2013-02-05 22:52:51 +010070 }
Viresh Kumard4019f02013-08-14 19:38:24 +053071
72 /* Wait-for-Interrupt, while the hardware changes frequency */
73 cpu_do_idle();
74
75 /* Enable interrupts to the CPU */
76 reg = readl_relaxed(priv.base);
77 reg &= ~CPU_SW_INT_BLK;
78 writel_relaxed(reg, priv.base);
79
80 local_irq_enable();
Andrew Lunn2a4bd9f2013-02-05 22:52:51 +010081
82 return 0;
83}
84
85/* Module init and exit code */
86static int kirkwood_cpufreq_cpu_init(struct cpufreq_policy *policy)
87{
Viresh Kumarc4dcc8a2019-07-16 09:36:08 +053088 cpufreq_generic_init(policy, kirkwood_freq_table, 5000);
89 return 0;
Andrew Lunn2a4bd9f2013-02-05 22:52:51 +010090}
91
Andrew Lunn2a4bd9f2013-02-05 22:52:51 +010092static struct cpufreq_driver kirkwood_cpufreq_driver = {
Viresh Kumarae6b4272013-12-03 11:20:45 +053093 .flags = CPUFREQ_NEED_INITIAL_FREQ_CHECK,
Andrew Lunn2a4bd9f2013-02-05 22:52:51 +010094 .get = kirkwood_cpufreq_get_cpu_frequency,
Viresh Kumara86a41a2013-10-03 20:28:09 +053095 .verify = cpufreq_generic_frequency_table_verify,
Viresh Kumar9c0ebcf2013-10-25 19:45:48 +053096 .target_index = kirkwood_cpufreq_target,
Andrew Lunn2a4bd9f2013-02-05 22:52:51 +010097 .init = kirkwood_cpufreq_cpu_init,
Andrew Lunn2a4bd9f2013-02-05 22:52:51 +010098 .name = "kirkwood-cpufreq",
Viresh Kumara86a41a2013-10-03 20:28:09 +053099 .attr = cpufreq_generic_attr,
Andrew Lunn2a4bd9f2013-02-05 22:52:51 +0100100};
101
102static int kirkwood_cpufreq_probe(struct platform_device *pdev)
103{
104 struct device_node *np;
Andrew Lunn2a4bd9f2013-02-05 22:52:51 +0100105 int err;
106
107 priv.dev = &pdev->dev;
108
Yangtao Liaf9c8e92019-12-15 14:05:21 +0000109 priv.base = devm_platform_ioremap_resource(pdev, 0);
Silviu-Mihai Popescucc721c42013-03-22 00:10:22 +0000110 if (IS_ERR(priv.base))
111 return PTR_ERR(priv.base);
Andrew Lunn2a4bd9f2013-02-05 22:52:51 +0100112
Sudeep KarkadaNageshae768f352013-06-17 15:09:51 +0100113 np = of_cpu_device_node_get(0);
114 if (!np) {
115 dev_err(&pdev->dev, "failed to get cpu device node\n");
Andrew Lunn2a4bd9f2013-02-05 22:52:51 +0100116 return -ENODEV;
Sudeep KarkadaNageshae768f352013-06-17 15:09:51 +0100117 }
Andrew Lunn2a4bd9f2013-02-05 22:52:51 +0100118
119 priv.cpu_clk = of_clk_get_by_name(np, "cpu_clk");
120 if (IS_ERR(priv.cpu_clk)) {
Colin Ian King4c232f92016-09-25 14:35:43 -0700121 dev_err(priv.dev, "Unable to get cpuclk\n");
Wen Yang7c468962019-04-01 09:37:50 +0800122 err = PTR_ERR(priv.cpu_clk);
123 goto out_node;
Andrew Lunn2a4bd9f2013-02-05 22:52:51 +0100124 }
125
Arvind Yadav7575f822017-05-17 12:20:35 +0530126 err = clk_prepare_enable(priv.cpu_clk);
127 if (err) {
128 dev_err(priv.dev, "Unable to prepare cpuclk\n");
Wen Yang7c468962019-04-01 09:37:50 +0800129 goto out_node;
Arvind Yadav7575f822017-05-17 12:20:35 +0530130 }
131
Andrew Lunn2a4bd9f2013-02-05 22:52:51 +0100132 kirkwood_freq_table[0].frequency = clk_get_rate(priv.cpu_clk) / 1000;
133
134 priv.ddr_clk = of_clk_get_by_name(np, "ddrclk");
135 if (IS_ERR(priv.ddr_clk)) {
Colin Ian King4c232f92016-09-25 14:35:43 -0700136 dev_err(priv.dev, "Unable to get ddrclk\n");
Andrew Lunn2a4bd9f2013-02-05 22:52:51 +0100137 err = PTR_ERR(priv.ddr_clk);
138 goto out_cpu;
139 }
140
Arvind Yadav7575f822017-05-17 12:20:35 +0530141 err = clk_prepare_enable(priv.ddr_clk);
142 if (err) {
143 dev_err(priv.dev, "Unable to prepare ddrclk\n");
144 goto out_cpu;
145 }
Andrew Lunn2a4bd9f2013-02-05 22:52:51 +0100146 kirkwood_freq_table[1].frequency = clk_get_rate(priv.ddr_clk) / 1000;
147
148 priv.powersave_clk = of_clk_get_by_name(np, "powersave");
149 if (IS_ERR(priv.powersave_clk)) {
Colin Ian King4c232f92016-09-25 14:35:43 -0700150 dev_err(priv.dev, "Unable to get powersave\n");
Andrew Lunn2a4bd9f2013-02-05 22:52:51 +0100151 err = PTR_ERR(priv.powersave_clk);
152 goto out_ddr;
153 }
Arvind Yadav7575f822017-05-17 12:20:35 +0530154 err = clk_prepare_enable(priv.powersave_clk);
155 if (err) {
156 dev_err(priv.dev, "Unable to prepare powersave clk\n");
157 goto out_ddr;
158 }
Andrew Lunn2a4bd9f2013-02-05 22:52:51 +0100159
Andrew Lunn2a4bd9f2013-02-05 22:52:51 +0100160 err = cpufreq_register_driver(&kirkwood_cpufreq_driver);
Wen Yang7c468962019-04-01 09:37:50 +0800161 if (err) {
162 dev_err(priv.dev, "Failed to register cpufreq driver\n");
163 goto out_powersave;
164 }
Andrew Lunn2a4bd9f2013-02-05 22:52:51 +0100165
Wen Yang7c468962019-04-01 09:37:50 +0800166 of_node_put(np);
167 return 0;
Andrew Lunn2a4bd9f2013-02-05 22:52:51 +0100168
Wen Yang7c468962019-04-01 09:37:50 +0800169out_powersave:
Andrew Lunn2a4bd9f2013-02-05 22:52:51 +0100170 clk_disable_unprepare(priv.powersave_clk);
171out_ddr:
172 clk_disable_unprepare(priv.ddr_clk);
173out_cpu:
174 clk_disable_unprepare(priv.cpu_clk);
Wen Yang7c468962019-04-01 09:37:50 +0800175out_node:
Andrew Lunn2a4bd9f2013-02-05 22:52:51 +0100176 of_node_put(np);
177
178 return err;
179}
180
181static int kirkwood_cpufreq_remove(struct platform_device *pdev)
182{
183 cpufreq_unregister_driver(&kirkwood_cpufreq_driver);
184
185 clk_disable_unprepare(priv.powersave_clk);
186 clk_disable_unprepare(priv.ddr_clk);
187 clk_disable_unprepare(priv.cpu_clk);
188
189 return 0;
190}
191
192static struct platform_driver kirkwood_cpufreq_platform_driver = {
193 .probe = kirkwood_cpufreq_probe,
194 .remove = kirkwood_cpufreq_remove,
195 .driver = {
196 .name = "kirkwood-cpufreq",
Andrew Lunn2a4bd9f2013-02-05 22:52:51 +0100197 },
198};
199
200module_platform_driver(kirkwood_cpufreq_platform_driver);
201
202MODULE_LICENSE("GPL v2");
203MODULE_AUTHOR("Andrew Lunn <andrew@lunn.ch");
204MODULE_DESCRIPTION("cpufreq driver for Marvell's kirkwood CPU");
205MODULE_ALIAS("platform:kirkwood-cpufreq");