Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 1 | /* |
| 2 | * QLogic Fibre Channel HBA Driver |
| 3 | * Copyright (c) 2003-2017 QLogic Corporation |
| 4 | * |
| 5 | * See LICENSE.qla2xxx for copyright and licensing details. |
| 6 | */ |
| 7 | #include "qla_nvme.h" |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 8 | #include <linux/scatterlist.h> |
| 9 | #include <linux/delay.h> |
| 10 | #include <linux/nvme.h> |
| 11 | #include <linux/nvme-fc.h> |
| 12 | |
| 13 | static struct nvme_fc_port_template qla_nvme_fc_transport; |
| 14 | |
himanshu.madhani@cavium.com | 0f7e51f | 2017-07-21 09:32:24 -0700 | [diff] [blame] | 15 | int qla_nvme_register_remote(struct scsi_qla_host *vha, struct fc_port *fcport) |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 16 | { |
Darren Trapp | 9dd9686 | 2018-03-20 23:09:32 -0700 | [diff] [blame] | 17 | struct qla_nvme_rport *rport; |
| 18 | struct nvme_fc_port_info req; |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 19 | int ret; |
| 20 | |
Arnd Bergmann | bcda771 | 2017-06-30 18:10:40 +0200 | [diff] [blame] | 21 | if (!IS_ENABLED(CONFIG_NVME_FC)) |
| 22 | return 0; |
| 23 | |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 24 | if (!vha->flags.nvme_enabled) { |
| 25 | ql_log(ql_log_info, vha, 0x2100, |
| 26 | "%s: Not registering target since Host NVME is not enabled\n", |
| 27 | __func__); |
| 28 | return 0; |
| 29 | } |
| 30 | |
Quinn Tran | 8777e43 | 2018-08-02 13:16:57 -0700 | [diff] [blame] | 31 | if (!vha->nvme_local_port && qla_nvme_register_hba(vha)) |
| 32 | return 0; |
| 33 | |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 34 | if (!(fcport->nvme_prli_service_param & |
Darren Trapp | 9dd9686 | 2018-03-20 23:09:32 -0700 | [diff] [blame] | 35 | (NVME_PRLI_SP_TARGET | NVME_PRLI_SP_DISCOVERY)) || |
| 36 | (fcport->nvme_flag & NVME_FLAG_REGISTERED)) |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 37 | return 0; |
| 38 | |
Darren Trapp | 870fe24 | 2018-03-20 23:09:35 -0700 | [diff] [blame] | 39 | fcport->nvme_flag &= ~NVME_FLAG_RESETTING; |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 40 | |
Darren Trapp | 9dd9686 | 2018-03-20 23:09:32 -0700 | [diff] [blame] | 41 | memset(&req, 0, sizeof(struct nvme_fc_port_info)); |
| 42 | req.port_name = wwn_to_u64(fcport->port_name); |
| 43 | req.node_name = wwn_to_u64(fcport->node_name); |
| 44 | req.port_role = 0; |
| 45 | req.dev_loss_tmo = NVME_FC_DEV_LOSS_TMO; |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 46 | |
| 47 | if (fcport->nvme_prli_service_param & NVME_PRLI_SP_INITIATOR) |
Darren Trapp | 9dd9686 | 2018-03-20 23:09:32 -0700 | [diff] [blame] | 48 | req.port_role = FC_PORT_ROLE_NVME_INITIATOR; |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 49 | |
| 50 | if (fcport->nvme_prli_service_param & NVME_PRLI_SP_TARGET) |
Darren Trapp | 9dd9686 | 2018-03-20 23:09:32 -0700 | [diff] [blame] | 51 | req.port_role |= FC_PORT_ROLE_NVME_TARGET; |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 52 | |
| 53 | if (fcport->nvme_prli_service_param & NVME_PRLI_SP_DISCOVERY) |
Darren Trapp | 9dd9686 | 2018-03-20 23:09:32 -0700 | [diff] [blame] | 54 | req.port_role |= FC_PORT_ROLE_NVME_DISCOVERY; |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 55 | |
Darren Trapp | 9dd9686 | 2018-03-20 23:09:32 -0700 | [diff] [blame] | 56 | req.port_id = fcport->d_id.b24; |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 57 | |
| 58 | ql_log(ql_log_info, vha, 0x2102, |
Darren Trap | d7936a9 | 2017-08-23 15:04:59 -0700 | [diff] [blame] | 59 | "%s: traddr=nn-0x%016llx:pn-0x%016llx PortID:%06x\n", |
Darren Trapp | 9dd9686 | 2018-03-20 23:09:32 -0700 | [diff] [blame] | 60 | __func__, req.node_name, req.port_name, |
| 61 | req.port_id); |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 62 | |
Darren Trapp | 9dd9686 | 2018-03-20 23:09:32 -0700 | [diff] [blame] | 63 | ret = nvme_fc_register_remoteport(vha->nvme_local_port, &req, |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 64 | &fcport->nvme_remote_port); |
| 65 | if (ret) { |
| 66 | ql_log(ql_log_warn, vha, 0x212e, |
| 67 | "Failed to register remote port. Transport returned %d\n", |
| 68 | ret); |
| 69 | return ret; |
| 70 | } |
| 71 | |
Darren Trapp | 9dd9686 | 2018-03-20 23:09:32 -0700 | [diff] [blame] | 72 | rport = fcport->nvme_remote_port->private; |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 73 | rport->fcport = fcport; |
Darren Trapp | 9dd9686 | 2018-03-20 23:09:32 -0700 | [diff] [blame] | 74 | |
| 75 | fcport->nvme_flag |= NVME_FLAG_REGISTERED; |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 76 | return 0; |
| 77 | } |
| 78 | |
| 79 | /* Allocate a queue for NVMe traffic */ |
himanshu.madhani@cavium.com | 6fcd98f | 2017-07-21 09:32:23 -0700 | [diff] [blame] | 80 | static int qla_nvme_alloc_queue(struct nvme_fc_local_port *lport, |
| 81 | unsigned int qidx, u16 qsize, void **handle) |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 82 | { |
| 83 | struct scsi_qla_host *vha; |
| 84 | struct qla_hw_data *ha; |
| 85 | struct qla_qpair *qpair; |
| 86 | |
| 87 | if (!qidx) |
| 88 | qidx++; |
| 89 | |
| 90 | vha = (struct scsi_qla_host *)lport->private; |
| 91 | ha = vha->hw; |
| 92 | |
| 93 | ql_log(ql_log_info, vha, 0x2104, |
| 94 | "%s: handle %p, idx =%d, qsize %d\n", |
| 95 | __func__, handle, qidx, qsize); |
| 96 | |
| 97 | if (qidx > qla_nvme_fc_transport.max_hw_queues) { |
| 98 | ql_log(ql_log_warn, vha, 0x212f, |
| 99 | "%s: Illegal qidx=%d. Max=%d\n", |
| 100 | __func__, qidx, qla_nvme_fc_transport.max_hw_queues); |
| 101 | return -EINVAL; |
| 102 | } |
| 103 | |
| 104 | if (ha->queue_pair_map[qidx]) { |
| 105 | *handle = ha->queue_pair_map[qidx]; |
| 106 | ql_log(ql_log_info, vha, 0x2121, |
| 107 | "Returning existing qpair of %p for idx=%x\n", |
| 108 | *handle, qidx); |
| 109 | return 0; |
| 110 | } |
| 111 | |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 112 | qpair = qla2xxx_create_qpair(vha, 5, vha->vp_idx, true); |
| 113 | if (qpair == NULL) { |
| 114 | ql_log(ql_log_warn, vha, 0x2122, |
| 115 | "Failed to allocate qpair\n"); |
| 116 | return -EINVAL; |
| 117 | } |
| 118 | *handle = qpair; |
| 119 | |
| 120 | return 0; |
| 121 | } |
| 122 | |
Quinn Tran | 4c2a2d0 | 2019-06-21 09:50:24 -0700 | [diff] [blame] | 123 | static void qla_nvme_release_fcp_cmd_kref(struct kref *kref) |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 124 | { |
Quinn Tran | 4c2a2d0 | 2019-06-21 09:50:24 -0700 | [diff] [blame] | 125 | struct srb *sp = container_of(kref, struct srb, cmd_kref); |
| 126 | struct nvme_private *priv = (struct nvme_private *)sp->priv; |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 127 | struct nvmefc_fcp_req *fd; |
Quinn Tran | 4c2a2d0 | 2019-06-21 09:50:24 -0700 | [diff] [blame] | 128 | struct srb_iocb *nvme; |
| 129 | unsigned long flags; |
| 130 | |
| 131 | if (!priv) |
| 132 | goto out; |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 133 | |
| 134 | nvme = &sp->u.iocb_cmd; |
| 135 | fd = nvme->u.nvme.desc; |
| 136 | |
Quinn Tran | 4c2a2d0 | 2019-06-21 09:50:24 -0700 | [diff] [blame] | 137 | spin_lock_irqsave(&priv->cmd_lock, flags); |
| 138 | priv->sp = NULL; |
| 139 | sp->priv = NULL; |
| 140 | if (priv->comp_status == QLA_SUCCESS) { |
Bart Van Assche | 7ffa5b9 | 2020-05-18 14:17:12 -0700 | [diff] [blame^] | 141 | fd->rcv_rsplen = le16_to_cpu(nvme->u.nvme.rsp_pyld_len); |
Giridhar Malavali | b2d1453a | 2019-04-02 14:24:32 -0700 | [diff] [blame] | 142 | } else { |
| 143 | fd->rcv_rsplen = 0; |
| 144 | fd->transferred_length = 0; |
| 145 | } |
| 146 | fd->status = 0; |
Quinn Tran | 4c2a2d0 | 2019-06-21 09:50:24 -0700 | [diff] [blame] | 147 | spin_unlock_irqrestore(&priv->cmd_lock, flags); |
| 148 | |
Darren Trapp | 2e4c5d2 | 2018-03-20 23:09:36 -0700 | [diff] [blame] | 149 | fd->done(fd); |
Quinn Tran | 4c2a2d0 | 2019-06-21 09:50:24 -0700 | [diff] [blame] | 150 | out: |
Darren Trapp | 2e4c5d2 | 2018-03-20 23:09:36 -0700 | [diff] [blame] | 151 | qla2xxx_rel_qpair_sp(sp->qpair, sp); |
Quinn Tran | 4c2a2d0 | 2019-06-21 09:50:24 -0700 | [diff] [blame] | 152 | } |
| 153 | |
| 154 | static void qla_nvme_release_ls_cmd_kref(struct kref *kref) |
| 155 | { |
| 156 | struct srb *sp = container_of(kref, struct srb, cmd_kref); |
| 157 | struct nvme_private *priv = (struct nvme_private *)sp->priv; |
| 158 | struct nvmefc_ls_req *fd; |
| 159 | unsigned long flags; |
| 160 | |
| 161 | if (!priv) |
| 162 | goto out; |
| 163 | |
| 164 | spin_lock_irqsave(&priv->cmd_lock, flags); |
| 165 | priv->sp = NULL; |
| 166 | sp->priv = NULL; |
| 167 | spin_unlock_irqrestore(&priv->cmd_lock, flags); |
| 168 | |
| 169 | fd = priv->fd; |
| 170 | fd->done(fd, priv->comp_status); |
| 171 | out: |
| 172 | qla2x00_rel_sp(sp); |
| 173 | } |
| 174 | |
| 175 | static void qla_nvme_ls_complete(struct work_struct *work) |
| 176 | { |
| 177 | struct nvme_private *priv = |
| 178 | container_of(work, struct nvme_private, ls_work); |
| 179 | |
| 180 | kref_put(&priv->sp->cmd_kref, qla_nvme_release_ls_cmd_kref); |
| 181 | } |
| 182 | |
Bart Van Assche | 6c18a43 | 2019-08-08 20:02:04 -0700 | [diff] [blame] | 183 | static void qla_nvme_sp_ls_done(srb_t *sp, int res) |
Quinn Tran | 4c2a2d0 | 2019-06-21 09:50:24 -0700 | [diff] [blame] | 184 | { |
Bart Van Assche | 6c18a43 | 2019-08-08 20:02:04 -0700 | [diff] [blame] | 185 | struct nvme_private *priv = sp->priv; |
Quinn Tran | 4c2a2d0 | 2019-06-21 09:50:24 -0700 | [diff] [blame] | 186 | |
| 187 | if (WARN_ON_ONCE(kref_read(&sp->cmd_kref) == 0)) |
| 188 | return; |
| 189 | |
| 190 | if (res) |
| 191 | res = -EINVAL; |
| 192 | |
Quinn Tran | 4c2a2d0 | 2019-06-21 09:50:24 -0700 | [diff] [blame] | 193 | priv->comp_status = res; |
| 194 | INIT_WORK(&priv->ls_work, qla_nvme_ls_complete); |
| 195 | schedule_work(&priv->ls_work); |
| 196 | } |
| 197 | |
| 198 | /* it assumed that QPair lock is held. */ |
Bart Van Assche | 6c18a43 | 2019-08-08 20:02:04 -0700 | [diff] [blame] | 199 | static void qla_nvme_sp_done(srb_t *sp, int res) |
Quinn Tran | 4c2a2d0 | 2019-06-21 09:50:24 -0700 | [diff] [blame] | 200 | { |
Bart Van Assche | 6c18a43 | 2019-08-08 20:02:04 -0700 | [diff] [blame] | 201 | struct nvme_private *priv = sp->priv; |
Quinn Tran | 4c2a2d0 | 2019-06-21 09:50:24 -0700 | [diff] [blame] | 202 | |
| 203 | priv->comp_status = res; |
| 204 | kref_put(&sp->cmd_kref, qla_nvme_release_fcp_cmd_kref); |
Darren Trapp | 9dd9686 | 2018-03-20 23:09:32 -0700 | [diff] [blame] | 205 | |
Duane Grigsby | cf19c45 | 2017-08-23 15:04:58 -0700 | [diff] [blame] | 206 | return; |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 207 | } |
| 208 | |
Darren Trapp | e473b30 | 2018-03-20 23:09:33 -0700 | [diff] [blame] | 209 | static void qla_nvme_abort_work(struct work_struct *work) |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 210 | { |
Darren Trapp | e473b30 | 2018-03-20 23:09:33 -0700 | [diff] [blame] | 211 | struct nvme_private *priv = |
| 212 | container_of(work, struct nvme_private, abort_work); |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 213 | srb_t *sp = priv->sp; |
Darren Trapp | e473b30 | 2018-03-20 23:09:33 -0700 | [diff] [blame] | 214 | fc_port_t *fcport = sp->fcport; |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 215 | struct qla_hw_data *ha = fcport->vha->hw; |
Darren Trapp | e473b30 | 2018-03-20 23:09:33 -0700 | [diff] [blame] | 216 | int rval; |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 217 | |
Bart Van Assche | dafbe56 | 2019-04-17 14:44:18 -0700 | [diff] [blame] | 218 | ql_dbg(ql_dbg_io, fcport->vha, 0xffff, |
| 219 | "%s called for sp=%p, hndl=%x on fcport=%p deleted=%d\n", |
| 220 | __func__, sp, sp->handle, fcport, fcport->deleted); |
Himanshu Madhani | 471f8e0 | 2019-02-15 14:37:15 -0800 | [diff] [blame] | 221 | |
Bart Van Assche | 53be100 | 2019-08-08 20:01:37 -0700 | [diff] [blame] | 222 | if (!ha->flags.fw_started && fcport->deleted) |
Quinn Tran | 4c2a2d0 | 2019-06-21 09:50:24 -0700 | [diff] [blame] | 223 | goto out; |
Himanshu Madhani | 471f8e0 | 2019-02-15 14:37:15 -0800 | [diff] [blame] | 224 | |
Giridhar Malavali | b2d1453a | 2019-04-02 14:24:32 -0700 | [diff] [blame] | 225 | if (ha->flags.host_shutting_down) { |
| 226 | ql_log(ql_log_info, sp->fcport->vha, 0xffff, |
Quinn Tran | f45bca8 | 2019-11-05 07:06:54 -0800 | [diff] [blame] | 227 | "%s Calling done on sp: %p, type: 0x%x\n", |
| 228 | __func__, sp, sp->type); |
Giridhar Malavali | b2d1453a | 2019-04-02 14:24:32 -0700 | [diff] [blame] | 229 | sp->done(sp, 0); |
Quinn Tran | 4c2a2d0 | 2019-06-21 09:50:24 -0700 | [diff] [blame] | 230 | goto out; |
Giridhar Malavali | b2d1453a | 2019-04-02 14:24:32 -0700 | [diff] [blame] | 231 | } |
| 232 | |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 233 | rval = ha->isp_ops->abort_command(sp); |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 234 | |
| 235 | ql_dbg(ql_dbg_io, fcport->vha, 0x212b, |
Darren Trapp | 870fe24 | 2018-03-20 23:09:35 -0700 | [diff] [blame] | 236 | "%s: %s command for sp=%p, handle=%x on fcport=%p rval=%x\n", |
| 237 | __func__, (rval != QLA_SUCCESS) ? "Failed to abort" : "Aborted", |
| 238 | sp, sp->handle, fcport, rval); |
Quinn Tran | 4c2a2d0 | 2019-06-21 09:50:24 -0700 | [diff] [blame] | 239 | |
| 240 | out: |
| 241 | /* kref_get was done before work was schedule. */ |
| 242 | kref_put(&sp->cmd_kref, sp->put_fn); |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 243 | } |
| 244 | |
Darren Trapp | e473b30 | 2018-03-20 23:09:33 -0700 | [diff] [blame] | 245 | static void qla_nvme_ls_abort(struct nvme_fc_local_port *lport, |
| 246 | struct nvme_fc_remote_port *rport, struct nvmefc_ls_req *fd) |
| 247 | { |
| 248 | struct nvme_private *priv = fd->private; |
Quinn Tran | 4c2a2d0 | 2019-06-21 09:50:24 -0700 | [diff] [blame] | 249 | unsigned long flags; |
| 250 | |
| 251 | spin_lock_irqsave(&priv->cmd_lock, flags); |
| 252 | if (!priv->sp) { |
| 253 | spin_unlock_irqrestore(&priv->cmd_lock, flags); |
| 254 | return; |
| 255 | } |
| 256 | |
| 257 | if (!kref_get_unless_zero(&priv->sp->cmd_kref)) { |
| 258 | spin_unlock_irqrestore(&priv->cmd_lock, flags); |
| 259 | return; |
| 260 | } |
| 261 | spin_unlock_irqrestore(&priv->cmd_lock, flags); |
Darren Trapp | e473b30 | 2018-03-20 23:09:33 -0700 | [diff] [blame] | 262 | |
| 263 | INIT_WORK(&priv->abort_work, qla_nvme_abort_work); |
| 264 | schedule_work(&priv->abort_work); |
| 265 | } |
| 266 | |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 267 | static int qla_nvme_ls_req(struct nvme_fc_local_port *lport, |
| 268 | struct nvme_fc_remote_port *rport, struct nvmefc_ls_req *fd) |
| 269 | { |
Darren Trapp | 9dd9686 | 2018-03-20 23:09:32 -0700 | [diff] [blame] | 270 | struct qla_nvme_rport *qla_rport = rport->private; |
| 271 | fc_port_t *fcport = qla_rport->fcport; |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 272 | struct srb_iocb *nvme; |
| 273 | struct nvme_private *priv = fd->private; |
| 274 | struct scsi_qla_host *vha; |
| 275 | int rval = QLA_FUNCTION_FAILED; |
| 276 | struct qla_hw_data *ha; |
| 277 | srb_t *sp; |
| 278 | |
Quinn Tran | 2eb9238 | 2019-06-21 09:50:23 -0700 | [diff] [blame] | 279 | |
| 280 | if (!fcport || (fcport && fcport->deleted)) |
| 281 | return rval; |
| 282 | |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 283 | vha = fcport->vha; |
| 284 | ha = vha->hw; |
Quinn Tran | 2eb9238 | 2019-06-21 09:50:23 -0700 | [diff] [blame] | 285 | |
| 286 | if (!ha->flags.fw_started) |
| 287 | return rval; |
| 288 | |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 289 | /* Alloc SRB structure */ |
| 290 | sp = qla2x00_get_sp(vha, fcport, GFP_ATOMIC); |
| 291 | if (!sp) |
| 292 | return rval; |
| 293 | |
| 294 | sp->type = SRB_NVME_LS; |
| 295 | sp->name = "nvme_ls"; |
| 296 | sp->done = qla_nvme_sp_ls_done; |
Quinn Tran | 4c2a2d0 | 2019-06-21 09:50:24 -0700 | [diff] [blame] | 297 | sp->put_fn = qla_nvme_release_ls_cmd_kref; |
Bart Van Assche | ab053c0 | 2020-05-18 14:17:09 -0700 | [diff] [blame] | 298 | sp->priv = priv; |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 299 | priv->sp = sp; |
Quinn Tran | 4c2a2d0 | 2019-06-21 09:50:24 -0700 | [diff] [blame] | 300 | kref_init(&sp->cmd_kref); |
| 301 | spin_lock_init(&priv->cmd_lock); |
| 302 | nvme = &sp->u.iocb_cmd; |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 303 | priv->fd = fd; |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 304 | nvme->u.nvme.desc = fd; |
| 305 | nvme->u.nvme.dir = 0; |
| 306 | nvme->u.nvme.dl = 0; |
| 307 | nvme->u.nvme.cmd_len = fd->rqstlen; |
| 308 | nvme->u.nvme.rsp_len = fd->rsplen; |
| 309 | nvme->u.nvme.rsp_dma = fd->rspdma; |
| 310 | nvme->u.nvme.timeout_sec = fd->timeout; |
| 311 | nvme->u.nvme.cmd_dma = dma_map_single(&ha->pdev->dev, fd->rqstaddr, |
| 312 | fd->rqstlen, DMA_TO_DEVICE); |
| 313 | dma_sync_single_for_device(&ha->pdev->dev, nvme->u.nvme.cmd_dma, |
| 314 | fd->rqstlen, DMA_TO_DEVICE); |
| 315 | |
| 316 | rval = qla2x00_start_sp(sp); |
| 317 | if (rval != QLA_SUCCESS) { |
| 318 | ql_log(ql_log_warn, vha, 0x700e, |
| 319 | "qla2x00_start_sp failed = %d\n", rval); |
himanshu.madhani@cavium.com | 6fcd98f | 2017-07-21 09:32:23 -0700 | [diff] [blame] | 320 | wake_up(&sp->nvme_ls_waitq); |
Quinn Tran | 4c2a2d0 | 2019-06-21 09:50:24 -0700 | [diff] [blame] | 321 | sp->priv = NULL; |
| 322 | priv->sp = NULL; |
| 323 | qla2x00_rel_sp(sp); |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 324 | return rval; |
| 325 | } |
| 326 | |
| 327 | return rval; |
| 328 | } |
| 329 | |
| 330 | static void qla_nvme_fcp_abort(struct nvme_fc_local_port *lport, |
| 331 | struct nvme_fc_remote_port *rport, void *hw_queue_handle, |
| 332 | struct nvmefc_fcp_req *fd) |
| 333 | { |
| 334 | struct nvme_private *priv = fd->private; |
Quinn Tran | 4c2a2d0 | 2019-06-21 09:50:24 -0700 | [diff] [blame] | 335 | unsigned long flags; |
| 336 | |
| 337 | spin_lock_irqsave(&priv->cmd_lock, flags); |
| 338 | if (!priv->sp) { |
| 339 | spin_unlock_irqrestore(&priv->cmd_lock, flags); |
| 340 | return; |
| 341 | } |
| 342 | if (!kref_get_unless_zero(&priv->sp->cmd_kref)) { |
| 343 | spin_unlock_irqrestore(&priv->cmd_lock, flags); |
| 344 | return; |
| 345 | } |
| 346 | spin_unlock_irqrestore(&priv->cmd_lock, flags); |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 347 | |
Darren Trapp | e473b30 | 2018-03-20 23:09:33 -0700 | [diff] [blame] | 348 | INIT_WORK(&priv->abort_work, qla_nvme_abort_work); |
| 349 | schedule_work(&priv->abort_work); |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 350 | } |
| 351 | |
Darren Trapp | 60dd6e8e | 2018-03-20 23:09:39 -0700 | [diff] [blame] | 352 | static inline int qla2x00_start_nvme_mq(srb_t *sp) |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 353 | { |
| 354 | unsigned long flags; |
| 355 | uint32_t *clr_ptr; |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 356 | uint32_t handle; |
| 357 | struct cmd_nvme *cmd_pkt; |
| 358 | uint16_t cnt, i; |
| 359 | uint16_t req_cnt; |
| 360 | uint16_t tot_dsds; |
| 361 | uint16_t avail_dsds; |
Bart Van Assche | 15b7a68 | 2019-04-17 14:44:38 -0700 | [diff] [blame] | 362 | struct dsd64 *cur_dsd; |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 363 | struct req_que *req = NULL; |
| 364 | struct scsi_qla_host *vha = sp->fcport->vha; |
| 365 | struct qla_hw_data *ha = vha->hw; |
| 366 | struct qla_qpair *qpair = sp->qpair; |
| 367 | struct srb_iocb *nvme = &sp->u.iocb_cmd; |
| 368 | struct scatterlist *sgl, *sg; |
| 369 | struct nvmefc_fcp_req *fd = nvme->u.nvme.desc; |
| 370 | uint32_t rval = QLA_SUCCESS; |
| 371 | |
himanshu.madhani@cavium.com | 1d4614e | 2018-03-20 23:09:30 -0700 | [diff] [blame] | 372 | /* Setup qpair pointers */ |
| 373 | req = qpair->req; |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 374 | tot_dsds = fd->sg_cnt; |
| 375 | |
| 376 | /* Acquire qpair specific lock */ |
| 377 | spin_lock_irqsave(&qpair->qp_lock, flags); |
| 378 | |
Bart Van Assche | bcc8565 | 2019-08-08 20:02:09 -0700 | [diff] [blame] | 379 | handle = qla2xxx_get_next_handle(req); |
| 380 | if (handle == 0) { |
Darren Trapp | 870fe24 | 2018-03-20 23:09:35 -0700 | [diff] [blame] | 381 | rval = -EBUSY; |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 382 | goto queuing_error; |
| 383 | } |
| 384 | req_cnt = qla24xx_calc_iocbs(vha, tot_dsds); |
| 385 | if (req->cnt < (req_cnt + 2)) { |
| 386 | cnt = IS_SHADOW_REG_CAPABLE(ha) ? *req->out_ptr : |
Bart Van Assche | 04474d3 | 2020-05-18 14:17:08 -0700 | [diff] [blame] | 387 | rd_reg_dword_relaxed(req->req_q_out); |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 388 | |
| 389 | if (req->ring_index < cnt) |
| 390 | req->cnt = cnt - req->ring_index; |
| 391 | else |
| 392 | req->cnt = req->length - (req->ring_index - cnt); |
| 393 | |
| 394 | if (req->cnt < (req_cnt + 2)){ |
Darren Trapp | 870fe24 | 2018-03-20 23:09:35 -0700 | [diff] [blame] | 395 | rval = -EBUSY; |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 396 | goto queuing_error; |
| 397 | } |
| 398 | } |
| 399 | |
| 400 | if (unlikely(!fd->sqid)) { |
| 401 | struct nvme_fc_cmd_iu *cmd = fd->cmdaddr; |
Bart Van Assche | bd432bb | 2019-04-11 14:53:17 -0700 | [diff] [blame] | 402 | |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 403 | if (cmd->sqe.common.opcode == nvme_admin_async_event) { |
| 404 | nvme->u.nvme.aen_op = 1; |
himanshu.madhani@cavium.com | 1d4614e | 2018-03-20 23:09:30 -0700 | [diff] [blame] | 405 | atomic_inc(&ha->nvme_active_aen_cnt); |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 406 | } |
| 407 | } |
| 408 | |
| 409 | /* Build command packet. */ |
| 410 | req->current_outstanding_cmd = handle; |
| 411 | req->outstanding_cmds[handle] = sp; |
| 412 | sp->handle = handle; |
| 413 | req->cnt -= req_cnt; |
| 414 | |
| 415 | cmd_pkt = (struct cmd_nvme *)req->ring_ptr; |
Bart Van Assche | c25eb70 | 2020-02-19 20:34:40 -0800 | [diff] [blame] | 416 | cmd_pkt->handle = make_handle(req->id, handle); |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 417 | |
| 418 | /* Zero out remaining portion of packet. */ |
| 419 | clr_ptr = (uint32_t *)cmd_pkt + 2; |
| 420 | memset(clr_ptr, 0, REQUEST_ENTRY_SIZE - 8); |
| 421 | |
| 422 | cmd_pkt->entry_status = 0; |
| 423 | |
| 424 | /* Update entry type to indicate Command NVME IOCB */ |
| 425 | cmd_pkt->entry_type = COMMAND_NVME; |
| 426 | |
| 427 | /* No data transfer how do we check buffer len == 0?? */ |
| 428 | if (fd->io_dir == NVMEFC_FCP_READ) { |
Bart Van Assche | 7ffa5b9 | 2020-05-18 14:17:12 -0700 | [diff] [blame^] | 429 | cmd_pkt->control_flags = cpu_to_le16(CF_READ_DATA); |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 430 | vha->qla_stats.input_bytes += fd->payload_length; |
| 431 | vha->qla_stats.input_requests++; |
| 432 | } else if (fd->io_dir == NVMEFC_FCP_WRITE) { |
Bart Van Assche | 7ffa5b9 | 2020-05-18 14:17:12 -0700 | [diff] [blame^] | 433 | cmd_pkt->control_flags = cpu_to_le16(CF_WRITE_DATA); |
Darren Trapp | 03aaa89 | 2019-02-15 14:37:13 -0800 | [diff] [blame] | 434 | if ((vha->flags.nvme_first_burst) && |
| 435 | (sp->fcport->nvme_prli_service_param & |
| 436 | NVME_PRLI_SP_FIRST_BURST)) { |
| 437 | if ((fd->payload_length <= |
| 438 | sp->fcport->nvme_first_burst_size) || |
| 439 | (sp->fcport->nvme_first_burst_size == 0)) |
| 440 | cmd_pkt->control_flags |= |
Bart Van Assche | 7ffa5b9 | 2020-05-18 14:17:12 -0700 | [diff] [blame^] | 441 | cpu_to_le16(CF_NVME_FIRST_BURST_ENABLE); |
Darren Trapp | 03aaa89 | 2019-02-15 14:37:13 -0800 | [diff] [blame] | 442 | } |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 443 | vha->qla_stats.output_bytes += fd->payload_length; |
| 444 | vha->qla_stats.output_requests++; |
| 445 | } else if (fd->io_dir == 0) { |
Darren Trapp | 03aaa89 | 2019-02-15 14:37:13 -0800 | [diff] [blame] | 446 | cmd_pkt->control_flags = 0; |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 447 | } |
| 448 | |
| 449 | /* Set NPORT-ID */ |
| 450 | cmd_pkt->nport_handle = cpu_to_le16(sp->fcport->loop_id); |
| 451 | cmd_pkt->port_id[0] = sp->fcport->d_id.b.al_pa; |
| 452 | cmd_pkt->port_id[1] = sp->fcport->d_id.b.area; |
| 453 | cmd_pkt->port_id[2] = sp->fcport->d_id.b.domain; |
| 454 | cmd_pkt->vp_index = sp->fcport->vha->vp_idx; |
| 455 | |
| 456 | /* NVME RSP IU */ |
| 457 | cmd_pkt->nvme_rsp_dsd_len = cpu_to_le16(fd->rsplen); |
Bart Van Assche | d4556a4 | 2019-04-17 14:44:39 -0700 | [diff] [blame] | 458 | put_unaligned_le64(fd->rspdma, &cmd_pkt->nvme_rsp_dseg_address); |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 459 | |
| 460 | /* NVME CNMD IU */ |
| 461 | cmd_pkt->nvme_cmnd_dseg_len = cpu_to_le16(fd->cmdlen); |
Bart Van Assche | d4556a4 | 2019-04-17 14:44:39 -0700 | [diff] [blame] | 462 | cmd_pkt->nvme_cmnd_dseg_address = cpu_to_le64(fd->cmddma); |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 463 | |
| 464 | cmd_pkt->dseg_count = cpu_to_le16(tot_dsds); |
| 465 | cmd_pkt->byte_count = cpu_to_le32(fd->payload_length); |
| 466 | |
| 467 | /* One DSD is available in the Command Type NVME IOCB */ |
| 468 | avail_dsds = 1; |
Bart Van Assche | 15b7a68 | 2019-04-17 14:44:38 -0700 | [diff] [blame] | 469 | cur_dsd = &cmd_pkt->nvme_dsd; |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 470 | sgl = fd->first_sgl; |
| 471 | |
| 472 | /* Load data segments */ |
| 473 | for_each_sg(sgl, sg, tot_dsds, i) { |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 474 | cont_a64_entry_t *cont_pkt; |
| 475 | |
| 476 | /* Allocate additional continuation packets? */ |
| 477 | if (avail_dsds == 0) { |
| 478 | /* |
| 479 | * Five DSDs are available in the Continuation |
| 480 | * Type 1 IOCB. |
| 481 | */ |
| 482 | |
| 483 | /* Adjust ring index */ |
| 484 | req->ring_index++; |
| 485 | if (req->ring_index == req->length) { |
| 486 | req->ring_index = 0; |
| 487 | req->ring_ptr = req->ring; |
| 488 | } else { |
| 489 | req->ring_ptr++; |
| 490 | } |
| 491 | cont_pkt = (cont_a64_entry_t *)req->ring_ptr; |
Bart Van Assche | 2c26348 | 2019-04-04 12:44:45 -0700 | [diff] [blame] | 492 | put_unaligned_le32(CONTINUE_A64_TYPE, |
| 493 | &cont_pkt->entry_type); |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 494 | |
Bart Van Assche | 15b7a68 | 2019-04-17 14:44:38 -0700 | [diff] [blame] | 495 | cur_dsd = cont_pkt->dsd; |
| 496 | avail_dsds = ARRAY_SIZE(cont_pkt->dsd); |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 497 | } |
| 498 | |
Bart Van Assche | 15b7a68 | 2019-04-17 14:44:38 -0700 | [diff] [blame] | 499 | append_dsd64(&cur_dsd, sg); |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 500 | avail_dsds--; |
| 501 | } |
| 502 | |
| 503 | /* Set total entry count. */ |
| 504 | cmd_pkt->entry_count = (uint8_t)req_cnt; |
| 505 | wmb(); |
| 506 | |
| 507 | /* Adjust ring index. */ |
| 508 | req->ring_index++; |
| 509 | if (req->ring_index == req->length) { |
| 510 | req->ring_index = 0; |
| 511 | req->ring_ptr = req->ring; |
| 512 | } else { |
| 513 | req->ring_ptr++; |
| 514 | } |
| 515 | |
| 516 | /* Set chip new ring index. */ |
Bart Van Assche | 04474d3 | 2020-05-18 14:17:08 -0700 | [diff] [blame] | 517 | wrt_reg_dword(req->req_q_in, req->ring_index); |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 518 | |
| 519 | queuing_error: |
| 520 | spin_unlock_irqrestore(&qpair->qp_lock, flags); |
| 521 | return rval; |
| 522 | } |
| 523 | |
| 524 | /* Post a command */ |
| 525 | static int qla_nvme_post_cmd(struct nvme_fc_local_port *lport, |
| 526 | struct nvme_fc_remote_port *rport, void *hw_queue_handle, |
| 527 | struct nvmefc_fcp_req *fd) |
| 528 | { |
| 529 | fc_port_t *fcport; |
| 530 | struct srb_iocb *nvme; |
| 531 | struct scsi_qla_host *vha; |
Darren Trapp | 870fe24 | 2018-03-20 23:09:35 -0700 | [diff] [blame] | 532 | int rval = -ENODEV; |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 533 | srb_t *sp; |
himanshu.madhani@cavium.com | 6fcd98f | 2017-07-21 09:32:23 -0700 | [diff] [blame] | 534 | struct qla_qpair *qpair = hw_queue_handle; |
Himanshu Madhani | 5e6803b | 2018-12-10 12:36:23 -0800 | [diff] [blame] | 535 | struct nvme_private *priv = fd->private; |
Darren Trapp | 9dd9686 | 2018-03-20 23:09:32 -0700 | [diff] [blame] | 536 | struct qla_nvme_rport *qla_rport = rport->private; |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 537 | |
Darren Trapp | 9dd9686 | 2018-03-20 23:09:32 -0700 | [diff] [blame] | 538 | fcport = qla_rport->fcport; |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 539 | |
Quinn Tran | 2eb9238 | 2019-06-21 09:50:23 -0700 | [diff] [blame] | 540 | if (!qpair || !fcport || (qpair && !qpair->fw_started) || |
| 541 | (fcport && fcport->deleted)) |
Darren Trapp | 623ee824 | 2018-03-20 23:09:38 -0700 | [diff] [blame] | 542 | return rval; |
| 543 | |
Quinn Tran | 2eb9238 | 2019-06-21 09:50:23 -0700 | [diff] [blame] | 544 | vha = fcport->vha; |
Darren Trapp | 870fe24 | 2018-03-20 23:09:35 -0700 | [diff] [blame] | 545 | /* |
| 546 | * If we know the dev is going away while the transport is still sending |
| 547 | * IO's return busy back to stall the IO Q. This happens when the |
| 548 | * link goes away and fw hasn't notified us yet, but IO's are being |
| 549 | * returned. If the dev comes back quickly we won't exhaust the IO |
| 550 | * retry count at the core. |
| 551 | */ |
| 552 | if (fcport->nvme_flag & NVME_FLAG_RESETTING) |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 553 | return -EBUSY; |
| 554 | |
| 555 | /* Alloc SRB structure */ |
Quinn Tran | 6a62946 | 2018-09-04 14:19:15 -0700 | [diff] [blame] | 556 | sp = qla2xxx_get_qpair_sp(vha, qpair, fcport, GFP_ATOMIC); |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 557 | if (!sp) |
Darren Trapp | 870fe24 | 2018-03-20 23:09:35 -0700 | [diff] [blame] | 558 | return -EBUSY; |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 559 | |
himanshu.madhani@cavium.com | 6fcd98f | 2017-07-21 09:32:23 -0700 | [diff] [blame] | 560 | init_waitqueue_head(&sp->nvme_ls_waitq); |
Quinn Tran | 4c2a2d0 | 2019-06-21 09:50:24 -0700 | [diff] [blame] | 561 | kref_init(&sp->cmd_kref); |
| 562 | spin_lock_init(&priv->cmd_lock); |
Bart Van Assche | ab053c0 | 2020-05-18 14:17:09 -0700 | [diff] [blame] | 563 | sp->priv = priv; |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 564 | priv->sp = sp; |
| 565 | sp->type = SRB_NVME_CMD; |
| 566 | sp->name = "nvme_cmd"; |
| 567 | sp->done = qla_nvme_sp_done; |
Quinn Tran | 4c2a2d0 | 2019-06-21 09:50:24 -0700 | [diff] [blame] | 568 | sp->put_fn = qla_nvme_release_fcp_cmd_kref; |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 569 | sp->qpair = qpair; |
Himanshu Madhani | 5e6803b | 2018-12-10 12:36:23 -0800 | [diff] [blame] | 570 | sp->vha = vha; |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 571 | nvme = &sp->u.iocb_cmd; |
| 572 | nvme->u.nvme.desc = fd; |
| 573 | |
| 574 | rval = qla2x00_start_nvme_mq(sp); |
| 575 | if (rval != QLA_SUCCESS) { |
| 576 | ql_log(ql_log_warn, vha, 0x212d, |
| 577 | "qla2x00_start_nvme_mq failed = %d\n", rval); |
himanshu.madhani@cavium.com | 6fcd98f | 2017-07-21 09:32:23 -0700 | [diff] [blame] | 578 | wake_up(&sp->nvme_ls_waitq); |
Quinn Tran | 4c2a2d0 | 2019-06-21 09:50:24 -0700 | [diff] [blame] | 579 | sp->priv = NULL; |
| 580 | priv->sp = NULL; |
| 581 | qla2xxx_rel_qpair_sp(sp->qpair, sp); |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 582 | } |
| 583 | |
| 584 | return rval; |
| 585 | } |
| 586 | |
| 587 | static void qla_nvme_localport_delete(struct nvme_fc_local_port *lport) |
| 588 | { |
| 589 | struct scsi_qla_host *vha = lport->private; |
| 590 | |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 591 | ql_log(ql_log_info, vha, 0x210f, |
| 592 | "localport delete of %p completed.\n", vha->nvme_local_port); |
| 593 | vha->nvme_local_port = NULL; |
himanshu.madhani@cavium.com | 5621b0d | 2017-07-21 09:32:26 -0700 | [diff] [blame] | 594 | complete(&vha->nvme_del_done); |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 595 | } |
| 596 | |
| 597 | static void qla_nvme_remoteport_delete(struct nvme_fc_remote_port *rport) |
| 598 | { |
| 599 | fc_port_t *fcport; |
Arun Easi | 6a81533 | 2019-06-21 09:50:22 -0700 | [diff] [blame] | 600 | struct qla_nvme_rport *qla_rport = rport->private; |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 601 | |
Darren Trapp | 9dd9686 | 2018-03-20 23:09:32 -0700 | [diff] [blame] | 602 | fcport = qla_rport->fcport; |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 603 | fcport->nvme_remote_port = NULL; |
| 604 | fcport->nvme_flag &= ~NVME_FLAG_REGISTERED; |
Himanshu Madhani | 5e6803b | 2018-12-10 12:36:23 -0800 | [diff] [blame] | 605 | fcport->nvme_flag &= ~NVME_FLAG_DELETING; |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 606 | ql_log(ql_log_info, fcport->vha, 0x2110, |
Quinn Tran | 2eb9238 | 2019-06-21 09:50:23 -0700 | [diff] [blame] | 607 | "remoteport_delete of %p %8phN completed.\n", |
| 608 | fcport, fcport->port_name); |
Quinn Tran | baf23ed | 2019-06-16 08:05:53 -0700 | [diff] [blame] | 609 | complete(&fcport->nvme_del_done); |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 610 | } |
| 611 | |
| 612 | static struct nvme_fc_port_template qla_nvme_fc_transport = { |
| 613 | .localport_delete = qla_nvme_localport_delete, |
| 614 | .remoteport_delete = qla_nvme_remoteport_delete, |
| 615 | .create_queue = qla_nvme_alloc_queue, |
| 616 | .delete_queue = NULL, |
| 617 | .ls_req = qla_nvme_ls_req, |
| 618 | .ls_abort = qla_nvme_ls_abort, |
| 619 | .fcp_io = qla_nvme_post_cmd, |
| 620 | .fcp_abort = qla_nvme_fcp_abort, |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 621 | .max_hw_queues = 8, |
Giridhar Malavali | 6b1f444 | 2019-04-02 14:24:23 -0700 | [diff] [blame] | 622 | .max_sgl_segments = 1024, |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 623 | .max_dif_sgl_segments = 64, |
| 624 | .dma_boundary = 0xFFFFFFFF, |
| 625 | .local_priv_sz = 8, |
Darren Trapp | 9dd9686 | 2018-03-20 23:09:32 -0700 | [diff] [blame] | 626 | .remote_priv_sz = sizeof(struct qla_nvme_rport), |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 627 | .lsrqst_priv_sz = sizeof(struct nvme_private), |
| 628 | .fcprqst_priv_sz = sizeof(struct nvme_private), |
| 629 | }; |
| 630 | |
Quinn Tran | baf23ed | 2019-06-16 08:05:53 -0700 | [diff] [blame] | 631 | void qla_nvme_unregister_remote_port(struct fc_port *fcport) |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 632 | { |
Arun Easi | 6a81533 | 2019-06-21 09:50:22 -0700 | [diff] [blame] | 633 | int ret; |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 634 | |
Arnd Bergmann | bcda771 | 2017-06-30 18:10:40 +0200 | [diff] [blame] | 635 | if (!IS_ENABLED(CONFIG_NVME_FC)) |
| 636 | return; |
| 637 | |
himanshu.madhani@cavium.com | 49b3d5f6 | 2017-07-21 09:32:27 -0700 | [diff] [blame] | 638 | ql_log(ql_log_warn, NULL, 0x2112, |
Quinn Tran | 2eb9238 | 2019-06-21 09:50:23 -0700 | [diff] [blame] | 639 | "%s: unregister remoteport on %p %8phN\n", |
| 640 | __func__, fcport, fcport->port_name); |
himanshu.madhani@cavium.com | 49b3d5f6 | 2017-07-21 09:32:27 -0700 | [diff] [blame] | 641 | |
Quinn Tran | 03cc44b | 2019-07-26 09:07:39 -0700 | [diff] [blame] | 642 | if (test_bit(PFLG_DRIVER_REMOVING, &fcport->vha->pci_flags)) |
| 643 | nvme_fc_set_remoteport_devloss(fcport->nvme_remote_port, 0); |
| 644 | |
Arun Easi | 6a81533 | 2019-06-21 09:50:22 -0700 | [diff] [blame] | 645 | init_completion(&fcport->nvme_del_done); |
| 646 | ret = nvme_fc_unregister_remoteport(fcport->nvme_remote_port); |
| 647 | if (ret) |
| 648 | ql_log(ql_log_info, fcport->vha, 0x2114, |
| 649 | "%s: Failed to unregister nvme_remote_port (%d)\n", |
| 650 | __func__, ret); |
| 651 | wait_for_completion(&fcport->nvme_del_done); |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 652 | } |
| 653 | |
himanshu.madhani@cavium.com | 0f7e51f | 2017-07-21 09:32:24 -0700 | [diff] [blame] | 654 | void qla_nvme_delete(struct scsi_qla_host *vha) |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 655 | { |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 656 | int nv_ret; |
| 657 | |
Arnd Bergmann | bcda771 | 2017-06-30 18:10:40 +0200 | [diff] [blame] | 658 | if (!IS_ENABLED(CONFIG_NVME_FC)) |
| 659 | return; |
| 660 | |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 661 | if (vha->nvme_local_port) { |
himanshu.madhani@cavium.com | 5621b0d | 2017-07-21 09:32:26 -0700 | [diff] [blame] | 662 | init_completion(&vha->nvme_del_done); |
Darren Trapp | 9dd9686 | 2018-03-20 23:09:32 -0700 | [diff] [blame] | 663 | ql_log(ql_log_info, vha, 0x2116, |
| 664 | "unregister localport=%p\n", |
| 665 | vha->nvme_local_port); |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 666 | nv_ret = nvme_fc_unregister_localport(vha->nvme_local_port); |
Darren Trapp | 9dd9686 | 2018-03-20 23:09:32 -0700 | [diff] [blame] | 667 | if (nv_ret) |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 668 | ql_log(ql_log_info, vha, 0x2115, |
| 669 | "Unregister of localport failed\n"); |
Darren Trapp | 9dd9686 | 2018-03-20 23:09:32 -0700 | [diff] [blame] | 670 | else |
| 671 | wait_for_completion(&vha->nvme_del_done); |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 672 | } |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 673 | } |
| 674 | |
Quinn Tran | 8777e43 | 2018-08-02 13:16:57 -0700 | [diff] [blame] | 675 | int qla_nvme_register_hba(struct scsi_qla_host *vha) |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 676 | { |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 677 | struct nvme_fc_port_template *tmpl; |
| 678 | struct qla_hw_data *ha; |
| 679 | struct nvme_fc_port_info pinfo; |
Quinn Tran | 8777e43 | 2018-08-02 13:16:57 -0700 | [diff] [blame] | 680 | int ret = EINVAL; |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 681 | |
Arnd Bergmann | bcda771 | 2017-06-30 18:10:40 +0200 | [diff] [blame] | 682 | if (!IS_ENABLED(CONFIG_NVME_FC)) |
Quinn Tran | 8777e43 | 2018-08-02 13:16:57 -0700 | [diff] [blame] | 683 | return ret; |
Arnd Bergmann | bcda771 | 2017-06-30 18:10:40 +0200 | [diff] [blame] | 684 | |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 685 | ha = vha->hw; |
| 686 | tmpl = &qla_nvme_fc_transport; |
| 687 | |
| 688 | WARN_ON(vha->nvme_local_port); |
| 689 | WARN_ON(ha->max_req_queues < 3); |
| 690 | |
| 691 | qla_nvme_fc_transport.max_hw_queues = |
| 692 | min((uint8_t)(qla_nvme_fc_transport.max_hw_queues), |
| 693 | (uint8_t)(ha->max_req_queues - 2)); |
| 694 | |
| 695 | pinfo.node_name = wwn_to_u64(vha->node_name); |
| 696 | pinfo.port_name = wwn_to_u64(vha->port_name); |
| 697 | pinfo.port_role = FC_PORT_ROLE_NVME_INITIATOR; |
| 698 | pinfo.port_id = vha->d_id.b24; |
| 699 | |
| 700 | ql_log(ql_log_info, vha, 0xffff, |
Darren Trap | d7936a9 | 2017-08-23 15:04:59 -0700 | [diff] [blame] | 701 | "register_localport: host-traddr=nn-0x%llx:pn-0x%llx on portID:%x\n", |
| 702 | pinfo.node_name, pinfo.port_name, pinfo.port_id); |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 703 | qla_nvme_fc_transport.dma_boundary = vha->host->dma_boundary; |
| 704 | |
| 705 | ret = nvme_fc_register_localport(&pinfo, tmpl, |
| 706 | get_device(&ha->pdev->dev), &vha->nvme_local_port); |
| 707 | if (ret) { |
| 708 | ql_log(ql_log_warn, vha, 0xffff, |
| 709 | "register_localport failed: ret=%x\n", ret); |
Quinn Tran | 8777e43 | 2018-08-02 13:16:57 -0700 | [diff] [blame] | 710 | } else { |
| 711 | vha->nvme_local_port->private = vha; |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 712 | } |
Quinn Tran | 8777e43 | 2018-08-02 13:16:57 -0700 | [diff] [blame] | 713 | |
| 714 | return ret; |
Duane Grigsby | e84067d | 2017-06-21 13:48:43 -0700 | [diff] [blame] | 715 | } |